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1.TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"2.SH NAME3cpupower\-monitor \- Report processor frequency and idle statistics4.SH SYNOPSIS5.ft B6.B cpupower monitor7.RB "\-l"8 9.B cpupower monitor10.RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ]11.RB [ "\-i seconds" ]12.br13.B cpupower monitor14.RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ]15.RB command16.br17.SH DESCRIPTION18\fBcpupower-monitor \fP reports processor topology, frequency and idle power19state statistics. Either \fBcommand\fP is forked and20statistics are printed upon its completion, or statistics are printed periodically.21 22\fBcpupower-monitor \fP implements independent processor sleep state and23frequency counters. Some are retrieved from kernel statistics, some are24directly reading out hardware registers. Use \-l to get an overview which are25supported on your system.26 27.SH Options28.PP29\-l30.RS 431List available monitors on your system. Additional details about each monitor32are shown:33.RS 234.IP \(bu35The name in quotation marks which can be passed to the \-m parameter.36.IP \(bu37The number of different counters the monitor supports in brackets.38.IP \(bu39The amount of time in seconds the counters might overflow, due to40implementation constraints.41.IP \(bu42The name and a description of each counter and its processor hierarchy level43coverage in square brackets:44.RS 445.IP \(bu46[T] \-> Thread47.IP \(bu48[C] \-> Core49.IP \(bu50[P] \-> Processor Package (Socket)51.IP \(bu52[M] \-> Machine/Platform wide counter53.RE54.RE55.RE56.PP57\-m <mon1>,<mon2>,...58.RS 459Only display specific monitors. Use the monitor string(s) provided by \-l option.60.RE61.PP62\-i seconds63.RS 464Measure interval.65.RE66.PP67\-c68.RS 469Schedule the process on every core before starting and ending measuring.70This could be needed for the Idle_Stats monitor when no other MSR based71monitor (has to be run on the core that is measured) is run in parallel.72This is to wake up the processors from deeper sleep states and let the73kernel re74-account its cpuidle (C-state) information before reading the75cpuidle timings from sysfs.76.RE77.PP78command79.RS 480Measure idle and frequency characteristics of an arbitrary command/workload.81The executable \fBcommand\fP is forked and upon its exit, statistics gathered since it was82forked are displayed.83.RE84 85.SH MONITOR DESCRIPTIONS86.SS "Idle_Stats"87Shows statistics of the cpuidle kernel subsystem. Values are retrieved from88/sys/devices/system/cpu/cpu*/cpuidle/state*/.89The kernel updates these values every time an idle state is entered or90left. Therefore there can be some inaccuracy when cores are in an idle91state for some time when the measure starts or ends. In worst case it can happen92that one core stayed in an idle state for the whole measure time and the idle93state usage time as exported by the kernel did not get updated. In this case94a state residency of 0 percent is shown while it was 100.95 96.SS "Mperf"97The name comes from the aperf/mperf (average and maximum) MSR registers used98which are available on recent X86 processors. It shows the average frequency99(including boost frequencies).100The fact that on all recent hardware the mperf timer stops ticking in any idle101state it is also used to show C0 (processor is active) and Cx (processor is in102any sleep state) times. These counters do not have the inaccuracy restrictions103the "Idle_Stats" counters may show.104May work poorly on Linux-2.6.20 through 2.6.29, as the \fBacpi-cpufreq \fP105kernel frequency driver periodically cleared aperf/mperf registers in those106kernels.107 108.SS "Nehalem" "SandyBridge" "HaswellExtended"109Intel Core and Package sleep state counters.110Threads (hyperthreaded cores) may not be able to enter deeper core states if111its sibling is utilized.112Deepest package sleep states may in reality show up as machine/platform wide113sleep states and can only be entered if all cores are idle. Look up Intel114manuals (some are provided in the References section) for further details.115The monitors are named after the CPU family where the sleep state capabilities116got introduced and may not match exactly the CPU name of the platform.117For example an IvyBridge processor has sleep state capabilities which got118introduced in Nehalem and SandyBridge processor families.119Thus on an IvyBridge processor one will get Nehalem and SandyBridge sleep120state monitors.121HaswellExtended extra package sleep state capabilities are available only in a122specific Haswell (family 0x45) and probably also other future processors.123 124.SS "Fam_12h" "Fam_14h"125AMD laptop and desktop processor (family 12h and 14h) sleep state counters.126The registers are accessed via PCI and therefore can still be read out while127cores have been offlined.128 129There is one special counter: NBP1 (North Bridge P1).130This one always returns 0 or 1, depending on whether the North Bridge P1131power state got entered at least once during measure time.132Being able to enter NBP1 state also depends on graphics power management.133Therefore this counter can be used to verify whether the graphics' driver134power management is working as expected.135 136.SH EXAMPLES137 138cpupower monitor -l" may show:139.RS 4140Monitor "Mperf" (3 states) \- Might overflow after 922000000 s141 142 ...143 144Monitor "Idle_Stats" (3 states) \- Might overflow after 4294967295 s145 146 ...147 148.RE149cpupower monitor \-m "Idle_Stats,Mperf" scp /tmp/test /nfs/tmp150 151Monitor the scp command, show both Mperf and Idle_Stats states counter152statistics, but in exchanged order.153 154 155 156.RE157Be careful that the typical command to fully utilize one CPU by doing:158 159cpupower monitor cat /dev/zero >/dev/null160 161Does not work as expected, because the measured output is redirected to162/dev/null. This could get workarounded by putting the line into an own, tiny163shell script. Hit CTRL\-c to terminate the command and get the measure output164displayed.165 166.SH REFERENCES167"BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 14h Processors"168https://support.amd.com/us/Processor_TechDocs/43170.pdf169 170"What Is Intel® Turbo Boost Technology?"171https://www.intel.com/content/www/us/en/gaming/resources/turbo-boost.html172 173"Power Management - Technology Overview"174https://cdrdv2.intel.com/v1/dl/getContent/637748175 176"Intel® 64 and IA-32 Architectures Software Developer's Manual177Volume 3B: System Programming Guide"178https://www.intel.com/products/processor/manuals179 180.SH FILES181.ta182.nf183/dev/cpu/*/msr184/sys/devices/system/cpu/cpu*/cpuidle/state*/.185.fi186 187.SH "SEE ALSO"188powertop(8), msr(4), vmstat(8)189.PP190.SH AUTHORS191.nf192Written by Thomas Renninger <trenn@suse.de>193 194Nehalem, SandyBridge monitors and command passing195based on turbostat.8 from Len Brown <len.brown@intel.com>196