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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * tools/testing/selftests/kvm/include/x86_64/svm.h4 * This is a copy of arch/x86/include/asm/svm.h5 *6 */7 8#ifndef SELFTEST_KVM_SVM_H9#define SELFTEST_KVM_SVM_H10 11enum {12 INTERCEPT_INTR,13 INTERCEPT_NMI,14 INTERCEPT_SMI,15 INTERCEPT_INIT,16 INTERCEPT_VINTR,17 INTERCEPT_SELECTIVE_CR0,18 INTERCEPT_STORE_IDTR,19 INTERCEPT_STORE_GDTR,20 INTERCEPT_STORE_LDTR,21 INTERCEPT_STORE_TR,22 INTERCEPT_LOAD_IDTR,23 INTERCEPT_LOAD_GDTR,24 INTERCEPT_LOAD_LDTR,25 INTERCEPT_LOAD_TR,26 INTERCEPT_RDTSC,27 INTERCEPT_RDPMC,28 INTERCEPT_PUSHF,29 INTERCEPT_POPF,30 INTERCEPT_CPUID,31 INTERCEPT_RSM,32 INTERCEPT_IRET,33 INTERCEPT_INTn,34 INTERCEPT_INVD,35 INTERCEPT_PAUSE,36 INTERCEPT_HLT,37 INTERCEPT_INVLPG,38 INTERCEPT_INVLPGA,39 INTERCEPT_IOIO_PROT,40 INTERCEPT_MSR_PROT,41 INTERCEPT_TASK_SWITCH,42 INTERCEPT_FERR_FREEZE,43 INTERCEPT_SHUTDOWN,44 INTERCEPT_VMRUN,45 INTERCEPT_VMMCALL,46 INTERCEPT_VMLOAD,47 INTERCEPT_VMSAVE,48 INTERCEPT_STGI,49 INTERCEPT_CLGI,50 INTERCEPT_SKINIT,51 INTERCEPT_RDTSCP,52 INTERCEPT_ICEBP,53 INTERCEPT_WBINVD,54 INTERCEPT_MONITOR,55 INTERCEPT_MWAIT,56 INTERCEPT_MWAIT_COND,57 INTERCEPT_XSETBV,58 INTERCEPT_RDPRU,59};60 61struct hv_vmcb_enlightenments {62 struct __packed hv_enlightenments_control {63 u32 nested_flush_hypercall:1;64 u32 msr_bitmap:1;65 u32 enlightened_npt_tlb: 1;66 u32 reserved:29;67 } __packed hv_enlightenments_control;68 u32 hv_vp_id;69 u64 hv_vm_id;70 u64 partition_assist_page;71 u64 reserved;72} __packed;73 74/*75 * Hyper-V uses the software reserved clean bit in VMCB76 */77#define HV_VMCB_NESTED_ENLIGHTENMENTS (1U << 31)78 79/* Synthetic VM-Exit */80#define HV_SVM_EXITCODE_ENL 0xf000000081#define HV_SVM_ENL_EXITCODE_TRAP_AFTER_FLUSH (1)82 83struct __attribute__ ((__packed__)) vmcb_control_area {84 u32 intercept_cr;85 u32 intercept_dr;86 u32 intercept_exceptions;87 u64 intercept;88 u8 reserved_1[40];89 u16 pause_filter_thresh;90 u16 pause_filter_count;91 u64 iopm_base_pa;92 u64 msrpm_base_pa;93 u64 tsc_offset;94 u32 asid;95 u8 tlb_ctl;96 u8 reserved_2[3];97 u32 int_ctl;98 u32 int_vector;99 u32 int_state;100 u8 reserved_3[4];101 u32 exit_code;102 u32 exit_code_hi;103 u64 exit_info_1;104 u64 exit_info_2;105 u32 exit_int_info;106 u32 exit_int_info_err;107 u64 nested_ctl;108 u64 avic_vapic_bar;109 u8 reserved_4[8];110 u32 event_inj;111 u32 event_inj_err;112 u64 nested_cr3;113 u64 virt_ext;114 u32 clean;115 u32 reserved_5;116 u64 next_rip;117 u8 insn_len;118 u8 insn_bytes[15];119 u64 avic_backing_page; /* Offset 0xe0 */120 u8 reserved_6[8]; /* Offset 0xe8 */121 u64 avic_logical_id; /* Offset 0xf0 */122 u64 avic_physical_id; /* Offset 0xf8 */123 u8 reserved_7[8];124 u64 vmsa_pa; /* Used for an SEV-ES guest */125 u8 reserved_8[720];126 /*127 * Offset 0x3e0, 32 bytes reserved128 * for use by hypervisor/software.129 */130 union {131 struct hv_vmcb_enlightenments hv_enlightenments;132 u8 reserved_sw[32];133 };134};135 136 137#define TLB_CONTROL_DO_NOTHING 0138#define TLB_CONTROL_FLUSH_ALL_ASID 1139#define TLB_CONTROL_FLUSH_ASID 3140#define TLB_CONTROL_FLUSH_ASID_LOCAL 7141 142#define V_TPR_MASK 0x0f143 144#define V_IRQ_SHIFT 8145#define V_IRQ_MASK (1 << V_IRQ_SHIFT)146 147#define V_GIF_SHIFT 9148#define V_GIF_MASK (1 << V_GIF_SHIFT)149 150#define V_INTR_PRIO_SHIFT 16151#define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)152 153#define V_IGN_TPR_SHIFT 20154#define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)155 156#define V_INTR_MASKING_SHIFT 24157#define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT)158 159#define V_GIF_ENABLE_SHIFT 25160#define V_GIF_ENABLE_MASK (1 << V_GIF_ENABLE_SHIFT)161 162#define AVIC_ENABLE_SHIFT 31163#define AVIC_ENABLE_MASK (1 << AVIC_ENABLE_SHIFT)164 165#define LBR_CTL_ENABLE_MASK BIT_ULL(0)166#define VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK BIT_ULL(1)167 168#define SVM_INTERRUPT_SHADOW_MASK 1169 170#define SVM_IOIO_STR_SHIFT 2171#define SVM_IOIO_REP_SHIFT 3172#define SVM_IOIO_SIZE_SHIFT 4173#define SVM_IOIO_ASIZE_SHIFT 7174 175#define SVM_IOIO_TYPE_MASK 1176#define SVM_IOIO_STR_MASK (1 << SVM_IOIO_STR_SHIFT)177#define SVM_IOIO_REP_MASK (1 << SVM_IOIO_REP_SHIFT)178#define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT)179#define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT)180 181#define SVM_VM_CR_VALID_MASK 0x001fULL182#define SVM_VM_CR_SVM_LOCK_MASK 0x0008ULL183#define SVM_VM_CR_SVM_DIS_MASK 0x0010ULL184 185#define SVM_NESTED_CTL_NP_ENABLE BIT(0)186#define SVM_NESTED_CTL_SEV_ENABLE BIT(1)187 188struct __attribute__ ((__packed__)) vmcb_seg {189 u16 selector;190 u16 attrib;191 u32 limit;192 u64 base;193};194 195struct __attribute__ ((__packed__)) vmcb_save_area {196 struct vmcb_seg es;197 struct vmcb_seg cs;198 struct vmcb_seg ss;199 struct vmcb_seg ds;200 struct vmcb_seg fs;201 struct vmcb_seg gs;202 struct vmcb_seg gdtr;203 struct vmcb_seg ldtr;204 struct vmcb_seg idtr;205 struct vmcb_seg tr;206 u8 reserved_1[43];207 u8 cpl;208 u8 reserved_2[4];209 u64 efer;210 u8 reserved_3[112];211 u64 cr4;212 u64 cr3;213 u64 cr0;214 u64 dr7;215 u64 dr6;216 u64 rflags;217 u64 rip;218 u8 reserved_4[88];219 u64 rsp;220 u8 reserved_5[24];221 u64 rax;222 u64 star;223 u64 lstar;224 u64 cstar;225 u64 sfmask;226 u64 kernel_gs_base;227 u64 sysenter_cs;228 u64 sysenter_esp;229 u64 sysenter_eip;230 u64 cr2;231 u8 reserved_6[32];232 u64 g_pat;233 u64 dbgctl;234 u64 br_from;235 u64 br_to;236 u64 last_excp_from;237 u64 last_excp_to;238};239 240struct __attribute__ ((__packed__)) vmcb {241 struct vmcb_control_area control;242 struct vmcb_save_area save;243};244 245#define SVM_VM_CR_SVM_DISABLE 4246 247#define SVM_SELECTOR_S_SHIFT 4248#define SVM_SELECTOR_DPL_SHIFT 5249#define SVM_SELECTOR_P_SHIFT 7250#define SVM_SELECTOR_AVL_SHIFT 8251#define SVM_SELECTOR_L_SHIFT 9252#define SVM_SELECTOR_DB_SHIFT 10253#define SVM_SELECTOR_G_SHIFT 11254 255#define SVM_SELECTOR_TYPE_MASK (0xf)256#define SVM_SELECTOR_S_MASK (1 << SVM_SELECTOR_S_SHIFT)257#define SVM_SELECTOR_DPL_MASK (3 << SVM_SELECTOR_DPL_SHIFT)258#define SVM_SELECTOR_P_MASK (1 << SVM_SELECTOR_P_SHIFT)259#define SVM_SELECTOR_AVL_MASK (1 << SVM_SELECTOR_AVL_SHIFT)260#define SVM_SELECTOR_L_MASK (1 << SVM_SELECTOR_L_SHIFT)261#define SVM_SELECTOR_DB_MASK (1 << SVM_SELECTOR_DB_SHIFT)262#define SVM_SELECTOR_G_MASK (1 << SVM_SELECTOR_G_SHIFT)263 264#define SVM_SELECTOR_WRITE_MASK (1 << 1)265#define SVM_SELECTOR_READ_MASK SVM_SELECTOR_WRITE_MASK266#define SVM_SELECTOR_CODE_MASK (1 << 3)267 268#define INTERCEPT_CR0_READ 0269#define INTERCEPT_CR3_READ 3270#define INTERCEPT_CR4_READ 4271#define INTERCEPT_CR8_READ 8272#define INTERCEPT_CR0_WRITE (16 + 0)273#define INTERCEPT_CR3_WRITE (16 + 3)274#define INTERCEPT_CR4_WRITE (16 + 4)275#define INTERCEPT_CR8_WRITE (16 + 8)276 277#define INTERCEPT_DR0_READ 0278#define INTERCEPT_DR1_READ 1279#define INTERCEPT_DR2_READ 2280#define INTERCEPT_DR3_READ 3281#define INTERCEPT_DR4_READ 4282#define INTERCEPT_DR5_READ 5283#define INTERCEPT_DR6_READ 6284#define INTERCEPT_DR7_READ 7285#define INTERCEPT_DR0_WRITE (16 + 0)286#define INTERCEPT_DR1_WRITE (16 + 1)287#define INTERCEPT_DR2_WRITE (16 + 2)288#define INTERCEPT_DR3_WRITE (16 + 3)289#define INTERCEPT_DR4_WRITE (16 + 4)290#define INTERCEPT_DR5_WRITE (16 + 5)291#define INTERCEPT_DR6_WRITE (16 + 6)292#define INTERCEPT_DR7_WRITE (16 + 7)293 294#define SVM_EVTINJ_VEC_MASK 0xff295 296#define SVM_EVTINJ_TYPE_SHIFT 8297#define SVM_EVTINJ_TYPE_MASK (7 << SVM_EVTINJ_TYPE_SHIFT)298 299#define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT)300#define SVM_EVTINJ_TYPE_NMI (2 << SVM_EVTINJ_TYPE_SHIFT)301#define SVM_EVTINJ_TYPE_EXEPT (3 << SVM_EVTINJ_TYPE_SHIFT)302#define SVM_EVTINJ_TYPE_SOFT (4 << SVM_EVTINJ_TYPE_SHIFT)303 304#define SVM_EVTINJ_VALID (1 << 31)305#define SVM_EVTINJ_VALID_ERR (1 << 11)306 307#define SVM_EXITINTINFO_VEC_MASK SVM_EVTINJ_VEC_MASK308#define SVM_EXITINTINFO_TYPE_MASK SVM_EVTINJ_TYPE_MASK309 310#define SVM_EXITINTINFO_TYPE_INTR SVM_EVTINJ_TYPE_INTR311#define SVM_EXITINTINFO_TYPE_NMI SVM_EVTINJ_TYPE_NMI312#define SVM_EXITINTINFO_TYPE_EXEPT SVM_EVTINJ_TYPE_EXEPT313#define SVM_EXITINTINFO_TYPE_SOFT SVM_EVTINJ_TYPE_SOFT314 315#define SVM_EXITINTINFO_VALID SVM_EVTINJ_VALID316#define SVM_EXITINTINFO_VALID_ERR SVM_EVTINJ_VALID_ERR317 318#define SVM_EXITINFOSHIFT_TS_REASON_IRET 36319#define SVM_EXITINFOSHIFT_TS_REASON_JMP 38320#define SVM_EXITINFOSHIFT_TS_HAS_ERROR_CODE 44321 322#define SVM_EXITINFO_REG_MASK 0x0F323 324#define SVM_CR0_SELECTIVE_MASK (X86_CR0_TS | X86_CR0_MP)325 326#endif /* SELFTEST_KVM_SVM_H */327