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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2023 Intel Corporation4 */5 6#ifndef __ASSEMBLY__7#define __ASSEMBLY__8#endif9 10#include <asm/csr.h>11 12.macro save_context13 addi sp, sp, (-8*34)14 sd x1, 0(sp)15 sd x2, 8(sp)16 sd x3, 16(sp)17 sd x4, 24(sp)18 sd x5, 32(sp)19 sd x6, 40(sp)20 sd x7, 48(sp)21 sd x8, 56(sp)22 sd x9, 64(sp)23 sd x10, 72(sp)24 sd x11, 80(sp)25 sd x12, 88(sp)26 sd x13, 96(sp)27 sd x14, 104(sp)28 sd x15, 112(sp)29 sd x16, 120(sp)30 sd x17, 128(sp)31 sd x18, 136(sp)32 sd x19, 144(sp)33 sd x20, 152(sp)34 sd x21, 160(sp)35 sd x22, 168(sp)36 sd x23, 176(sp)37 sd x24, 184(sp)38 sd x25, 192(sp)39 sd x26, 200(sp)40 sd x27, 208(sp)41 sd x28, 216(sp)42 sd x29, 224(sp)43 sd x30, 232(sp)44 sd x31, 240(sp)45 csrr s0, CSR_SEPC46 csrr s1, CSR_SSTATUS47 csrr s2, CSR_SCAUSE48 sd s0, 248(sp)49 sd s1, 256(sp)50 sd s2, 264(sp)51.endm52 53.macro restore_context54 ld s2, 264(sp)55 ld s1, 256(sp)56 ld s0, 248(sp)57 csrw CSR_SCAUSE, s258 csrw CSR_SSTATUS, s159 csrw CSR_SEPC, s060 ld x31, 240(sp)61 ld x30, 232(sp)62 ld x29, 224(sp)63 ld x28, 216(sp)64 ld x27, 208(sp)65 ld x26, 200(sp)66 ld x25, 192(sp)67 ld x24, 184(sp)68 ld x23, 176(sp)69 ld x22, 168(sp)70 ld x21, 160(sp)71 ld x20, 152(sp)72 ld x19, 144(sp)73 ld x18, 136(sp)74 ld x17, 128(sp)75 ld x16, 120(sp)76 ld x15, 112(sp)77 ld x14, 104(sp)78 ld x13, 96(sp)79 ld x12, 88(sp)80 ld x11, 80(sp)81 ld x10, 72(sp)82 ld x9, 64(sp)83 ld x8, 56(sp)84 ld x7, 48(sp)85 ld x6, 40(sp)86 ld x5, 32(sp)87 ld x4, 24(sp)88 ld x3, 16(sp)89 ld x2, 8(sp)90 ld x1, 0(sp)91 addi sp, sp, (8*34)92.endm93 94.balign 495.global exception_vectors96exception_vectors:97 save_context98 move a0, sp99 call route_exception100 restore_context101 sret102