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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright 2015, Cyril Bur, IBM Corp.4 */5 6#include "basic_asm.h"7#include "fpu_asm.h"8 9FUNC_START(check_fpu)10 mr r4,r311 li r3,1 # assume a bad result12 lfd f0,0(r4)13 fcmpu cr1,f0,f1414 bne cr1,1f15 lfd f0,8(r4)16 fcmpu cr1,f0,f1517 bne cr1,1f18 lfd f0,16(r4)19 fcmpu cr1,f0,f1620 bne cr1,1f21 lfd f0,24(r4)22 fcmpu cr1,f0,f1723 bne cr1,1f24 lfd f0,32(r4)25 fcmpu cr1,f0,f1826 bne cr1,1f27 lfd f0,40(r4)28 fcmpu cr1,f0,f1929 bne cr1,1f30 lfd f0,48(r4)31 fcmpu cr1,f0,f2032 bne cr1,1f33 lfd f0,56(r4)34 fcmpu cr1,f0,f2135 bne cr1,1f36 lfd f0,64(r4)37 fcmpu cr1,f0,f2238 bne cr1,1f39 lfd f0,72(r4)40 fcmpu cr1,f0,f2341 bne cr1,1f42 lfd f0,80(r4)43 fcmpu cr1,f0,f2444 bne cr1,1f45 lfd f0,88(r4)46 fcmpu cr1,f0,f2547 bne cr1,1f48 lfd f0,96(r4)49 fcmpu cr1,f0,f2650 bne cr1,1f51 lfd f0,104(r4)52 fcmpu cr1,f0,f2753 bne cr1,1f54 lfd f0,112(r4)55 fcmpu cr1,f0,f2856 bne cr1,1f57 lfd f0,120(r4)58 fcmpu cr1,f0,f2959 bne cr1,1f60 lfd f0,128(r4)61 fcmpu cr1,f0,f3062 bne cr1,1f63 lfd f0,136(r4)64 fcmpu cr1,f0,f3165 bne cr1,1f66 li r3,0 # Success!!!671: blr68 69 70// int check_all_fprs(double darray[32])71FUNC_START(check_all_fprs)72 PUSH_BASIC_STACK(8)73 mr r4, r3 // r4 = darray74 li r3, 1 // prepare for failure75 76 stfd f31, STACK_FRAME_LOCAL(0, 0)(sp) // backup f3177 78 // Check regs f0-f30, using f31 as scratch79 .set i, 080 .rept 3181 lfd f31, (8 * i)(r4) // load expected value82 fcmpu cr0, i, f31 // compare83 bne cr0, 1f // bail if mismatch84 .set i, i + 185 .endr86 87 lfd f31, STACK_FRAME_LOCAL(0, 0)(sp) // reload f3188 stfd f30, STACK_FRAME_LOCAL(0, 0)(sp) // backup f3089 90 lfd f30, (8 * 31)(r4) // load expected value of f3191 fcmpu cr0, f30, f31 // compare92 bne cr0, 1f // bail if mismatch93 94 lfd f30, STACK_FRAME_LOCAL(0, 0)(sp) // reload f3095 96 // Success97 li r3, 098 991: POP_BASIC_STACK(8)100 blr101FUNC_END(check_all_fprs)102 103FUNC_START(test_fpu)104 # r3 holds pointer to where to put the result of fork105 # r4 holds pointer to the pid106 # f14-f31 are non volatiles107 PUSH_BASIC_STACK(256)108 PUSH_FPU(256)109 std r3,STACK_FRAME_PARAM(0)(sp) # Address of darray110 std r4,STACK_FRAME_PARAM(1)(sp) # Address of pid111 112 // Load FPRs with expected values113 OP_REGS lfd, 8, 0, 31, r3114 115 li r0,__NR_fork116 sc117 118 # pass the result of the fork to the caller119 ld r9,STACK_FRAME_PARAM(1)(sp)120 std r3,0(r9)121 122 ld r3,STACK_FRAME_PARAM(0)(sp)123 bl check_all_fprs124 nop125 126 POP_FPU(256)127 POP_BASIC_STACK(256)128 blr129FUNC_END(test_fpu)130 131# int preempt_fpu(double *darray, int *threads_running, int *running)132# On starting will (atomically) decrement not_ready as a signal that the FPU133# has been loaded with darray. Will proceed to check the validity of the FPU134# registers while running is not zero.135FUNC_START(preempt_fpu)136 PUSH_BASIC_STACK(256)137 PUSH_FPU(256)138 std r3,STACK_FRAME_PARAM(0)(sp) # double *darray139 std r4,STACK_FRAME_PARAM(1)(sp) # int *threads_starting140 std r5,STACK_FRAME_PARAM(2)(sp) # int *running141 142 // Load FPRs with expected values143 OP_REGS lfd, 8, 0, 31, r3144 145 sync146 # Atomic DEC147 ld r3,STACK_FRAME_PARAM(1)(sp)1481: lwarx r4,0,r3149 addi r4,r4,-1150 stwcx. r4,0,r3151 bne- 1b152 1532: ld r3,STACK_FRAME_PARAM(0)(sp)154 bl check_all_fprs155 cmpdi r3,0156 bne 3f157 ld r4,STACK_FRAME_PARAM(2)(sp)158 ld r5,0(r4)159 cmpwi r5,0160 bne 2b161 1623: POP_FPU(256)163 POP_BASIC_STACK(256)164 blr165FUNC_END(preempt_fpu)166