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1// This test checks that ADR+LDR instruction sequence relaxed by the linker2// to the ADR+ADD sequence is properly recognized and handled by bolt3 4// RUN: yaml2obj %p/Inputs/got-ld64-relaxation.yaml &> %t.exe5// RUN: llvm-bolt %t.exe -o %t.null --print-fix-relaxations \6// RUN: --print-only=main | FileCheck %s7 8// CHECK: adrp x0, foo9// CHECK-NEXT: add x0, x0, :lo12:foo10