377 lines · c
1/*===----------- avx10_2satcvtdsintrin.h - AVX512SATCVTDS intrinsics --------===2 *3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4 * See https://llvm.org/LICENSE.txt for license information.5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6 *7 *===-----------------------------------------------------------------------===8 */9 10#ifndef __IMMINTRIN_H11#error \12 "Never use <avx10_2satcvtdsintrin.h> directly; include <immintrin.h> instead."13#endif // __IMMINTRIN_H14 15#ifndef __AVX10_2SATCVTDSINTRIN_H16#define __AVX10_2SATCVTDSINTRIN_H17 18/* Define the default attributes for the functions in this file. */19#define __DEFAULT_FN_ATTRS256 \20 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \21 __min_vector_width__(256)))22 23#define __DEFAULT_FN_ATTRS128 \24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \25 __min_vector_width__(128)))26 27#define _mm_cvtts_roundsd_i32(__A, __R) \28 ((int)__builtin_ia32_vcvttsd2sis32((__v2df)(__m128)(__A), (const int)(__R)))29 30#define _mm_cvtts_roundsd_si32(__A, __R) \31 ((int)__builtin_ia32_vcvttsd2sis32((__v2df)(__m128d)(__A), (const int)(__R)))32 33#define _mm_cvtts_roundsd_u32(__A, __R) \34 ((unsigned int)__builtin_ia32_vcvttsd2usis32((__v2df)(__m128d)(__A), \35 (const int)(__R)))36 37#define _mm_cvtts_roundss_i32(__A, __R) \38 ((int)__builtin_ia32_vcvttss2sis32((__v4sf)(__m128)(__A), (const int)(__R)))39 40#define _mm_cvtts_roundss_si32(__A, __R) \41 ((int)__builtin_ia32_vcvttss2sis32((__v4sf)(__m128)(__A), (const int)(__R)))42 43#define _mm_cvtts_roundss_u32(__A, __R) \44 ((unsigned int)__builtin_ia32_vcvttss2usis32((__v4sf)(__m128)(__A), \45 (const int)(__R)))46 47#ifdef __x86_64__48#define _mm_cvtts_roundss_u64(__A, __R) \49 ((unsigned long long)__builtin_ia32_vcvttss2usis64((__v4sf)(__m128)(__A), \50 (const int)(__R)))51 52#define _mm_cvtts_roundsd_u64(__A, __R) \53 ((unsigned long long)__builtin_ia32_vcvttsd2usis64((__v2df)(__m128d)(__A), \54 (const int)(__R)))55 56#define _mm_cvtts_roundss_i64(__A, __R) \57 ((long long)__builtin_ia32_vcvttss2sis64((__v4sf)(__m128)(__A), \58 (const int)(__R)))59 60#define _mm_cvtts_roundss_si64(__A, __R) \61 ((long long)__builtin_ia32_vcvttss2sis64((__v4sf)(__m128)(__A), \62 (const int)(__R)))63 64#define _mm_cvtts_roundsd_si64(__A, __R) \65 ((long long)__builtin_ia32_vcvttsd2sis64((__v2df)(__m128d)(__A), \66 (const int)(__R)))67 68#define _mm_cvtts_roundsd_i64(__A, __R) \69 ((long long)__builtin_ia32_vcvttsd2sis64((__v2df)(__m128d)(__A), \70 (const int)(__R)))71#endif /* __x86_64__ */72 73// 128 Bit : Double -> int74static __inline__ __m128i __DEFAULT_FN_ATTRS12875_mm_cvtts_pd_epi32(__m128d __A) {76 return ((__m128i)__builtin_ia32_vcvttpd2dqs128_mask(77 (__v2df)__A, (__v4si)(__m128i)_mm_undefined_si128(), (__mmask8)(-1)));78}79 80static __inline__ __m128i __DEFAULT_FN_ATTRS12881_mm_mask_cvtts_pd_epi32(__m128i __W, __mmask8 __U, __m128d __A) {82 return ((__m128i)__builtin_ia32_vcvttpd2dqs128_mask((__v2df)__A, (__v4si)__W,83 __U));84}85 86static __inline__ __m128i __DEFAULT_FN_ATTRS12887_mm_maskz_cvtts_pd_epi32(__mmask16 __U, __m128d __A) {88 return ((__m128i)__builtin_ia32_vcvttpd2dqs128_mask(89 (__v2df)__A, (__v4si)(__m128i)_mm_setzero_si128(), __U));90}91 92// 256 Bit : Double -> int93static __inline__ __m128i __DEFAULT_FN_ATTRS25694_mm256_cvtts_pd_epi32(__m256d __A) {95 return ((__m128i)__builtin_ia32_vcvttpd2dqs256_mask(96 (__v4df)__A, (__v4si)_mm_undefined_si128(), (__mmask8)-1));97}98 99static __inline__ __m128i __DEFAULT_FN_ATTRS256100_mm256_mask_cvtts_pd_epi32(__m128i __W, __mmask8 __U, __m256d __A) {101 return ((__m128i)__builtin_ia32_vcvttpd2dqs256_mask((__v4df)__A, (__v4si)__W,102 __U));103}104 105static __inline__ __m128i __DEFAULT_FN_ATTRS256106_mm256_maskz_cvtts_pd_epi32(__mmask8 __U, __m256d __A) {107 return ((__m128i)__builtin_ia32_vcvttpd2dqs256_mask(108 (__v4df)__A, (__v4si)_mm_setzero_si128(), __U));109}110 111// 128 Bit : Double -> uint112static __inline__ __m128i __DEFAULT_FN_ATTRS128113_mm_cvtts_pd_epu32(__m128d __A) {114 return ((__m128i)__builtin_ia32_vcvttpd2udqs128_mask(115 (__v2df)__A, (__v4si)(__m128i)_mm_undefined_si128(), (__mmask8)(-1)));116}117 118static __inline__ __m128i __DEFAULT_FN_ATTRS128119_mm_mask_cvtts_pd_epu32(__m128i __W, __mmask8 __U, __m128d __A) {120 return ((__m128i)__builtin_ia32_vcvttpd2udqs128_mask(121 (__v2df)__A, (__v4si)(__m128i)__W, (__mmask8)__U));122}123 124static __inline__ __m128i __DEFAULT_FN_ATTRS128125_mm_maskz_cvtts_pd_epu32(__mmask8 __U, __m128d __A) {126 return ((__m128i)__builtin_ia32_vcvttpd2udqs128_mask(127 (__v2df)__A, (__v4si)(__m128i)_mm_setzero_si128(), __U));128}129 130// 256 Bit : Double -> uint131static __inline__ __m128i __DEFAULT_FN_ATTRS256132_mm256_cvtts_pd_epu32(__m256d __A) {133 return ((__m128i)__builtin_ia32_vcvttpd2udqs256_mask(134 (__v4df)__A, (__v4si)_mm_undefined_si128(), (__mmask8)-1));135}136 137static __inline__ __m128i __DEFAULT_FN_ATTRS256138_mm256_mask_cvtts_pd_epu32(__m128i __W, __mmask8 __U, __m256d __A) {139 return ((__m128i)__builtin_ia32_vcvttpd2udqs256_mask((__v4df)__A, (__v4si)__W,140 __U));141}142 143static __inline__ __m128i __DEFAULT_FN_ATTRS256144_mm256_maskz_cvtts_pd_epu32(__mmask8 __U, __m256d __A) {145 return ((__m128i)__builtin_ia32_vcvttpd2udqs256_mask(146 (__v4df)__A, (__v4si)_mm_setzero_si128(), __U));147}148 149// 128 Bit : Double -> long150static __inline__ __m128i __DEFAULT_FN_ATTRS128151_mm_cvtts_pd_epi64(__m128d __A) {152 return ((__m128i)__builtin_ia32_vcvttpd2qqs128_mask(153 (__v2df)__A, (__v2di)_mm_undefined_si128(), (__mmask8)-1));154}155 156static __inline__ __m128i __DEFAULT_FN_ATTRS128157_mm_mask_cvtts_pd_epi64(__m128i __W, __mmask8 __U, __m128d __A) {158 return ((__m128i)__builtin_ia32_vcvttpd2qqs128_mask((__v2df)__A, (__v2di)__W,159 (__mmask8)__U));160}161 162static __inline__ __m128i __DEFAULT_FN_ATTRS128163_mm_maskz_cvtts_pd_epi64(__mmask8 __U, __m128d __A) {164 return ((__m128i)__builtin_ia32_vcvttpd2qqs128_mask(165 (__v2df)__A, (__v2di)_mm_setzero_si128(), (__mmask8)__U));166}167 168// 256 Bit : Double -> long169static __inline__ __m256i __DEFAULT_FN_ATTRS256170_mm256_cvtts_pd_epi64(__m256d __A) {171 return ((__m256i)__builtin_ia32_vcvttpd2qqs256_mask(172 (__v4df)__A, (__v4di)_mm256_undefined_si256(), (__mmask8)-1));173}174 175static __inline__ __m256i __DEFAULT_FN_ATTRS256176_mm256_mask_cvtts_pd_epi64(__m256i __W, __mmask8 __U, __m256d __A) {177 return ((__m256i)__builtin_ia32_vcvttpd2qqs256_mask((__v4df)__A, (__v4di)__W,178 __U));179}180 181static __inline__ __m256i __DEFAULT_FN_ATTRS256182_mm256_maskz_cvtts_pd_epi64(__mmask8 __U, __m256d __A) {183 return ((__m256i)__builtin_ia32_vcvttpd2qqs256_mask(184 (__v4df)__A, (__v4di)_mm256_setzero_si256(), __U));185}186 187// 128 Bit : Double -> ulong188static __inline__ __m128i __DEFAULT_FN_ATTRS128189_mm_cvtts_pd_epu64(__m128d __A) {190 return ((__m128i)__builtin_ia32_vcvttpd2uqqs128_mask(191 (__v2df)__A, (__v2di)_mm_undefined_si128(), (__mmask8)-1));192}193 194static __inline__ __m128i __DEFAULT_FN_ATTRS128195_mm_mask_cvtts_pd_epu64(__m128i __W, __mmask8 __U, __m128d __A) {196 return ((__m128i)__builtin_ia32_vcvttpd2uqqs128_mask((__v2df)__A, (__v2di)__W,197 (__mmask8)__U));198}199 200static __inline__ __m128i __DEFAULT_FN_ATTRS128201_mm_maskz_cvtts_pd_epu64(__mmask8 __U, __m128d __A) {202 return ((__m128i)__builtin_ia32_vcvttpd2uqqs128_mask(203 (__v2df)__A, (__v2di)_mm_setzero_si128(), (__mmask8)__U));204}205 206// 256 Bit : Double -> ulong207 208static __inline__ __m256i __DEFAULT_FN_ATTRS256209_mm256_cvtts_pd_epu64(__m256d __A) {210 return ((__m256i)__builtin_ia32_vcvttpd2uqqs256_mask(211 (__v4df)__A, (__v4di)_mm256_undefined_si256(), (__mmask8)-1));212}213 214static __inline__ __m256i __DEFAULT_FN_ATTRS256215_mm256_mask_cvtts_pd_epu64(__m256i __W, __mmask8 __U, __m256d __A) {216 return ((__m256i)__builtin_ia32_vcvttpd2uqqs256_mask((__v4df)__A, (__v4di)__W,217 __U));218}219 220static __inline__ __m256i __DEFAULT_FN_ATTRS256221_mm256_maskz_cvtts_pd_epu64(__mmask8 __U, __m256d __A) {222 return ((__m256i)__builtin_ia32_vcvttpd2uqqs256_mask(223 (__v4df)__A, (__v4di)_mm256_setzero_si256(), __U));224}225 226// 128 Bit : float -> int227static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtts_ps_epi32(__m128 __A) {228 return ((__m128i)__builtin_ia32_vcvttps2dqs128_mask(229 (__v4sf)__A, (__v4si)(__m128i)_mm_undefined_si128(), (__mmask8)(-1)));230}231 232static __inline__ __m128i __DEFAULT_FN_ATTRS128233_mm_mask_cvtts_ps_epi32(__m128i __W, __mmask8 __U, __m128 __A) {234 return ((__m128i)__builtin_ia32_vcvttps2dqs128_mask((__v4sf)__A, (__v4si)__W,235 (__mmask8)__U));236}237 238static __inline__ __m128i __DEFAULT_FN_ATTRS128239_mm_maskz_cvtts_ps_epi32(__mmask8 __U, __m128 __A) {240 return ((__m128i)__builtin_ia32_vcvttps2dqs128_mask(241 (__v4sf)__A, (__v4si)(__m128i)_mm_setzero_si128(), (__mmask8)__U));242}243 244// 256 Bit : float -> int245static __inline__ __m256i __DEFAULT_FN_ATTRS256246_mm256_cvtts_ps_epi32(__m256 __A) {247 return ((__m256i)__builtin_ia32_vcvttps2dqs256_mask(248 (__v8sf)__A, (__v8si)_mm256_undefined_si256(), (__mmask8)-1));249}250 251static __inline__ __m256i __DEFAULT_FN_ATTRS256252_mm256_mask_cvtts_ps_epi32(__m256i __W, __mmask8 __U, __m256 __A) {253 return ((__m256i)__builtin_ia32_vcvttps2dqs256_mask((__v8sf)__A, (__v8si)__W,254 __U));255}256 257static __inline__ __m256i __DEFAULT_FN_ATTRS256258_mm256_maskz_cvtts_ps_epi32(__mmask8 __U, __m256 __A) {259 return ((__m256i)__builtin_ia32_vcvttps2dqs256_mask(260 (__v8sf)__A, (__v8si)_mm256_setzero_si256(), __U));261}262 263// 128 Bit : float -> uint264static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtts_ps_epu32(__m128 __A) {265 return ((__m128i)__builtin_ia32_vcvttps2udqs128_mask(266 (__v4sf)__A, (__v4si)(__m128i)_mm_undefined_si128(), (__mmask8)(-1)));267}268 269static __inline__ __m128i __DEFAULT_FN_ATTRS128270_mm_mask_cvtts_ps_epu32(__m128i __W, __mmask8 __U, __m128 __A) {271 return ((__m128i)__builtin_ia32_vcvttps2udqs128_mask((__v4sf)__A, (__v4si)__W,272 (__mmask8)__U));273}274 275static __inline__ __m128i __DEFAULT_FN_ATTRS128276_mm_maskz_cvtts_ps_epu32(__mmask8 __U, __m128 __A) {277 return ((__m128i)__builtin_ia32_vcvttps2udqs128_mask(278 (__v4sf)__A, (__v4si)_mm_setzero_si128(), (__mmask8)__U));279}280 281// 256 Bit : float -> uint282 283static __inline__ __m256i __DEFAULT_FN_ATTRS256284_mm256_cvtts_ps_epu32(__m256 __A) {285 return ((__m256i)__builtin_ia32_vcvttps2udqs256_mask(286 (__v8sf)__A, (__v8si)_mm256_undefined_si256(), (__mmask8)-1));287}288 289static __inline__ __m256i __DEFAULT_FN_ATTRS256290_mm256_mask_cvtts_ps_epu32(__m256i __W, __mmask8 __U, __m256 __A) {291 return ((__m256i)__builtin_ia32_vcvttps2udqs256_mask((__v8sf)__A, (__v8si)__W,292 __U));293}294 295static __inline__ __m256i __DEFAULT_FN_ATTRS256296_mm256_maskz_cvtts_ps_epu32(__mmask8 __U, __m256 __A) {297 return ((__m256i)__builtin_ia32_vcvttps2udqs256_mask(298 (__v8sf)__A, (__v8si)_mm256_setzero_si256(), __U));299}300 301// 128 bit : float -> long302static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtts_ps_epi64(__m128 __A) {303 return ((__m128i)__builtin_ia32_vcvttps2qqs128_mask(304 (__v4sf)__A, (__v2di)_mm_undefined_si128(), (__mmask8)-1));305}306 307static __inline__ __m128i __DEFAULT_FN_ATTRS128308_mm_mask_cvtts_ps_epi64(__m128i __W, __mmask8 __U, __m128 __A) {309 return ((__m128i)__builtin_ia32_vcvttps2qqs128_mask(310 (__v4sf)__A, (__v2di)(__m128i)__W, (__mmask8)__U));311}312 313static __inline__ __m128i __DEFAULT_FN_ATTRS128314_mm_maskz_cvtts_ps_epi64(__mmask8 __U, __m128 __A) {315 return ((__m128i)__builtin_ia32_vcvttps2qqs128_mask(316 (__v4sf)__A, (__v2di)_mm_setzero_si128(), (__mmask8)__U));317}318// 256 bit : float -> long319 320static __inline__ __m256i __DEFAULT_FN_ATTRS256321_mm256_cvtts_ps_epi64(__m128 __A) {322 return ((__m256i)__builtin_ia32_vcvttps2qqs256_mask(323 (__v4sf)__A, (__v4di)_mm256_undefined_si256(), (__mmask8)-1));324}325static __inline__ __m256i __DEFAULT_FN_ATTRS256326_mm256_mask_cvtts_ps_epi64(__m256i __W, __mmask8 __U, __m128 __A) {327 return ((__m256i)__builtin_ia32_vcvttps2qqs256_mask((__v4sf)__A, (__v4di)__W,328 __U));329}330 331static __inline__ __m256i __DEFAULT_FN_ATTRS256332_mm256_maskz_cvtts_ps_epi64(__mmask8 __U, __m128 __A) {333 return ((__m256i)__builtin_ia32_vcvttps2qqs256_mask(334 (__v4sf)__A, (__v4di)_mm256_setzero_si256(), __U));335}336 337// 128 bit : float -> ulong338static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtts_ps_epu64(__m128 __A) {339 return ((__m128i)__builtin_ia32_vcvttps2uqqs128_mask(340 (__v4sf)__A, (__v2di)_mm_undefined_si128(), (__mmask8)-1));341}342 343static __inline__ __m128i __DEFAULT_FN_ATTRS128344_mm_mask_cvtts_ps_epu64(__m128i __W, __mmask8 __U, __m128 __A) {345 return ((__m128i)__builtin_ia32_vcvttps2uqqs128_mask(346 (__v4sf)__A, (__v2di)(__m128i)__W, (__mmask8)__U));347}348 349static __inline__ __m128i __DEFAULT_FN_ATTRS128350_mm_maskz_cvtts_ps_epu64(__mmask8 __U, __m128 __A) {351 return ((__m128i)__builtin_ia32_vcvttps2uqqs128_mask(352 (__v4sf)__A, (__v2di)_mm_setzero_si128(), (__mmask8)__U));353}354// 256 bit : float -> ulong355 356static __inline__ __m256i __DEFAULT_FN_ATTRS256357_mm256_cvtts_ps_epu64(__m128 __A) {358 return ((__m256i)__builtin_ia32_vcvttps2uqqs256_mask(359 (__v4sf)__A, (__v4di)_mm256_undefined_si256(), (__mmask8)-1));360}361 362static __inline__ __m256i __DEFAULT_FN_ATTRS256363_mm256_mask_cvtts_ps_epu64(__m256i __W, __mmask8 __U, __m128 __A) {364 return ((__m256i)__builtin_ia32_vcvttps2uqqs256_mask((__v4sf)__A, (__v4di)__W,365 __U));366}367 368static __inline__ __m256i __DEFAULT_FN_ATTRS256369_mm256_maskz_cvtts_ps_epu64(__mmask8 __U, __m128 __A) {370 return ((__m256i)__builtin_ia32_vcvttps2uqqs256_mask(371 (__v4sf)__A, (__v4di)_mm256_setzero_si256(), __U));372}373 374#undef __DEFAULT_FN_ATTRS128375#undef __DEFAULT_FN_ATTRS256376#endif // __AVX10_2SATCVTDSINTRIN_H377