1898 lines · c
1/*===------------- avx512bwintrin.h - AVX512BW intrinsics ------------------===2 *3 *4 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.5 * See https://llvm.org/LICENSE.txt for license information.6 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception7 *8 *===-----------------------------------------------------------------------===9 */10#ifndef __IMMINTRIN_H11#error "Never use <avx512bwintrin.h> directly; include <immintrin.h> instead."12#endif13 14#ifndef __AVX512BWINTRIN_H15#define __AVX512BWINTRIN_H16 17typedef unsigned int __mmask32;18typedef unsigned long long __mmask64;19 20/* Define the default attributes for the functions in this file. */21#define __DEFAULT_FN_ATTRS512 \22 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw"), \23 __min_vector_width__(512)))24#define __DEFAULT_FN_ATTRS \25 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw")))26 27#if defined(__cplusplus) && (__cplusplus >= 201103L)28#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr29#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr30#else31#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS51232#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS33#endif34 35static __inline __mmask3236 __DEFAULT_FN_ATTRS_CONSTEXPR _knot_mask32(__mmask32 __M) {37 return __builtin_ia32_knotsi(__M);38}39 40static __inline __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR41_knot_mask64(__mmask64 __M) {42 return __builtin_ia32_knotdi(__M);43}44 45static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR46_kand_mask32(__mmask32 __A, __mmask32 __B) {47 return (__mmask32)__builtin_ia32_kandsi((__mmask32)__A, (__mmask32)__B);48}49 50static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR51_kand_mask64(__mmask64 __A, __mmask64 __B) {52 return (__mmask64)__builtin_ia32_kanddi((__mmask64)__A, (__mmask64)__B);53}54 55static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR56_kandn_mask32(__mmask32 __A, __mmask32 __B) {57 return (__mmask32)__builtin_ia32_kandnsi((__mmask32)__A, (__mmask32)__B);58}59 60static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR61_kandn_mask64(__mmask64 __A, __mmask64 __B) {62 return (__mmask64)__builtin_ia32_kandndi((__mmask64)__A, (__mmask64)__B);63}64 65static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR66_kor_mask32(__mmask32 __A, __mmask32 __B) {67 return (__mmask32)__builtin_ia32_korsi((__mmask32)__A, (__mmask32)__B);68}69 70static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR71_kor_mask64(__mmask64 __A, __mmask64 __B) {72 return (__mmask64)__builtin_ia32_kordi((__mmask64)__A, (__mmask64)__B);73}74 75static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR76_kxnor_mask32(__mmask32 __A, __mmask32 __B) {77 return (__mmask32)__builtin_ia32_kxnorsi((__mmask32)__A, (__mmask32)__B);78}79 80static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR81_kxnor_mask64(__mmask64 __A, __mmask64 __B) {82 return (__mmask64)__builtin_ia32_kxnordi((__mmask64)__A, (__mmask64)__B);83}84 85static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR86_kxor_mask32(__mmask32 __A, __mmask32 __B) {87 return (__mmask32)__builtin_ia32_kxorsi((__mmask32)__A, (__mmask32)__B);88}89 90static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR91_kxor_mask64(__mmask64 __A, __mmask64 __B) {92 return (__mmask64)__builtin_ia32_kxordi((__mmask64)__A, (__mmask64)__B);93}94 95static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR96_kortestc_mask32_u8(__mmask32 __A, __mmask32 __B) {97 return (unsigned char)__builtin_ia32_kortestcsi(__A, __B);98}99 100static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR101_kortestz_mask32_u8(__mmask32 __A, __mmask32 __B) {102 return (unsigned char)__builtin_ia32_kortestzsi(__A, __B);103}104 105static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR106_kortest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) {107 *__C = (unsigned char)__builtin_ia32_kortestcsi(__A, __B);108 return (unsigned char)__builtin_ia32_kortestzsi(__A, __B);109}110 111static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR112_kortestc_mask64_u8(__mmask64 __A, __mmask64 __B) {113 return (unsigned char)__builtin_ia32_kortestcdi(__A, __B);114}115 116static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR117_kortestz_mask64_u8(__mmask64 __A, __mmask64 __B) {118 return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);119}120 121static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR122_kortest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) {123 *__C = (unsigned char)__builtin_ia32_kortestcdi(__A, __B);124 return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);125}126 127static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR128_ktestc_mask32_u8(__mmask32 __A, __mmask32 __B) {129 return (unsigned char)__builtin_ia32_ktestcsi(__A, __B);130}131 132static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR133_ktestz_mask32_u8(__mmask32 __A, __mmask32 __B) {134 return (unsigned char)__builtin_ia32_ktestzsi(__A, __B);135}136 137static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR138_ktest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) {139 *__C = (unsigned char)__builtin_ia32_ktestcsi(__A, __B);140 return (unsigned char)__builtin_ia32_ktestzsi(__A, __B);141}142 143static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR144_ktestc_mask64_u8(__mmask64 __A, __mmask64 __B) {145 return (unsigned char)__builtin_ia32_ktestcdi(__A, __B);146}147 148static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR149_ktestz_mask64_u8(__mmask64 __A, __mmask64 __B) {150 return (unsigned char)__builtin_ia32_ktestzdi(__A, __B);151}152 153static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR154_ktest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) {155 *__C = (unsigned char)__builtin_ia32_ktestcdi(__A, __B);156 return (unsigned char)__builtin_ia32_ktestzdi(__A, __B);157}158 159static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR160_kadd_mask32(__mmask32 __A, __mmask32 __B) {161 return (__mmask32)__builtin_ia32_kaddsi((__mmask32)__A, (__mmask32)__B);162}163 164static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR165_kadd_mask64(__mmask64 __A, __mmask64 __B) {166 return (__mmask64)__builtin_ia32_kadddi((__mmask64)__A, (__mmask64)__B);167}168 169#define _kshiftli_mask32(A, I) \170 ((__mmask32)__builtin_ia32_kshiftlisi((__mmask32)(A), (unsigned int)(I)))171 172#define _kshiftri_mask32(A, I) \173 ((__mmask32)__builtin_ia32_kshiftrisi((__mmask32)(A), (unsigned int)(I)))174 175#define _kshiftli_mask64(A, I) \176 ((__mmask64)__builtin_ia32_kshiftlidi((__mmask64)(A), (unsigned int)(I)))177 178#define _kshiftri_mask64(A, I) \179 ((__mmask64)__builtin_ia32_kshiftridi((__mmask64)(A), (unsigned int)(I)))180 181static __inline__ unsigned int182 __DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask32_u32(__mmask32 __A) {183 return (unsigned int)__builtin_ia32_kmovd((__mmask32)__A);184}185 186static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR187_cvtmask64_u64(__mmask64 __A) {188 return (unsigned long long)__builtin_ia32_kmovq((__mmask64)__A);189}190 191static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR192_cvtu32_mask32(unsigned int __A) {193 return (__mmask32)__builtin_ia32_kmovd((__mmask32)__A);194}195 196static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR197_cvtu64_mask64(unsigned long long __A) {198 return (__mmask64)__builtin_ia32_kmovq((__mmask64)__A);199}200 201static __inline__ __mmask32 __DEFAULT_FN_ATTRS202_load_mask32(__mmask32 *__A) {203 return (__mmask32)__builtin_ia32_kmovd(*(__mmask32 *)__A);204}205 206static __inline__ __mmask64 __DEFAULT_FN_ATTRS _load_mask64(__mmask64 *__A) {207 return (__mmask64)__builtin_ia32_kmovq(*(__mmask64 *)__A);208}209 210static __inline__ void __DEFAULT_FN_ATTRS211_store_mask32(__mmask32 *__A, __mmask32 __B) {212 *(__mmask32 *)__A = __builtin_ia32_kmovd((__mmask32)__B);213}214 215static __inline__ void __DEFAULT_FN_ATTRS _store_mask64(__mmask64 *__A,216 __mmask64 __B) {217 *(__mmask64 *)__A = __builtin_ia32_kmovq((__mmask64)__B);218}219 220/* Integer compare */221 222#define _mm512_cmp_epi8_mask(a, b, p) \223 ((__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)(__m512i)(a), \224 (__v64qi)(__m512i)(b), (int)(p), \225 (__mmask64)-1))226 227#define _mm512_mask_cmp_epi8_mask(m, a, b, p) \228 ((__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)(__m512i)(a), \229 (__v64qi)(__m512i)(b), (int)(p), \230 (__mmask64)(m)))231 232#define _mm512_cmp_epu8_mask(a, b, p) \233 ((__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)(__m512i)(a), \234 (__v64qi)(__m512i)(b), (int)(p), \235 (__mmask64)-1))236 237#define _mm512_mask_cmp_epu8_mask(m, a, b, p) \238 ((__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)(__m512i)(a), \239 (__v64qi)(__m512i)(b), (int)(p), \240 (__mmask64)(m)))241 242#define _mm512_cmp_epi16_mask(a, b, p) \243 ((__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)(__m512i)(a), \244 (__v32hi)(__m512i)(b), (int)(p), \245 (__mmask32)-1))246 247#define _mm512_mask_cmp_epi16_mask(m, a, b, p) \248 ((__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)(__m512i)(a), \249 (__v32hi)(__m512i)(b), (int)(p), \250 (__mmask32)(m)))251 252#define _mm512_cmp_epu16_mask(a, b, p) \253 ((__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)(__m512i)(a), \254 (__v32hi)(__m512i)(b), (int)(p), \255 (__mmask32)-1))256 257#define _mm512_mask_cmp_epu16_mask(m, a, b, p) \258 ((__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)(__m512i)(a), \259 (__v32hi)(__m512i)(b), (int)(p), \260 (__mmask32)(m)))261 262#define _mm512_cmpeq_epi8_mask(A, B) \263 _mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_EQ)264#define _mm512_mask_cmpeq_epi8_mask(k, A, B) \265 _mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_EQ)266#define _mm512_cmpge_epi8_mask(A, B) \267 _mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_GE)268#define _mm512_mask_cmpge_epi8_mask(k, A, B) \269 _mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GE)270#define _mm512_cmpgt_epi8_mask(A, B) \271 _mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_GT)272#define _mm512_mask_cmpgt_epi8_mask(k, A, B) \273 _mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GT)274#define _mm512_cmple_epi8_mask(A, B) \275 _mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_LE)276#define _mm512_mask_cmple_epi8_mask(k, A, B) \277 _mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LE)278#define _mm512_cmplt_epi8_mask(A, B) \279 _mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_LT)280#define _mm512_mask_cmplt_epi8_mask(k, A, B) \281 _mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LT)282#define _mm512_cmpneq_epi8_mask(A, B) \283 _mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_NE)284#define _mm512_mask_cmpneq_epi8_mask(k, A, B) \285 _mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_NE)286 287#define _mm512_cmpeq_epu8_mask(A, B) \288 _mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_EQ)289#define _mm512_mask_cmpeq_epu8_mask(k, A, B) \290 _mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_EQ)291#define _mm512_cmpge_epu8_mask(A, B) \292 _mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_GE)293#define _mm512_mask_cmpge_epu8_mask(k, A, B) \294 _mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GE)295#define _mm512_cmpgt_epu8_mask(A, B) \296 _mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_GT)297#define _mm512_mask_cmpgt_epu8_mask(k, A, B) \298 _mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GT)299#define _mm512_cmple_epu8_mask(A, B) \300 _mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_LE)301#define _mm512_mask_cmple_epu8_mask(k, A, B) \302 _mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LE)303#define _mm512_cmplt_epu8_mask(A, B) \304 _mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_LT)305#define _mm512_mask_cmplt_epu8_mask(k, A, B) \306 _mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LT)307#define _mm512_cmpneq_epu8_mask(A, B) \308 _mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_NE)309#define _mm512_mask_cmpneq_epu8_mask(k, A, B) \310 _mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_NE)311 312#define _mm512_cmpeq_epi16_mask(A, B) \313 _mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_EQ)314#define _mm512_mask_cmpeq_epi16_mask(k, A, B) \315 _mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_EQ)316#define _mm512_cmpge_epi16_mask(A, B) \317 _mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_GE)318#define _mm512_mask_cmpge_epi16_mask(k, A, B) \319 _mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GE)320#define _mm512_cmpgt_epi16_mask(A, B) \321 _mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_GT)322#define _mm512_mask_cmpgt_epi16_mask(k, A, B) \323 _mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GT)324#define _mm512_cmple_epi16_mask(A, B) \325 _mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_LE)326#define _mm512_mask_cmple_epi16_mask(k, A, B) \327 _mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LE)328#define _mm512_cmplt_epi16_mask(A, B) \329 _mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_LT)330#define _mm512_mask_cmplt_epi16_mask(k, A, B) \331 _mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LT)332#define _mm512_cmpneq_epi16_mask(A, B) \333 _mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_NE)334#define _mm512_mask_cmpneq_epi16_mask(k, A, B) \335 _mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_NE)336 337#define _mm512_cmpeq_epu16_mask(A, B) \338 _mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_EQ)339#define _mm512_mask_cmpeq_epu16_mask(k, A, B) \340 _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_EQ)341#define _mm512_cmpge_epu16_mask(A, B) \342 _mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_GE)343#define _mm512_mask_cmpge_epu16_mask(k, A, B) \344 _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GE)345#define _mm512_cmpgt_epu16_mask(A, B) \346 _mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_GT)347#define _mm512_mask_cmpgt_epu16_mask(k, A, B) \348 _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GT)349#define _mm512_cmple_epu16_mask(A, B) \350 _mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_LE)351#define _mm512_mask_cmple_epu16_mask(k, A, B) \352 _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LE)353#define _mm512_cmplt_epu16_mask(A, B) \354 _mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_LT)355#define _mm512_mask_cmplt_epu16_mask(k, A, B) \356 _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LT)357#define _mm512_cmpneq_epu16_mask(A, B) \358 _mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_NE)359#define _mm512_mask_cmpneq_epu16_mask(k, A, B) \360 _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)361 362static __inline__ __m512i363 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_add_epi8(__m512i __A, __m512i __B) {364 return (__m512i) ((__v64qu) __A + (__v64qu) __B);365}366 367static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR368_mm512_mask_add_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {369 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,370 (__v64qi)_mm512_add_epi8(__A, __B),371 (__v64qi)__W);372}373 374static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR375_mm512_maskz_add_epi8(__mmask64 __U, __m512i __A, __m512i __B) {376 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,377 (__v64qi)_mm512_add_epi8(__A, __B),378 (__v64qi)_mm512_setzero_si512());379}380 381static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR382_mm512_sub_epi8(__m512i __A, __m512i __B) {383 return (__m512i) ((__v64qu) __A - (__v64qu) __B);384}385 386static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR387_mm512_mask_sub_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {388 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,389 (__v64qi)_mm512_sub_epi8(__A, __B),390 (__v64qi)__W);391}392 393static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR394_mm512_maskz_sub_epi8(__mmask64 __U, __m512i __A, __m512i __B) {395 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,396 (__v64qi)_mm512_sub_epi8(__A, __B),397 (__v64qi)_mm512_setzero_si512());398}399 400static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR401_mm512_add_epi16(__m512i __A, __m512i __B) {402 return (__m512i) ((__v32hu) __A + (__v32hu) __B);403}404 405static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR406_mm512_mask_add_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {407 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,408 (__v32hi)_mm512_add_epi16(__A, __B),409 (__v32hi)__W);410}411 412static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR413_mm512_maskz_add_epi16(__mmask32 __U, __m512i __A, __m512i __B) {414 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,415 (__v32hi)_mm512_add_epi16(__A, __B),416 (__v32hi)_mm512_setzero_si512());417}418 419static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR420_mm512_sub_epi16(__m512i __A, __m512i __B) {421 return (__m512i) ((__v32hu) __A - (__v32hu) __B);422}423 424static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR425_mm512_mask_sub_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {426 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,427 (__v32hi)_mm512_sub_epi16(__A, __B),428 (__v32hi)__W);429}430 431static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR432_mm512_maskz_sub_epi16(__mmask32 __U, __m512i __A, __m512i __B) {433 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,434 (__v32hi)_mm512_sub_epi16(__A, __B),435 (__v32hi)_mm512_setzero_si512());436}437 438static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR439_mm512_mullo_epi16 (__m512i __A, __m512i __B) {440 return (__m512i) ((__v32hu) __A * (__v32hu) __B);441}442 443static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR444_mm512_mask_mullo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {445 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,446 (__v32hi)_mm512_mullo_epi16(__A, __B),447 (__v32hi)__W);448}449 450static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR451_mm512_maskz_mullo_epi16(__mmask32 __U, __m512i __A, __m512i __B) {452 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,453 (__v32hi)_mm512_mullo_epi16(__A, __B),454 (__v32hi)_mm512_setzero_si512());455}456 457static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR458_mm512_mask_blend_epi8(__mmask64 __U, __m512i __A, __m512i __W) {459 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,460 (__v64qi) __W,461 (__v64qi) __A);462}463 464static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR465_mm512_mask_blend_epi16(__mmask32 __U, __m512i __A, __m512i __W) {466 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,467 (__v32hi) __W,468 (__v32hi) __A);469}470 471static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR472_mm512_abs_epi8(__m512i __A) {473 return (__m512i)__builtin_elementwise_abs((__v64qs)__A);474}475 476static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR477_mm512_mask_abs_epi8(__m512i __W, __mmask64 __U, __m512i __A) {478 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,479 (__v64qi)_mm512_abs_epi8(__A),480 (__v64qi)__W);481}482 483static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR484_mm512_maskz_abs_epi8(__mmask64 __U, __m512i __A) {485 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,486 (__v64qi)_mm512_abs_epi8(__A),487 (__v64qi)_mm512_setzero_si512());488}489 490static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR491_mm512_abs_epi16(__m512i __A) {492 return (__m512i)__builtin_elementwise_abs((__v32hi)__A);493}494 495static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR496_mm512_mask_abs_epi16(__m512i __W, __mmask32 __U, __m512i __A) {497 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,498 (__v32hi)_mm512_abs_epi16(__A),499 (__v32hi)__W);500}501 502static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR503_mm512_maskz_abs_epi16(__mmask32 __U, __m512i __A) {504 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,505 (__v32hi)_mm512_abs_epi16(__A),506 (__v32hi)_mm512_setzero_si512());507}508 509static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR510_mm512_packs_epi32(__m512i __A, __m512i __B) {511 return (__m512i)__builtin_ia32_packssdw512((__v16si)__A, (__v16si)__B);512}513 514static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR515_mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B)516{517 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,518 (__v32hi)_mm512_packs_epi32(__A, __B),519 (__v32hi)_mm512_setzero_si512());520}521 522static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR523_mm512_mask_packs_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {524 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,525 (__v32hi)_mm512_packs_epi32(__A, __B),526 (__v32hi)__W);527}528 529static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR530_mm512_packs_epi16(__m512i __A, __m512i __B) {531 return (__m512i)__builtin_ia32_packsswb512((__v32hi)__A, (__v32hi) __B);532}533 534static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR535_mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)536{537 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,538 (__v64qi)_mm512_packs_epi16(__A, __B),539 (__v64qi)__W);540}541 542static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR543_mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B)544{545 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,546 (__v64qi)_mm512_packs_epi16(__A, __B),547 (__v64qi)_mm512_setzero_si512());548}549 550static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR551_mm512_packus_epi32(__m512i __A, __m512i __B) {552 return (__m512i)__builtin_ia32_packusdw512((__v16si) __A, (__v16si) __B);553}554 555static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR556_mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B)557{558 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,559 (__v32hi)_mm512_packus_epi32(__A, __B),560 (__v32hi)_mm512_setzero_si512());561}562 563static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR564_mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)565{566 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,567 (__v32hi)_mm512_packus_epi32(__A, __B),568 (__v32hi)__W);569}570 571static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR572_mm512_packus_epi16(__m512i __A, __m512i __B) {573 return (__m512i)__builtin_ia32_packuswb512((__v32hi) __A, (__v32hi) __B);574}575 576static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR577_mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)578{579 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,580 (__v64qi)_mm512_packus_epi16(__A, __B),581 (__v64qi)__W);582}583 584static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR585_mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B)586{587 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,588 (__v64qi)_mm512_packus_epi16(__A, __B),589 (__v64qi)_mm512_setzero_si512());590}591 592static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR593_mm512_adds_epi8(__m512i __A, __m512i __B) {594 return (__m512i)__builtin_elementwise_add_sat((__v64qs)__A, (__v64qs)__B);595}596 597static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR598_mm512_mask_adds_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {599 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,600 (__v64qi)_mm512_adds_epi8(__A, __B),601 (__v64qi)__W);602}603 604static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR605_mm512_maskz_adds_epi8(__mmask64 __U, __m512i __A, __m512i __B) {606 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,607 (__v64qi)_mm512_adds_epi8(__A, __B),608 (__v64qi)_mm512_setzero_si512());609}610 611static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR612_mm512_adds_epi16(__m512i __A, __m512i __B) {613 return (__m512i)__builtin_elementwise_add_sat((__v32hi)__A, (__v32hi)__B);614}615 616static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR617_mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)618{619 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,620 (__v32hi)_mm512_adds_epi16(__A, __B),621 (__v32hi)__W);622}623 624static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR625_mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B)626{627 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,628 (__v32hi)_mm512_adds_epi16(__A, __B),629 (__v32hi)_mm512_setzero_si512());630}631 632static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR633_mm512_adds_epu8(__m512i __A, __m512i __B) {634 return (__m512i)__builtin_elementwise_add_sat((__v64qu) __A, (__v64qu) __B);635}636 637static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR638_mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)639{640 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,641 (__v64qi)_mm512_adds_epu8(__A, __B),642 (__v64qi)__W);643}644 645static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR646_mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B)647{648 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,649 (__v64qi)_mm512_adds_epu8(__A, __B),650 (__v64qi)_mm512_setzero_si512());651}652 653static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR654_mm512_adds_epu16(__m512i __A, __m512i __B) {655 return (__m512i)__builtin_elementwise_add_sat((__v32hu) __A, (__v32hu) __B);656}657 658static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR659_mm512_mask_adds_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {660 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,661 (__v32hi)_mm512_adds_epu16(__A, __B),662 (__v32hi)__W);663}664 665static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR666_mm512_maskz_adds_epu16(__mmask32 __U, __m512i __A, __m512i __B) {667 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,668 (__v32hi)_mm512_adds_epu16(__A, __B),669 (__v32hi)_mm512_setzero_si512());670}671 672static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR673_mm512_avg_epu8(__m512i __A, __m512i __B) {674 return (__m512i)__builtin_ia32_pavgb512((__v64qu)__A, (__v64qu)__B);675}676 677static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR678_mm512_mask_avg_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {679 return (__m512i)__builtin_ia32_selectb_512(680 (__mmask64)__U, (__v64qi)_mm512_avg_epu8(__A, __B), (__v64qi)__W);681}682 683static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR684_mm512_maskz_avg_epu8(__mmask64 __U, __m512i __A, __m512i __B) {685 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,686 (__v64qi)_mm512_avg_epu8(__A, __B),687 (__v64qi)_mm512_setzero_si512());688}689 690static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR691_mm512_avg_epu16(__m512i __A, __m512i __B) {692 return (__m512i)__builtin_ia32_pavgw512((__v32hu)__A, (__v32hu)__B);693}694 695static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR696_mm512_mask_avg_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {697 return (__m512i)__builtin_ia32_selectw_512(698 (__mmask32)__U, (__v32hi)_mm512_avg_epu16(__A, __B), (__v32hi)__W);699}700 701static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR702_mm512_maskz_avg_epu16(__mmask32 __U, __m512i __A, __m512i __B) {703 return (__m512i)__builtin_ia32_selectw_512(704 (__mmask32)__U, (__v32hi)_mm512_avg_epu16(__A, __B),705 (__v32hi)_mm512_setzero_si512());706}707 708static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR709_mm512_max_epi8(__m512i __A, __m512i __B) {710 return (__m512i)__builtin_elementwise_max((__v64qs) __A, (__v64qs) __B);711}712 713static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR714_mm512_maskz_max_epi8(__mmask64 __M, __m512i __A, __m512i __B) {715 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,716 (__v64qi)_mm512_max_epi8(__A, __B),717 (__v64qi)_mm512_setzero_si512());718}719 720static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR721_mm512_mask_max_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {722 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,723 (__v64qi)_mm512_max_epi8(__A, __B),724 (__v64qi)__W);725}726 727static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR728_mm512_max_epi16(__m512i __A, __m512i __B) {729 return (__m512i)__builtin_elementwise_max((__v32hi) __A, (__v32hi) __B);730}731 732static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR733_mm512_maskz_max_epi16(__mmask32 __M, __m512i __A, __m512i __B) {734 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,735 (__v32hi)_mm512_max_epi16(__A, __B),736 (__v32hi)_mm512_setzero_si512());737}738 739static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR740_mm512_mask_max_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {741 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,742 (__v32hi)_mm512_max_epi16(__A, __B),743 (__v32hi)__W);744}745 746static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR747_mm512_max_epu8(__m512i __A, __m512i __B) {748 return (__m512i)__builtin_elementwise_max((__v64qu)__A, (__v64qu)__B);749}750 751static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR752_mm512_maskz_max_epu8(__mmask64 __M, __m512i __A, __m512i __B) {753 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,754 (__v64qi)_mm512_max_epu8(__A, __B),755 (__v64qi)_mm512_setzero_si512());756}757 758static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR759_mm512_mask_max_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {760 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,761 (__v64qi)_mm512_max_epu8(__A, __B),762 (__v64qi)__W);763}764 765static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR766_mm512_max_epu16(__m512i __A, __m512i __B) {767 return (__m512i)__builtin_elementwise_max((__v32hu)__A, (__v32hu)__B);768}769 770static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR771_mm512_maskz_max_epu16(__mmask32 __M, __m512i __A, __m512i __B) {772 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,773 (__v32hi)_mm512_max_epu16(__A, __B),774 (__v32hi)_mm512_setzero_si512());775}776 777static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR778_mm512_mask_max_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {779 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,780 (__v32hi)_mm512_max_epu16(__A, __B),781 (__v32hi)__W);782}783 784static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR785_mm512_min_epi8(__m512i __A, __m512i __B) {786 return (__m512i)__builtin_elementwise_min((__v64qs) __A, (__v64qs) __B);787}788 789static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR790_mm512_maskz_min_epi8(__mmask64 __M, __m512i __A, __m512i __B) {791 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,792 (__v64qi)_mm512_min_epi8(__A, __B),793 (__v64qi)_mm512_setzero_si512());794}795 796static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR797_mm512_mask_min_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {798 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,799 (__v64qi)_mm512_min_epi8(__A, __B),800 (__v64qi)__W);801}802 803static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR804_mm512_min_epi16(__m512i __A, __m512i __B) {805 return (__m512i)__builtin_elementwise_min((__v32hi) __A, (__v32hi) __B);806}807 808static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR809_mm512_maskz_min_epi16(__mmask32 __M, __m512i __A, __m512i __B) {810 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,811 (__v32hi)_mm512_min_epi16(__A, __B),812 (__v32hi)_mm512_setzero_si512());813}814 815static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR816_mm512_mask_min_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {817 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,818 (__v32hi)_mm512_min_epi16(__A, __B),819 (__v32hi)__W);820}821 822static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR823_mm512_min_epu8(__m512i __A, __m512i __B) {824 return (__m512i)__builtin_elementwise_min((__v64qu)__A, (__v64qu)__B);825}826 827static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR828_mm512_maskz_min_epu8(__mmask64 __M, __m512i __A, __m512i __B) {829 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,830 (__v64qi)_mm512_min_epu8(__A, __B),831 (__v64qi)_mm512_setzero_si512());832}833 834static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR835_mm512_mask_min_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {836 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,837 (__v64qi)_mm512_min_epu8(__A, __B),838 (__v64qi)__W);839}840 841static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR842_mm512_min_epu16(__m512i __A, __m512i __B) {843 return (__m512i)__builtin_elementwise_min((__v32hu)__A, (__v32hu)__B);844}845 846static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR847_mm512_maskz_min_epu16(__mmask32 __M, __m512i __A, __m512i __B) {848 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,849 (__v32hi)_mm512_min_epu16(__A, __B),850 (__v32hi)_mm512_setzero_si512());851}852 853static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR854_mm512_mask_min_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {855 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,856 (__v32hi)_mm512_min_epu16(__A, __B),857 (__v32hi)__W);858}859 860static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR861_mm512_shuffle_epi8(__m512i __A, __m512i __B) {862 return (__m512i)__builtin_ia32_pshufb512((__v64qi)__A,(__v64qi)__B);863}864 865static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR866_mm512_mask_shuffle_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {867 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,868 (__v64qi)_mm512_shuffle_epi8(__A, __B),869 (__v64qi)__W);870}871 872static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR873_mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B) {874 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,875 (__v64qi)_mm512_shuffle_epi8(__A, __B),876 (__v64qi)_mm512_setzero_si512());877}878 879static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR880_mm512_subs_epi8(__m512i __A, __m512i __B) {881 return (__m512i)__builtin_elementwise_sub_sat((__v64qs)__A, (__v64qs)__B);882}883 884static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR885_mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)886{887 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,888 (__v64qi)_mm512_subs_epi8(__A, __B),889 (__v64qi)__W);890}891 892static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR893_mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B)894{895 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,896 (__v64qi)_mm512_subs_epi8(__A, __B),897 (__v64qi)_mm512_setzero_si512());898}899 900static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR901_mm512_subs_epi16(__m512i __A, __m512i __B) {902 return (__m512i)__builtin_elementwise_sub_sat((__v32hi)__A, (__v32hi)__B);903}904 905static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR906_mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)907{908 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,909 (__v32hi)_mm512_subs_epi16(__A, __B),910 (__v32hi)__W);911}912 913static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR914_mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B)915{916 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,917 (__v32hi)_mm512_subs_epi16(__A, __B),918 (__v32hi)_mm512_setzero_si512());919}920 921static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR922_mm512_subs_epu8(__m512i __A, __m512i __B) {923 return (__m512i)__builtin_elementwise_sub_sat((__v64qu) __A, (__v64qu) __B);924}925 926static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR927_mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)928{929 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,930 (__v64qi)_mm512_subs_epu8(__A, __B),931 (__v64qi)__W);932}933 934static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR935_mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B)936{937 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,938 (__v64qi)_mm512_subs_epu8(__A, __B),939 (__v64qi)_mm512_setzero_si512());940}941 942static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR943_mm512_subs_epu16(__m512i __A, __m512i __B) {944 return (__m512i)__builtin_elementwise_sub_sat((__v32hu) __A, (__v32hu) __B);945}946 947static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR948_mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)949{950 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,951 (__v32hi)_mm512_subs_epu16(__A, __B),952 (__v32hi)__W);953}954 955static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR956_mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B)957{958 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,959 (__v32hi)_mm512_subs_epu16(__A, __B),960 (__v32hi)_mm512_setzero_si512());961}962 963static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR964_mm512_permutex2var_epi16(__m512i __A, __m512i __I, __m512i __B) {965 return (__m512i)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I,966 (__v32hi)__B);967}968 969static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR970_mm512_mask_permutex2var_epi16(__m512i __A, __mmask32 __U, __m512i __I,971 __m512i __B) {972 return (__m512i)__builtin_ia32_selectw_512(__U,973 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),974 (__v32hi)__A);975}976 977static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR978_mm512_mask2_permutex2var_epi16(__m512i __A, __m512i __I, __mmask32 __U,979 __m512i __B) {980 return (__m512i)__builtin_ia32_selectw_512(__U,981 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),982 (__v32hi)__I);983}984 985static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR986_mm512_maskz_permutex2var_epi16(__mmask32 __U, __m512i __A, __m512i __I,987 __m512i __B) {988 return (__m512i)__builtin_ia32_selectw_512(__U,989 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),990 (__v32hi)_mm512_setzero_si512());991}992 993static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR994_mm512_mulhrs_epi16(__m512i __A, __m512i __B) {995 return (__m512i)__builtin_ia32_pmulhrsw512((__v32hi)__A, (__v32hi)__B);996}997 998static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR999_mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1000 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1001 (__v32hi)_mm512_mulhrs_epi16(__A, __B),1002 (__v32hi)__W);1003}1004 1005static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1006_mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B) {1007 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1008 (__v32hi)_mm512_mulhrs_epi16(__A, __B),1009 (__v32hi)_mm512_setzero_si512());1010}1011 1012static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1013_mm512_mulhi_epi16(__m512i __A, __m512i __B) {1014 return (__m512i)__builtin_ia32_pmulhw512((__v32hi)__A, (__v32hi)__B);1015}1016 1017static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1018_mm512_mask_mulhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1019 return (__m512i)__builtin_ia32_selectw_512(1020 (__mmask32)__U, (__v32hi)_mm512_mulhi_epi16(__A, __B), (__v32hi)__W);1021}1022 1023static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1024_mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) {1025 return (__m512i)__builtin_ia32_selectw_512(1026 (__mmask32)__U, (__v32hi)_mm512_mulhi_epi16(__A, __B),1027 (__v32hi)_mm512_setzero_si512());1028}1029 1030static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1031_mm512_mulhi_epu16(__m512i __A, __m512i __B) {1032 return (__m512i)__builtin_ia32_pmulhuw512((__v32hu)__A, (__v32hu)__B);1033}1034 1035static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1036_mm512_mask_mulhi_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1037 return (__m512i)__builtin_ia32_selectw_512(1038 (__mmask32)__U, (__v32hi)_mm512_mulhi_epu16(__A, __B), (__v32hi)__W);1039}1040 1041static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1042_mm512_maskz_mulhi_epu16(__mmask32 __U, __m512i __A, __m512i __B) {1043 return (__m512i)__builtin_ia32_selectw_512(1044 (__mmask32)__U, (__v32hi)_mm512_mulhi_epu16(__A, __B),1045 (__v32hi)_mm512_setzero_si512());1046}1047 1048static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1049_mm512_maddubs_epi16(__m512i __X, __m512i __Y) {1050 return (__m512i)__builtin_ia32_pmaddubsw512((__v64qi)__X, (__v64qi)__Y);1051}1052 1053static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1054_mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X,1055 __m512i __Y) {1056 return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U,1057 (__v32hi)_mm512_maddubs_epi16(__X, __Y),1058 (__v32hi)__W);1059}1060 1061static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1062_mm512_maskz_maddubs_epi16(__mmask32 __U, __m512i __X, __m512i __Y) {1063 return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U,1064 (__v32hi)_mm512_maddubs_epi16(__X, __Y),1065 (__v32hi)_mm512_setzero_si512());1066}1067 1068static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1069_mm512_madd_epi16(__m512i __A, __m512i __B) {1070 return (__m512i)__builtin_ia32_pmaddwd512((__v32hi)__A, (__v32hi)__B);1071}1072 1073static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1074_mm512_mask_madd_epi16(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {1075 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,1076 (__v16si)_mm512_madd_epi16(__A, __B),1077 (__v16si)__W);1078}1079 1080static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1081_mm512_maskz_madd_epi16(__mmask16 __U, __m512i __A, __m512i __B) {1082 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,1083 (__v16si)_mm512_madd_epi16(__A, __B),1084 (__v16si)_mm512_setzero_si512());1085}1086 1087static __inline__ __m256i __DEFAULT_FN_ATTRS5121088_mm512_cvtsepi16_epi8 (__m512i __A) {1089 return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A,1090 (__v32qi)_mm256_setzero_si256(),1091 (__mmask32) -1);1092}1093 1094static __inline__ __m256i __DEFAULT_FN_ATTRS5121095_mm512_mask_cvtsepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) {1096 return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A,1097 (__v32qi)__O,1098 __M);1099}1100 1101static __inline__ __m256i __DEFAULT_FN_ATTRS5121102_mm512_maskz_cvtsepi16_epi8 (__mmask32 __M, __m512i __A) {1103 return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A,1104 (__v32qi) _mm256_setzero_si256(),1105 __M);1106}1107 1108static __inline__ __m256i __DEFAULT_FN_ATTRS5121109_mm512_cvtusepi16_epi8 (__m512i __A) {1110 return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A,1111 (__v32qi) _mm256_setzero_si256(),1112 (__mmask32) -1);1113}1114 1115static __inline__ __m256i __DEFAULT_FN_ATTRS5121116_mm512_mask_cvtusepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) {1117 return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A,1118 (__v32qi) __O,1119 __M);1120}1121 1122static __inline__ __m256i __DEFAULT_FN_ATTRS5121123_mm512_maskz_cvtusepi16_epi8 (__mmask32 __M, __m512i __A) {1124 return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A,1125 (__v32qi) _mm256_setzero_si256(),1126 __M);1127}1128 1129static __inline__ __m256i __DEFAULT_FN_ATTRS5121130_mm512_cvtepi16_epi8 (__m512i __A) {1131 return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A,1132 (__v32qi) _mm256_undefined_si256(),1133 (__mmask32) -1);1134}1135 1136static __inline__ __m256i __DEFAULT_FN_ATTRS5121137_mm512_mask_cvtepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) {1138 return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A,1139 (__v32qi) __O,1140 __M);1141}1142 1143static __inline__ __m256i __DEFAULT_FN_ATTRS5121144_mm512_maskz_cvtepi16_epi8 (__mmask32 __M, __m512i __A) {1145 return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A,1146 (__v32qi) _mm256_setzero_si256(),1147 __M);1148}1149 1150static __inline__ void __DEFAULT_FN_ATTRS5121151_mm512_mask_cvtepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A)1152{1153 __builtin_ia32_pmovwb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M);1154}1155 1156static __inline__ void __DEFAULT_FN_ATTRS5121157_mm512_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A)1158{1159 __builtin_ia32_pmovswb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M);1160}1161 1162static __inline__ void __DEFAULT_FN_ATTRS5121163_mm512_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A)1164{1165 __builtin_ia32_pmovuswb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M);1166}1167 1168static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1169_mm512_unpackhi_epi8(__m512i __A, __m512i __B) {1170 return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,1171 8, 64+8, 9, 64+9,1172 10, 64+10, 11, 64+11,1173 12, 64+12, 13, 64+13,1174 14, 64+14, 15, 64+15,1175 24, 64+24, 25, 64+25,1176 26, 64+26, 27, 64+27,1177 28, 64+28, 29, 64+29,1178 30, 64+30, 31, 64+31,1179 40, 64+40, 41, 64+41,1180 42, 64+42, 43, 64+43,1181 44, 64+44, 45, 64+45,1182 46, 64+46, 47, 64+47,1183 56, 64+56, 57, 64+57,1184 58, 64+58, 59, 64+59,1185 60, 64+60, 61, 64+61,1186 62, 64+62, 63, 64+63);1187}1188 1189static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1190_mm512_mask_unpackhi_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {1191 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1192 (__v64qi)_mm512_unpackhi_epi8(__A, __B),1193 (__v64qi)__W);1194}1195 1196static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1197_mm512_maskz_unpackhi_epi8(__mmask64 __U, __m512i __A, __m512i __B) {1198 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1199 (__v64qi)_mm512_unpackhi_epi8(__A, __B),1200 (__v64qi)_mm512_setzero_si512());1201}1202 1203static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1204_mm512_unpackhi_epi16(__m512i __A, __m512i __B) {1205 return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B,1206 4, 32+4, 5, 32+5,1207 6, 32+6, 7, 32+7,1208 12, 32+12, 13, 32+13,1209 14, 32+14, 15, 32+15,1210 20, 32+20, 21, 32+21,1211 22, 32+22, 23, 32+23,1212 28, 32+28, 29, 32+29,1213 30, 32+30, 31, 32+31);1214}1215 1216static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1217_mm512_mask_unpackhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1218 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1219 (__v32hi)_mm512_unpackhi_epi16(__A, __B),1220 (__v32hi)__W);1221}1222 1223static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1224_mm512_maskz_unpackhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) {1225 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1226 (__v32hi)_mm512_unpackhi_epi16(__A, __B),1227 (__v32hi)_mm512_setzero_si512());1228}1229 1230static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1231_mm512_unpacklo_epi8(__m512i __A, __m512i __B) {1232 return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,1233 0, 64+0, 1, 64+1,1234 2, 64+2, 3, 64+3,1235 4, 64+4, 5, 64+5,1236 6, 64+6, 7, 64+7,1237 16, 64+16, 17, 64+17,1238 18, 64+18, 19, 64+19,1239 20, 64+20, 21, 64+21,1240 22, 64+22, 23, 64+23,1241 32, 64+32, 33, 64+33,1242 34, 64+34, 35, 64+35,1243 36, 64+36, 37, 64+37,1244 38, 64+38, 39, 64+39,1245 48, 64+48, 49, 64+49,1246 50, 64+50, 51, 64+51,1247 52, 64+52, 53, 64+53,1248 54, 64+54, 55, 64+55);1249}1250 1251static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1252_mm512_mask_unpacklo_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {1253 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1254 (__v64qi)_mm512_unpacklo_epi8(__A, __B),1255 (__v64qi)__W);1256}1257 1258static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1259_mm512_maskz_unpacklo_epi8(__mmask64 __U, __m512i __A, __m512i __B) {1260 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1261 (__v64qi)_mm512_unpacklo_epi8(__A, __B),1262 (__v64qi)_mm512_setzero_si512());1263}1264 1265static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1266_mm512_unpacklo_epi16(__m512i __A, __m512i __B) {1267 return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B,1268 0, 32+0, 1, 32+1,1269 2, 32+2, 3, 32+3,1270 8, 32+8, 9, 32+9,1271 10, 32+10, 11, 32+11,1272 16, 32+16, 17, 32+17,1273 18, 32+18, 19, 32+19,1274 24, 32+24, 25, 32+25,1275 26, 32+26, 27, 32+27);1276}1277 1278static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1279_mm512_mask_unpacklo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1280 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1281 (__v32hi)_mm512_unpacklo_epi16(__A, __B),1282 (__v32hi)__W);1283}1284 1285static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1286_mm512_maskz_unpacklo_epi16(__mmask32 __U, __m512i __A, __m512i __B) {1287 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1288 (__v32hi)_mm512_unpacklo_epi16(__A, __B),1289 (__v32hi)_mm512_setzero_si512());1290}1291 1292static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1293_mm512_cvtepi8_epi16(__m256i __A) {1294 /* This function always performs a signed extension, but __v32qi is a char1295 which may be signed or unsigned, so use __v32qs. */1296 return (__m512i)__builtin_convertvector((__v32qs)__A, __v32hi);1297}1298 1299static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1300_mm512_mask_cvtepi8_epi16(__m512i __W, __mmask32 __U, __m256i __A) {1301 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1302 (__v32hi)_mm512_cvtepi8_epi16(__A),1303 (__v32hi)__W);1304}1305 1306static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1307_mm512_maskz_cvtepi8_epi16(__mmask32 __U, __m256i __A) {1308 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1309 (__v32hi)_mm512_cvtepi8_epi16(__A),1310 (__v32hi)_mm512_setzero_si512());1311}1312 1313static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1314_mm512_cvtepu8_epi16(__m256i __A) {1315 return (__m512i)__builtin_convertvector((__v32qu)__A, __v32hi);1316}1317 1318static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1319_mm512_mask_cvtepu8_epi16(__m512i __W, __mmask32 __U, __m256i __A) {1320 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1321 (__v32hi)_mm512_cvtepu8_epi16(__A),1322 (__v32hi)__W);1323}1324 1325static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1326_mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A) {1327 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1328 (__v32hi)_mm512_cvtepu8_epi16(__A),1329 (__v32hi)_mm512_setzero_si512());1330}1331 1332#define _mm512_shufflehi_epi16(A, imm) \1333 ((__m512i)__builtin_ia32_pshufhw512((__v32hi)(__m512i)(A), (int)(imm)))1334 1335#define _mm512_mask_shufflehi_epi16(W, U, A, imm) \1336 ((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1337 (__v32hi)_mm512_shufflehi_epi16((A), \1338 (imm)), \1339 (__v32hi)(__m512i)(W)))1340 1341#define _mm512_maskz_shufflehi_epi16(U, A, imm) \1342 ((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1343 (__v32hi)_mm512_shufflehi_epi16((A), \1344 (imm)), \1345 (__v32hi)_mm512_setzero_si512()))1346 1347#define _mm512_shufflelo_epi16(A, imm) \1348 ((__m512i)__builtin_ia32_pshuflw512((__v32hi)(__m512i)(A), (int)(imm)))1349 1350 1351#define _mm512_mask_shufflelo_epi16(W, U, A, imm) \1352 ((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1353 (__v32hi)_mm512_shufflelo_epi16((A), \1354 (imm)), \1355 (__v32hi)(__m512i)(W)))1356 1357 1358#define _mm512_maskz_shufflelo_epi16(U, A, imm) \1359 ((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1360 (__v32hi)_mm512_shufflelo_epi16((A), \1361 (imm)), \1362 (__v32hi)_mm512_setzero_si512()))1363 1364static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1365_mm512_sllv_epi16(__m512i __A, __m512i __B)1366{1367 return (__m512i)__builtin_ia32_psllv32hi((__v32hi) __A, (__v32hi) __B);1368}1369 1370static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1371_mm512_mask_sllv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1372{1373 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1374 (__v32hi)_mm512_sllv_epi16(__A, __B),1375 (__v32hi)__W);1376}1377 1378static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1379_mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B)1380{1381 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1382 (__v32hi)_mm512_sllv_epi16(__A, __B),1383 (__v32hi)_mm512_setzero_si512());1384}1385 1386static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1387_mm512_sll_epi16(__m512i __A, __m128i __B) {1388 return (__m512i)__builtin_ia32_psllw512((__v32hi) __A, (__v8hi) __B);1389}1390 1391static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1392_mm512_mask_sll_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) {1393 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1394 (__v32hi)_mm512_sll_epi16(__A, __B),1395 (__v32hi)__W);1396}1397 1398static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1399_mm512_maskz_sll_epi16(__mmask32 __U, __m512i __A, __m128i __B) {1400 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1401 (__v32hi)_mm512_sll_epi16(__A, __B),1402 (__v32hi)_mm512_setzero_si512());1403}1404 1405static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1406_mm512_slli_epi16(__m512i __A, unsigned int __B) {1407 return (__m512i)__builtin_ia32_psllwi512((__v32hi)__A, (int)__B);1408}1409 1410static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1411_mm512_mask_slli_epi16(__m512i __W, __mmask32 __U, __m512i __A,1412 unsigned int __B) {1413 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1414 (__v32hi)_mm512_slli_epi16(__A, __B),1415 (__v32hi)__W);1416}1417 1418static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1419_mm512_maskz_slli_epi16(__mmask32 __U, __m512i __A, unsigned int __B) {1420 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1421 (__v32hi)_mm512_slli_epi16(__A, __B),1422 (__v32hi)_mm512_setzero_si512());1423}1424 1425#define _mm512_bslli_epi128(a, imm) \1426 ((__m512i)__builtin_ia32_pslldqi512_byteshift((__v64qi)(__m512i)(a), \1427 (int)(imm)))1428 1429static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1430_mm512_srlv_epi16(__m512i __A, __m512i __B)1431{1432 return (__m512i)__builtin_ia32_psrlv32hi((__v32hi)__A, (__v32hi)__B);1433}1434 1435static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1436_mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1437{1438 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1439 (__v32hi)_mm512_srlv_epi16(__A, __B),1440 (__v32hi)__W);1441}1442 1443static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1444_mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B)1445{1446 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1447 (__v32hi)_mm512_srlv_epi16(__A, __B),1448 (__v32hi)_mm512_setzero_si512());1449}1450 1451static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1452_mm512_srav_epi16(__m512i __A, __m512i __B)1453{1454 return (__m512i)__builtin_ia32_psrav32hi((__v32hi)__A, (__v32hi)__B);1455}1456 1457static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1458_mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1459{1460 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1461 (__v32hi)_mm512_srav_epi16(__A, __B),1462 (__v32hi)__W);1463}1464 1465static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1466_mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B)1467{1468 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1469 (__v32hi)_mm512_srav_epi16(__A, __B),1470 (__v32hi)_mm512_setzero_si512());1471}1472 1473static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1474_mm512_sra_epi16(__m512i __A, __m128i __B) {1475 return (__m512i)__builtin_ia32_psraw512((__v32hi) __A, (__v8hi) __B);1476}1477 1478static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1479_mm512_mask_sra_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) {1480 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1481 (__v32hi)_mm512_sra_epi16(__A, __B),1482 (__v32hi)__W);1483}1484 1485static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1486_mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B) {1487 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1488 (__v32hi)_mm512_sra_epi16(__A, __B),1489 (__v32hi)_mm512_setzero_si512());1490}1491 1492static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1493_mm512_srai_epi16(__m512i __A, unsigned int __B) {1494 return (__m512i)__builtin_ia32_psrawi512((__v32hi)__A, (int)__B);1495}1496 1497static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1498_mm512_mask_srai_epi16(__m512i __W, __mmask32 __U, __m512i __A,1499 unsigned int __B) {1500 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1501 (__v32hi)_mm512_srai_epi16(__A, __B),1502 (__v32hi)__W);1503}1504 1505static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1506_mm512_maskz_srai_epi16(__mmask32 __U, __m512i __A, unsigned int __B) {1507 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1508 (__v32hi)_mm512_srai_epi16(__A, __B),1509 (__v32hi)_mm512_setzero_si512());1510}1511 1512static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1513_mm512_srl_epi16(__m512i __A, __m128i __B) {1514 return (__m512i)__builtin_ia32_psrlw512((__v32hi) __A, (__v8hi) __B);1515}1516 1517static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1518_mm512_mask_srl_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) {1519 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1520 (__v32hi)_mm512_srl_epi16(__A, __B),1521 (__v32hi)__W);1522}1523 1524static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1525_mm512_maskz_srl_epi16(__mmask32 __U, __m512i __A, __m128i __B) {1526 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1527 (__v32hi)_mm512_srl_epi16(__A, __B),1528 (__v32hi)_mm512_setzero_si512());1529}1530 1531static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1532_mm512_srli_epi16(__m512i __A, unsigned int __B) {1533 return (__m512i)__builtin_ia32_psrlwi512((__v32hi)__A, (int)__B);1534}1535 1536static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1537_mm512_mask_srli_epi16(__m512i __W, __mmask32 __U, __m512i __A,1538 unsigned int __B) {1539 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1540 (__v32hi)_mm512_srli_epi16(__A, __B),1541 (__v32hi)__W);1542}1543 1544static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1545_mm512_maskz_srli_epi16(__mmask32 __U, __m512i __A, int __B) {1546 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1547 (__v32hi)_mm512_srli_epi16(__A, (unsigned int)__B),1548 (__v32hi)_mm512_setzero_si512());1549}1550 1551#define _mm512_bsrli_epi128(a, imm) \1552 ((__m512i)__builtin_ia32_psrldqi512_byteshift((__v64qi)(__m512i)(a), \1553 (int)(imm)))1554 1555static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1556_mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A)1557{1558 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,1559 (__v32hi) __A,1560 (__v32hi) __W);1561}1562 1563static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1564_mm512_maskz_mov_epi16(__mmask32 __U, __m512i __A) {1565 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,1566 (__v32hi) __A,1567 (__v32hi) _mm512_setzero_si512 ());1568}1569 1570static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1571_mm512_mask_mov_epi8(__m512i __W, __mmask64 __U, __m512i __A) {1572 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,1573 (__v64qi) __A,1574 (__v64qi) __W);1575}1576 1577static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1578_mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A)1579{1580 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,1581 (__v64qi) __A,1582 (__v64qi) _mm512_setzero_si512 ());1583}1584 1585static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1586_mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A)1587{1588 return (__m512i) __builtin_ia32_selectb_512(__M,1589 (__v64qi)_mm512_set1_epi8(__A),1590 (__v64qi) __O);1591}1592 1593static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1594_mm512_maskz_set1_epi8(__mmask64 __M, char __A) {1595 return (__m512i) __builtin_ia32_selectb_512(__M,1596 (__v64qi) _mm512_set1_epi8(__A),1597 (__v64qi) _mm512_setzero_si512());1598}1599 1600static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR1601_mm512_kunpackd(__mmask64 __A, __mmask64 __B) {1602 return (__mmask64) __builtin_ia32_kunpckdi ((__mmask64) __A,1603 (__mmask64) __B);1604}1605 1606static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR1607_mm512_kunpackw(__mmask32 __A, __mmask32 __B) {1608 return (__mmask32) __builtin_ia32_kunpcksi ((__mmask32) __A,1609 (__mmask32) __B);1610}1611 1612static __inline __m512i __DEFAULT_FN_ATTRS5121613_mm512_loadu_epi16 (void const *__P)1614{1615 struct __loadu_epi16 {1616 __m512i_u __v;1617 } __attribute__((__packed__, __may_alias__));1618 return ((const struct __loadu_epi16*)__P)->__v;1619}1620 1621static __inline__ __m512i __DEFAULT_FN_ATTRS5121622_mm512_mask_loadu_epi16 (__m512i __W, __mmask32 __U, void const *__P)1623{1624 return (__m512i) __builtin_ia32_loaddquhi512_mask ((const __v32hi *) __P,1625 (__v32hi) __W,1626 (__mmask32) __U);1627}1628 1629static __inline__ __m512i __DEFAULT_FN_ATTRS5121630_mm512_maskz_loadu_epi16 (__mmask32 __U, void const *__P)1631{1632 return (__m512i) __builtin_ia32_loaddquhi512_mask ((const __v32hi *) __P,1633 (__v32hi)1634 _mm512_setzero_si512 (),1635 (__mmask32) __U);1636}1637 1638static __inline __m512i __DEFAULT_FN_ATTRS5121639_mm512_loadu_epi8 (void const *__P)1640{1641 struct __loadu_epi8 {1642 __m512i_u __v;1643 } __attribute__((__packed__, __may_alias__));1644 return ((const struct __loadu_epi8*)__P)->__v;1645}1646 1647static __inline__ __m512i __DEFAULT_FN_ATTRS5121648_mm512_mask_loadu_epi8 (__m512i __W, __mmask64 __U, void const *__P)1649{1650 return (__m512i) __builtin_ia32_loaddquqi512_mask ((const __v64qi *) __P,1651 (__v64qi) __W,1652 (__mmask64) __U);1653}1654 1655static __inline__ __m512i __DEFAULT_FN_ATTRS5121656_mm512_maskz_loadu_epi8 (__mmask64 __U, void const *__P)1657{1658 return (__m512i) __builtin_ia32_loaddquqi512_mask ((const __v64qi *) __P,1659 (__v64qi)1660 _mm512_setzero_si512 (),1661 (__mmask64) __U);1662}1663 1664static __inline void __DEFAULT_FN_ATTRS5121665_mm512_storeu_epi16 (void *__P, __m512i __A)1666{1667 struct __storeu_epi16 {1668 __m512i_u __v;1669 } __attribute__((__packed__, __may_alias__));1670 ((struct __storeu_epi16*)__P)->__v = __A;1671}1672 1673static __inline__ void __DEFAULT_FN_ATTRS5121674_mm512_mask_storeu_epi16 (void *__P, __mmask32 __U, __m512i __A)1675{1676 __builtin_ia32_storedquhi512_mask ((__v32hi *) __P,1677 (__v32hi) __A,1678 (__mmask32) __U);1679}1680 1681static __inline void __DEFAULT_FN_ATTRS5121682_mm512_storeu_epi8 (void *__P, __m512i __A)1683{1684 struct __storeu_epi8 {1685 __m512i_u __v;1686 } __attribute__((__packed__, __may_alias__));1687 ((struct __storeu_epi8*)__P)->__v = __A;1688}1689 1690static __inline__ void __DEFAULT_FN_ATTRS5121691_mm512_mask_storeu_epi8 (void *__P, __mmask64 __U, __m512i __A)1692{1693 __builtin_ia32_storedquqi512_mask ((__v64qi *) __P,1694 (__v64qi) __A,1695 (__mmask64) __U);1696}1697 1698static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121699_mm512_test_epi8_mask (__m512i __A, __m512i __B)1700{1701 return _mm512_cmpneq_epi8_mask (_mm512_and_epi32 (__A, __B),1702 _mm512_setzero_si512());1703}1704 1705static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121706_mm512_mask_test_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B)1707{1708 return _mm512_mask_cmpneq_epi8_mask (__U, _mm512_and_epi32 (__A, __B),1709 _mm512_setzero_si512());1710}1711 1712static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121713_mm512_test_epi16_mask (__m512i __A, __m512i __B)1714{1715 return _mm512_cmpneq_epi16_mask (_mm512_and_epi32 (__A, __B),1716 _mm512_setzero_si512());1717}1718 1719static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121720_mm512_mask_test_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B)1721{1722 return _mm512_mask_cmpneq_epi16_mask (__U, _mm512_and_epi32 (__A, __B),1723 _mm512_setzero_si512());1724}1725 1726static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121727_mm512_testn_epi8_mask (__m512i __A, __m512i __B)1728{1729 return _mm512_cmpeq_epi8_mask (_mm512_and_epi32 (__A, __B), _mm512_setzero_si512());1730}1731 1732static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121733_mm512_mask_testn_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B)1734{1735 return _mm512_mask_cmpeq_epi8_mask (__U, _mm512_and_epi32 (__A, __B),1736 _mm512_setzero_si512());1737}1738 1739static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121740_mm512_testn_epi16_mask (__m512i __A, __m512i __B)1741{1742 return _mm512_cmpeq_epi16_mask (_mm512_and_epi32 (__A, __B),1743 _mm512_setzero_si512());1744}1745 1746static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121747_mm512_mask_testn_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B)1748{1749 return _mm512_mask_cmpeq_epi16_mask (__U, _mm512_and_epi32 (__A, __B),1750 _mm512_setzero_si512());1751}1752 1753static __inline__ __mmask64 __DEFAULT_FN_ATTRS512_CONSTEXPR1754_mm512_movepi8_mask(__m512i __A) {1755 return (__mmask64) __builtin_ia32_cvtb2mask512 ((__v64qi) __A);1756}1757 1758static __inline__ __mmask32 __DEFAULT_FN_ATTRS512_CONSTEXPR1759_mm512_movepi16_mask(__m512i __A) {1760 return (__mmask32) __builtin_ia32_cvtw2mask512 ((__v32hi) __A);1761}1762 1763static __inline__ __m512i __DEFAULT_FN_ATTRS5121764_mm512_movm_epi8 (__mmask64 __A)1765{1766 return (__m512i) __builtin_ia32_cvtmask2b512 (__A);1767}1768 1769static __inline__ __m512i __DEFAULT_FN_ATTRS5121770_mm512_movm_epi16 (__mmask32 __A)1771{1772 return (__m512i) __builtin_ia32_cvtmask2w512 (__A);1773}1774 1775static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1776_mm512_broadcastb_epi8(__m128i __A) {1777 return (__m512i)__builtin_shufflevector((__v16qi) __A, (__v16qi) __A,1778 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,1779 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,1780 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,1781 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);1782}1783 1784static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1785_mm512_mask_broadcastb_epi8 (__m512i __O, __mmask64 __M, __m128i __A)1786{1787 return (__m512i)__builtin_ia32_selectb_512(__M,1788 (__v64qi) _mm512_broadcastb_epi8(__A),1789 (__v64qi) __O);1790}1791 1792static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1793_mm512_maskz_broadcastb_epi8(__mmask64 __M, __m128i __A) {1794 return (__m512i)__builtin_ia32_selectb_512(__M,1795 (__v64qi) _mm512_broadcastb_epi8(__A),1796 (__v64qi) _mm512_setzero_si512());1797}1798 1799static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1800_mm512_mask_set1_epi16 (__m512i __O, __mmask32 __M, short __A)1801{1802 return (__m512i) __builtin_ia32_selectw_512(__M,1803 (__v32hi) _mm512_set1_epi16(__A),1804 (__v32hi) __O);1805}1806 1807static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1808_mm512_maskz_set1_epi16(__mmask32 __M, short __A) {1809 return (__m512i) __builtin_ia32_selectw_512(__M,1810 (__v32hi) _mm512_set1_epi16(__A),1811 (__v32hi) _mm512_setzero_si512());1812}1813 1814static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1815_mm512_broadcastw_epi16(__m128i __A) {1816 return (__m512i)__builtin_shufflevector((__v8hi) __A, (__v8hi) __A,1817 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,1818 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);1819}1820 1821static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1822_mm512_mask_broadcastw_epi16 (__m512i __O, __mmask32 __M, __m128i __A)1823{1824 return (__m512i)__builtin_ia32_selectw_512(__M,1825 (__v32hi) _mm512_broadcastw_epi16(__A),1826 (__v32hi) __O);1827}1828 1829static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1830_mm512_maskz_broadcastw_epi16 (__mmask32 __M, __m128i __A)1831{1832 return (__m512i)__builtin_ia32_selectw_512(__M,1833 (__v32hi) _mm512_broadcastw_epi16(__A),1834 (__v32hi) _mm512_setzero_si512());1835}1836 1837static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1838_mm512_permutexvar_epi16(__m512i __A, __m512i __B) {1839 return (__m512i)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A);1840}1841 1842static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1843_mm512_maskz_permutexvar_epi16(__mmask32 __M, __m512i __A, __m512i __B) {1844 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,1845 (__v32hi)_mm512_permutexvar_epi16(__A, __B),1846 (__v32hi)_mm512_setzero_si512());1847}1848 1849static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR1850_mm512_mask_permutexvar_epi16(__m512i __W, __mmask32 __M, __m512i __A,1851 __m512i __B) {1852 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,1853 (__v32hi)_mm512_permutexvar_epi16(__A, __B),1854 (__v32hi)__W);1855}1856 1857#define _mm512_alignr_epi8(A, B, N) \1858 ((__m512i)__builtin_ia32_palignr512((__v64qi)(__m512i)(A), \1859 (__v64qi)(__m512i)(B), (int)(N)))1860 1861#define _mm512_mask_alignr_epi8(W, U, A, B, N) \1862 ((__m512i)__builtin_ia32_selectb_512((__mmask64)(U), \1863 (__v64qi)_mm512_alignr_epi8((A), (B), (int)(N)), \1864 (__v64qi)(__m512i)(W)))1865 1866#define _mm512_maskz_alignr_epi8(U, A, B, N) \1867 ((__m512i)__builtin_ia32_selectb_512((__mmask64)(U), \1868 (__v64qi)_mm512_alignr_epi8((A), (B), (int)(N)), \1869 (__v64qi)(__m512i)_mm512_setzero_si512()))1870 1871#define _mm512_dbsad_epu8(A, B, imm) \1872 ((__m512i)__builtin_ia32_dbpsadbw512((__v64qi)(__m512i)(A), \1873 (__v64qi)(__m512i)(B), (int)(imm)))1874 1875#define _mm512_mask_dbsad_epu8(W, U, A, B, imm) \1876 ((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1877 (__v32hi)_mm512_dbsad_epu8((A), (B), (imm)), \1878 (__v32hi)(__m512i)(W)))1879 1880#define _mm512_maskz_dbsad_epu8(U, A, B, imm) \1881 ((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1882 (__v32hi)_mm512_dbsad_epu8((A), (B), (imm)), \1883 (__v32hi)_mm512_setzero_si512()))1884 1885static __inline__ __m512i __DEFAULT_FN_ATTRS5121886_mm512_sad_epu8 (__m512i __A, __m512i __B)1887{1888 return (__m512i) __builtin_ia32_psadbw512 ((__v64qi) __A,1889 (__v64qi) __B);1890}1891 1892#undef __DEFAULT_FN_ATTRS5121893#undef __DEFAULT_FN_ATTRS1894#undef __DEFAULT_FN_ATTRS512_CONSTEXPR1895#undef __DEFAULT_FN_ATTRS_CONSTEXPR1896 1897#endif1898