3069 lines · c
1/*===---- avx512vlbwintrin.h - AVX512VL and AVX512BW intrinsics ------------===2 *3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4 * See https://llvm.org/LICENSE.txt for license information.5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6 *7 *===-----------------------------------------------------------------------===8 */9 10#ifndef __IMMINTRIN_H11#error "Never use <avx512vlbwintrin.h> directly; include <immintrin.h> instead."12#endif13 14#ifndef __AVX512VLBWINTRIN_H15#define __AVX512VLBWINTRIN_H16 17/* Define the default attributes for the functions in this file. */18#define __DEFAULT_FN_ATTRS128 \19 __attribute__((__always_inline__, __nodebug__, \20 __target__("avx512vl,avx512bw"), __min_vector_width__(128)))21#define __DEFAULT_FN_ATTRS256 \22 __attribute__((__always_inline__, __nodebug__, \23 __target__("avx512vl,avx512bw"), __min_vector_width__(256)))24 25#if defined(__cplusplus) && (__cplusplus >= 201103L)26#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr27#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr28#else29#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS12830#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS25631#endif32 33/* Integer compare */34 35#define _mm_cmp_epi8_mask(a, b, p) \36 ((__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)(__m128i)(a), \37 (__v16qi)(__m128i)(b), (int)(p), \38 (__mmask16)-1))39 40#define _mm_mask_cmp_epi8_mask(m, a, b, p) \41 ((__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)(__m128i)(a), \42 (__v16qi)(__m128i)(b), (int)(p), \43 (__mmask16)(m)))44 45#define _mm_cmp_epu8_mask(a, b, p) \46 ((__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)(__m128i)(a), \47 (__v16qi)(__m128i)(b), (int)(p), \48 (__mmask16)-1))49 50#define _mm_mask_cmp_epu8_mask(m, a, b, p) \51 ((__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)(__m128i)(a), \52 (__v16qi)(__m128i)(b), (int)(p), \53 (__mmask16)(m)))54 55#define _mm256_cmp_epi8_mask(a, b, p) \56 ((__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)(__m256i)(a), \57 (__v32qi)(__m256i)(b), (int)(p), \58 (__mmask32)-1))59 60#define _mm256_mask_cmp_epi8_mask(m, a, b, p) \61 ((__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)(__m256i)(a), \62 (__v32qi)(__m256i)(b), (int)(p), \63 (__mmask32)(m)))64 65#define _mm256_cmp_epu8_mask(a, b, p) \66 ((__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)(__m256i)(a), \67 (__v32qi)(__m256i)(b), (int)(p), \68 (__mmask32)-1))69 70#define _mm256_mask_cmp_epu8_mask(m, a, b, p) \71 ((__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)(__m256i)(a), \72 (__v32qi)(__m256i)(b), (int)(p), \73 (__mmask32)(m)))74 75#define _mm_cmp_epi16_mask(a, b, p) \76 ((__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)(__m128i)(a), \77 (__v8hi)(__m128i)(b), (int)(p), \78 (__mmask8)-1))79 80#define _mm_mask_cmp_epi16_mask(m, a, b, p) \81 ((__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)(__m128i)(a), \82 (__v8hi)(__m128i)(b), (int)(p), \83 (__mmask8)(m)))84 85#define _mm_cmp_epu16_mask(a, b, p) \86 ((__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)(__m128i)(a), \87 (__v8hi)(__m128i)(b), (int)(p), \88 (__mmask8)-1))89 90#define _mm_mask_cmp_epu16_mask(m, a, b, p) \91 ((__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)(__m128i)(a), \92 (__v8hi)(__m128i)(b), (int)(p), \93 (__mmask8)(m)))94 95#define _mm256_cmp_epi16_mask(a, b, p) \96 ((__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)(__m256i)(a), \97 (__v16hi)(__m256i)(b), (int)(p), \98 (__mmask16)-1))99 100#define _mm256_mask_cmp_epi16_mask(m, a, b, p) \101 ((__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)(__m256i)(a), \102 (__v16hi)(__m256i)(b), (int)(p), \103 (__mmask16)(m)))104 105#define _mm256_cmp_epu16_mask(a, b, p) \106 ((__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)(__m256i)(a), \107 (__v16hi)(__m256i)(b), (int)(p), \108 (__mmask16)-1))109 110#define _mm256_mask_cmp_epu16_mask(m, a, b, p) \111 ((__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)(__m256i)(a), \112 (__v16hi)(__m256i)(b), (int)(p), \113 (__mmask16)(m)))114 115#define _mm_cmpeq_epi8_mask(A, B) \116 _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_EQ)117#define _mm_mask_cmpeq_epi8_mask(k, A, B) \118 _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_EQ)119#define _mm_cmpge_epi8_mask(A, B) \120 _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_GE)121#define _mm_mask_cmpge_epi8_mask(k, A, B) \122 _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GE)123#define _mm_cmpgt_epi8_mask(A, B) \124 _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_GT)125#define _mm_mask_cmpgt_epi8_mask(k, A, B) \126 _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GT)127#define _mm_cmple_epi8_mask(A, B) \128 _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_LE)129#define _mm_mask_cmple_epi8_mask(k, A, B) \130 _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LE)131#define _mm_cmplt_epi8_mask(A, B) \132 _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_LT)133#define _mm_mask_cmplt_epi8_mask(k, A, B) \134 _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LT)135#define _mm_cmpneq_epi8_mask(A, B) \136 _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_NE)137#define _mm_mask_cmpneq_epi8_mask(k, A, B) \138 _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_NE)139 140#define _mm256_cmpeq_epi8_mask(A, B) \141 _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_EQ)142#define _mm256_mask_cmpeq_epi8_mask(k, A, B) \143 _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_EQ)144#define _mm256_cmpge_epi8_mask(A, B) \145 _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_GE)146#define _mm256_mask_cmpge_epi8_mask(k, A, B) \147 _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GE)148#define _mm256_cmpgt_epi8_mask(A, B) \149 _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_GT)150#define _mm256_mask_cmpgt_epi8_mask(k, A, B) \151 _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GT)152#define _mm256_cmple_epi8_mask(A, B) \153 _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_LE)154#define _mm256_mask_cmple_epi8_mask(k, A, B) \155 _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LE)156#define _mm256_cmplt_epi8_mask(A, B) \157 _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_LT)158#define _mm256_mask_cmplt_epi8_mask(k, A, B) \159 _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LT)160#define _mm256_cmpneq_epi8_mask(A, B) \161 _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_NE)162#define _mm256_mask_cmpneq_epi8_mask(k, A, B) \163 _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_NE)164 165#define _mm_cmpeq_epu8_mask(A, B) \166 _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_EQ)167#define _mm_mask_cmpeq_epu8_mask(k, A, B) \168 _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_EQ)169#define _mm_cmpge_epu8_mask(A, B) \170 _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_GE)171#define _mm_mask_cmpge_epu8_mask(k, A, B) \172 _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GE)173#define _mm_cmpgt_epu8_mask(A, B) \174 _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_GT)175#define _mm_mask_cmpgt_epu8_mask(k, A, B) \176 _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GT)177#define _mm_cmple_epu8_mask(A, B) \178 _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_LE)179#define _mm_mask_cmple_epu8_mask(k, A, B) \180 _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LE)181#define _mm_cmplt_epu8_mask(A, B) \182 _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_LT)183#define _mm_mask_cmplt_epu8_mask(k, A, B) \184 _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LT)185#define _mm_cmpneq_epu8_mask(A, B) \186 _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_NE)187#define _mm_mask_cmpneq_epu8_mask(k, A, B) \188 _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_NE)189 190#define _mm256_cmpeq_epu8_mask(A, B) \191 _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_EQ)192#define _mm256_mask_cmpeq_epu8_mask(k, A, B) \193 _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_EQ)194#define _mm256_cmpge_epu8_mask(A, B) \195 _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_GE)196#define _mm256_mask_cmpge_epu8_mask(k, A, B) \197 _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GE)198#define _mm256_cmpgt_epu8_mask(A, B) \199 _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_GT)200#define _mm256_mask_cmpgt_epu8_mask(k, A, B) \201 _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GT)202#define _mm256_cmple_epu8_mask(A, B) \203 _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_LE)204#define _mm256_mask_cmple_epu8_mask(k, A, B) \205 _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LE)206#define _mm256_cmplt_epu8_mask(A, B) \207 _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_LT)208#define _mm256_mask_cmplt_epu8_mask(k, A, B) \209 _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LT)210#define _mm256_cmpneq_epu8_mask(A, B) \211 _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_NE)212#define _mm256_mask_cmpneq_epu8_mask(k, A, B) \213 _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_NE)214 215#define _mm_cmpeq_epi16_mask(A, B) \216 _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_EQ)217#define _mm_mask_cmpeq_epi16_mask(k, A, B) \218 _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_EQ)219#define _mm_cmpge_epi16_mask(A, B) \220 _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_GE)221#define _mm_mask_cmpge_epi16_mask(k, A, B) \222 _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GE)223#define _mm_cmpgt_epi16_mask(A, B) \224 _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_GT)225#define _mm_mask_cmpgt_epi16_mask(k, A, B) \226 _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GT)227#define _mm_cmple_epi16_mask(A, B) \228 _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_LE)229#define _mm_mask_cmple_epi16_mask(k, A, B) \230 _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LE)231#define _mm_cmplt_epi16_mask(A, B) \232 _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_LT)233#define _mm_mask_cmplt_epi16_mask(k, A, B) \234 _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LT)235#define _mm_cmpneq_epi16_mask(A, B) \236 _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_NE)237#define _mm_mask_cmpneq_epi16_mask(k, A, B) \238 _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_NE)239 240#define _mm256_cmpeq_epi16_mask(A, B) \241 _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_EQ)242#define _mm256_mask_cmpeq_epi16_mask(k, A, B) \243 _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_EQ)244#define _mm256_cmpge_epi16_mask(A, B) \245 _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_GE)246#define _mm256_mask_cmpge_epi16_mask(k, A, B) \247 _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GE)248#define _mm256_cmpgt_epi16_mask(A, B) \249 _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_GT)250#define _mm256_mask_cmpgt_epi16_mask(k, A, B) \251 _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GT)252#define _mm256_cmple_epi16_mask(A, B) \253 _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_LE)254#define _mm256_mask_cmple_epi16_mask(k, A, B) \255 _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LE)256#define _mm256_cmplt_epi16_mask(A, B) \257 _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_LT)258#define _mm256_mask_cmplt_epi16_mask(k, A, B) \259 _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LT)260#define _mm256_cmpneq_epi16_mask(A, B) \261 _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_NE)262#define _mm256_mask_cmpneq_epi16_mask(k, A, B) \263 _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_NE)264 265#define _mm_cmpeq_epu16_mask(A, B) \266 _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_EQ)267#define _mm_mask_cmpeq_epu16_mask(k, A, B) \268 _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_EQ)269#define _mm_cmpge_epu16_mask(A, B) \270 _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_GE)271#define _mm_mask_cmpge_epu16_mask(k, A, B) \272 _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GE)273#define _mm_cmpgt_epu16_mask(A, B) \274 _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_GT)275#define _mm_mask_cmpgt_epu16_mask(k, A, B) \276 _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GT)277#define _mm_cmple_epu16_mask(A, B) \278 _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_LE)279#define _mm_mask_cmple_epu16_mask(k, A, B) \280 _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LE)281#define _mm_cmplt_epu16_mask(A, B) \282 _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_LT)283#define _mm_mask_cmplt_epu16_mask(k, A, B) \284 _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LT)285#define _mm_cmpneq_epu16_mask(A, B) \286 _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_NE)287#define _mm_mask_cmpneq_epu16_mask(k, A, B) \288 _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)289 290#define _mm256_cmpeq_epu16_mask(A, B) \291 _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_EQ)292#define _mm256_mask_cmpeq_epu16_mask(k, A, B) \293 _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_EQ)294#define _mm256_cmpge_epu16_mask(A, B) \295 _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_GE)296#define _mm256_mask_cmpge_epu16_mask(k, A, B) \297 _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GE)298#define _mm256_cmpgt_epu16_mask(A, B) \299 _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_GT)300#define _mm256_mask_cmpgt_epu16_mask(k, A, B) \301 _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GT)302#define _mm256_cmple_epu16_mask(A, B) \303 _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_LE)304#define _mm256_mask_cmple_epu16_mask(k, A, B) \305 _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LE)306#define _mm256_cmplt_epu16_mask(A, B) \307 _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_LT)308#define _mm256_mask_cmplt_epu16_mask(k, A, B) \309 _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LT)310#define _mm256_cmpneq_epu16_mask(A, B) \311 _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_NE)312#define _mm256_mask_cmpneq_epu16_mask(k, A, B) \313 _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)314 315static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR316_mm256_mask_add_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {317 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,318 (__v32qi)_mm256_add_epi8(__A, __B),319 (__v32qi)__W);320}321 322static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR323_mm256_maskz_add_epi8(__mmask32 __U, __m256i __A, __m256i __B) {324 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,325 (__v32qi)_mm256_add_epi8(__A, __B),326 (__v32qi)_mm256_setzero_si256());327}328 329static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR330_mm256_mask_add_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {331 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,332 (__v16hi)_mm256_add_epi16(__A, __B),333 (__v16hi)__W);334}335 336static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR337_mm256_maskz_add_epi16(__mmask16 __U, __m256i __A, __m256i __B) {338 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,339 (__v16hi)_mm256_add_epi16(__A, __B),340 (__v16hi)_mm256_setzero_si256());341}342 343static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR344_mm256_mask_sub_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {345 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,346 (__v32qi)_mm256_sub_epi8(__A, __B),347 (__v32qi)__W);348}349 350static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR351_mm256_maskz_sub_epi8(__mmask32 __U, __m256i __A, __m256i __B) {352 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,353 (__v32qi)_mm256_sub_epi8(__A, __B),354 (__v32qi)_mm256_setzero_si256());355}356 357static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR358_mm256_mask_sub_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {359 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,360 (__v16hi)_mm256_sub_epi16(__A, __B),361 (__v16hi)__W);362}363 364static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR365_mm256_maskz_sub_epi16(__mmask16 __U, __m256i __A, __m256i __B) {366 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,367 (__v16hi)_mm256_sub_epi16(__A, __B),368 (__v16hi)_mm256_setzero_si256());369}370 371static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR372_mm_mask_add_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {373 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,374 (__v16qi)_mm_add_epi8(__A, __B),375 (__v16qi)__W);376}377 378static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR379_mm_maskz_add_epi8(__mmask16 __U, __m128i __A, __m128i __B) {380 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,381 (__v16qi)_mm_add_epi8(__A, __B),382 (__v16qi)_mm_setzero_si128());383}384 385static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR386_mm_mask_add_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {387 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,388 (__v8hi)_mm_add_epi16(__A, __B),389 (__v8hi)__W);390}391 392static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR393_mm_maskz_add_epi16(__mmask8 __U, __m128i __A, __m128i __B) {394 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,395 (__v8hi)_mm_add_epi16(__A, __B),396 (__v8hi)_mm_setzero_si128());397}398 399static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR400_mm_mask_sub_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {401 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,402 (__v16qi)_mm_sub_epi8(__A, __B),403 (__v16qi)__W);404}405 406static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR407_mm_maskz_sub_epi8(__mmask16 __U, __m128i __A, __m128i __B) {408 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,409 (__v16qi)_mm_sub_epi8(__A, __B),410 (__v16qi)_mm_setzero_si128());411}412 413static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR414_mm_mask_sub_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {415 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,416 (__v8hi)_mm_sub_epi16(__A, __B),417 (__v8hi)__W);418}419 420static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR421_mm_maskz_sub_epi16(__mmask8 __U, __m128i __A, __m128i __B) {422 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,423 (__v8hi)_mm_sub_epi16(__A, __B),424 (__v8hi)_mm_setzero_si128());425}426 427static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR428_mm256_mask_mullo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {429 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,430 (__v16hi)_mm256_mullo_epi16(__A, __B),431 (__v16hi)__W);432}433 434static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR435_mm256_maskz_mullo_epi16(__mmask16 __U, __m256i __A, __m256i __B) {436 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,437 (__v16hi)_mm256_mullo_epi16(__A, __B),438 (__v16hi)_mm256_setzero_si256());439}440 441static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR442_mm_mask_mullo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {443 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,444 (__v8hi)_mm_mullo_epi16(__A, __B),445 (__v8hi)__W);446}447 448static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR449_mm_maskz_mullo_epi16(__mmask8 __U, __m128i __A, __m128i __B) {450 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,451 (__v8hi)_mm_mullo_epi16(__A, __B),452 (__v8hi)_mm_setzero_si128());453}454 455static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR456_mm_mask_blend_epi8(__mmask16 __U, __m128i __A, __m128i __W) {457 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,458 (__v16qi) __W,459 (__v16qi) __A);460}461 462static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR463_mm256_mask_blend_epi8(__mmask32 __U, __m256i __A, __m256i __W) {464 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,465 (__v32qi) __W,466 (__v32qi) __A);467}468 469static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR470_mm_mask_blend_epi16(__mmask8 __U, __m128i __A, __m128i __W) {471 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,472 (__v8hi) __W,473 (__v8hi) __A);474}475 476static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR477_mm256_mask_blend_epi16(__mmask16 __U, __m256i __A, __m256i __W) {478 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,479 (__v16hi) __W,480 (__v16hi) __A);481}482 483static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR484_mm_mask_abs_epi8(__m128i __W, __mmask16 __U, __m128i __A) {485 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,486 (__v16qi)_mm_abs_epi8(__A),487 (__v16qi)__W);488}489 490static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR491_mm_maskz_abs_epi8(__mmask16 __U, __m128i __A) {492 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,493 (__v16qi)_mm_abs_epi8(__A),494 (__v16qi)_mm_setzero_si128());495}496 497static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR498_mm256_mask_abs_epi8(__m256i __W, __mmask32 __U, __m256i __A) {499 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,500 (__v32qi)_mm256_abs_epi8(__A),501 (__v32qi)__W);502}503 504static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR505_mm256_maskz_abs_epi8(__mmask32 __U, __m256i __A) {506 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,507 (__v32qi)_mm256_abs_epi8(__A),508 (__v32qi)_mm256_setzero_si256());509}510 511static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR512_mm_mask_abs_epi16(__m128i __W, __mmask8 __U, __m128i __A) {513 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,514 (__v8hi)_mm_abs_epi16(__A),515 (__v8hi)__W);516}517 518static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR519_mm_maskz_abs_epi16(__mmask8 __U, __m128i __A) {520 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,521 (__v8hi)_mm_abs_epi16(__A),522 (__v8hi)_mm_setzero_si128());523}524 525static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR526_mm256_mask_abs_epi16(__m256i __W, __mmask16 __U, __m256i __A) {527 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,528 (__v16hi)_mm256_abs_epi16(__A),529 (__v16hi)__W);530}531 532static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR533_mm256_maskz_abs_epi16(__mmask16 __U, __m256i __A) {534 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,535 (__v16hi)_mm256_abs_epi16(__A),536 (__v16hi)_mm256_setzero_si256());537}538 539static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR540_mm_maskz_packs_epi32(__mmask8 __M, __m128i __A, __m128i __B) {541 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,542 (__v8hi)_mm_packs_epi32(__A, __B),543 (__v8hi)_mm_setzero_si128());544}545 546static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR547_mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)548{549 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,550 (__v8hi)_mm_packs_epi32(__A, __B),551 (__v8hi)__W);552}553 554static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR555_mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B)556{557 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,558 (__v16hi)_mm256_packs_epi32(__A, __B),559 (__v16hi)_mm256_setzero_si256());560}561 562static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR563_mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)564{565 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,566 (__v16hi)_mm256_packs_epi32(__A, __B),567 (__v16hi)__W);568}569 570static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR571_mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B)572{573 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,574 (__v16qi)_mm_packs_epi16(__A, __B),575 (__v16qi)_mm_setzero_si128());576}577 578static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR579_mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)580{581 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,582 (__v16qi)_mm_packs_epi16(__A, __B),583 (__v16qi)__W);584}585 586static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR587_mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B)588{589 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,590 (__v32qi)_mm256_packs_epi16(__A, __B),591 (__v32qi)_mm256_setzero_si256());592}593 594static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR595_mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)596{597 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,598 (__v32qi)_mm256_packs_epi16(__A, __B),599 (__v32qi)__W);600}601 602static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR603_mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B)604{605 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,606 (__v8hi)_mm_packus_epi32(__A, __B),607 (__v8hi)_mm_setzero_si128());608}609 610static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR611_mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)612{613 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,614 (__v8hi)_mm_packus_epi32(__A, __B),615 (__v8hi)__W);616}617 618static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR619_mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B)620{621 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,622 (__v16hi)_mm256_packus_epi32(__A, __B),623 (__v16hi)_mm256_setzero_si256());624}625 626static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR627_mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)628{629 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,630 (__v16hi)_mm256_packus_epi32(__A, __B),631 (__v16hi)__W);632}633 634static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR635_mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B)636{637 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,638 (__v16qi)_mm_packus_epi16(__A, __B),639 (__v16qi)_mm_setzero_si128());640}641 642static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR643_mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)644{645 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,646 (__v16qi)_mm_packus_epi16(__A, __B),647 (__v16qi)__W);648}649 650static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR651_mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B)652{653 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,654 (__v32qi)_mm256_packus_epi16(__A, __B),655 (__v32qi)_mm256_setzero_si256());656}657 658static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR659_mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)660{661 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,662 (__v32qi)_mm256_packus_epi16(__A, __B),663 (__v32qi)__W);664}665 666static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR667_mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)668{669 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,670 (__v16qi)_mm_adds_epi8(__A, __B),671 (__v16qi)__W);672}673 674static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR675_mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B)676{677 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,678 (__v16qi)_mm_adds_epi8(__A, __B),679 (__v16qi)_mm_setzero_si128());680}681 682static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR683_mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)684{685 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,686 (__v32qi)_mm256_adds_epi8(__A, __B),687 (__v32qi)__W);688}689 690static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR691_mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B)692{693 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,694 (__v32qi)_mm256_adds_epi8(__A, __B),695 (__v32qi)_mm256_setzero_si256());696}697 698static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR699_mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)700{701 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,702 (__v8hi)_mm_adds_epi16(__A, __B),703 (__v8hi)__W);704}705 706static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR707_mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B)708{709 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,710 (__v8hi)_mm_adds_epi16(__A, __B),711 (__v8hi)_mm_setzero_si128());712}713 714static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR715_mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)716{717 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,718 (__v16hi)_mm256_adds_epi16(__A, __B),719 (__v16hi)__W);720}721 722static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR723_mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B)724{725 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,726 (__v16hi)_mm256_adds_epi16(__A, __B),727 (__v16hi)_mm256_setzero_si256());728}729 730static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR731_mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)732{733 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,734 (__v16qi)_mm_adds_epu8(__A, __B),735 (__v16qi)__W);736}737 738static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR739_mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B)740{741 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,742 (__v16qi)_mm_adds_epu8(__A, __B),743 (__v16qi)_mm_setzero_si128());744}745 746static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR747_mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)748{749 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,750 (__v32qi)_mm256_adds_epu8(__A, __B),751 (__v32qi)__W);752}753 754static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR755_mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B)756{757 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,758 (__v32qi)_mm256_adds_epu8(__A, __B),759 (__v32qi)_mm256_setzero_si256());760}761 762static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR763_mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)764{765 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,766 (__v8hi)_mm_adds_epu16(__A, __B),767 (__v8hi)__W);768}769 770static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR771_mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B)772{773 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,774 (__v8hi)_mm_adds_epu16(__A, __B),775 (__v8hi)_mm_setzero_si128());776}777 778static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR779_mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)780{781 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,782 (__v16hi)_mm256_adds_epu16(__A, __B),783 (__v16hi)__W);784}785 786static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR787_mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B)788{789 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,790 (__v16hi)_mm256_adds_epu16(__A, __B),791 (__v16hi)_mm256_setzero_si256());792}793 794static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR795_mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {796 return (__m128i)__builtin_ia32_selectb_128(797 (__mmask16)__U, (__v16qi)_mm_avg_epu8(__A, __B), (__v16qi)__W);798}799 800static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR801_mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B) {802 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,803 (__v16qi)_mm_avg_epu8(__A, __B),804 (__v16qi)_mm_setzero_si128());805}806 807static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR808_mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {809 return (__m256i)__builtin_ia32_selectb_256(810 (__mmask32)__U, (__v32qi)_mm256_avg_epu8(__A, __B), (__v32qi)__W);811}812 813static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR814_mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B) {815 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,816 (__v32qi)_mm256_avg_epu8(__A, __B),817 (__v32qi)_mm256_setzero_si256());818}819 820static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR821_mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {822 return (__m128i)__builtin_ia32_selectw_128(823 (__mmask8)__U, (__v8hi)_mm_avg_epu16(__A, __B), (__v8hi)__W);824}825 826static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR827_mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B) {828 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,829 (__v8hi)_mm_avg_epu16(__A, __B),830 (__v8hi)_mm_setzero_si128());831}832 833static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR834_mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {835 return (__m256i)__builtin_ia32_selectw_256(836 (__mmask16)__U, (__v16hi)_mm256_avg_epu16(__A, __B), (__v16hi)__W);837}838 839static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR840_mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B) {841 return (__m256i)__builtin_ia32_selectw_256(842 (__mmask16)__U, (__v16hi)_mm256_avg_epu16(__A, __B),843 (__v16hi)_mm256_setzero_si256());844}845 846static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR847_mm_maskz_max_epi8(__mmask16 __M, __m128i __A, __m128i __B) {848 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,849 (__v16qi)_mm_max_epi8(__A, __B),850 (__v16qi)_mm_setzero_si128());851}852 853static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR854_mm_mask_max_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {855 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,856 (__v16qi)_mm_max_epi8(__A, __B),857 (__v16qi)__W);858}859 860static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR861_mm256_maskz_max_epi8(__mmask32 __M, __m256i __A, __m256i __B) {862 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,863 (__v32qi)_mm256_max_epi8(__A, __B),864 (__v32qi)_mm256_setzero_si256());865}866 867static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR868_mm256_mask_max_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {869 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,870 (__v32qi)_mm256_max_epi8(__A, __B),871 (__v32qi)__W);872}873 874static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR875_mm_maskz_max_epi16(__mmask8 __M, __m128i __A, __m128i __B) {876 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,877 (__v8hi)_mm_max_epi16(__A, __B),878 (__v8hi)_mm_setzero_si128());879}880 881static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR882_mm_mask_max_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {883 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,884 (__v8hi)_mm_max_epi16(__A, __B),885 (__v8hi)__W);886}887 888static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR889_mm256_maskz_max_epi16(__mmask16 __M, __m256i __A, __m256i __B) {890 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,891 (__v16hi)_mm256_max_epi16(__A, __B),892 (__v16hi)_mm256_setzero_si256());893}894 895static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR896_mm256_mask_max_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {897 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,898 (__v16hi)_mm256_max_epi16(__A, __B),899 (__v16hi)__W);900}901 902static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR903_mm_maskz_max_epu8(__mmask16 __M, __m128i __A, __m128i __B) {904 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,905 (__v16qi)_mm_max_epu8(__A, __B),906 (__v16qi)_mm_setzero_si128());907}908 909static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR910_mm_mask_max_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {911 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,912 (__v16qi)_mm_max_epu8(__A, __B),913 (__v16qi)__W);914}915 916static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR917_mm256_maskz_max_epu8(__mmask32 __M, __m256i __A, __m256i __B) {918 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,919 (__v32qi)_mm256_max_epu8(__A, __B),920 (__v32qi)_mm256_setzero_si256());921}922 923static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR924_mm256_mask_max_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {925 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,926 (__v32qi)_mm256_max_epu8(__A, __B),927 (__v32qi)__W);928}929 930static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR931_mm_maskz_max_epu16(__mmask8 __M, __m128i __A, __m128i __B) {932 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,933 (__v8hi)_mm_max_epu16(__A, __B),934 (__v8hi)_mm_setzero_si128());935}936 937static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR938_mm_mask_max_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {939 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,940 (__v8hi)_mm_max_epu16(__A, __B),941 (__v8hi)__W);942}943 944static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR945_mm256_maskz_max_epu16(__mmask16 __M, __m256i __A, __m256i __B) {946 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,947 (__v16hi)_mm256_max_epu16(__A, __B),948 (__v16hi)_mm256_setzero_si256());949}950 951static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR952_mm256_mask_max_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {953 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,954 (__v16hi)_mm256_max_epu16(__A, __B),955 (__v16hi)__W);956}957 958static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR959_mm_maskz_min_epi8(__mmask16 __M, __m128i __A, __m128i __B) {960 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,961 (__v16qi)_mm_min_epi8(__A, __B),962 (__v16qi)_mm_setzero_si128());963}964 965static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR966_mm_mask_min_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {967 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,968 (__v16qi)_mm_min_epi8(__A, __B),969 (__v16qi)__W);970}971 972static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR973_mm256_maskz_min_epi8(__mmask32 __M, __m256i __A, __m256i __B) {974 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,975 (__v32qi)_mm256_min_epi8(__A, __B),976 (__v32qi)_mm256_setzero_si256());977}978 979static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR980_mm256_mask_min_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {981 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,982 (__v32qi)_mm256_min_epi8(__A, __B),983 (__v32qi)__W);984}985 986static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR987_mm_maskz_min_epi16(__mmask8 __M, __m128i __A, __m128i __B) {988 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,989 (__v8hi)_mm_min_epi16(__A, __B),990 (__v8hi)_mm_setzero_si128());991}992 993static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR994_mm_mask_min_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {995 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,996 (__v8hi)_mm_min_epi16(__A, __B),997 (__v8hi)__W);998}999 1000static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1001_mm256_maskz_min_epi16(__mmask16 __M, __m256i __A, __m256i __B) {1002 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,1003 (__v16hi)_mm256_min_epi16(__A, __B),1004 (__v16hi)_mm256_setzero_si256());1005}1006 1007static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1008_mm256_mask_min_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {1009 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,1010 (__v16hi)_mm256_min_epi16(__A, __B),1011 (__v16hi)__W);1012}1013 1014static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1015_mm_maskz_min_epu8(__mmask16 __M, __m128i __A, __m128i __B) {1016 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,1017 (__v16qi)_mm_min_epu8(__A, __B),1018 (__v16qi)_mm_setzero_si128());1019}1020 1021static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1022_mm_mask_min_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {1023 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,1024 (__v16qi)_mm_min_epu8(__A, __B),1025 (__v16qi)__W);1026}1027 1028static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1029_mm256_maskz_min_epu8(__mmask32 __M, __m256i __A, __m256i __B) {1030 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,1031 (__v32qi)_mm256_min_epu8(__A, __B),1032 (__v32qi)_mm256_setzero_si256());1033}1034 1035static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1036_mm256_mask_min_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {1037 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,1038 (__v32qi)_mm256_min_epu8(__A, __B),1039 (__v32qi)__W);1040}1041 1042static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1043_mm_maskz_min_epu16(__mmask8 __M, __m128i __A, __m128i __B) {1044 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,1045 (__v8hi)_mm_min_epu16(__A, __B),1046 (__v8hi)_mm_setzero_si128());1047}1048 1049static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1050_mm_mask_min_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {1051 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,1052 (__v8hi)_mm_min_epu16(__A, __B),1053 (__v8hi)__W);1054}1055 1056static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1057_mm256_maskz_min_epu16(__mmask16 __M, __m256i __A, __m256i __B) {1058 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,1059 (__v16hi)_mm256_min_epu16(__A, __B),1060 (__v16hi)_mm256_setzero_si256());1061}1062 1063static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1064_mm256_mask_min_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {1065 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,1066 (__v16hi)_mm256_min_epu16(__A, __B),1067 (__v16hi)__W);1068}1069 1070static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1071_mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {1072 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1073 (__v16qi)_mm_shuffle_epi8(__A, __B),1074 (__v16qi)__W);1075}1076 1077static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1078_mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B) {1079 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1080 (__v16qi)_mm_shuffle_epi8(__A, __B),1081 (__v16qi)_mm_setzero_si128());1082}1083 1084static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1085_mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {1086 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1087 (__v32qi)_mm256_shuffle_epi8(__A, __B),1088 (__v32qi)__W);1089}1090 1091static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1092_mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B) {1093 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1094 (__v32qi)_mm256_shuffle_epi8(__A, __B),1095 (__v32qi)_mm256_setzero_si256());1096}1097 1098static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1099_mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)1100{1101 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1102 (__v16qi)_mm_subs_epi8(__A, __B),1103 (__v16qi)__W);1104}1105 1106static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1107_mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B)1108{1109 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1110 (__v16qi)_mm_subs_epi8(__A, __B),1111 (__v16qi)_mm_setzero_si128());1112}1113 1114static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1115_mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)1116{1117 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1118 (__v32qi)_mm256_subs_epi8(__A, __B),1119 (__v32qi)__W);1120}1121 1122static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1123_mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B)1124{1125 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1126 (__v32qi)_mm256_subs_epi8(__A, __B),1127 (__v32qi)_mm256_setzero_si256());1128}1129 1130static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1131_mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1132{1133 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1134 (__v8hi)_mm_subs_epi16(__A, __B),1135 (__v8hi)__W);1136}1137 1138static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1139_mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B)1140{1141 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1142 (__v8hi)_mm_subs_epi16(__A, __B),1143 (__v8hi)_mm_setzero_si128());1144}1145 1146static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1147_mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)1148{1149 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1150 (__v16hi)_mm256_subs_epi16(__A, __B),1151 (__v16hi)__W);1152}1153 1154static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1155_mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B)1156{1157 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1158 (__v16hi)_mm256_subs_epi16(__A, __B),1159 (__v16hi)_mm256_setzero_si256());1160}1161 1162static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1163_mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)1164{1165 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1166 (__v16qi)_mm_subs_epu8(__A, __B),1167 (__v16qi)__W);1168}1169 1170static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1171_mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B)1172{1173 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1174 (__v16qi)_mm_subs_epu8(__A, __B),1175 (__v16qi)_mm_setzero_si128());1176}1177 1178static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1179_mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)1180{1181 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1182 (__v32qi)_mm256_subs_epu8(__A, __B),1183 (__v32qi)__W);1184}1185 1186static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1187_mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B)1188{1189 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1190 (__v32qi)_mm256_subs_epu8(__A, __B),1191 (__v32qi)_mm256_setzero_si256());1192}1193 1194static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1195_mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1196{1197 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1198 (__v8hi)_mm_subs_epu16(__A, __B),1199 (__v8hi)__W);1200}1201 1202static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1203_mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B)1204{1205 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1206 (__v8hi)_mm_subs_epu16(__A, __B),1207 (__v8hi)_mm_setzero_si128());1208}1209 1210static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1211_mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A,1212 __m256i __B) {1213 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1214 (__v16hi)_mm256_subs_epu16(__A, __B),1215 (__v16hi)__W);1216}1217 1218static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1219_mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B)1220{1221 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1222 (__v16hi)_mm256_subs_epu16(__A, __B),1223 (__v16hi)_mm256_setzero_si256());1224}1225 1226static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1227_mm_permutex2var_epi16(__m128i __A, __m128i __I, __m128i __B) {1228 return (__m128i)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I,1229 (__v8hi) __B);1230}1231 1232static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1233_mm_mask_permutex2var_epi16(__m128i __A, __mmask8 __U, __m128i __I,1234 __m128i __B) {1235 return (__m128i)__builtin_ia32_selectw_128(__U,1236 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),1237 (__v8hi)__A);1238}1239 1240static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1241_mm_mask2_permutex2var_epi16(__m128i __A, __m128i __I, __mmask8 __U,1242 __m128i __B) {1243 return (__m128i)__builtin_ia32_selectw_128(__U,1244 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),1245 (__v8hi)__I);1246}1247 1248static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1249_mm_maskz_permutex2var_epi16(__mmask8 __U, __m128i __A, __m128i __I,1250 __m128i __B) {1251 return (__m128i)__builtin_ia32_selectw_128(__U,1252 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),1253 (__v8hi)_mm_setzero_si128());1254}1255 1256static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1257_mm256_permutex2var_epi16(__m256i __A, __m256i __I, __m256i __B) {1258 return (__m256i)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I,1259 (__v16hi)__B);1260}1261 1262static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1263_mm256_mask_permutex2var_epi16(__m256i __A, __mmask16 __U, __m256i __I,1264 __m256i __B) {1265 return (__m256i)__builtin_ia32_selectw_256(__U,1266 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),1267 (__v16hi)__A);1268}1269 1270static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1271_mm256_mask2_permutex2var_epi16(__m256i __A, __m256i __I, __mmask16 __U,1272 __m256i __B) {1273 return (__m256i)__builtin_ia32_selectw_256(__U,1274 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),1275 (__v16hi)__I);1276}1277 1278static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1279_mm256_maskz_permutex2var_epi16(__mmask16 __U, __m256i __A, __m256i __I,1280 __m256i __B) {1281 return (__m256i)__builtin_ia32_selectw_256(__U,1282 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),1283 (__v16hi)_mm256_setzero_si256());1284}1285 1286static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1287_mm_mask_maddubs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {1288 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1289 (__v8hi)_mm_maddubs_epi16(__X, __Y),1290 (__v8hi)__W);1291}1292 1293static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1294_mm_maskz_maddubs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {1295 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1296 (__v8hi)_mm_maddubs_epi16(__X, __Y),1297 (__v8hi)_mm_setzero_si128());1298}1299 1300static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1301_mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X,1302 __m256i __Y) {1303 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1304 (__v16hi)_mm256_maddubs_epi16(__X, __Y),1305 (__v16hi)__W);1306}1307 1308static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1309_mm256_maskz_maddubs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {1310 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1311 (__v16hi)_mm256_maddubs_epi16(__X, __Y),1312 (__v16hi)_mm256_setzero_si256());1313}1314 1315static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1316_mm_mask_madd_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1317 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,1318 (__v4si)_mm_madd_epi16(__A, __B),1319 (__v4si)__W);1320}1321 1322static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1323_mm_maskz_madd_epi16(__mmask8 __U, __m128i __A, __m128i __B) {1324 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,1325 (__v4si)_mm_madd_epi16(__A, __B),1326 (__v4si)_mm_setzero_si128());1327}1328 1329static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1330_mm256_mask_madd_epi16(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {1331 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,1332 (__v8si)_mm256_madd_epi16(__A, __B),1333 (__v8si)__W);1334}1335 1336static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1337_mm256_maskz_madd_epi16(__mmask8 __U, __m256i __A, __m256i __B) {1338 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,1339 (__v8si)_mm256_madd_epi16(__A, __B),1340 (__v8si)_mm256_setzero_si256());1341}1342 1343static __inline__ __m128i __DEFAULT_FN_ATTRS1281344_mm_cvtsepi16_epi8 (__m128i __A) {1345 return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A,1346 (__v16qi) _mm_setzero_si128(),1347 (__mmask8) -1);1348}1349 1350static __inline__ __m128i __DEFAULT_FN_ATTRS1281351_mm_mask_cvtsepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) {1352 return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A,1353 (__v16qi) __O,1354 __M);1355}1356 1357static __inline__ __m128i __DEFAULT_FN_ATTRS1281358_mm_maskz_cvtsepi16_epi8 (__mmask8 __M, __m128i __A) {1359 return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A,1360 (__v16qi) _mm_setzero_si128(),1361 __M);1362}1363 1364static __inline__ __m128i __DEFAULT_FN_ATTRS2561365_mm256_cvtsepi16_epi8 (__m256i __A) {1366 return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A,1367 (__v16qi) _mm_setzero_si128(),1368 (__mmask16) -1);1369}1370 1371static __inline__ __m128i __DEFAULT_FN_ATTRS2561372_mm256_mask_cvtsepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) {1373 return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A,1374 (__v16qi) __O,1375 __M);1376}1377 1378static __inline__ __m128i __DEFAULT_FN_ATTRS2561379_mm256_maskz_cvtsepi16_epi8 (__mmask16 __M, __m256i __A) {1380 return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A,1381 (__v16qi) _mm_setzero_si128(),1382 __M);1383}1384 1385static __inline__ __m128i __DEFAULT_FN_ATTRS1281386_mm_cvtusepi16_epi8 (__m128i __A) {1387 return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A,1388 (__v16qi) _mm_setzero_si128(),1389 (__mmask8) -1);1390}1391 1392static __inline__ __m128i __DEFAULT_FN_ATTRS1281393_mm_mask_cvtusepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) {1394 return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A,1395 (__v16qi) __O,1396 __M);1397}1398 1399static __inline__ __m128i __DEFAULT_FN_ATTRS1281400_mm_maskz_cvtusepi16_epi8 (__mmask8 __M, __m128i __A) {1401 return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A,1402 (__v16qi) _mm_setzero_si128(),1403 __M);1404}1405 1406static __inline__ __m128i __DEFAULT_FN_ATTRS2561407_mm256_cvtusepi16_epi8 (__m256i __A) {1408 return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A,1409 (__v16qi) _mm_setzero_si128(),1410 (__mmask16) -1);1411}1412 1413static __inline__ __m128i __DEFAULT_FN_ATTRS2561414_mm256_mask_cvtusepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) {1415 return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A,1416 (__v16qi) __O,1417 __M);1418}1419 1420static __inline__ __m128i __DEFAULT_FN_ATTRS2561421_mm256_maskz_cvtusepi16_epi8 (__mmask16 __M, __m256i __A) {1422 return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A,1423 (__v16qi) _mm_setzero_si128(),1424 __M);1425}1426 1427static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1428_mm_cvtepi16_epi8(__m128i __A) {1429 return (__m128i)__builtin_shufflevector(1430 __builtin_convertvector((__v8hi)__A, __v8qi),1431 (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,1432 12, 13, 14, 15);1433}1434 1435static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1436_mm_mask_cvtepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) {1437 return (__m128i) __builtin_ia32_pmovwb128_mask ((__v8hi) __A,1438 (__v16qi) __O,1439 __M);1440}1441 1442static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1443_mm_maskz_cvtepi16_epi8 (__mmask8 __M, __m128i __A) {1444 return (__m128i) __builtin_ia32_pmovwb128_mask ((__v8hi) __A,1445 (__v16qi) _mm_setzero_si128(),1446 __M);1447}1448 1449static __inline__ void __DEFAULT_FN_ATTRS1281450_mm_mask_cvtepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)1451{1452 __builtin_ia32_pmovwb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M);1453}1454 1455 1456static __inline__ void __DEFAULT_FN_ATTRS1281457_mm_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)1458{1459 __builtin_ia32_pmovswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M);1460}1461 1462static __inline__ void __DEFAULT_FN_ATTRS1281463_mm_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)1464{1465 __builtin_ia32_pmovuswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M);1466}1467 1468static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR1469_mm256_cvtepi16_epi8(__m256i __A) {1470 return (__m128i)__builtin_convertvector((__v16hi) __A, __v16qi);1471}1472 1473static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR1474_mm256_mask_cvtepi16_epi8(__m128i __O, __mmask16 __M, __m256i __A) {1475 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,1476 (__v16qi)_mm256_cvtepi16_epi8(__A),1477 (__v16qi)__O);1478}1479 1480static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR1481_mm256_maskz_cvtepi16_epi8(__mmask16 __M, __m256i __A) {1482 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,1483 (__v16qi)_mm256_cvtepi16_epi8(__A),1484 (__v16qi)_mm_setzero_si128());1485}1486 1487static __inline__ void __DEFAULT_FN_ATTRS2561488_mm256_mask_cvtepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)1489{1490 __builtin_ia32_pmovwb256mem_mask ((__v16qi *) __P, (__v16hi) __A, __M);1491}1492 1493static __inline__ void __DEFAULT_FN_ATTRS2561494_mm256_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)1495{1496 __builtin_ia32_pmovswb256mem_mask ((__v16qi *) __P, (__v16hi) __A, __M);1497}1498 1499static __inline__ void __DEFAULT_FN_ATTRS2561500_mm256_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)1501{1502 __builtin_ia32_pmovuswb256mem_mask ((__v16qi*) __P, (__v16hi) __A, __M);1503}1504 1505static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1506_mm_mask_mulhrs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {1507 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1508 (__v8hi)_mm_mulhrs_epi16(__X, __Y),1509 (__v8hi)__W);1510}1511 1512static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1513_mm_maskz_mulhrs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {1514 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1515 (__v8hi)_mm_mulhrs_epi16(__X, __Y),1516 (__v8hi)_mm_setzero_si128());1517}1518 1519static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1520_mm256_mask_mulhrs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) {1521 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1522 (__v16hi)_mm256_mulhrs_epi16(__X, __Y),1523 (__v16hi)__W);1524}1525 1526static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1527_mm256_maskz_mulhrs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {1528 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1529 (__v16hi)_mm256_mulhrs_epi16(__X, __Y),1530 (__v16hi)_mm256_setzero_si256());1531}1532 1533static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1534_mm_mask_mulhi_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1535 return (__m128i)__builtin_ia32_selectw_128(1536 (__mmask8)__U, (__v8hi)_mm_mulhi_epu16(__A, __B), (__v8hi)__W);1537}1538 1539static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1540_mm_maskz_mulhi_epu16(__mmask8 __U, __m128i __A, __m128i __B) {1541 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1542 (__v8hi)_mm_mulhi_epu16(__A, __B),1543 (__v8hi)_mm_setzero_si128());1544}1545 1546static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1547_mm256_mask_mulhi_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {1548 return (__m256i)__builtin_ia32_selectw_256(1549 (__mmask16)__U, (__v16hi)_mm256_mulhi_epu16(__A, __B), (__v16hi)__W);1550}1551 1552static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1553_mm256_maskz_mulhi_epu16(__mmask16 __U, __m256i __A, __m256i __B) {1554 return (__m256i)__builtin_ia32_selectw_256(1555 (__mmask16)__U, (__v16hi)_mm256_mulhi_epu16(__A, __B),1556 (__v16hi)_mm256_setzero_si256());1557}1558 1559static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1560_mm_mask_mulhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1561 return (__m128i)__builtin_ia32_selectw_128(1562 (__mmask8)__U, (__v8hi)_mm_mulhi_epi16(__A, __B), (__v8hi)__W);1563}1564 1565static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1566_mm_maskz_mulhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {1567 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1568 (__v8hi)_mm_mulhi_epi16(__A, __B),1569 (__v8hi)_mm_setzero_si128());1570}1571 1572static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1573_mm256_mask_mulhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {1574 return (__m256i)__builtin_ia32_selectw_256(1575 (__mmask16)__U, (__v16hi)_mm256_mulhi_epi16(__A, __B), (__v16hi)__W);1576}1577 1578static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1579_mm256_maskz_mulhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) {1580 return (__m256i)__builtin_ia32_selectw_256(1581 (__mmask16)__U, (__v16hi)_mm256_mulhi_epi16(__A, __B),1582 (__v16hi)_mm256_setzero_si256());1583}1584 1585static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1586_mm_mask_unpackhi_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {1587 return (__m128i)__builtin_ia32_selectb_128(1588 (__mmask16)__U, (__v16qi)_mm_unpackhi_epi8(__A, __B), (__v16qi)__W);1589}1590 1591static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1592_mm_maskz_unpackhi_epi8(__mmask16 __U, __m128i __A, __m128i __B) {1593 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1594 (__v16qi)_mm_unpackhi_epi8(__A, __B),1595 (__v16qi)_mm_setzero_si128());1596}1597 1598static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1599_mm256_mask_unpackhi_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {1600 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1601 (__v32qi)_mm256_unpackhi_epi8(__A, __B),1602 (__v32qi)__W);1603}1604 1605static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1606_mm256_maskz_unpackhi_epi8(__mmask32 __U, __m256i __A, __m256i __B) {1607 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1608 (__v32qi)_mm256_unpackhi_epi8(__A, __B),1609 (__v32qi)_mm256_setzero_si256());1610}1611 1612static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1613_mm_mask_unpackhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1614 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1615 (__v8hi)_mm_unpackhi_epi16(__A, __B),1616 (__v8hi)__W);1617}1618 1619static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1620_mm_maskz_unpackhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {1621 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1622 (__v8hi)_mm_unpackhi_epi16(__A, __B),1623 (__v8hi) _mm_setzero_si128());1624}1625 1626static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1627_mm256_mask_unpackhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {1628 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1629 (__v16hi)_mm256_unpackhi_epi16(__A, __B),1630 (__v16hi)__W);1631}1632 1633static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1634_mm256_maskz_unpackhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) {1635 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1636 (__v16hi)_mm256_unpackhi_epi16(__A, __B),1637 (__v16hi)_mm256_setzero_si256());1638}1639 1640static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1641_mm_mask_unpacklo_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {1642 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1643 (__v16qi)_mm_unpacklo_epi8(__A, __B),1644 (__v16qi)__W);1645}1646 1647static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1648_mm_maskz_unpacklo_epi8(__mmask16 __U, __m128i __A, __m128i __B) {1649 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1650 (__v16qi)_mm_unpacklo_epi8(__A, __B),1651 (__v16qi)_mm_setzero_si128());1652}1653 1654static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1655_mm256_mask_unpacklo_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {1656 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1657 (__v32qi)_mm256_unpacklo_epi8(__A, __B),1658 (__v32qi)__W);1659}1660 1661static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1662_mm256_maskz_unpacklo_epi8(__mmask32 __U, __m256i __A, __m256i __B) {1663 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1664 (__v32qi)_mm256_unpacklo_epi8(__A, __B),1665 (__v32qi)_mm256_setzero_si256());1666}1667 1668static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1669_mm_mask_unpacklo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1670 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1671 (__v8hi)_mm_unpacklo_epi16(__A, __B),1672 (__v8hi)__W);1673}1674 1675static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1676_mm_maskz_unpacklo_epi16(__mmask8 __U, __m128i __A, __m128i __B) {1677 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1678 (__v8hi)_mm_unpacklo_epi16(__A, __B),1679 (__v8hi) _mm_setzero_si128());1680}1681 1682static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1683_mm256_mask_unpacklo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {1684 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1685 (__v16hi)_mm256_unpacklo_epi16(__A, __B),1686 (__v16hi)__W);1687}1688 1689static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1690_mm256_maskz_unpacklo_epi16(__mmask16 __U, __m256i __A, __m256i __B) {1691 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1692 (__v16hi)_mm256_unpacklo_epi16(__A, __B),1693 (__v16hi)_mm256_setzero_si256());1694}1695 1696static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1697_mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A)1698{1699 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1700 (__v8hi)_mm_cvtepi8_epi16(__A),1701 (__v8hi)__W);1702}1703 1704static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1705_mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A)1706{1707 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1708 (__v8hi)_mm_cvtepi8_epi16(__A),1709 (__v8hi)_mm_setzero_si128());1710}1711 1712static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1713_mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A)1714{1715 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1716 (__v16hi)_mm256_cvtepi8_epi16(__A),1717 (__v16hi)__W);1718}1719 1720static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1721_mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A)1722{1723 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1724 (__v16hi)_mm256_cvtepi8_epi16(__A),1725 (__v16hi)_mm256_setzero_si256());1726}1727 1728 1729static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1730_mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A)1731{1732 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1733 (__v8hi)_mm_cvtepu8_epi16(__A),1734 (__v8hi)__W);1735}1736 1737static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1738_mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A)1739{1740 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1741 (__v8hi)_mm_cvtepu8_epi16(__A),1742 (__v8hi)_mm_setzero_si128());1743}1744 1745static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1746_mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A)1747{1748 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1749 (__v16hi)_mm256_cvtepu8_epi16(__A),1750 (__v16hi)__W);1751}1752 1753static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1754_mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A)1755{1756 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1757 (__v16hi)_mm256_cvtepu8_epi16(__A),1758 (__v16hi)_mm256_setzero_si256());1759}1760 1761 1762#define _mm_mask_shufflehi_epi16(W, U, A, imm) \1763 ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \1764 (__v8hi)_mm_shufflehi_epi16((A), (imm)), \1765 (__v8hi)(__m128i)(W)))1766 1767#define _mm_maskz_shufflehi_epi16(U, A, imm) \1768 ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \1769 (__v8hi)_mm_shufflehi_epi16((A), (imm)), \1770 (__v8hi)_mm_setzero_si128()))1771 1772#define _mm256_mask_shufflehi_epi16(W, U, A, imm) \1773 ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \1774 (__v16hi)_mm256_shufflehi_epi16((A), (imm)), \1775 (__v16hi)(__m256i)(W)))1776 1777#define _mm256_maskz_shufflehi_epi16(U, A, imm) \1778 ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \1779 (__v16hi)_mm256_shufflehi_epi16((A), (imm)), \1780 (__v16hi)_mm256_setzero_si256()))1781 1782#define _mm_mask_shufflelo_epi16(W, U, A, imm) \1783 ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \1784 (__v8hi)_mm_shufflelo_epi16((A), (imm)), \1785 (__v8hi)(__m128i)(W)))1786 1787#define _mm_maskz_shufflelo_epi16(U, A, imm) \1788 ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \1789 (__v8hi)_mm_shufflelo_epi16((A), (imm)), \1790 (__v8hi)_mm_setzero_si128()))1791 1792#define _mm256_mask_shufflelo_epi16(W, U, A, imm) \1793 ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \1794 (__v16hi)_mm256_shufflelo_epi16((A), \1795 (imm)), \1796 (__v16hi)(__m256i)(W)))1797 1798#define _mm256_maskz_shufflelo_epi16(U, A, imm) \1799 ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \1800 (__v16hi)_mm256_shufflelo_epi16((A), \1801 (imm)), \1802 (__v16hi)_mm256_setzero_si256()))1803 1804static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1805_mm256_sllv_epi16(__m256i __A, __m256i __B)1806{1807 return (__m256i)__builtin_ia32_psllv16hi((__v16hi)__A, (__v16hi)__B);1808}1809 1810static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1811_mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)1812{1813 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1814 (__v16hi)_mm256_sllv_epi16(__A, __B),1815 (__v16hi)__W);1816}1817 1818static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1819_mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B)1820{1821 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1822 (__v16hi)_mm256_sllv_epi16(__A, __B),1823 (__v16hi)_mm256_setzero_si256());1824}1825 1826static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1827_mm_sllv_epi16(__m128i __A, __m128i __B)1828{1829 return (__m128i)__builtin_ia32_psllv8hi((__v8hi)__A, (__v8hi)__B);1830}1831 1832static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1833_mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1834{1835 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1836 (__v8hi)_mm_sllv_epi16(__A, __B),1837 (__v8hi)__W);1838}1839 1840static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1841_mm_maskz_sllv_epi16(__mmask8 __U, __m128i __A, __m128i __B)1842{1843 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1844 (__v8hi)_mm_sllv_epi16(__A, __B),1845 (__v8hi)_mm_setzero_si128());1846}1847 1848static __inline__ __m128i __DEFAULT_FN_ATTRS1281849_mm_mask_sll_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1850{1851 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1852 (__v8hi)_mm_sll_epi16(__A, __B),1853 (__v8hi)__W);1854}1855 1856static __inline__ __m128i __DEFAULT_FN_ATTRS1281857_mm_maskz_sll_epi16 (__mmask8 __U, __m128i __A, __m128i __B)1858{1859 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1860 (__v8hi)_mm_sll_epi16(__A, __B),1861 (__v8hi)_mm_setzero_si128());1862}1863 1864static __inline__ __m256i __DEFAULT_FN_ATTRS2561865_mm256_mask_sll_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B)1866{1867 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1868 (__v16hi)_mm256_sll_epi16(__A, __B),1869 (__v16hi)__W);1870}1871 1872static __inline__ __m256i __DEFAULT_FN_ATTRS2561873_mm256_maskz_sll_epi16(__mmask16 __U, __m256i __A, __m128i __B)1874{1875 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1876 (__v16hi)_mm256_sll_epi16(__A, __B),1877 (__v16hi)_mm256_setzero_si256());1878}1879 1880static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1881_mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)1882{1883 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1884 (__v8hi)_mm_slli_epi16(__A, (int)__B),1885 (__v8hi)__W);1886}1887 1888static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1889_mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B)1890{1891 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1892 (__v8hi)_mm_slli_epi16(__A, (int)__B),1893 (__v8hi)_mm_setzero_si128());1894}1895 1896static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1897_mm256_mask_slli_epi16(__m256i __W, __mmask16 __U, __m256i __A,1898 unsigned int __B) {1899 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1900 (__v16hi)_mm256_slli_epi16(__A, (int)__B),1901 (__v16hi)__W);1902}1903 1904static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1905_mm256_maskz_slli_epi16(__mmask16 __U, __m256i __A, unsigned int __B) {1906 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1907 (__v16hi)_mm256_slli_epi16(__A, (int)__B),1908 (__v16hi)_mm256_setzero_si256());1909}1910 1911static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1912_mm256_srlv_epi16(__m256i __A, __m256i __B)1913{1914 return (__m256i)__builtin_ia32_psrlv16hi((__v16hi)__A, (__v16hi)__B);1915}1916 1917static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1918_mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)1919{1920 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1921 (__v16hi)_mm256_srlv_epi16(__A, __B),1922 (__v16hi)__W);1923}1924 1925static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1926_mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B)1927{1928 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1929 (__v16hi)_mm256_srlv_epi16(__A, __B),1930 (__v16hi)_mm256_setzero_si256());1931}1932 1933static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1934_mm_srlv_epi16(__m128i __A, __m128i __B)1935{1936 return (__m128i)__builtin_ia32_psrlv8hi((__v8hi)__A, (__v8hi)__B);1937}1938 1939static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1940_mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1941{1942 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1943 (__v8hi)_mm_srlv_epi16(__A, __B),1944 (__v8hi)__W);1945}1946 1947static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1948_mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B)1949{1950 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1951 (__v8hi)_mm_srlv_epi16(__A, __B),1952 (__v8hi)_mm_setzero_si128());1953}1954 1955static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1956_mm256_srav_epi16(__m256i __A, __m256i __B)1957{1958 return (__m256i)__builtin_ia32_psrav16hi((__v16hi)__A, (__v16hi)__B);1959}1960 1961static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1962_mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)1963{1964 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1965 (__v16hi)_mm256_srav_epi16(__A, __B),1966 (__v16hi)__W);1967}1968 1969static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR1970_mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B)1971{1972 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1973 (__v16hi)_mm256_srav_epi16(__A, __B),1974 (__v16hi)_mm256_setzero_si256());1975}1976 1977static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1978_mm_srav_epi16(__m128i __A, __m128i __B)1979{1980 return (__m128i)__builtin_ia32_psrav8hi((__v8hi)__A, (__v8hi)__B);1981}1982 1983static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1984_mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1985{1986 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1987 (__v8hi)_mm_srav_epi16(__A, __B),1988 (__v8hi)__W);1989}1990 1991static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR1992_mm_maskz_srav_epi16(__mmask8 __U, __m128i __A, __m128i __B)1993{1994 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1995 (__v8hi)_mm_srav_epi16(__A, __B),1996 (__v8hi)_mm_setzero_si128());1997}1998 1999static __inline__ __m128i __DEFAULT_FN_ATTRS1282000_mm_mask_sra_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)2001{2002 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2003 (__v8hi)_mm_sra_epi16(__A, __B),2004 (__v8hi)__W);2005}2006 2007static __inline__ __m128i __DEFAULT_FN_ATTRS1282008_mm_maskz_sra_epi16(__mmask8 __U, __m128i __A, __m128i __B)2009{2010 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2011 (__v8hi)_mm_sra_epi16(__A, __B),2012 (__v8hi)_mm_setzero_si128());2013}2014 2015static __inline__ __m256i __DEFAULT_FN_ATTRS2562016_mm256_mask_sra_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B)2017{2018 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2019 (__v16hi)_mm256_sra_epi16(__A, __B),2020 (__v16hi)__W);2021}2022 2023static __inline__ __m256i __DEFAULT_FN_ATTRS2562024_mm256_maskz_sra_epi16(__mmask16 __U, __m256i __A, __m128i __B)2025{2026 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2027 (__v16hi)_mm256_sra_epi16(__A, __B),2028 (__v16hi)_mm256_setzero_si256());2029}2030 2031static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2032_mm_mask_srai_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) {2033 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2034 (__v8hi)_mm_srai_epi16(__A, (int)__B),2035 (__v8hi)__W);2036}2037 2038static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2039_mm_maskz_srai_epi16(__mmask8 __U, __m128i __A, unsigned int __B) {2040 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2041 (__v8hi)_mm_srai_epi16(__A, (int)__B),2042 (__v8hi)_mm_setzero_si128());2043}2044 2045static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2046_mm256_mask_srai_epi16(__m256i __W, __mmask16 __U, __m256i __A,2047 unsigned int __B) {2048 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2049 (__v16hi)_mm256_srai_epi16(__A, (int)__B),2050 (__v16hi)__W);2051}2052 2053static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2054_mm256_maskz_srai_epi16(__mmask16 __U, __m256i __A, unsigned int __B) {2055 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2056 (__v16hi)_mm256_srai_epi16(__A, (int)__B),2057 (__v16hi)_mm256_setzero_si256());2058}2059 2060static __inline__ __m128i __DEFAULT_FN_ATTRS1282061_mm_mask_srl_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)2062{2063 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2064 (__v8hi)_mm_srl_epi16(__A, __B),2065 (__v8hi)__W);2066}2067 2068static __inline__ __m128i __DEFAULT_FN_ATTRS1282069_mm_maskz_srl_epi16 (__mmask8 __U, __m128i __A, __m128i __B)2070{2071 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2072 (__v8hi)_mm_srl_epi16(__A, __B),2073 (__v8hi)_mm_setzero_si128());2074}2075 2076static __inline__ __m256i __DEFAULT_FN_ATTRS2562077_mm256_mask_srl_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B)2078{2079 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2080 (__v16hi)_mm256_srl_epi16(__A, __B),2081 (__v16hi)__W);2082}2083 2084static __inline__ __m256i __DEFAULT_FN_ATTRS2562085_mm256_maskz_srl_epi16(__mmask16 __U, __m256i __A, __m128i __B)2086{2087 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2088 (__v16hi)_mm256_srl_epi16(__A, __B),2089 (__v16hi)_mm256_setzero_si256());2090}2091 2092static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2093_mm_mask_srli_epi16(__m128i __W, __mmask8 __U, __m128i __A, int __B) {2094 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2095 (__v8hi)_mm_srli_epi16(__A, __B),2096 (__v8hi)__W);2097}2098 2099static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2100_mm_maskz_srli_epi16(__mmask8 __U, __m128i __A, int __B) {2101 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2102 (__v8hi)_mm_srli_epi16(__A, __B),2103 (__v8hi)_mm_setzero_si128());2104}2105 2106static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2107_mm256_mask_srli_epi16(__m256i __W, __mmask16 __U, __m256i __A, int __B) {2108 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2109 (__v16hi)_mm256_srli_epi16(__A, __B),2110 (__v16hi)__W);2111}2112 2113static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2114_mm256_maskz_srli_epi16(__mmask16 __U, __m256i __A, int __B) {2115 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2116 (__v16hi)_mm256_srli_epi16(__A, __B),2117 (__v16hi)_mm256_setzero_si256());2118}2119 2120static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2121_mm_mask_mov_epi16(__m128i __W, __mmask8 __U, __m128i __A) {2122 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,2123 (__v8hi) __A,2124 (__v8hi) __W);2125}2126 2127static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2128_mm_maskz_mov_epi16(__mmask8 __U, __m128i __A) {2129 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,2130 (__v8hi) __A,2131 (__v8hi) _mm_setzero_si128 ());2132}2133 2134static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2135_mm256_mask_mov_epi16(__m256i __W, __mmask16 __U, __m256i __A) {2136 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,2137 (__v16hi) __A,2138 (__v16hi) __W);2139}2140 2141static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2142_mm256_maskz_mov_epi16(__mmask16 __U, __m256i __A) {2143 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,2144 (__v16hi) __A,2145 (__v16hi) _mm256_setzero_si256 ());2146}2147 2148static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2149_mm_mask_mov_epi8(__m128i __W, __mmask16 __U, __m128i __A) {2150 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,2151 (__v16qi) __A,2152 (__v16qi) __W);2153}2154 2155static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2156_mm_maskz_mov_epi8(__mmask16 __U, __m128i __A) {2157 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,2158 (__v16qi) __A,2159 (__v16qi) _mm_setzero_si128 ());2160}2161 2162static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2163_mm256_mask_mov_epi8(__m256i __W, __mmask32 __U, __m256i __A) {2164 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,2165 (__v32qi) __A,2166 (__v32qi) __W);2167}2168 2169static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2170_mm256_maskz_mov_epi8(__mmask32 __U, __m256i __A) {2171 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,2172 (__v32qi) __A,2173 (__v32qi) _mm256_setzero_si256 ());2174}2175 2176static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2177_mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A)2178{2179 return (__m128i) __builtin_ia32_selectb_128(__M,2180 (__v16qi) _mm_set1_epi8(__A),2181 (__v16qi) __O);2182}2183 2184static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2185_mm_maskz_set1_epi8 (__mmask16 __M, char __A)2186{2187 return (__m128i) __builtin_ia32_selectb_128(__M,2188 (__v16qi) _mm_set1_epi8(__A),2189 (__v16qi) _mm_setzero_si128());2190}2191 2192static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2193_mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A)2194{2195 return (__m256i) __builtin_ia32_selectb_256(__M,2196 (__v32qi) _mm256_set1_epi8(__A),2197 (__v32qi) __O);2198}2199 2200static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2201_mm256_maskz_set1_epi8 (__mmask32 __M, char __A)2202{2203 return (__m256i) __builtin_ia32_selectb_256(__M,2204 (__v32qi) _mm256_set1_epi8(__A),2205 (__v32qi) _mm256_setzero_si256());2206}2207 2208static __inline __m128i __DEFAULT_FN_ATTRS1282209_mm_loadu_epi16 (void const *__P)2210{2211 struct __loadu_epi16 {2212 __m128i_u __v;2213 } __attribute__((__packed__, __may_alias__));2214 return ((const struct __loadu_epi16*)__P)->__v;2215}2216 2217static __inline__ __m128i __DEFAULT_FN_ATTRS1282218_mm_mask_loadu_epi16 (__m128i __W, __mmask8 __U, void const *__P)2219{2220 return (__m128i) __builtin_ia32_loaddquhi128_mask ((const __v8hi *) __P,2221 (__v8hi) __W,2222 (__mmask8) __U);2223}2224 2225static __inline__ __m128i __DEFAULT_FN_ATTRS1282226_mm_maskz_loadu_epi16 (__mmask8 __U, void const *__P)2227{2228 return (__m128i) __builtin_ia32_loaddquhi128_mask ((const __v8hi *) __P,2229 (__v8hi)2230 _mm_setzero_si128 (),2231 (__mmask8) __U);2232}2233 2234static __inline __m256i __DEFAULT_FN_ATTRS2562235_mm256_loadu_epi16 (void const *__P)2236{2237 struct __loadu_epi16 {2238 __m256i_u __v;2239 } __attribute__((__packed__, __may_alias__));2240 return ((const struct __loadu_epi16*)__P)->__v;2241}2242 2243static __inline__ __m256i __DEFAULT_FN_ATTRS2562244_mm256_mask_loadu_epi16 (__m256i __W, __mmask16 __U, void const *__P)2245{2246 return (__m256i) __builtin_ia32_loaddquhi256_mask ((const __v16hi *) __P,2247 (__v16hi) __W,2248 (__mmask16) __U);2249}2250 2251static __inline__ __m256i __DEFAULT_FN_ATTRS2562252_mm256_maskz_loadu_epi16 (__mmask16 __U, void const *__P)2253{2254 return (__m256i) __builtin_ia32_loaddquhi256_mask ((const __v16hi *) __P,2255 (__v16hi)2256 _mm256_setzero_si256 (),2257 (__mmask16) __U);2258}2259 2260static __inline __m128i __DEFAULT_FN_ATTRS1282261_mm_loadu_epi8 (void const *__P)2262{2263 struct __loadu_epi8 {2264 __m128i_u __v;2265 } __attribute__((__packed__, __may_alias__));2266 return ((const struct __loadu_epi8*)__P)->__v;2267}2268 2269static __inline__ __m128i __DEFAULT_FN_ATTRS1282270_mm_mask_loadu_epi8 (__m128i __W, __mmask16 __U, void const *__P)2271{2272 return (__m128i) __builtin_ia32_loaddquqi128_mask ((const __v16qi *) __P,2273 (__v16qi) __W,2274 (__mmask16) __U);2275}2276 2277static __inline__ __m128i __DEFAULT_FN_ATTRS1282278_mm_maskz_loadu_epi8 (__mmask16 __U, void const *__P)2279{2280 return (__m128i) __builtin_ia32_loaddquqi128_mask ((const __v16qi *) __P,2281 (__v16qi)2282 _mm_setzero_si128 (),2283 (__mmask16) __U);2284}2285 2286static __inline __m256i __DEFAULT_FN_ATTRS2562287_mm256_loadu_epi8 (void const *__P)2288{2289 struct __loadu_epi8 {2290 __m256i_u __v;2291 } __attribute__((__packed__, __may_alias__));2292 return ((const struct __loadu_epi8*)__P)->__v;2293}2294 2295static __inline__ __m256i __DEFAULT_FN_ATTRS2562296_mm256_mask_loadu_epi8 (__m256i __W, __mmask32 __U, void const *__P)2297{2298 return (__m256i) __builtin_ia32_loaddquqi256_mask ((const __v32qi *) __P,2299 (__v32qi) __W,2300 (__mmask32) __U);2301}2302 2303static __inline__ __m256i __DEFAULT_FN_ATTRS2562304_mm256_maskz_loadu_epi8 (__mmask32 __U, void const *__P)2305{2306 return (__m256i) __builtin_ia32_loaddquqi256_mask ((const __v32qi *) __P,2307 (__v32qi)2308 _mm256_setzero_si256 (),2309 (__mmask32) __U);2310}2311 2312static __inline void __DEFAULT_FN_ATTRS1282313_mm_storeu_epi16 (void *__P, __m128i __A)2314{2315 struct __storeu_epi16 {2316 __m128i_u __v;2317 } __attribute__((__packed__, __may_alias__));2318 ((struct __storeu_epi16*)__P)->__v = __A;2319}2320 2321static __inline__ void __DEFAULT_FN_ATTRS1282322_mm_mask_storeu_epi16 (void *__P, __mmask8 __U, __m128i __A)2323{2324 __builtin_ia32_storedquhi128_mask ((__v8hi *) __P,2325 (__v8hi) __A,2326 (__mmask8) __U);2327}2328 2329static __inline void __DEFAULT_FN_ATTRS2562330_mm256_storeu_epi16 (void *__P, __m256i __A)2331{2332 struct __storeu_epi16 {2333 __m256i_u __v;2334 } __attribute__((__packed__, __may_alias__));2335 ((struct __storeu_epi16*)__P)->__v = __A;2336}2337 2338static __inline__ void __DEFAULT_FN_ATTRS2562339_mm256_mask_storeu_epi16 (void *__P, __mmask16 __U, __m256i __A)2340{2341 __builtin_ia32_storedquhi256_mask ((__v16hi *) __P,2342 (__v16hi) __A,2343 (__mmask16) __U);2344}2345 2346static __inline void __DEFAULT_FN_ATTRS1282347_mm_storeu_epi8 (void *__P, __m128i __A)2348{2349 struct __storeu_epi8 {2350 __m128i_u __v;2351 } __attribute__((__packed__, __may_alias__));2352 ((struct __storeu_epi8*)__P)->__v = __A;2353}2354 2355static __inline__ void __DEFAULT_FN_ATTRS1282356_mm_mask_storeu_epi8 (void *__P, __mmask16 __U, __m128i __A)2357{2358 __builtin_ia32_storedquqi128_mask ((__v16qi *) __P,2359 (__v16qi) __A,2360 (__mmask16) __U);2361}2362 2363static __inline void __DEFAULT_FN_ATTRS2562364_mm256_storeu_epi8 (void *__P, __m256i __A)2365{2366 struct __storeu_epi8 {2367 __m256i_u __v;2368 } __attribute__((__packed__, __may_alias__));2369 ((struct __storeu_epi8*)__P)->__v = __A;2370}2371 2372static __inline__ void __DEFAULT_FN_ATTRS2562373_mm256_mask_storeu_epi8 (void *__P, __mmask32 __U, __m256i __A)2374{2375 __builtin_ia32_storedquqi256_mask ((__v32qi *) __P,2376 (__v32qi) __A,2377 (__mmask32) __U);2378}2379 2380static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR2381_mm_test_epi8_mask(__m128i __A, __m128i __B) {2382 return _mm_cmpneq_epi8_mask (_mm_and_si128(__A, __B), _mm_setzero_si128());2383}2384 2385static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR2386_mm_mask_test_epi8_mask(__mmask16 __U, __m128i __A, __m128i __B) {2387 return _mm_mask_cmpneq_epi8_mask (__U, _mm_and_si128 (__A, __B),2388 _mm_setzero_si128());2389}2390 2391static __inline__ __mmask32 __DEFAULT_FN_ATTRS256_CONSTEXPR2392_mm256_test_epi8_mask(__m256i __A, __m256i __B) {2393 return _mm256_cmpneq_epi8_mask (_mm256_and_si256(__A, __B),2394 _mm256_setzero_si256());2395}2396 2397static __inline__ __mmask32 __DEFAULT_FN_ATTRS2562398_mm256_mask_test_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B)2399{2400 return _mm256_mask_cmpneq_epi8_mask (__U, _mm256_and_si256(__A, __B),2401 _mm256_setzero_si256());2402}2403 2404static __inline__ __mmask8 __DEFAULT_FN_ATTRS1282405_mm_test_epi16_mask (__m128i __A, __m128i __B)2406{2407 return _mm_cmpneq_epi16_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128());2408}2409 2410static __inline__ __mmask8 __DEFAULT_FN_ATTRS1282411_mm_mask_test_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B)2412{2413 return _mm_mask_cmpneq_epi16_mask (__U, _mm_and_si128 (__A, __B),2414 _mm_setzero_si128());2415}2416 2417static __inline__ __mmask16 __DEFAULT_FN_ATTRS2562418_mm256_test_epi16_mask (__m256i __A, __m256i __B)2419{2420 return _mm256_cmpneq_epi16_mask (_mm256_and_si256 (__A, __B),2421 _mm256_setzero_si256 ());2422}2423 2424static __inline__ __mmask16 __DEFAULT_FN_ATTRS2562425_mm256_mask_test_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)2426{2427 return _mm256_mask_cmpneq_epi16_mask (__U, _mm256_and_si256(__A, __B),2428 _mm256_setzero_si256());2429}2430 2431static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR2432_mm_testn_epi8_mask(__m128i __A, __m128i __B) {2433 return _mm_cmpeq_epi8_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128());2434}2435 2436static __inline__ __mmask16 __DEFAULT_FN_ATTRS1282437_mm_mask_testn_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B)2438{2439 return _mm_mask_cmpeq_epi8_mask (__U, _mm_and_si128 (__A, __B),2440 _mm_setzero_si128());2441}2442 2443static __inline__ __mmask32 __DEFAULT_FN_ATTRS2562444_mm256_testn_epi8_mask (__m256i __A, __m256i __B)2445{2446 return _mm256_cmpeq_epi8_mask (_mm256_and_si256 (__A, __B),2447 _mm256_setzero_si256());2448}2449 2450static __inline__ __mmask32 __DEFAULT_FN_ATTRS2562451_mm256_mask_testn_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B)2452{2453 return _mm256_mask_cmpeq_epi8_mask (__U, _mm256_and_si256 (__A, __B),2454 _mm256_setzero_si256());2455}2456 2457static __inline__ __mmask8 __DEFAULT_FN_ATTRS1282458_mm_testn_epi16_mask (__m128i __A, __m128i __B)2459{2460 return _mm_cmpeq_epi16_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128());2461}2462 2463static __inline__ __mmask8 __DEFAULT_FN_ATTRS1282464_mm_mask_testn_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B)2465{2466 return _mm_mask_cmpeq_epi16_mask (__U, _mm_and_si128(__A, __B), _mm_setzero_si128());2467}2468 2469static __inline__ __mmask16 __DEFAULT_FN_ATTRS2562470_mm256_testn_epi16_mask (__m256i __A, __m256i __B)2471{2472 return _mm256_cmpeq_epi16_mask (_mm256_and_si256(__A, __B),2473 _mm256_setzero_si256());2474}2475 2476static __inline__ __mmask16 __DEFAULT_FN_ATTRS2562477_mm256_mask_testn_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)2478{2479 return _mm256_mask_cmpeq_epi16_mask (__U, _mm256_and_si256 (__A, __B),2480 _mm256_setzero_si256());2481}2482 2483static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR2484_mm_movepi8_mask(__m128i __A) {2485 return (__mmask16) __builtin_ia32_cvtb2mask128 ((__v16qi) __A);2486}2487 2488static __inline__ __mmask32 __DEFAULT_FN_ATTRS256_CONSTEXPR2489_mm256_movepi8_mask(__m256i __A) {2490 return (__mmask32) __builtin_ia32_cvtb2mask256 ((__v32qi) __A);2491}2492 2493static __inline__ __mmask8 __DEFAULT_FN_ATTRS128_CONSTEXPR2494_mm_movepi16_mask(__m128i __A) {2495 return (__mmask8) __builtin_ia32_cvtw2mask128 ((__v8hi) __A);2496}2497 2498static __inline__ __mmask16 __DEFAULT_FN_ATTRS256_CONSTEXPR2499_mm256_movepi16_mask(__m256i __A) {2500 return (__mmask16) __builtin_ia32_cvtw2mask256 ((__v16hi) __A);2501}2502 2503static __inline__ __m128i __DEFAULT_FN_ATTRS1282504_mm_movm_epi8 (__mmask16 __A)2505{2506 return (__m128i) __builtin_ia32_cvtmask2b128 (__A);2507}2508 2509static __inline__ __m256i __DEFAULT_FN_ATTRS2562510_mm256_movm_epi8 (__mmask32 __A)2511{2512 return (__m256i) __builtin_ia32_cvtmask2b256 (__A);2513}2514 2515static __inline__ __m128i __DEFAULT_FN_ATTRS1282516_mm_movm_epi16 (__mmask8 __A)2517{2518 return (__m128i) __builtin_ia32_cvtmask2w128 (__A);2519}2520 2521static __inline__ __m256i __DEFAULT_FN_ATTRS2562522_mm256_movm_epi16 (__mmask16 __A)2523{2524 return (__m256i) __builtin_ia32_cvtmask2w256 (__A);2525}2526 2527static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2528_mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A)2529{2530 return (__m128i)__builtin_ia32_selectb_128(__M,2531 (__v16qi) _mm_broadcastb_epi8(__A),2532 (__v16qi) __O);2533}2534 2535static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2536_mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A)2537{2538 return (__m128i)__builtin_ia32_selectb_128(__M,2539 (__v16qi) _mm_broadcastb_epi8(__A),2540 (__v16qi) _mm_setzero_si128());2541}2542 2543static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2544_mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A)2545{2546 return (__m256i)__builtin_ia32_selectb_256(__M,2547 (__v32qi) _mm256_broadcastb_epi8(__A),2548 (__v32qi) __O);2549}2550 2551static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2552_mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A)2553{2554 return (__m256i)__builtin_ia32_selectb_256(__M,2555 (__v32qi) _mm256_broadcastb_epi8(__A),2556 (__v32qi) _mm256_setzero_si256());2557}2558 2559static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2560_mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A)2561{2562 return (__m128i)__builtin_ia32_selectw_128(__M,2563 (__v8hi) _mm_broadcastw_epi16(__A),2564 (__v8hi) __O);2565}2566 2567static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2568_mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A)2569{2570 return (__m128i)__builtin_ia32_selectw_128(__M,2571 (__v8hi) _mm_broadcastw_epi16(__A),2572 (__v8hi) _mm_setzero_si128());2573}2574 2575static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2576_mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A)2577{2578 return (__m256i)__builtin_ia32_selectw_256(__M,2579 (__v16hi) _mm256_broadcastw_epi16(__A),2580 (__v16hi) __O);2581}2582 2583static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2584_mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A)2585{2586 return (__m256i)__builtin_ia32_selectw_256(__M,2587 (__v16hi) _mm256_broadcastw_epi16(__A),2588 (__v16hi) _mm256_setzero_si256());2589}2590 2591static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2592_mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A)2593{2594 return (__m256i) __builtin_ia32_selectw_256 (__M,2595 (__v16hi) _mm256_set1_epi16(__A),2596 (__v16hi) __O);2597}2598 2599static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2600_mm256_maskz_set1_epi16 (__mmask16 __M, short __A)2601{2602 return (__m256i) __builtin_ia32_selectw_256(__M,2603 (__v16hi)_mm256_set1_epi16(__A),2604 (__v16hi) _mm256_setzero_si256());2605}2606 2607static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2608_mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A)2609{2610 return (__m128i) __builtin_ia32_selectw_128(__M,2611 (__v8hi) _mm_set1_epi16(__A),2612 (__v8hi) __O);2613}2614 2615static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2616_mm_maskz_set1_epi16 (__mmask8 __M, short __A)2617{2618 return (__m128i) __builtin_ia32_selectw_128(__M,2619 (__v8hi) _mm_set1_epi16(__A),2620 (__v8hi) _mm_setzero_si128());2621}2622 2623static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2624_mm_permutexvar_epi16(__m128i __A, __m128i __B) {2625 return (__m128i)__builtin_ia32_permvarhi128((__v8hi) __B, (__v8hi) __A);2626}2627 2628static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2629_mm_maskz_permutexvar_epi16(__mmask8 __M, __m128i __A, __m128i __B) {2630 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,2631 (__v8hi)_mm_permutexvar_epi16(__A, __B),2632 (__v8hi) _mm_setzero_si128());2633}2634 2635static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR2636_mm_mask_permutexvar_epi16(__m128i __W, __mmask8 __M, __m128i __A,2637 __m128i __B) {2638 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,2639 (__v8hi)_mm_permutexvar_epi16(__A, __B),2640 (__v8hi)__W);2641}2642 2643static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2644_mm256_permutexvar_epi16(__m256i __A, __m256i __B) {2645 return (__m256i)__builtin_ia32_permvarhi256((__v16hi) __B, (__v16hi) __A);2646}2647 2648static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2649_mm256_maskz_permutexvar_epi16(__mmask16 __M, __m256i __A, __m256i __B) {2650 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,2651 (__v16hi)_mm256_permutexvar_epi16(__A, __B),2652 (__v16hi)_mm256_setzero_si256());2653}2654 2655static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR2656_mm256_mask_permutexvar_epi16(__m256i __W, __mmask16 __M, __m256i __A,2657 __m256i __B) {2658 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,2659 (__v16hi)_mm256_permutexvar_epi16(__A, __B),2660 (__v16hi)__W);2661}2662 2663#define _mm_mask_alignr_epi8(W, U, A, B, N) \2664 ((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \2665 (__v16qi)_mm_alignr_epi8((A), (B), (int)(N)), \2666 (__v16qi)(__m128i)(W)))2667 2668#define _mm_maskz_alignr_epi8(U, A, B, N) \2669 ((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \2670 (__v16qi)_mm_alignr_epi8((A), (B), (int)(N)), \2671 (__v16qi)_mm_setzero_si128()))2672 2673#define _mm256_mask_alignr_epi8(W, U, A, B, N) \2674 ((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \2675 (__v32qi)_mm256_alignr_epi8((A), (B), (int)(N)), \2676 (__v32qi)(__m256i)(W)))2677 2678#define _mm256_maskz_alignr_epi8(U, A, B, N) \2679 ((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \2680 (__v32qi)_mm256_alignr_epi8((A), (B), (int)(N)), \2681 (__v32qi)_mm256_setzero_si256()))2682 2683#define _mm_dbsad_epu8(A, B, imm) \2684 ((__m128i)__builtin_ia32_dbpsadbw128((__v16qi)(__m128i)(A), \2685 (__v16qi)(__m128i)(B), (int)(imm)))2686 2687#define _mm_mask_dbsad_epu8(W, U, A, B, imm) \2688 ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \2689 (__v8hi)_mm_dbsad_epu8((A), (B), (imm)), \2690 (__v8hi)(__m128i)(W)))2691 2692#define _mm_maskz_dbsad_epu8(U, A, B, imm) \2693 ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \2694 (__v8hi)_mm_dbsad_epu8((A), (B), (imm)), \2695 (__v8hi)_mm_setzero_si128()))2696 2697#define _mm256_dbsad_epu8(A, B, imm) \2698 ((__m256i)__builtin_ia32_dbpsadbw256((__v32qi)(__m256i)(A), \2699 (__v32qi)(__m256i)(B), (int)(imm)))2700 2701#define _mm256_mask_dbsad_epu8(W, U, A, B, imm) \2702 ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \2703 (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \2704 (__v16hi)(__m256i)(W)))2705 2706#define _mm256_maskz_dbsad_epu8(U, A, B, imm) \2707 ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \2708 (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \2709 (__v16hi)_mm256_setzero_si256()))2710 2711static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2712_mm_reduce_add_epi16(__m128i __W) {2713 return __builtin_reduce_add((__v8hi)__W);2714}2715 2716static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2717_mm_reduce_mul_epi16(__m128i __W) {2718 return __builtin_reduce_mul((__v8hi)__W);2719}2720 2721static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2722_mm_reduce_and_epi16(__m128i __W) {2723 return __builtin_reduce_and((__v8hi)__W);2724}2725 2726static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2727_mm_reduce_or_epi16(__m128i __W) {2728 return __builtin_reduce_or((__v8hi)__W);2729}2730 2731static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2732_mm_mask_reduce_add_epi16(__mmask8 __M, __m128i __W) {2733 __W = _mm_maskz_mov_epi16(__M, __W);2734 return __builtin_reduce_add((__v8hi)__W);2735}2736 2737static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2738_mm_mask_reduce_mul_epi16(__mmask8 __M, __m128i __W) {2739 __W = _mm_mask_mov_epi16(_mm_set1_epi16(1), __M, __W);2740 return __builtin_reduce_mul((__v8hi)__W);2741}2742 2743static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2744_mm_mask_reduce_and_epi16(__mmask8 __M, __m128i __W) {2745 __W = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __W);2746 return __builtin_reduce_and((__v8hi)__W);2747}2748 2749static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2750_mm_mask_reduce_or_epi16(__mmask8 __M, __m128i __W) {2751 __W = _mm_maskz_mov_epi16(__M, __W);2752 return __builtin_reduce_or((__v8hi)__W);2753}2754 2755static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2756_mm_reduce_max_epi16(__m128i __V) {2757 return __builtin_reduce_max((__v8hi)__V);2758}2759 2760static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR2761_mm_reduce_max_epu16(__m128i __V) {2762 return __builtin_reduce_max((__v8hu)__V);2763}2764 2765static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2766_mm_reduce_min_epi16(__m128i __V) {2767 return __builtin_reduce_min((__v8hi)__V);2768}2769 2770static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR2771_mm_reduce_min_epu16(__m128i __V) {2772 return __builtin_reduce_min((__v8hu)__V);2773}2774 2775static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2776_mm_mask_reduce_max_epi16(__mmask16 __M, __m128i __V) {2777 __V = _mm_mask_mov_epi16(_mm_set1_epi16(-32767-1), __M, __V);2778 return __builtin_reduce_max((__v8hi)__V);2779}2780 2781static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR2782_mm_mask_reduce_max_epu16(__mmask16 __M, __m128i __V) {2783 __V = _mm_maskz_mov_epi16(__M, __V);2784 return __builtin_reduce_max((__v8hu)__V);2785}2786 2787static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR2788_mm_mask_reduce_min_epi16(__mmask16 __M, __m128i __V) {2789 __V = _mm_mask_mov_epi16(_mm_set1_epi16(32767), __M, __V);2790 return __builtin_reduce_min((__v8hi)__V);2791}2792 2793static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR2794_mm_mask_reduce_min_epu16(__mmask16 __M, __m128i __V) {2795 __V = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __V);2796 return __builtin_reduce_min((__v8hu)__V);2797}2798 2799static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2800_mm256_reduce_add_epi16(__m256i __W) {2801 return __builtin_reduce_add((__v16hi)__W);2802}2803 2804static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2805_mm256_reduce_mul_epi16(__m256i __W) {2806 return __builtin_reduce_mul((__v16hi)__W);2807}2808 2809static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2810_mm256_reduce_and_epi16(__m256i __W) {2811 return __builtin_reduce_and((__v16hi)__W);2812}2813 2814static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2815_mm256_reduce_or_epi16(__m256i __W) {2816 return __builtin_reduce_or((__v16hi)__W);2817}2818 2819static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2820_mm256_mask_reduce_add_epi16(__mmask16 __M, __m256i __W) {2821 __W = _mm256_maskz_mov_epi16(__M, __W);2822 return __builtin_reduce_add((__v16hi)__W);2823}2824 2825static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2826_mm256_mask_reduce_mul_epi16(__mmask16 __M, __m256i __W) {2827 __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(1), __M, __W);2828 return __builtin_reduce_mul((__v16hi)__W);2829}2830 2831static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2832_mm256_mask_reduce_and_epi16(__mmask16 __M, __m256i __W) {2833 __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __W);2834 return __builtin_reduce_and((__v16hi)__W);2835}2836 2837static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2838_mm256_mask_reduce_or_epi16(__mmask16 __M, __m256i __W) {2839 __W = _mm256_maskz_mov_epi16(__M, __W);2840 return __builtin_reduce_or((__v16hi)__W);2841}2842 2843static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2844_mm256_reduce_max_epi16(__m256i __V) {2845 return __builtin_reduce_max((__v16hi)__V);2846}2847 2848static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR2849_mm256_reduce_max_epu16(__m256i __V) {2850 return __builtin_reduce_max((__v16hu)__V);2851}2852 2853static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2854_mm256_reduce_min_epi16(__m256i __V) {2855 return __builtin_reduce_min((__v16hi)__V);2856}2857 2858static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR2859_mm256_reduce_min_epu16(__m256i __V) {2860 return __builtin_reduce_min((__v16hu)__V);2861}2862 2863static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2864_mm256_mask_reduce_max_epi16(__mmask16 __M, __m256i __V) {2865 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-32767-1), __M, __V);2866 return __builtin_reduce_max((__v16hi)__V);2867}2868 2869static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR2870_mm256_mask_reduce_max_epu16(__mmask16 __M, __m256i __V) {2871 __V = _mm256_maskz_mov_epi16(__M, __V);2872 return __builtin_reduce_max((__v16hu)__V);2873}2874 2875static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR2876_mm256_mask_reduce_min_epi16(__mmask16 __M, __m256i __V) {2877 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(32767), __M, __V);2878 return __builtin_reduce_min((__v16hi)__V);2879}2880 2881static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR2882_mm256_mask_reduce_min_epu16(__mmask16 __M, __m256i __V) {2883 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __V);2884 return __builtin_reduce_min((__v16hu)__V);2885}2886 2887static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2888_mm_reduce_add_epi8(__m128i __W) {2889 return __builtin_reduce_add((__v16qs)__W);2890}2891 2892static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2893_mm_reduce_mul_epi8(__m128i __W) {2894 return __builtin_reduce_mul((__v16qs)__W);2895}2896 2897static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2898_mm_reduce_and_epi8(__m128i __W) {2899 return __builtin_reduce_and((__v16qs)__W);2900}2901 2902static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2903_mm_reduce_or_epi8(__m128i __W) {2904 return __builtin_reduce_or((__v16qs)__W);2905}2906 2907static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2908_mm_mask_reduce_add_epi8(__mmask16 __M, __m128i __W) {2909 __W = _mm_maskz_mov_epi8(__M, __W);2910 return __builtin_reduce_add((__v16qs)__W);2911}2912 2913static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2914_mm_mask_reduce_mul_epi8(__mmask16 __M, __m128i __W) {2915 __W = _mm_mask_mov_epi8(_mm_set1_epi8(1), __M, __W);2916 return __builtin_reduce_mul((__v16qs)__W);2917}2918 2919static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2920_mm_mask_reduce_and_epi8(__mmask16 __M, __m128i __W) {2921 __W = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __W);2922 return __builtin_reduce_and((__v16qs)__W);2923}2924 2925static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2926_mm_mask_reduce_or_epi8(__mmask16 __M, __m128i __W) {2927 __W = _mm_maskz_mov_epi8(__M, __W);2928 return __builtin_reduce_or((__v16qs)__W);2929}2930 2931static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2932_mm_reduce_max_epi8(__m128i __V) {2933 return __builtin_reduce_max((__v16qs)__V);2934}2935 2936static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR2937_mm_reduce_max_epu8(__m128i __V) {2938 return __builtin_reduce_max((__v16qu)__V);2939}2940 2941static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2942_mm_reduce_min_epi8(__m128i __V) {2943 return __builtin_reduce_min((__v16qs)__V);2944}2945 2946static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR2947_mm_reduce_min_epu8(__m128i __V) {2948 return __builtin_reduce_min((__v16qu)__V);2949}2950 2951static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2952_mm_mask_reduce_max_epi8(__mmask16 __M, __m128i __V) {2953 __V = _mm_mask_mov_epi8(_mm_set1_epi8(-127-1), __M, __V);2954 return __builtin_reduce_max((__v16qs)__V);2955}2956 2957static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR2958_mm_mask_reduce_max_epu8(__mmask16 __M, __m128i __V) {2959 __V = _mm_maskz_mov_epi8(__M, __V);2960 return __builtin_reduce_max((__v16qu)__V);2961}2962 2963static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR2964_mm_mask_reduce_min_epi8(__mmask16 __M, __m128i __V) {2965 __V = _mm_mask_mov_epi8(_mm_set1_epi8(127), __M, __V);2966 return __builtin_reduce_min((__v16qs)__V);2967}2968 2969static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR2970_mm_mask_reduce_min_epu8(__mmask16 __M, __m128i __V) {2971 __V = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __V);2972 return __builtin_reduce_min((__v16qu)__V);2973}2974 2975static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR2976_mm256_reduce_add_epi8(__m256i __W) {2977 return __builtin_reduce_add((__v32qs)__W);2978}2979 2980static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR2981_mm256_reduce_mul_epi8(__m256i __W) {2982 return __builtin_reduce_mul((__v32qs)__W);2983}2984 2985static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR2986_mm256_reduce_and_epi8(__m256i __W) {2987 return __builtin_reduce_and((__v32qs)__W);2988}2989 2990static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR2991_mm256_reduce_or_epi8(__m256i __W) {2992 return __builtin_reduce_or((__v32qs)__W);2993}2994 2995static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR2996_mm256_mask_reduce_add_epi8(__mmask32 __M, __m256i __W) {2997 __W = _mm256_maskz_mov_epi8(__M, __W);2998 return __builtin_reduce_add((__v32qs)__W);2999}3000 3001static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR3002_mm256_mask_reduce_mul_epi8(__mmask32 __M, __m256i __W) {3003 __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(1), __M, __W);3004 return __builtin_reduce_mul((__v32qs)__W);3005}3006 3007static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR3008_mm256_mask_reduce_and_epi8(__mmask32 __M, __m256i __W) {3009 __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __W);3010 return __builtin_reduce_and((__v32qs)__W);3011}3012 3013static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR3014_mm256_mask_reduce_or_epi8(__mmask32 __M, __m256i __W) {3015 __W = _mm256_maskz_mov_epi8(__M, __W);3016 return __builtin_reduce_or((__v32qs)__W);3017}3018 3019static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR3020_mm256_reduce_max_epi8(__m256i __V) {3021 return __builtin_reduce_max((__v32qs)__V);3022}3023 3024static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR3025_mm256_reduce_max_epu8(__m256i __V) {3026 return __builtin_reduce_max((__v32qu)__V);3027}3028 3029static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR3030_mm256_reduce_min_epi8(__m256i __V) {3031 return __builtin_reduce_min((__v32qs)__V);3032}3033 3034static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR3035_mm256_reduce_min_epu8(__m256i __V) {3036 return __builtin_reduce_min((__v32qu)__V);3037}3038 3039static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR3040_mm256_mask_reduce_max_epi8(__mmask32 __M, __m256i __V) {3041 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-127-1), __M, __V);3042 return __builtin_reduce_max((__v32qs)__V);3043}3044 3045static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR3046_mm256_mask_reduce_max_epu8(__mmask32 __M, __m256i __V) {3047 __V = _mm256_maskz_mov_epi8(__M, __V);3048 return __builtin_reduce_max((__v32qu)__V);3049}3050 3051static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR3052_mm256_mask_reduce_min_epi8(__mmask32 __M, __m256i __V) {3053 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(127), __M, __V);3054 return __builtin_reduce_min((__v32qs)__V);3055}3056 3057static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR3058_mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) {3059 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __V);3060 return __builtin_reduce_min((__v32qu)__V);3061}3062 3063#undef __DEFAULT_FN_ATTRS1283064#undef __DEFAULT_FN_ATTRS2563065#undef __DEFAULT_FN_ATTRS128_CONSTEXPR3066#undef __DEFAULT_FN_ATTRS256_CONSTEXPR3067 3068#endif /* __AVX512VLBWINTRIN_H */3069