356 lines · c
1/*===---- cpuid.h - X86 cpu model detection --------------------------------===2 *3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4 * See https://llvm.org/LICENSE.txt for license information.5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6 *7 *===-----------------------------------------------------------------------===8 */9 10#ifndef __CPUID_H11#define __CPUID_H12 13#if !defined(__x86_64__) && !defined(__i386__)14#error this header is for x86 only15#endif16 17/* Responses identification request with %eax 0 */18/* AMD: "AuthenticAMD" */19#define signature_AMD_ebx 0x6874754120#define signature_AMD_edx 0x69746e6521#define signature_AMD_ecx 0x444d416322/* CENTAUR: "CentaurHauls" */23#define signature_CENTAUR_ebx 0x746e654324#define signature_CENTAUR_edx 0x4872756125#define signature_CENTAUR_ecx 0x736c756126/* CYRIX: "CyrixInstead" */27#define signature_CYRIX_ebx 0x6972794328#define signature_CYRIX_edx 0x736e497829#define signature_CYRIX_ecx 0x6461657430/* HYGON: "HygonGenuine" */31#define signature_HYGON_ebx 0x6f67794832#define signature_HYGON_edx 0x6e65476e33#define signature_HYGON_ecx 0x656e697534/* INTEL: "GenuineIntel" */35#define signature_INTEL_ebx 0x756e654736#define signature_INTEL_edx 0x49656e6937#define signature_INTEL_ecx 0x6c65746e38/* TM1: "TransmetaCPU" */39#define signature_TM1_ebx 0x6e61725440#define signature_TM1_edx 0x74656d7341#define signature_TM1_ecx 0x5550436142/* TM2: "GenuineTMx86" */43#define signature_TM2_ebx 0x756e654744#define signature_TM2_edx 0x54656e6945#define signature_TM2_ecx 0x3638784d46/* NSC: "Geode by NSC" */47#define signature_NSC_ebx 0x646f654748#define signature_NSC_edx 0x7962206549#define signature_NSC_ecx 0x43534e2050/* NEXGEN: "NexGenDriven" */51#define signature_NEXGEN_ebx 0x4778654e52#define signature_NEXGEN_edx 0x72446e6553#define signature_NEXGEN_ecx 0x6e65766954/* RISE: "RiseRiseRise" */55#define signature_RISE_ebx 0x6573695256#define signature_RISE_edx 0x6573695257#define signature_RISE_ecx 0x6573695258/* SIS: "SiS SiS SiS " */59#define signature_SIS_ebx 0x2053695360#define signature_SIS_edx 0x2053695361#define signature_SIS_ecx 0x2053695362/* UMC: "UMC UMC UMC " */63#define signature_UMC_ebx 0x20434d5564#define signature_UMC_edx 0x20434d5565#define signature_UMC_ecx 0x20434d5566/* VIA: "VIA VIA VIA " */67#define signature_VIA_ebx 0x2041495668#define signature_VIA_edx 0x2041495669#define signature_VIA_ecx 0x2041495670/* VORTEX: "Vortex86 SoC" */71#define signature_VORTEX_ebx 0x74726f5672#define signature_VORTEX_edx 0x3638786573#define signature_VORTEX_ecx 0x436f532074 75/* Features in %ecx for leaf 1 */76#define bit_SSE3 0x0000000177#define bit_PCLMULQDQ 0x0000000278#define bit_PCLMUL bit_PCLMULQDQ /* for gcc compat */79#define bit_DTES64 0x0000000480#define bit_MONITOR 0x0000000881#define bit_DSCPL 0x0000001082#define bit_VMX 0x0000002083#define bit_SMX 0x0000004084#define bit_EIST 0x0000008085#define bit_TM2 0x0000010086#define bit_SSSE3 0x0000020087#define bit_CNXTID 0x0000040088#define bit_FMA 0x0000100089#define bit_CMPXCHG16B 0x0000200090#define bit_xTPR 0x0000400091#define bit_PDCM 0x0000800092#define bit_PCID 0x0002000093#define bit_DCA 0x0004000094#define bit_SSE41 0x0008000095#define bit_SSE4_1 bit_SSE41 /* for gcc compat */96#define bit_SSE42 0x0010000097#define bit_SSE4_2 bit_SSE42 /* for gcc compat */98#define bit_x2APIC 0x0020000099#define bit_MOVBE 0x00400000100#define bit_POPCNT 0x00800000101#define bit_TSCDeadline 0x01000000102#define bit_AESNI 0x02000000103#define bit_AES bit_AESNI /* for gcc compat */104#define bit_XSAVE 0x04000000105#define bit_OSXSAVE 0x08000000106#define bit_AVX 0x10000000107#define bit_F16C 0x20000000108#define bit_RDRND 0x40000000109 110/* Features in %edx for leaf 1 */111#define bit_FPU 0x00000001112#define bit_VME 0x00000002113#define bit_DE 0x00000004114#define bit_PSE 0x00000008115#define bit_TSC 0x00000010116#define bit_MSR 0x00000020117#define bit_PAE 0x00000040118#define bit_MCE 0x00000080119#define bit_CX8 0x00000100120#define bit_CMPXCHG8B bit_CX8 /* for gcc compat */121#define bit_APIC 0x00000200122#define bit_SEP 0x00000800123#define bit_MTRR 0x00001000124#define bit_PGE 0x00002000125#define bit_MCA 0x00004000126#define bit_CMOV 0x00008000127#define bit_PAT 0x00010000128#define bit_PSE36 0x00020000129#define bit_PSN 0x00040000130#define bit_CLFSH 0x00080000131#define bit_DS 0x00200000132#define bit_ACPI 0x00400000133#define bit_MMX 0x00800000134#define bit_FXSR 0x01000000135#define bit_FXSAVE bit_FXSR /* for gcc compat */136#define bit_SSE 0x02000000137#define bit_SSE2 0x04000000138#define bit_SS 0x08000000139#define bit_HTT 0x10000000140#define bit_TM 0x20000000141#define bit_PBE 0x80000000142 143/* Features in %ebx for leaf 7 sub-leaf 0 */144#define bit_FSGSBASE 0x00000001145#define bit_SGX 0x00000004146#define bit_BMI 0x00000008147#define bit_HLE 0x00000010148#define bit_AVX2 0x00000020149#define bit_SMEP 0x00000080150#define bit_BMI2 0x00000100151#define bit_ENH_MOVSB 0x00000200152#define bit_INVPCID 0x00000400153#define bit_RTM 0x00000800154#define bit_MPX 0x00004000155#define bit_AVX512F 0x00010000156#define bit_AVX512DQ 0x00020000157#define bit_RDSEED 0x00040000158#define bit_ADX 0x00080000159#define bit_AVX512IFMA 0x00200000160#define bit_CLFLUSHOPT 0x00800000161#define bit_CLWB 0x01000000162#define bit_AVX512PF 0x04000000163#define bit_AVX512ER 0x08000000164#define bit_AVX512CD 0x10000000165#define bit_SHA 0x20000000166#define bit_AVX512BW 0x40000000167#define bit_AVX512VL 0x80000000168 169/* Features in %ecx for leaf 7 sub-leaf 0 */170#define bit_PREFTCHWT1 0x00000001171#define bit_AVX512VBMI 0x00000002172#define bit_PKU 0x00000004173#define bit_OSPKE 0x00000010174#define bit_WAITPKG 0x00000020175#define bit_AVX512VBMI2 0x00000040176#define bit_SHSTK 0x00000080177#define bit_GFNI 0x00000100178#define bit_VAES 0x00000200179#define bit_VPCLMULQDQ 0x00000400180#define bit_AVX512VNNI 0x00000800181#define bit_AVX512BITALG 0x00001000182#define bit_AVX512VPOPCNTDQ 0x00004000183#define bit_RDPID 0x00400000184#define bit_CLDEMOTE 0x02000000185#define bit_MOVDIRI 0x08000000186#define bit_MOVDIR64B 0x10000000187#define bit_ENQCMD 0x20000000188 189/* Features in %edx for leaf 7 sub-leaf 0 */190#define bit_AVX5124VNNIW 0x00000004191#define bit_AVX5124FMAPS 0x00000008192#define bit_UINTR 0x00000020193#define bit_AVX512VP2INTERSECT 0x00000100194#define bit_SERIALIZE 0x00004000195#define bit_TSXLDTRK 0x00010000196#define bit_PCONFIG 0x00040000197#define bit_IBT 0x00100000198#define bit_AMXBF16 0x00400000199#define bit_AVX512FP16 0x00800000200#define bit_AMXTILE 0x01000000201#define bit_AMXINT8 0x02000000202 203/* Features in %eax for leaf 7 sub-leaf 1 */204#define bit_SHA512 0x00000001205#define bit_SM3 0x00000002206#define bit_SM4 0x00000004207#define bit_RAOINT 0x00000008208#define bit_AVXVNNI 0x00000010209#define bit_AVX512BF16 0x00000020210#define bit_CMPCCXADD 0x00000080211#define bit_AMXFP16 0x00200000212#define bit_HRESET 0x00400000213#define bit_AVXIFMA 0x00800000214 215/* Features in %edx for leaf 7 sub-leaf 1 */216#define bit_AVXVNNIINT8 0x00000010217#define bit_AVXNECONVERT 0x00000020218#define bit_AMXCOMPLEX 0x00000100219#define bit_AVXVNNIINT16 0x00000400220#define bit_PREFETCHI 0x00004000221#define bit_USERMSR 0x00008000222#define bit_AVX10 0x00080000223#define bit_APXF 0x00200000224 225/* Features in %eax for leaf 13 sub-leaf 1 */226#define bit_XSAVEOPT 0x00000001227#define bit_XSAVEC 0x00000002228#define bit_XSAVES 0x00000008229 230/* Features in %eax for leaf 0x14 sub-leaf 0 */231#define bit_PTWRITE 0x00000010232 233/* Features in %ecx for leaf 0x80000001 */234#define bit_LAHF_LM 0x00000001235#define bit_ABM 0x00000020236#define bit_LZCNT bit_ABM /* for gcc compat */237#define bit_SSE4a 0x00000040238#define bit_PRFCHW 0x00000100239#define bit_XOP 0x00000800240#define bit_LWP 0x00008000241#define bit_FMA4 0x00010000242#define bit_TBM 0x00200000243#define bit_MWAITX 0x20000000244 245/* Features in %edx for leaf 0x80000001 */246#define bit_MMXEXT 0x00400000247#define bit_LM 0x20000000248#define bit_3DNOWP 0x40000000249#define bit_3DNOW 0x80000000250 251/* Features in %ebx for leaf 0x80000008 */252#define bit_CLZERO 0x00000001253#define bit_RDPRU 0x00000010254#define bit_WBNOINVD 0x00000200255 256#ifdef __i386__257#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \258 __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \259 : "0"(__leaf))260 261#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \262 __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \263 : "0"(__leaf), "2"(__count))264#else265/* x86-64 uses %rbx as the base register, so preserve it. */266#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \267 __asm(" xchg{q|} {%%|}rbx,%q1\n" \268 " cpuid\n" \269 " xchg{q|} {%%|}rbx,%q1" \270 : "=a"(__eax), "=r"(__ebx), "=c"(__ecx), "=d"(__edx) \271 : "0"(__leaf))272 273#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \274 __asm(" xchg{q|} {%%|}rbx,%q1\n" \275 " cpuid\n" \276 " xchg{q|} {%%|}rbx,%q1" \277 : "=a"(__eax), "=r"(__ebx), "=c"(__ecx), "=d"(__edx) \278 : "0"(__leaf), "2"(__count))279#endif280 281static __inline unsigned int __get_cpuid_max (unsigned int __leaf,282 unsigned int *__sig)283{284 unsigned int __eax, __ebx, __ecx, __edx;285#ifdef __i386__286 int __cpuid_supported;287 288 __asm(" pushf{l|d}\n"289 " pop{l|} {%%|}eax\n"290 " mov{l|} {%%eax,%%ecx|ecx,eax}\n"291 " xor{l|} {$0x00200000,%%eax|eax,0x00200000}\n"292 " push{l|} {%%|}eax\n"293 " popf{l|d}\n"294 " pushf{l|d}\n"295 " pop{l|} {%%|}eax\n"296 " mov{l|} {$0,%0|%0,0}\n"297 " cmp{l|} {%%eax,%%ecx|ecx,eax}\n"298 " je 1f\n"299 " mov{l|} {$1,%0|%0,1}\n"300 "1:"301 : "=r"(__cpuid_supported)302 :303 : "eax", "ecx");304 if (!__cpuid_supported)305 return 0;306#endif307 308 __cpuid(__leaf, __eax, __ebx, __ecx, __edx);309 if (__sig)310 *__sig = __ebx;311 return __eax;312}313 314static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax,315 unsigned int *__ebx, unsigned int *__ecx,316 unsigned int *__edx)317{318 unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0);319 320 if (__max_leaf == 0 || __max_leaf < __leaf)321 return 0;322 323 __cpuid(__leaf, *__eax, *__ebx, *__ecx, *__edx);324 return 1;325}326 327static __inline int __get_cpuid_count (unsigned int __leaf,328 unsigned int __subleaf,329 unsigned int *__eax, unsigned int *__ebx,330 unsigned int *__ecx, unsigned int *__edx)331{332 unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0);333 334 if (__max_leaf == 0 || __max_leaf < __leaf)335 return 0;336 337 __cpuid_count(__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);338 return 1;339}340 341// In some configurations, __cpuidex is defined as a builtin (primarily342// -fms-extensions) which will conflict with the __cpuidex definition below.343#if !(__has_builtin(__cpuidex))344// In some cases, offloading will set the host as the aux triple and define the345// builtin. Given __has_builtin does not detect builtins on aux triples, we need346// to explicitly check for some offloading cases.347#if !defined(__NVPTX__) && !defined(__AMDGPU__) && !defined(__SPIRV__)348static __inline void __cpuidex(int __cpu_info[4], int __leaf, int __subleaf) {349 __cpuid_count(__leaf, __subleaf, __cpu_info[0], __cpu_info[1], __cpu_info[2],350 __cpu_info[3]);351}352#endif353#endif354 355#endif /* __CPUID_H */356