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1/*===---- emmintrin.h - SSE2 intrinsics ------------------------------------===2 *3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4 * See https://llvm.org/LICENSE.txt for license information.5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6 *7 *===-----------------------------------------------------------------------===8 */9 10#ifndef __EMMINTRIN_H11#define __EMMINTRIN_H12 13#if !defined(__i386__) && !defined(__x86_64__)14#error "This header is only meant to be used on x86 and x64 architecture"15#endif16 17#include <xmmintrin.h>18 19typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));20 21typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));22typedef long long __m128i_u23 __attribute__((__vector_size__(16), __aligned__(1)));24 25/* Type defines. */26typedef double __v2df __attribute__((__vector_size__(16)));27 28/* Unsigned types */29typedef unsigned long long __v2du __attribute__((__vector_size__(16)));30 31/* We need an explicitly signed variant for char. Note that this shouldn't32 * appear in the interface though. */33typedef signed char __v16qs __attribute__((__vector_size__(16)));34 35#ifdef __SSE2__36/* Both _Float16 and __bf16 require SSE2 being enabled. */37typedef _Float16 __v8hf __attribute__((__vector_size__(16), __aligned__(16)));38typedef _Float16 __m128h __attribute__((__vector_size__(16), __aligned__(16)));39typedef _Float16 __m128h_u __attribute__((__vector_size__(16), __aligned__(1)));40 41typedef __bf16 __v8bf __attribute__((__vector_size__(16), __aligned__(16)));42typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));43#endif44 45/* Define the default attributes for the functions in this file. */46#define __DEFAULT_FN_ATTRS \47 __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \48 __min_vector_width__(128)))49 50#if defined(__cplusplus) && (__cplusplus >= 201103L)51#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr52#else53#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS54#endif55 56#define __trunc64(x) \57 (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0)58#define __zext128(x) \59 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \60 1, 2, 3)61#define __anyext128(x) \62 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \63 1, -1, -1)64 65/// Adds lower double-precision values in both operands and returns the66/// sum in the lower 64 bits of the result. The upper 64 bits of the result67/// are copied from the upper double-precision value of the first operand.68///69/// \headerfile <x86intrin.h>70///71/// This intrinsic corresponds to the <c> VADDSD / ADDSD </c> instruction.72///73/// \param __a74/// A 128-bit vector of [2 x double] containing one of the source operands.75/// \param __b76/// A 128-bit vector of [2 x double] containing one of the source operands.77/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the78/// sum of the lower 64 bits of both operands. The upper 64 bits are copied79/// from the upper 64 bits of the first source operand.80static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_sd(__m128d __a,81 __m128d __b) {82 __a[0] += __b[0];83 return __a;84}85 86/// Adds two 128-bit vectors of [2 x double].87///88/// \headerfile <x86intrin.h>89///90/// This intrinsic corresponds to the <c> VADDPD / ADDPD </c> instruction.91///92/// \param __a93/// A 128-bit vector of [2 x double] containing one of the source operands.94/// \param __b95/// A 128-bit vector of [2 x double] containing one of the source operands.96/// \returns A 128-bit vector of [2 x double] containing the sums of both97/// operands.98static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_pd(__m128d __a,99 __m128d __b) {100 return (__m128d)((__v2df)__a + (__v2df)__b);101}102 103/// Subtracts the lower double-precision value of the second operand104/// from the lower double-precision value of the first operand and returns105/// the difference in the lower 64 bits of the result. The upper 64 bits of106/// the result are copied from the upper double-precision value of the first107/// operand.108///109/// \headerfile <x86intrin.h>110///111/// This intrinsic corresponds to the <c> VSUBSD / SUBSD </c> instruction.112///113/// \param __a114/// A 128-bit vector of [2 x double] containing the minuend.115/// \param __b116/// A 128-bit vector of [2 x double] containing the subtrahend.117/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the118/// difference of the lower 64 bits of both operands. The upper 64 bits are119/// copied from the upper 64 bits of the first source operand.120static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_sd(__m128d __a,121 __m128d __b) {122 __a[0] -= __b[0];123 return __a;124}125 126/// Subtracts two 128-bit vectors of [2 x double].127///128/// \headerfile <x86intrin.h>129///130/// This intrinsic corresponds to the <c> VSUBPD / SUBPD </c> instruction.131///132/// \param __a133/// A 128-bit vector of [2 x double] containing the minuend.134/// \param __b135/// A 128-bit vector of [2 x double] containing the subtrahend.136/// \returns A 128-bit vector of [2 x double] containing the differences between137/// both operands.138static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_pd(__m128d __a,139 __m128d __b) {140 return (__m128d)((__v2df)__a - (__v2df)__b);141}142 143/// Multiplies lower double-precision values in both operands and returns144/// the product in the lower 64 bits of the result. The upper 64 bits of the145/// result are copied from the upper double-precision value of the first146/// operand.147///148/// \headerfile <x86intrin.h>149///150/// This intrinsic corresponds to the <c> VMULSD / MULSD </c> instruction.151///152/// \param __a153/// A 128-bit vector of [2 x double] containing one of the source operands.154/// \param __b155/// A 128-bit vector of [2 x double] containing one of the source operands.156/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the157/// product of the lower 64 bits of both operands. The upper 64 bits are158/// copied from the upper 64 bits of the first source operand.159static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_sd(__m128d __a,160 __m128d __b) {161 __a[0] *= __b[0];162 return __a;163}164 165/// Multiplies two 128-bit vectors of [2 x double].166///167/// \headerfile <x86intrin.h>168///169/// This intrinsic corresponds to the <c> VMULPD / MULPD </c> instruction.170///171/// \param __a172/// A 128-bit vector of [2 x double] containing one of the operands.173/// \param __b174/// A 128-bit vector of [2 x double] containing one of the operands.175/// \returns A 128-bit vector of [2 x double] containing the products of both176/// operands.177static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_pd(__m128d __a,178 __m128d __b) {179 return (__m128d)((__v2df)__a * (__v2df)__b);180}181 182/// Divides the lower double-precision value of the first operand by the183/// lower double-precision value of the second operand and returns the184/// quotient in the lower 64 bits of the result. The upper 64 bits of the185/// result are copied from the upper double-precision value of the first186/// operand.187///188/// \headerfile <x86intrin.h>189///190/// This intrinsic corresponds to the <c> VDIVSD / DIVSD </c> instruction.191///192/// \param __a193/// A 128-bit vector of [2 x double] containing the dividend.194/// \param __b195/// A 128-bit vector of [2 x double] containing divisor.196/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the197/// quotient of the lower 64 bits of both operands. The upper 64 bits are198/// copied from the upper 64 bits of the first source operand.199static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_div_sd(__m128d __a,200 __m128d __b) {201 __a[0] /= __b[0];202 return __a;203}204 205/// Performs an element-by-element division of two 128-bit vectors of206/// [2 x double].207///208/// \headerfile <x86intrin.h>209///210/// This intrinsic corresponds to the <c> VDIVPD / DIVPD </c> instruction.211///212/// \param __a213/// A 128-bit vector of [2 x double] containing the dividend.214/// \param __b215/// A 128-bit vector of [2 x double] containing the divisor.216/// \returns A 128-bit vector of [2 x double] containing the quotients of both217/// operands.218static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_div_pd(__m128d __a,219 __m128d __b) {220 return (__m128d)((__v2df)__a / (__v2df)__b);221}222 223/// Calculates the square root of the lower double-precision value of224/// the second operand and returns it in the lower 64 bits of the result.225/// The upper 64 bits of the result are copied from the upper226/// double-precision value of the first operand.227///228/// \headerfile <x86intrin.h>229///230/// This intrinsic corresponds to the <c> VSQRTSD / SQRTSD </c> instruction.231///232/// \param __a233/// A 128-bit vector of [2 x double] containing one of the operands. The234/// upper 64 bits of this operand are copied to the upper 64 bits of the235/// result.236/// \param __b237/// A 128-bit vector of [2 x double] containing one of the operands. The238/// square root is calculated using the lower 64 bits of this operand.239/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the240/// square root of the lower 64 bits of operand \a __b, and whose upper 64241/// bits are copied from the upper 64 bits of operand \a __a.242static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,243 __m128d __b) {244 return __extension__(__m128d){__builtin_elementwise_sqrt(__b[0]), __a[1]};245}246 247/// Calculates the square root of the each of two values stored in a248/// 128-bit vector of [2 x double].249///250/// \headerfile <x86intrin.h>251///252/// This intrinsic corresponds to the <c> VSQRTPD / SQRTPD </c> instruction.253///254/// \param __a255/// A 128-bit vector of [2 x double].256/// \returns A 128-bit vector of [2 x double] containing the square roots of the257/// values in the operand.258static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) {259 return __builtin_elementwise_sqrt(__a);260}261 262/// Compares lower 64-bit double-precision values of both operands, and263/// returns the lesser of the pair of values in the lower 64-bits of the264/// result. The upper 64 bits of the result are copied from the upper265/// double-precision value of the first operand.266///267/// If either value in a comparison is NaN, returns the value from \a __b.268///269/// \headerfile <x86intrin.h>270///271/// This intrinsic corresponds to the <c> VMINSD / MINSD </c> instruction.272///273/// \param __a274/// A 128-bit vector of [2 x double] containing one of the operands. The275/// lower 64 bits of this operand are used in the comparison.276/// \param __b277/// A 128-bit vector of [2 x double] containing one of the operands. The278/// lower 64 bits of this operand are used in the comparison.279/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the280/// minimum value between both operands. The upper 64 bits are copied from281/// the upper 64 bits of the first source operand.282static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a,283 __m128d __b) {284 return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);285}286 287/// Performs element-by-element comparison of the two 128-bit vectors of288/// [2 x double] and returns a vector containing the lesser of each pair of289/// values.290///291/// If either value in a comparison is NaN, returns the value from \a __b.292///293/// \headerfile <x86intrin.h>294///295/// This intrinsic corresponds to the <c> VMINPD / MINPD </c> instruction.296///297/// \param __a298/// A 128-bit vector of [2 x double] containing one of the operands.299/// \param __b300/// A 128-bit vector of [2 x double] containing one of the operands.301/// \returns A 128-bit vector of [2 x double] containing the minimum values302/// between both operands.303static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a,304 __m128d __b) {305 return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);306}307 308/// Compares lower 64-bit double-precision values of both operands, and309/// returns the greater of the pair of values in the lower 64-bits of the310/// result. The upper 64 bits of the result are copied from the upper311/// double-precision value of the first operand.312///313/// If either value in a comparison is NaN, returns the value from \a __b.314///315/// \headerfile <x86intrin.h>316///317/// This intrinsic corresponds to the <c> VMAXSD / MAXSD </c> instruction.318///319/// \param __a320/// A 128-bit vector of [2 x double] containing one of the operands. The321/// lower 64 bits of this operand are used in the comparison.322/// \param __b323/// A 128-bit vector of [2 x double] containing one of the operands. The324/// lower 64 bits of this operand are used in the comparison.325/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the326/// maximum value between both operands. The upper 64 bits are copied from327/// the upper 64 bits of the first source operand.328static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a,329 __m128d __b) {330 return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);331}332 333/// Performs element-by-element comparison of the two 128-bit vectors of334/// [2 x double] and returns a vector containing the greater of each pair335/// of values.336///337/// If either value in a comparison is NaN, returns the value from \a __b.338///339/// \headerfile <x86intrin.h>340///341/// This intrinsic corresponds to the <c> VMAXPD / MAXPD </c> instruction.342///343/// \param __a344/// A 128-bit vector of [2 x double] containing one of the operands.345/// \param __b346/// A 128-bit vector of [2 x double] containing one of the operands.347/// \returns A 128-bit vector of [2 x double] containing the maximum values348/// between both operands.349static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a,350 __m128d __b) {351 return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);352}353 354/// Performs a bitwise AND of two 128-bit vectors of [2 x double].355///356/// \headerfile <x86intrin.h>357///358/// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.359///360/// \param __a361/// A 128-bit vector of [2 x double] containing one of the source operands.362/// \param __b363/// A 128-bit vector of [2 x double] containing one of the source operands.364/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the365/// values between both operands.366static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_and_pd(__m128d __a,367 __m128d __b) {368 return (__m128d)((__v2du)__a & (__v2du)__b);369}370 371/// Performs a bitwise AND of two 128-bit vectors of [2 x double], using372/// the one's complement of the values contained in the first source operand.373///374/// \headerfile <x86intrin.h>375///376/// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.377///378/// \param __a379/// A 128-bit vector of [2 x double] containing the left source operand. The380/// one's complement of this value is used in the bitwise AND.381/// \param __b382/// A 128-bit vector of [2 x double] containing the right source operand.383/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the384/// values in the second operand and the one's complement of the first385/// operand.386static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR387_mm_andnot_pd(__m128d __a, __m128d __b) {388 return (__m128d)(~(__v2du)__a & (__v2du)__b);389}390 391/// Performs a bitwise OR of two 128-bit vectors of [2 x double].392///393/// \headerfile <x86intrin.h>394///395/// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.396///397/// \param __a398/// A 128-bit vector of [2 x double] containing one of the source operands.399/// \param __b400/// A 128-bit vector of [2 x double] containing one of the source operands.401/// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the402/// values between both operands.403static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_or_pd(__m128d __a,404 __m128d __b) {405 return (__m128d)((__v2du)__a | (__v2du)__b);406}407 408/// Performs a bitwise XOR of two 128-bit vectors of [2 x double].409///410/// \headerfile <x86intrin.h>411///412/// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.413///414/// \param __a415/// A 128-bit vector of [2 x double] containing one of the source operands.416/// \param __b417/// A 128-bit vector of [2 x double] containing one of the source operands.418/// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the419/// values between both operands.420static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_xor_pd(__m128d __a,421 __m128d __b) {422 return (__m128d)((__v2du)__a ^ (__v2du)__b);423}424 425/// Compares each of the corresponding double-precision values of the426/// 128-bit vectors of [2 x double] for equality.427///428/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.429/// If either value in a comparison is NaN, returns false.430///431/// \headerfile <x86intrin.h>432///433/// This intrinsic corresponds to the <c> VCMPEQPD / CMPEQPD </c> instruction.434///435/// \param __a436/// A 128-bit vector of [2 x double].437/// \param __b438/// A 128-bit vector of [2 x double].439/// \returns A 128-bit vector containing the comparison results.440static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_pd(__m128d __a,441 __m128d __b) {442 return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);443}444 445/// Compares each of the corresponding double-precision values of the446/// 128-bit vectors of [2 x double] to determine if the values in the first447/// operand are less than those in the second operand.448///449/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.450/// If either value in a comparison is NaN, returns false.451///452/// \headerfile <x86intrin.h>453///454/// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.455///456/// \param __a457/// A 128-bit vector of [2 x double].458/// \param __b459/// A 128-bit vector of [2 x double].460/// \returns A 128-bit vector containing the comparison results.461static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_pd(__m128d __a,462 __m128d __b) {463 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);464}465 466/// Compares each of the corresponding double-precision values of the467/// 128-bit vectors of [2 x double] to determine if the values in the first468/// operand are less than or equal to those in the second operand.469///470/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.471/// If either value in a comparison is NaN, returns false.472///473/// \headerfile <x86intrin.h>474///475/// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.476///477/// \param __a478/// A 128-bit vector of [2 x double].479/// \param __b480/// A 128-bit vector of [2 x double].481/// \returns A 128-bit vector containing the comparison results.482static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_pd(__m128d __a,483 __m128d __b) {484 return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);485}486 487/// Compares each of the corresponding double-precision values of the488/// 128-bit vectors of [2 x double] to determine if the values in the first489/// operand are greater than those in the second operand.490///491/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.492/// If either value in a comparison is NaN, returns false.493///494/// \headerfile <x86intrin.h>495///496/// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.497///498/// \param __a499/// A 128-bit vector of [2 x double].500/// \param __b501/// A 128-bit vector of [2 x double].502/// \returns A 128-bit vector containing the comparison results.503static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_pd(__m128d __a,504 __m128d __b) {505 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);506}507 508/// Compares each of the corresponding double-precision values of the509/// 128-bit vectors of [2 x double] to determine if the values in the first510/// operand are greater than or equal to those in the second operand.511///512/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.513/// If either value in a comparison is NaN, returns false.514///515/// \headerfile <x86intrin.h>516///517/// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.518///519/// \param __a520/// A 128-bit vector of [2 x double].521/// \param __b522/// A 128-bit vector of [2 x double].523/// \returns A 128-bit vector containing the comparison results.524static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_pd(__m128d __a,525 __m128d __b) {526 return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);527}528 529/// Compares each of the corresponding double-precision values of the530/// 128-bit vectors of [2 x double] to determine if the values in the first531/// operand are ordered with respect to those in the second operand.532///533/// A pair of double-precision values are ordered with respect to each534/// other if neither value is a NaN. Each comparison returns 0x0 for false,535/// 0xFFFFFFFFFFFFFFFF for true.536///537/// \headerfile <x86intrin.h>538///539/// This intrinsic corresponds to the <c> VCMPORDPD / CMPORDPD </c> instruction.540///541/// \param __a542/// A 128-bit vector of [2 x double].543/// \param __b544/// A 128-bit vector of [2 x double].545/// \returns A 128-bit vector containing the comparison results.546static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_pd(__m128d __a,547 __m128d __b) {548 return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);549}550 551/// Compares each of the corresponding double-precision values of the552/// 128-bit vectors of [2 x double] to determine if the values in the first553/// operand are unordered with respect to those in the second operand.554///555/// A pair of double-precision values are unordered with respect to each556/// other if one or both values are NaN. Each comparison returns 0x0 for557/// false, 0xFFFFFFFFFFFFFFFF for true.558///559/// \headerfile <x86intrin.h>560///561/// This intrinsic corresponds to the <c> VCMPUNORDPD / CMPUNORDPD </c>562/// instruction.563///564/// \param __a565/// A 128-bit vector of [2 x double].566/// \param __b567/// A 128-bit vector of [2 x double].568/// \returns A 128-bit vector containing the comparison results.569static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_pd(__m128d __a,570 __m128d __b) {571 return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);572}573 574/// Compares each of the corresponding double-precision values of the575/// 128-bit vectors of [2 x double] to determine if the values in the first576/// operand are unequal to those in the second operand.577///578/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.579/// If either value in a comparison is NaN, returns true.580///581/// \headerfile <x86intrin.h>582///583/// This intrinsic corresponds to the <c> VCMPNEQPD / CMPNEQPD </c> instruction.584///585/// \param __a586/// A 128-bit vector of [2 x double].587/// \param __b588/// A 128-bit vector of [2 x double].589/// \returns A 128-bit vector containing the comparison results.590static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_pd(__m128d __a,591 __m128d __b) {592 return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);593}594 595/// Compares each of the corresponding double-precision values of the596/// 128-bit vectors of [2 x double] to determine if the values in the first597/// operand are not less than those in the second operand.598///599/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.600/// If either value in a comparison is NaN, returns true.601///602/// \headerfile <x86intrin.h>603///604/// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.605///606/// \param __a607/// A 128-bit vector of [2 x double].608/// \param __b609/// A 128-bit vector of [2 x double].610/// \returns A 128-bit vector containing the comparison results.611static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_pd(__m128d __a,612 __m128d __b) {613 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);614}615 616/// Compares each of the corresponding double-precision values of the617/// 128-bit vectors of [2 x double] to determine if the values in the first618/// operand are not less than or equal to those in the second operand.619///620/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.621/// If either value in a comparison is NaN, returns true.622///623/// \headerfile <x86intrin.h>624///625/// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.626///627/// \param __a628/// A 128-bit vector of [2 x double].629/// \param __b630/// A 128-bit vector of [2 x double].631/// \returns A 128-bit vector containing the comparison results.632static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_pd(__m128d __a,633 __m128d __b) {634 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);635}636 637/// Compares each of the corresponding double-precision values of the638/// 128-bit vectors of [2 x double] to determine if the values in the first639/// operand are not greater than those in the second operand.640///641/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.642/// If either value in a comparison is NaN, returns true.643///644/// \headerfile <x86intrin.h>645///646/// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.647///648/// \param __a649/// A 128-bit vector of [2 x double].650/// \param __b651/// A 128-bit vector of [2 x double].652/// \returns A 128-bit vector containing the comparison results.653static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_pd(__m128d __a,654 __m128d __b) {655 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);656}657 658/// Compares each of the corresponding double-precision values of the659/// 128-bit vectors of [2 x double] to determine if the values in the first660/// operand are not greater than or equal to those in the second operand.661///662/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.663/// If either value in a comparison is NaN, returns true.664///665/// \headerfile <x86intrin.h>666///667/// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.668///669/// \param __a670/// A 128-bit vector of [2 x double].671/// \param __b672/// A 128-bit vector of [2 x double].673/// \returns A 128-bit vector containing the comparison results.674static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_pd(__m128d __a,675 __m128d __b) {676 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);677}678 679/// Compares the lower double-precision floating-point values in each of680/// the two 128-bit floating-point vectors of [2 x double] for equality.681///682/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.683/// If either value in a comparison is NaN, returns false.684///685/// \headerfile <x86intrin.h>686///687/// This intrinsic corresponds to the <c> VCMPEQSD / CMPEQSD </c> instruction.688///689/// \param __a690/// A 128-bit vector of [2 x double]. The lower double-precision value is691/// compared to the lower double-precision value of \a __b.692/// \param __b693/// A 128-bit vector of [2 x double]. The lower double-precision value is694/// compared to the lower double-precision value of \a __a.695/// \returns A 128-bit vector. The lower 64 bits contains the comparison696/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.697static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_sd(__m128d __a,698 __m128d __b) {699 return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);700}701 702/// Compares the lower double-precision floating-point values in each of703/// the two 128-bit floating-point vectors of [2 x double] to determine if704/// the value in the first parameter is less than the corresponding value in705/// the second parameter.706///707/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.708/// If either value in a comparison is NaN, returns false.709///710/// \headerfile <x86intrin.h>711///712/// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.713///714/// \param __a715/// A 128-bit vector of [2 x double]. The lower double-precision value is716/// compared to the lower double-precision value of \a __b.717/// \param __b718/// A 128-bit vector of [2 x double]. The lower double-precision value is719/// compared to the lower double-precision value of \a __a.720/// \returns A 128-bit vector. The lower 64 bits contains the comparison721/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.722static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_sd(__m128d __a,723 __m128d __b) {724 return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);725}726 727/// Compares the lower double-precision floating-point values in each of728/// the two 128-bit floating-point vectors of [2 x double] to determine if729/// the value in the first parameter is less than or equal to the730/// corresponding value in the second parameter.731///732/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.733/// If either value in a comparison is NaN, returns false.734///735/// \headerfile <x86intrin.h>736///737/// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.738///739/// \param __a740/// A 128-bit vector of [2 x double]. The lower double-precision value is741/// compared to the lower double-precision value of \a __b.742/// \param __b743/// A 128-bit vector of [2 x double]. The lower double-precision value is744/// compared to the lower double-precision value of \a __a.745/// \returns A 128-bit vector. The lower 64 bits contains the comparison746/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.747static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_sd(__m128d __a,748 __m128d __b) {749 return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);750}751 752/// Compares the lower double-precision floating-point values in each of753/// the two 128-bit floating-point vectors of [2 x double] to determine if754/// the value in the first parameter is greater than the corresponding value755/// in the second parameter.756///757/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.758/// If either value in a comparison is NaN, returns false.759///760/// \headerfile <x86intrin.h>761///762/// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.763///764/// \param __a765/// A 128-bit vector of [2 x double]. The lower double-precision value is766/// compared to the lower double-precision value of \a __b.767/// \param __b768/// A 128-bit vector of [2 x double]. The lower double-precision value is769/// compared to the lower double-precision value of \a __a.770/// \returns A 128-bit vector. The lower 64 bits contains the comparison771/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.772static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_sd(__m128d __a,773 __m128d __b) {774 __m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);775 return __extension__(__m128d){__c[0], __a[1]};776}777 778/// Compares the lower double-precision floating-point values in each of779/// the two 128-bit floating-point vectors of [2 x double] to determine if780/// the value in the first parameter is greater than or equal to the781/// corresponding value in the second parameter.782///783/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.784/// If either value in a comparison is NaN, returns false.785///786/// \headerfile <x86intrin.h>787///788/// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.789///790/// \param __a791/// A 128-bit vector of [2 x double]. The lower double-precision value is792/// compared to the lower double-precision value of \a __b.793/// \param __b794/// A 128-bit vector of [2 x double]. The lower double-precision value is795/// compared to the lower double-precision value of \a __a.796/// \returns A 128-bit vector. The lower 64 bits contains the comparison797/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.798static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_sd(__m128d __a,799 __m128d __b) {800 __m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);801 return __extension__(__m128d){__c[0], __a[1]};802}803 804/// Compares the lower double-precision floating-point values in each of805/// the two 128-bit floating-point vectors of [2 x double] to determine if806/// the value in the first parameter is ordered with respect to the807/// corresponding value in the second parameter.808///809/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair810/// of double-precision values are ordered with respect to each other if811/// neither value is a NaN.812///813/// \headerfile <x86intrin.h>814///815/// This intrinsic corresponds to the <c> VCMPORDSD / CMPORDSD </c> instruction.816///817/// \param __a818/// A 128-bit vector of [2 x double]. The lower double-precision value is819/// compared to the lower double-precision value of \a __b.820/// \param __b821/// A 128-bit vector of [2 x double]. The lower double-precision value is822/// compared to the lower double-precision value of \a __a.823/// \returns A 128-bit vector. The lower 64 bits contains the comparison824/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.825static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_sd(__m128d __a,826 __m128d __b) {827 return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);828}829 830/// Compares the lower double-precision floating-point values in each of831/// the two 128-bit floating-point vectors of [2 x double] to determine if832/// the value in the first parameter is unordered with respect to the833/// corresponding value in the second parameter.834///835/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair836/// of double-precision values are unordered with respect to each other if837/// one or both values are NaN.838///839/// \headerfile <x86intrin.h>840///841/// This intrinsic corresponds to the <c> VCMPUNORDSD / CMPUNORDSD </c>842/// instruction.843///844/// \param __a845/// A 128-bit vector of [2 x double]. The lower double-precision value is846/// compared to the lower double-precision value of \a __b.847/// \param __b848/// A 128-bit vector of [2 x double]. The lower double-precision value is849/// compared to the lower double-precision value of \a __a.850/// \returns A 128-bit vector. The lower 64 bits contains the comparison851/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.852static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_sd(__m128d __a,853 __m128d __b) {854 return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);855}856 857/// Compares the lower double-precision floating-point values in each of858/// the two 128-bit floating-point vectors of [2 x double] to determine if859/// the value in the first parameter is unequal to the corresponding value in860/// the second parameter.861///862/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.863/// If either value in a comparison is NaN, returns true.864///865/// \headerfile <x86intrin.h>866///867/// This intrinsic corresponds to the <c> VCMPNEQSD / CMPNEQSD </c> instruction.868///869/// \param __a870/// A 128-bit vector of [2 x double]. The lower double-precision value is871/// compared to the lower double-precision value of \a __b.872/// \param __b873/// A 128-bit vector of [2 x double]. The lower double-precision value is874/// compared to the lower double-precision value of \a __a.875/// \returns A 128-bit vector. The lower 64 bits contains the comparison876/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.877static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_sd(__m128d __a,878 __m128d __b) {879 return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);880}881 882/// Compares the lower double-precision floating-point values in each of883/// the two 128-bit floating-point vectors of [2 x double] to determine if884/// the value in the first parameter is not less than the corresponding885/// value in the second parameter.886///887/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.888/// If either value in a comparison is NaN, returns true.889///890/// \headerfile <x86intrin.h>891///892/// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.893///894/// \param __a895/// A 128-bit vector of [2 x double]. The lower double-precision value is896/// compared to the lower double-precision value of \a __b.897/// \param __b898/// A 128-bit vector of [2 x double]. The lower double-precision value is899/// compared to the lower double-precision value of \a __a.900/// \returns A 128-bit vector. The lower 64 bits contains the comparison901/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.902static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_sd(__m128d __a,903 __m128d __b) {904 return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);905}906 907/// Compares the lower double-precision floating-point values in each of908/// the two 128-bit floating-point vectors of [2 x double] to determine if909/// the value in the first parameter is not less than or equal to the910/// corresponding value in the second parameter.911///912/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.913/// If either value in a comparison is NaN, returns true.914///915/// \headerfile <x86intrin.h>916///917/// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.918///919/// \param __a920/// A 128-bit vector of [2 x double]. The lower double-precision value is921/// compared to the lower double-precision value of \a __b.922/// \param __b923/// A 128-bit vector of [2 x double]. The lower double-precision value is924/// compared to the lower double-precision value of \a __a.925/// \returns A 128-bit vector. The lower 64 bits contains the comparison926/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.927static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_sd(__m128d __a,928 __m128d __b) {929 return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);930}931 932/// Compares the lower double-precision floating-point values in each of933/// the two 128-bit floating-point vectors of [2 x double] to determine if934/// the value in the first parameter is not greater than the corresponding935/// value in the second parameter.936///937/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.938/// If either value in a comparison is NaN, returns true.939///940/// \headerfile <x86intrin.h>941///942/// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.943///944/// \param __a945/// A 128-bit vector of [2 x double]. The lower double-precision value is946/// compared to the lower double-precision value of \a __b.947/// \param __b948/// A 128-bit vector of [2 x double]. The lower double-precision value is949/// compared to the lower double-precision value of \a __a.950/// \returns A 128-bit vector. The lower 64 bits contains the comparison951/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.952static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_sd(__m128d __a,953 __m128d __b) {954 __m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);955 return __extension__(__m128d){__c[0], __a[1]};956}957 958/// Compares the lower double-precision floating-point values in each of959/// the two 128-bit floating-point vectors of [2 x double] to determine if960/// the value in the first parameter is not greater than or equal to the961/// corresponding value in the second parameter.962///963/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.964/// If either value in a comparison is NaN, returns true.965///966/// \headerfile <x86intrin.h>967///968/// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.969///970/// \param __a971/// A 128-bit vector of [2 x double]. The lower double-precision value is972/// compared to the lower double-precision value of \a __b.973/// \param __b974/// A 128-bit vector of [2 x double]. The lower double-precision value is975/// compared to the lower double-precision value of \a __a.976/// \returns A 128-bit vector. The lower 64 bits contains the comparison977/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.978static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_sd(__m128d __a,979 __m128d __b) {980 __m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);981 return __extension__(__m128d){__c[0], __a[1]};982}983 984/// Compares the lower double-precision floating-point values in each of985/// the two 128-bit floating-point vectors of [2 x double] for equality.986///987/// The comparison returns 0 for false, 1 for true. If either value in a988/// comparison is NaN, returns 0.989///990/// \headerfile <x86intrin.h>991///992/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.993///994/// \param __a995/// A 128-bit vector of [2 x double]. The lower double-precision value is996/// compared to the lower double-precision value of \a __b.997/// \param __b998/// A 128-bit vector of [2 x double]. The lower double-precision value is999/// compared to the lower double-precision value of \a __a.1000/// \returns An integer containing the comparison results.1001static __inline__ int __DEFAULT_FN_ATTRS _mm_comieq_sd(__m128d __a,1002 __m128d __b) {1003 return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);1004}1005 1006/// Compares the lower double-precision floating-point values in each of1007/// the two 128-bit floating-point vectors of [2 x double] to determine if1008/// the value in the first parameter is less than the corresponding value in1009/// the second parameter.1010///1011/// The comparison returns 0 for false, 1 for true. If either value in a1012/// comparison is NaN, returns 0.1013///1014/// \headerfile <x86intrin.h>1015///1016/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.1017///1018/// \param __a1019/// A 128-bit vector of [2 x double]. The lower double-precision value is1020/// compared to the lower double-precision value of \a __b.1021/// \param __b1022/// A 128-bit vector of [2 x double]. The lower double-precision value is1023/// compared to the lower double-precision value of \a __a.1024/// \returns An integer containing the comparison results.1025static __inline__ int __DEFAULT_FN_ATTRS _mm_comilt_sd(__m128d __a,1026 __m128d __b) {1027 return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);1028}1029 1030/// Compares the lower double-precision floating-point values in each of1031/// the two 128-bit floating-point vectors of [2 x double] to determine if1032/// the value in the first parameter is less than or equal to the1033/// corresponding value in the second parameter.1034///1035/// The comparison returns 0 for false, 1 for true. If either value in a1036/// comparison is NaN, returns 0.1037///1038/// \headerfile <x86intrin.h>1039///1040/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.1041///1042/// \param __a1043/// A 128-bit vector of [2 x double]. The lower double-precision value is1044/// compared to the lower double-precision value of \a __b.1045/// \param __b1046/// A 128-bit vector of [2 x double]. The lower double-precision value is1047/// compared to the lower double-precision value of \a __a.1048/// \returns An integer containing the comparison results.1049static __inline__ int __DEFAULT_FN_ATTRS _mm_comile_sd(__m128d __a,1050 __m128d __b) {1051 return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);1052}1053 1054/// Compares the lower double-precision floating-point values in each of1055/// the two 128-bit floating-point vectors of [2 x double] to determine if1056/// the value in the first parameter is greater than the corresponding value1057/// in the second parameter.1058///1059/// The comparison returns 0 for false, 1 for true. If either value in a1060/// comparison is NaN, returns 0.1061///1062/// \headerfile <x86intrin.h>1063///1064/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.1065///1066/// \param __a1067/// A 128-bit vector of [2 x double]. The lower double-precision value is1068/// compared to the lower double-precision value of \a __b.1069/// \param __b1070/// A 128-bit vector of [2 x double]. The lower double-precision value is1071/// compared to the lower double-precision value of \a __a.1072/// \returns An integer containing the comparison results.1073static __inline__ int __DEFAULT_FN_ATTRS _mm_comigt_sd(__m128d __a,1074 __m128d __b) {1075 return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);1076}1077 1078/// Compares the lower double-precision floating-point values in each of1079/// the two 128-bit floating-point vectors of [2 x double] to determine if1080/// the value in the first parameter is greater than or equal to the1081/// corresponding value in the second parameter.1082///1083/// The comparison returns 0 for false, 1 for true. If either value in a1084/// comparison is NaN, returns 0.1085///1086/// \headerfile <x86intrin.h>1087///1088/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.1089///1090/// \param __a1091/// A 128-bit vector of [2 x double]. The lower double-precision value is1092/// compared to the lower double-precision value of \a __b.1093/// \param __b1094/// A 128-bit vector of [2 x double]. The lower double-precision value is1095/// compared to the lower double-precision value of \a __a.1096/// \returns An integer containing the comparison results.1097static __inline__ int __DEFAULT_FN_ATTRS _mm_comige_sd(__m128d __a,1098 __m128d __b) {1099 return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);1100}1101 1102/// Compares the lower double-precision floating-point values in each of1103/// the two 128-bit floating-point vectors of [2 x double] to determine if1104/// the value in the first parameter is unequal to the corresponding value in1105/// the second parameter.1106///1107/// The comparison returns 0 for false, 1 for true. If either value in a1108/// comparison is NaN, returns 1.1109///1110/// \headerfile <x86intrin.h>1111///1112/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.1113///1114/// \param __a1115/// A 128-bit vector of [2 x double]. The lower double-precision value is1116/// compared to the lower double-precision value of \a __b.1117/// \param __b1118/// A 128-bit vector of [2 x double]. The lower double-precision value is1119/// compared to the lower double-precision value of \a __a.1120/// \returns An integer containing the comparison results.1121static __inline__ int __DEFAULT_FN_ATTRS _mm_comineq_sd(__m128d __a,1122 __m128d __b) {1123 return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);1124}1125 1126/// Compares the lower double-precision floating-point values in each of1127/// the two 128-bit floating-point vectors of [2 x double] for equality.1128///1129/// The comparison returns 0 for false, 1 for true. If either value in a1130/// comparison is NaN, returns 0.1131///1132/// \headerfile <x86intrin.h>1133///1134/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.1135///1136/// \param __a1137/// A 128-bit vector of [2 x double]. The lower double-precision value is1138/// compared to the lower double-precision value of \a __b.1139/// \param __b1140/// A 128-bit vector of [2 x double]. The lower double-precision value is1141/// compared to the lower double-precision value of \a __a.1142/// \returns An integer containing the comparison results.1143static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomieq_sd(__m128d __a,1144 __m128d __b) {1145 return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);1146}1147 1148/// Compares the lower double-precision floating-point values in each of1149/// the two 128-bit floating-point vectors of [2 x double] to determine if1150/// the value in the first parameter is less than the corresponding value in1151/// the second parameter.1152///1153/// The comparison returns 0 for false, 1 for true. If either value in a1154/// comparison is NaN, returns 0.1155///1156/// \headerfile <x86intrin.h>1157///1158/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.1159///1160/// \param __a1161/// A 128-bit vector of [2 x double]. The lower double-precision value is1162/// compared to the lower double-precision value of \a __b.1163/// \param __b1164/// A 128-bit vector of [2 x double]. The lower double-precision value is1165/// compared to the lower double-precision value of \a __a.1166/// \returns An integer containing the comparison results.1167static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomilt_sd(__m128d __a,1168 __m128d __b) {1169 return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);1170}1171 1172/// Compares the lower double-precision floating-point values in each of1173/// the two 128-bit floating-point vectors of [2 x double] to determine if1174/// the value in the first parameter is less than or equal to the1175/// corresponding value in the second parameter.1176///1177/// The comparison returns 0 for false, 1 for true. If either value in a1178/// comparison is NaN, returns 0.1179///1180/// \headerfile <x86intrin.h>1181///1182/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.1183///1184/// \param __a1185/// A 128-bit vector of [2 x double]. The lower double-precision value is1186/// compared to the lower double-precision value of \a __b.1187/// \param __b1188/// A 128-bit vector of [2 x double]. The lower double-precision value is1189/// compared to the lower double-precision value of \a __a.1190/// \returns An integer containing the comparison results.1191static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomile_sd(__m128d __a,1192 __m128d __b) {1193 return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);1194}1195 1196/// Compares the lower double-precision floating-point values in each of1197/// the two 128-bit floating-point vectors of [2 x double] to determine if1198/// the value in the first parameter is greater than the corresponding value1199/// in the second parameter.1200///1201/// The comparison returns 0 for false, 1 for true. If either value in a1202/// comparison is NaN, returns 0.1203///1204/// \headerfile <x86intrin.h>1205///1206/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.1207///1208/// \param __a1209/// A 128-bit vector of [2 x double]. The lower double-precision value is1210/// compared to the lower double-precision value of \a __b.1211/// \param __b1212/// A 128-bit vector of [2 x double]. The lower double-precision value is1213/// compared to the lower double-precision value of \a __a.1214/// \returns An integer containing the comparison results.1215static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomigt_sd(__m128d __a,1216 __m128d __b) {1217 return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);1218}1219 1220/// Compares the lower double-precision floating-point values in each of1221/// the two 128-bit floating-point vectors of [2 x double] to determine if1222/// the value in the first parameter is greater than or equal to the1223/// corresponding value in the second parameter.1224///1225/// The comparison returns 0 for false, 1 for true. If either value in a1226/// comparison is NaN, returns 0.1227///1228/// \headerfile <x86intrin.h>1229///1230/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.1231///1232/// \param __a1233/// A 128-bit vector of [2 x double]. The lower double-precision value is1234/// compared to the lower double-precision value of \a __b.1235/// \param __b1236/// A 128-bit vector of [2 x double]. The lower double-precision value is1237/// compared to the lower double-precision value of \a __a.1238/// \returns An integer containing the comparison results.1239static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomige_sd(__m128d __a,1240 __m128d __b) {1241 return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);1242}1243 1244/// Compares the lower double-precision floating-point values in each of1245/// the two 128-bit floating-point vectors of [2 x double] to determine if1246/// the value in the first parameter is unequal to the corresponding value in1247/// the second parameter.1248///1249/// The comparison returns 0 for false, 1 for true. If either value in a1250/// comparison is NaN, returns 1.1251///1252/// \headerfile <x86intrin.h>1253///1254/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.1255///1256/// \param __a1257/// A 128-bit vector of [2 x double]. The lower double-precision value is1258/// compared to the lower double-precision value of \a __b.1259/// \param __b1260/// A 128-bit vector of [2 x double]. The lower double-precision value is1261/// compared to the lower double-precision value of \a __a.1262/// \returns An integer containing the comparison result.1263static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a,1264 __m128d __b) {1265 return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);1266}1267 1268/// Converts the two double-precision floating-point elements of a1269/// 128-bit vector of [2 x double] into two single-precision floating-point1270/// values, returned in the lower 64 bits of a 128-bit vector of [4 x float].1271/// The upper 64 bits of the result vector are set to zero.1272///1273/// \headerfile <x86intrin.h>1274///1275/// This intrinsic corresponds to the <c> VCVTPD2PS / CVTPD2PS </c> instruction.1276///1277/// \param __a1278/// A 128-bit vector of [2 x double].1279/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the1280/// converted values. The upper 64 bits are set to zero.1281static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtpd_ps(__m128d __a) {1282 return __builtin_ia32_cvtpd2ps((__v2df)__a);1283}1284 1285/// Converts the lower two single-precision floating-point elements of a1286/// 128-bit vector of [4 x float] into two double-precision floating-point1287/// values, returned in a 128-bit vector of [2 x double]. The upper two1288/// elements of the input vector are unused.1289///1290/// \headerfile <x86intrin.h>1291///1292/// This intrinsic corresponds to the <c> VCVTPS2PD / CVTPS2PD </c> instruction.1293///1294/// \param __a1295/// A 128-bit vector of [4 x float]. The lower two single-precision1296/// floating-point elements are converted to double-precision values. The1297/// upper two elements are unused.1298/// \returns A 128-bit vector of [2 x double] containing the converted values.1299static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR1300_mm_cvtps_pd(__m128 __a) {1301 return (__m128d) __builtin_convertvector(1302 __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);1303}1304 1305/// Converts the lower two integer elements of a 128-bit vector of1306/// [4 x i32] into two double-precision floating-point values, returned in a1307/// 128-bit vector of [2 x double].1308///1309/// The upper two elements of the input vector are unused.1310///1311/// \headerfile <x86intrin.h>1312///1313/// This intrinsic corresponds to the <c> VCVTDQ2PD / CVTDQ2PD </c> instruction.1314///1315/// \param __a1316/// A 128-bit integer vector of [4 x i32]. The lower two integer elements are1317/// converted to double-precision values.1318///1319/// The upper two elements are unused.1320/// \returns A 128-bit vector of [2 x double] containing the converted values.1321static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR1322_mm_cvtepi32_pd(__m128i __a) {1323 return (__m128d) __builtin_convertvector(1324 __builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);1325}1326 1327/// Converts the two double-precision floating-point elements of a1328/// 128-bit vector of [2 x double] into two signed 32-bit integer values,1329/// returned in the lower 64 bits of a 128-bit vector of [4 x i32]. The upper1330/// 64 bits of the result vector are set to zero.1331///1332/// If a converted value does not fit in a 32-bit integer, raises a1333/// floating-point invalid exception. If the exception is masked, returns1334/// the most negative integer.1335///1336/// \headerfile <x86intrin.h>1337///1338/// This intrinsic corresponds to the <c> VCVTPD2DQ / CVTPD2DQ </c> instruction.1339///1340/// \param __a1341/// A 128-bit vector of [2 x double].1342/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the1343/// converted values. The upper 64 bits are set to zero.1344static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi32(__m128d __a) {1345 return __builtin_ia32_cvtpd2dq((__v2df)__a);1346}1347 1348/// Converts the low-order element of a 128-bit vector of [2 x double]1349/// into a 32-bit signed integer value.1350///1351/// If the converted value does not fit in a 32-bit integer, raises a1352/// floating-point invalid exception. If the exception is masked, returns1353/// the most negative integer.1354///1355/// \headerfile <x86intrin.h>1356///1357/// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.1358///1359/// \param __a1360/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the1361/// conversion.1362/// \returns A 32-bit signed integer containing the converted value.1363static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) {1364 return __builtin_ia32_cvtsd2si((__v2df)__a);1365}1366 1367/// Converts the lower double-precision floating-point element of a1368/// 128-bit vector of [2 x double], in the second parameter, into a1369/// single-precision floating-point value, returned in the lower 32 bits of a1370/// 128-bit vector of [4 x float]. The upper 96 bits of the result vector are1371/// copied from the upper 96 bits of the first parameter.1372///1373/// \headerfile <x86intrin.h>1374///1375/// This intrinsic corresponds to the <c> VCVTSD2SS / CVTSD2SS </c> instruction.1376///1377/// \param __a1378/// A 128-bit vector of [4 x float]. The upper 96 bits of this parameter are1379/// copied to the upper 96 bits of the result.1380/// \param __b1381/// A 128-bit vector of [2 x double]. The lower double-precision1382/// floating-point element is used in the conversion.1383/// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the1384/// converted value from the second parameter. The upper 96 bits are copied1385/// from the upper 96 bits of the first parameter.1386static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtsd_ss(__m128 __a,1387 __m128d __b) {1388 return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);1389}1390 1391/// Converts a 32-bit signed integer value, in the second parameter, into1392/// a double-precision floating-point value, returned in the lower 64 bits of1393/// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector1394/// are copied from the upper 64 bits of the first parameter.1395///1396/// \headerfile <x86intrin.h>1397///1398/// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.1399///1400/// \param __a1401/// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are1402/// copied to the upper 64 bits of the result.1403/// \param __b1404/// A 32-bit signed integer containing the value to be converted.1405/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the1406/// converted value from the second parameter. The upper 64 bits are copied1407/// from the upper 64 bits of the first parameter.1408static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR1409_mm_cvtsi32_sd(__m128d __a, int __b) {1410 __a[0] = __b;1411 return __a;1412}1413 1414/// Converts the lower single-precision floating-point element of a1415/// 128-bit vector of [4 x float], in the second parameter, into a1416/// double-precision floating-point value, returned in the lower 64 bits of1417/// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector1418/// are copied from the upper 64 bits of the first parameter.1419///1420/// \headerfile <x86intrin.h>1421///1422/// This intrinsic corresponds to the <c> VCVTSS2SD / CVTSS2SD </c> instruction.1423///1424/// \param __a1425/// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are1426/// copied to the upper 64 bits of the result.1427/// \param __b1428/// A 128-bit vector of [4 x float]. The lower single-precision1429/// floating-point element is used in the conversion.1430/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the1431/// converted value from the second parameter. The upper 64 bits are copied1432/// from the upper 64 bits of the first parameter.1433static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR1434_mm_cvtss_sd(__m128d __a, __m128 __b) {1435 __a[0] = __b[0];1436 return __a;1437}1438 1439/// Converts the two double-precision floating-point elements of a1440/// 128-bit vector of [2 x double] into two signed truncated (rounded1441/// toward zero) 32-bit integer values, returned in the lower 64 bits1442/// of a 128-bit vector of [4 x i32].1443///1444/// If a converted value does not fit in a 32-bit integer, raises a1445/// floating-point invalid exception. If the exception is masked, returns1446/// the most negative integer.1447///1448/// \headerfile <x86intrin.h>1449///1450/// This intrinsic corresponds to the <c> VCVTTPD2DQ / CVTTPD2DQ </c>1451/// instruction.1452///1453/// \param __a1454/// A 128-bit vector of [2 x double].1455/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the1456/// converted values. The upper 64 bits are set to zero.1457static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi32(__m128d __a) {1458 return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);1459}1460 1461/// Converts the low-order element of a [2 x double] vector into a 32-bit1462/// signed truncated (rounded toward zero) integer value.1463///1464/// If the converted value does not fit in a 32-bit integer, raises a1465/// floating-point invalid exception. If the exception is masked, returns1466/// the most negative integer.1467///1468/// \headerfile <x86intrin.h>1469///1470/// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>1471/// instruction.1472///1473/// \param __a1474/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the1475/// conversion.1476/// \returns A 32-bit signed integer containing the converted value.1477static __inline__ int __DEFAULT_FN_ATTRS _mm_cvttsd_si32(__m128d __a) {1478 return __builtin_ia32_cvttsd2si((__v2df)__a);1479}1480 1481/// Converts the two double-precision floating-point elements of a1482/// 128-bit vector of [2 x double] into two signed 32-bit integer values,1483/// returned in a 64-bit vector of [2 x i32].1484///1485/// If a converted value does not fit in a 32-bit integer, raises a1486/// floating-point invalid exception. If the exception is masked, returns1487/// the most negative integer.1488///1489/// \headerfile <x86intrin.h>1490///1491/// This intrinsic corresponds to the <c> CVTPD2PI </c> instruction.1492///1493/// \param __a1494/// A 128-bit vector of [2 x double].1495/// \returns A 64-bit vector of [2 x i32] containing the converted values.1496static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_cvtpd_pi32(__m128d __a) {1497 return __trunc64(__builtin_ia32_cvtpd2dq((__v2df)__a));1498}1499 1500/// Converts the two double-precision floating-point elements of a1501/// 128-bit vector of [2 x double] into two signed truncated (rounded toward1502/// zero) 32-bit integer values, returned in a 64-bit vector of [2 x i32].1503///1504/// If a converted value does not fit in a 32-bit integer, raises a1505/// floating-point invalid exception. If the exception is masked, returns1506/// the most negative integer.1507///1508/// \headerfile <x86intrin.h>1509///1510/// This intrinsic corresponds to the <c> CVTTPD2PI </c> instruction.1511///1512/// \param __a1513/// A 128-bit vector of [2 x double].1514/// \returns A 64-bit vector of [2 x i32] containing the converted values.1515static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_cvttpd_pi32(__m128d __a) {1516 return __trunc64(__builtin_ia32_cvttpd2dq((__v2df)__a));1517}1518 1519/// Converts the two signed 32-bit integer elements of a 64-bit vector of1520/// [2 x i32] into two double-precision floating-point values, returned in a1521/// 128-bit vector of [2 x double].1522///1523/// \headerfile <x86intrin.h>1524///1525/// This intrinsic corresponds to the <c> CVTPI2PD </c> instruction.1526///1527/// \param __a1528/// A 64-bit vector of [2 x i32].1529/// \returns A 128-bit vector of [2 x double] containing the converted values.1530static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR1531_mm_cvtpi32_pd(__m64 __a) {1532 return (__m128d) __builtin_convertvector((__v2si)__a, __v2df);1533}1534 1535/// Returns the low-order element of a 128-bit vector of [2 x double] as1536/// a double-precision floating-point value.1537///1538/// \headerfile <x86intrin.h>1539///1540/// This intrinsic has no corresponding instruction.1541///1542/// \param __a1543/// A 128-bit vector of [2 x double]. The lower 64 bits are returned.1544/// \returns A double-precision floating-point value copied from the lower 641545/// bits of \a __a.1546static __inline__ double __DEFAULT_FN_ATTRS_CONSTEXPR1547_mm_cvtsd_f64(__m128d __a) {1548 return __a[0];1549}1550 1551/// Loads a 128-bit floating-point vector of [2 x double] from an aligned1552/// memory location.1553///1554/// \headerfile <x86intrin.h>1555///1556/// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.1557///1558/// \param __dp1559/// A pointer to a 128-bit memory location. The address of the memory1560/// location has to be 16-byte aligned.1561/// \returns A 128-bit vector of [2 x double] containing the loaded values.1562static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_pd(double const *__dp) {1563 return *(const __m128d *)__dp;1564}1565 1566/// Loads a double-precision floating-point value from a specified memory1567/// location and duplicates it to both vector elements of a 128-bit vector of1568/// [2 x double].1569///1570/// \headerfile <x86intrin.h>1571///1572/// This intrinsic corresponds to the <c> VMOVDDUP / MOVDDUP </c> instruction.1573///1574/// \param __dp1575/// A pointer to a memory location containing a double-precision value.1576/// \returns A 128-bit vector of [2 x double] containing the loaded and1577/// duplicated values.1578static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load1_pd(double const *__dp) {1579 struct __mm_load1_pd_struct {1580 double __u;1581 } __attribute__((__packed__, __may_alias__));1582 double __u = ((const struct __mm_load1_pd_struct *)__dp)->__u;1583 return __extension__(__m128d){__u, __u};1584}1585 1586#define _mm_load_pd1(dp) _mm_load1_pd(dp)1587 1588/// Loads two double-precision values, in reverse order, from an aligned1589/// memory location into a 128-bit vector of [2 x double].1590///1591/// \headerfile <x86intrin.h>1592///1593/// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction +1594/// needed shuffling instructions. In AVX mode, the shuffling may be combined1595/// with the \c VMOVAPD, resulting in only a \c VPERMILPD instruction.1596///1597/// \param __dp1598/// A 16-byte aligned pointer to an array of double-precision values to be1599/// loaded in reverse order.1600/// \returns A 128-bit vector of [2 x double] containing the reversed loaded1601/// values.1602static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadr_pd(double const *__dp) {1603 __m128d __u = *(const __m128d *)__dp;1604 return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);1605}1606 1607/// Loads a 128-bit floating-point vector of [2 x double] from an1608/// unaligned memory location.1609///1610/// \headerfile <x86intrin.h>1611///1612/// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.1613///1614/// \param __dp1615/// A pointer to a 128-bit memory location. The address of the memory1616/// location does not have to be aligned.1617/// \returns A 128-bit vector of [2 x double] containing the loaded values.1618static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadu_pd(double const *__dp) {1619 struct __loadu_pd {1620 __m128d_u __v;1621 } __attribute__((__packed__, __may_alias__));1622 return ((const struct __loadu_pd *)__dp)->__v;1623}1624 1625/// Loads a 64-bit integer value to the low element of a 128-bit integer1626/// vector and clears the upper element.1627///1628/// \headerfile <x86intrin.h>1629///1630/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.1631///1632/// \param __a1633/// A pointer to a 64-bit memory location. The address of the memory1634/// location does not have to be aligned.1635/// \returns A 128-bit vector of [2 x i64] containing the loaded value.1636static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si64(void const *__a) {1637 struct __loadu_si64 {1638 long long __v;1639 } __attribute__((__packed__, __may_alias__));1640 long long __u = ((const struct __loadu_si64 *)__a)->__v;1641 return __extension__(__m128i)(__v2di){__u, 0LL};1642}1643 1644/// Loads a 32-bit integer value to the low element of a 128-bit integer1645/// vector and clears the upper element.1646///1647/// \headerfile <x86intrin.h>1648///1649/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.1650///1651/// \param __a1652/// A pointer to a 32-bit memory location. The address of the memory1653/// location does not have to be aligned.1654/// \returns A 128-bit vector of [4 x i32] containing the loaded value.1655static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si32(void const *__a) {1656 struct __loadu_si32 {1657 int __v;1658 } __attribute__((__packed__, __may_alias__));1659 int __u = ((const struct __loadu_si32 *)__a)->__v;1660 return __extension__(__m128i)(__v4si){__u, 0, 0, 0};1661}1662 1663/// Loads a 16-bit integer value to the low element of a 128-bit integer1664/// vector and clears the upper element.1665///1666/// \headerfile <x86intrin.h>1667///1668/// This intrinsic does not correspond to a specific instruction.1669///1670/// \param __a1671/// A pointer to a 16-bit memory location. The address of the memory1672/// location does not have to be aligned.1673/// \returns A 128-bit vector of [8 x i16] containing the loaded value.1674static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si16(void const *__a) {1675 struct __loadu_si16 {1676 short __v;1677 } __attribute__((__packed__, __may_alias__));1678 short __u = ((const struct __loadu_si16 *)__a)->__v;1679 return __extension__(__m128i)(__v8hi){__u, 0, 0, 0, 0, 0, 0, 0};1680}1681 1682/// Loads a 64-bit double-precision value to the low element of a1683/// 128-bit integer vector and clears the upper element.1684///1685/// \headerfile <x86intrin.h>1686///1687/// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.1688///1689/// \param __dp1690/// A pointer to a memory location containing a double-precision value.1691/// The address of the memory location does not have to be aligned.1692/// \returns A 128-bit vector of [2 x double] containing the loaded value.1693static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_sd(double const *__dp) {1694 struct __mm_load_sd_struct {1695 double __u;1696 } __attribute__((__packed__, __may_alias__));1697 double __u = ((const struct __mm_load_sd_struct *)__dp)->__u;1698 return __extension__(__m128d){__u, 0};1699}1700 1701/// Loads a double-precision value into the high-order bits of a 128-bit1702/// vector of [2 x double]. The low-order bits are copied from the low-order1703/// bits of the first operand.1704///1705/// \headerfile <x86intrin.h>1706///1707/// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.1708///1709/// \param __a1710/// A 128-bit vector of [2 x double]. \n1711/// Bits [63:0] are written to bits [63:0] of the result.1712/// \param __dp1713/// A pointer to a 64-bit memory location containing a double-precision1714/// floating-point value that is loaded. The loaded value is written to bits1715/// [127:64] of the result. The address of the memory location does not have1716/// to be aligned.1717/// \returns A 128-bit vector of [2 x double] containing the moved values.1718static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadh_pd(__m128d __a,1719 double const *__dp) {1720 struct __mm_loadh_pd_struct {1721 double __u;1722 } __attribute__((__packed__, __may_alias__));1723 double __u = ((const struct __mm_loadh_pd_struct *)__dp)->__u;1724 return __extension__(__m128d){__a[0], __u};1725}1726 1727/// Loads a double-precision value into the low-order bits of a 128-bit1728/// vector of [2 x double]. The high-order bits are copied from the1729/// high-order bits of the first operand.1730///1731/// \headerfile <x86intrin.h>1732///1733/// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.1734///1735/// \param __a1736/// A 128-bit vector of [2 x double]. \n1737/// Bits [127:64] are written to bits [127:64] of the result.1738/// \param __dp1739/// A pointer to a 64-bit memory location containing a double-precision1740/// floating-point value that is loaded. The loaded value is written to bits1741/// [63:0] of the result. The address of the memory location does not have to1742/// be aligned.1743/// \returns A 128-bit vector of [2 x double] containing the moved values.1744static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadl_pd(__m128d __a,1745 double const *__dp) {1746 struct __mm_loadl_pd_struct {1747 double __u;1748 } __attribute__((__packed__, __may_alias__));1749 double __u = ((const struct __mm_loadl_pd_struct *)__dp)->__u;1750 return __extension__(__m128d){__u, __a[1]};1751}1752 1753/// Constructs a 128-bit floating-point vector of [2 x double] with1754/// unspecified content. This could be used as an argument to another1755/// intrinsic function where the argument is required but the value is not1756/// actually used.1757///1758/// \headerfile <x86intrin.h>1759///1760/// This intrinsic has no corresponding instruction.1761///1762/// \returns A 128-bit floating-point vector of [2 x double] with unspecified1763/// content.1764static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_undefined_pd(void) {1765 return (__m128d)__builtin_ia32_undef128();1766}1767 1768/// Constructs a 128-bit floating-point vector of [2 x double]. The lower1769/// 64 bits of the vector are initialized with the specified double-precision1770/// floating-point value. The upper 64 bits are set to zero.1771///1772/// \headerfile <x86intrin.h>1773///1774/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.1775///1776/// \param __w1777/// A double-precision floating-point value used to initialize the lower 641778/// bits of the result.1779/// \returns An initialized 128-bit floating-point vector of [2 x double]. The1780/// lower 64 bits contain the value of the parameter. The upper 64 bits are1781/// set to zero.1782static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set_sd(double __w) {1783 return __extension__(__m128d){__w, 0.0};1784}1785 1786/// Constructs a 128-bit floating-point vector of [2 x double], with each1787/// of the two double-precision floating-point vector elements set to the1788/// specified double-precision floating-point value.1789///1790/// \headerfile <x86intrin.h>1791///1792/// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.1793///1794/// \param __w1795/// A double-precision floating-point value used to initialize each vector1796/// element of the result.1797/// \returns An initialized 128-bit floating-point vector of [2 x double].1798static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set1_pd(double __w) {1799 return __extension__(__m128d){__w, __w};1800}1801 1802/// Constructs a 128-bit floating-point vector of [2 x double], with each1803/// of the two double-precision floating-point vector elements set to the1804/// specified double-precision floating-point value.1805///1806/// \headerfile <x86intrin.h>1807///1808/// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.1809///1810/// \param __w1811/// A double-precision floating-point value used to initialize each vector1812/// element of the result.1813/// \returns An initialized 128-bit floating-point vector of [2 x double].1814static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set_pd1(double __w) {1815 return _mm_set1_pd(__w);1816}1817 1818/// Constructs a 128-bit floating-point vector of [2 x double]1819/// initialized with the specified double-precision floating-point values.1820///1821/// \headerfile <x86intrin.h>1822///1823/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.1824///1825/// \param __w1826/// A double-precision floating-point value used to initialize the upper 641827/// bits of the result.1828/// \param __x1829/// A double-precision floating-point value used to initialize the lower 641830/// bits of the result.1831/// \returns An initialized 128-bit floating-point vector of [2 x double].1832static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set_pd(double __w,1833 double __x) {1834 return __extension__(__m128d){__x, __w};1835}1836 1837/// Constructs a 128-bit floating-point vector of [2 x double],1838/// initialized in reverse order with the specified double-precision1839/// floating-point values.1840///1841/// \headerfile <x86intrin.h>1842///1843/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.1844///1845/// \param __w1846/// A double-precision floating-point value used to initialize the lower 641847/// bits of the result.1848/// \param __x1849/// A double-precision floating-point value used to initialize the upper 641850/// bits of the result.1851/// \returns An initialized 128-bit floating-point vector of [2 x double].1852static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_setr_pd(double __w,1853 double __x) {1854 return __extension__(__m128d){__w, __x};1855}1856 1857/// Constructs a 128-bit floating-point vector of [2 x double]1858/// initialized to zero.1859///1860/// \headerfile <x86intrin.h>1861///1862/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.1863///1864/// \returns An initialized 128-bit floating-point vector of [2 x double] with1865/// all elements set to zero.1866static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_setzero_pd(void) {1867 return __extension__(__m128d){0.0, 0.0};1868}1869 1870/// Constructs a 128-bit floating-point vector of [2 x double]. The lower1871/// 64 bits are set to the lower 64 bits of the second parameter. The upper1872/// 64 bits are set to the upper 64 bits of the first parameter.1873///1874/// \headerfile <x86intrin.h>1875///1876/// This intrinsic corresponds to the <c> VBLENDPD / BLENDPD </c> instruction.1877///1878/// \param __a1879/// A 128-bit vector of [2 x double]. The upper 64 bits are written to the1880/// upper 64 bits of the result.1881/// \param __b1882/// A 128-bit vector of [2 x double]. The lower 64 bits are written to the1883/// lower 64 bits of the result.1884/// \returns A 128-bit vector of [2 x double] containing the moved values.1885static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR1886_mm_move_sd(__m128d __a, __m128d __b) {1887 __a[0] = __b[0];1888 return __a;1889}1890 1891/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a1892/// memory location.1893///1894/// \headerfile <x86intrin.h>1895///1896/// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.1897///1898/// \param __dp1899/// A pointer to a 64-bit memory location.1900/// \param __a1901/// A 128-bit vector of [2 x double] containing the value to be stored.1902static __inline__ void __DEFAULT_FN_ATTRS _mm_store_sd(double *__dp,1903 __m128d __a) {1904 struct __mm_store_sd_struct {1905 double __u;1906 } __attribute__((__packed__, __may_alias__));1907 ((struct __mm_store_sd_struct *)__dp)->__u = __a[0];1908}1909 1910/// Moves packed double-precision values from a 128-bit vector of1911/// [2 x double] to a memory location.1912///1913/// \headerfile <x86intrin.h>1914///1915/// This intrinsic corresponds to the <c>VMOVAPD / MOVAPS</c> instruction.1916///1917/// \param __dp1918/// A pointer to an aligned memory location that can store two1919/// double-precision values.1920/// \param __a1921/// A packed 128-bit vector of [2 x double] containing the values to be1922/// moved.1923static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd(double *__dp,1924 __m128d __a) {1925 *(__m128d *)__dp = __a;1926}1927 1928/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to1929/// the upper and lower 64 bits of a memory location.1930///1931/// \headerfile <x86intrin.h>1932///1933/// This intrinsic corresponds to the1934/// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.1935///1936/// \param __dp1937/// A pointer to a memory location that can store two double-precision1938/// values.1939/// \param __a1940/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each1941/// of the values in \a __dp.1942static __inline__ void __DEFAULT_FN_ATTRS _mm_store1_pd(double *__dp,1943 __m128d __a) {1944 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);1945 _mm_store_pd(__dp, __a);1946}1947 1948/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to1949/// the upper and lower 64 bits of a memory location.1950///1951/// \headerfile <x86intrin.h>1952///1953/// This intrinsic corresponds to the1954/// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.1955///1956/// \param __dp1957/// A pointer to a memory location that can store two double-precision1958/// values.1959/// \param __a1960/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each1961/// of the values in \a __dp.1962static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd1(double *__dp,1963 __m128d __a) {1964 _mm_store1_pd(__dp, __a);1965}1966 1967/// Stores a 128-bit vector of [2 x double] into an unaligned memory1968/// location.1969///1970/// \headerfile <x86intrin.h>1971///1972/// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.1973///1974/// \param __dp1975/// A pointer to a 128-bit memory location. The address of the memory1976/// location does not have to be aligned.1977/// \param __a1978/// A 128-bit vector of [2 x double] containing the values to be stored.1979static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_pd(double *__dp,1980 __m128d __a) {1981 struct __storeu_pd {1982 __m128d_u __v;1983 } __attribute__((__packed__, __may_alias__));1984 ((struct __storeu_pd *)__dp)->__v = __a;1985}1986 1987/// Stores two double-precision values, in reverse order, from a 128-bit1988/// vector of [2 x double] to a 16-byte aligned memory location.1989///1990/// \headerfile <x86intrin.h>1991///1992/// This intrinsic corresponds to a shuffling instruction followed by a1993/// <c> VMOVAPD / MOVAPD </c> instruction.1994///1995/// \param __dp1996/// A pointer to a 16-byte aligned memory location that can store two1997/// double-precision values.1998/// \param __a1999/// A 128-bit vector of [2 x double] containing the values to be reversed and2000/// stored.2001static __inline__ void __DEFAULT_FN_ATTRS _mm_storer_pd(double *__dp,2002 __m128d __a) {2003 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);2004 *(__m128d *)__dp = __a;2005}2006 2007/// Stores the upper 64 bits of a 128-bit vector of [2 x double] to a2008/// memory location.2009///2010/// \headerfile <x86intrin.h>2011///2012/// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.2013///2014/// \param __dp2015/// A pointer to a 64-bit memory location.2016/// \param __a2017/// A 128-bit vector of [2 x double] containing the value to be stored.2018static __inline__ void __DEFAULT_FN_ATTRS _mm_storeh_pd(double *__dp,2019 __m128d __a) {2020 struct __mm_storeh_pd_struct {2021 double __u;2022 } __attribute__((__packed__, __may_alias__));2023 ((struct __mm_storeh_pd_struct *)__dp)->__u = __a[1];2024}2025 2026/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a2027/// memory location.2028///2029/// \headerfile <x86intrin.h>2030///2031/// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.2032///2033/// \param __dp2034/// A pointer to a 64-bit memory location.2035/// \param __a2036/// A 128-bit vector of [2 x double] containing the value to be stored.2037static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp,2038 __m128d __a) {2039 struct __mm_storeh_pd_struct {2040 double __u;2041 } __attribute__((__packed__, __may_alias__));2042 ((struct __mm_storeh_pd_struct *)__dp)->__u = __a[0];2043}2044 2045/// Adds the corresponding elements of two 128-bit vectors of [16 x i8],2046/// saving the lower 8 bits of each sum in the corresponding element of a2047/// 128-bit result vector of [16 x i8].2048///2049/// The integer elements of both parameters can be either signed or unsigned.2050///2051/// \headerfile <x86intrin.h>2052///2053/// This intrinsic corresponds to the <c> VPADDB / PADDB </c> instruction.2054///2055/// \param __a2056/// A 128-bit vector of [16 x i8].2057/// \param __b2058/// A 128-bit vector of [16 x i8].2059/// \returns A 128-bit vector of [16 x i8] containing the sums of both2060/// parameters.2061static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2062_mm_add_epi8(__m128i __a, __m128i __b) {2063 return (__m128i)((__v16qu)__a + (__v16qu)__b);2064}2065 2066/// Adds the corresponding elements of two 128-bit vectors of [8 x i16],2067/// saving the lower 16 bits of each sum in the corresponding element of a2068/// 128-bit result vector of [8 x i16].2069///2070/// The integer elements of both parameters can be either signed or unsigned.2071///2072/// \headerfile <x86intrin.h>2073///2074/// This intrinsic corresponds to the <c> VPADDW / PADDW </c> instruction.2075///2076/// \param __a2077/// A 128-bit vector of [8 x i16].2078/// \param __b2079/// A 128-bit vector of [8 x i16].2080/// \returns A 128-bit vector of [8 x i16] containing the sums of both2081/// parameters.2082static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2083_mm_add_epi16(__m128i __a, __m128i __b) {2084 return (__m128i)((__v8hu)__a + (__v8hu)__b);2085}2086 2087/// Adds the corresponding elements of two 128-bit vectors of [4 x i32],2088/// saving the lower 32 bits of each sum in the corresponding element of a2089/// 128-bit result vector of [4 x i32].2090///2091/// The integer elements of both parameters can be either signed or unsigned.2092///2093/// \headerfile <x86intrin.h>2094///2095/// This intrinsic corresponds to the <c> VPADDD / PADDD </c> instruction.2096///2097/// \param __a2098/// A 128-bit vector of [4 x i32].2099/// \param __b2100/// A 128-bit vector of [4 x i32].2101/// \returns A 128-bit vector of [4 x i32] containing the sums of both2102/// parameters.2103static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2104_mm_add_epi32(__m128i __a, __m128i __b) {2105 return (__m128i)((__v4su)__a + (__v4su)__b);2106}2107 2108/// Adds two signed or unsigned 64-bit integer values, returning the2109/// lower 64 bits of the sum.2110///2111/// \headerfile <x86intrin.h>2112///2113/// This intrinsic corresponds to the <c> PADDQ </c> instruction.2114///2115/// \param __a2116/// A 64-bit integer.2117/// \param __b2118/// A 64-bit integer.2119/// \returns A 64-bit integer containing the sum of both parameters.2120static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_si64(__m64 __a,2121 __m64 __b) {2122 return (__m64)(((__v1du)__a)[0] + ((__v1du)__b)[0]);2123}2124 2125/// Adds the corresponding elements of two 128-bit vectors of [2 x i64],2126/// saving the lower 64 bits of each sum in the corresponding element of a2127/// 128-bit result vector of [2 x i64].2128///2129/// The integer elements of both parameters can be either signed or unsigned.2130///2131/// \headerfile <x86intrin.h>2132///2133/// This intrinsic corresponds to the <c> VPADDQ / PADDQ </c> instruction.2134///2135/// \param __a2136/// A 128-bit vector of [2 x i64].2137/// \param __b2138/// A 128-bit vector of [2 x i64].2139/// \returns A 128-bit vector of [2 x i64] containing the sums of both2140/// parameters.2141static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2142_mm_add_epi64(__m128i __a, __m128i __b) {2143 return (__m128i)((__v2du)__a + (__v2du)__b);2144}2145 2146/// Adds, with saturation, the corresponding elements of two 128-bit2147/// signed [16 x i8] vectors, saving each sum in the corresponding element2148/// of a 128-bit result vector of [16 x i8].2149///2150/// Positive sums greater than 0x7F are saturated to 0x7F. Negative sums2151/// less than 0x80 are saturated to 0x80.2152///2153/// \headerfile <x86intrin.h>2154///2155/// This intrinsic corresponds to the <c> VPADDSB / PADDSB </c> instruction.2156///2157/// \param __a2158/// A 128-bit signed [16 x i8] vector.2159/// \param __b2160/// A 128-bit signed [16 x i8] vector.2161/// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of2162/// both parameters.2163static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2164_mm_adds_epi8(__m128i __a, __m128i __b) {2165 return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b);2166}2167 2168/// Adds, with saturation, the corresponding elements of two 128-bit2169/// signed [8 x i16] vectors, saving each sum in the corresponding element2170/// of a 128-bit result vector of [8 x i16].2171///2172/// Positive sums greater than 0x7FFF are saturated to 0x7FFF. Negative sums2173/// less than 0x8000 are saturated to 0x8000.2174///2175/// \headerfile <x86intrin.h>2176///2177/// This intrinsic corresponds to the <c> VPADDSW / PADDSW </c> instruction.2178///2179/// \param __a2180/// A 128-bit signed [8 x i16] vector.2181/// \param __b2182/// A 128-bit signed [8 x i16] vector.2183/// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of2184/// both parameters.2185static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2186_mm_adds_epi16(__m128i __a, __m128i __b) {2187 return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b);2188}2189 2190/// Adds, with saturation, the corresponding elements of two 128-bit2191/// unsigned [16 x i8] vectors, saving each sum in the corresponding element2192/// of a 128-bit result vector of [16 x i8].2193///2194/// Positive sums greater than 0xFF are saturated to 0xFF. Negative sums are2195/// saturated to 0x00.2196///2197/// \headerfile <x86intrin.h>2198///2199/// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.2200///2201/// \param __a2202/// A 128-bit unsigned [16 x i8] vector.2203/// \param __b2204/// A 128-bit unsigned [16 x i8] vector.2205/// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums2206/// of both parameters.2207static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2208_mm_adds_epu8(__m128i __a, __m128i __b) {2209 return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b);2210}2211 2212/// Adds, with saturation, the corresponding elements of two 128-bit2213/// unsigned [8 x i16] vectors, saving each sum in the corresponding element2214/// of a 128-bit result vector of [8 x i16].2215///2216/// Positive sums greater than 0xFFFF are saturated to 0xFFFF. Negative sums2217/// are saturated to 0x0000.2218///2219/// \headerfile <x86intrin.h>2220///2221/// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.2222///2223/// \param __a2224/// A 128-bit unsigned [8 x i16] vector.2225/// \param __b2226/// A 128-bit unsigned [8 x i16] vector.2227/// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums2228/// of both parameters.2229static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2230_mm_adds_epu16(__m128i __a, __m128i __b) {2231 return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b);2232}2233 2234/// Computes the rounded averages of corresponding elements of two2235/// 128-bit unsigned [16 x i8] vectors, saving each result in the2236/// corresponding element of a 128-bit result vector of [16 x i8].2237///2238/// \headerfile <x86intrin.h>2239///2240/// This intrinsic corresponds to the <c> VPAVGB / PAVGB </c> instruction.2241///2242/// \param __a2243/// A 128-bit unsigned [16 x i8] vector.2244/// \param __b2245/// A 128-bit unsigned [16 x i8] vector.2246/// \returns A 128-bit unsigned [16 x i8] vector containing the rounded2247/// averages of both parameters.2248static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2249_mm_avg_epu8(__m128i __a, __m128i __b) {2250 return (__m128i)__builtin_ia32_pavgb128((__v16qu)__a, (__v16qu)__b);2251}2252 2253/// Computes the rounded averages of corresponding elements of two2254/// 128-bit unsigned [8 x i16] vectors, saving each result in the2255/// corresponding element of a 128-bit result vector of [8 x i16].2256///2257/// \headerfile <x86intrin.h>2258///2259/// This intrinsic corresponds to the <c> VPAVGW / PAVGW </c> instruction.2260///2261/// \param __a2262/// A 128-bit unsigned [8 x i16] vector.2263/// \param __b2264/// A 128-bit unsigned [8 x i16] vector.2265/// \returns A 128-bit unsigned [8 x i16] vector containing the rounded2266/// averages of both parameters.2267static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2268_mm_avg_epu16(__m128i __a, __m128i __b) {2269 return (__m128i)__builtin_ia32_pavgw128((__v8hu)__a, (__v8hu)__b);2270}2271 2272/// Multiplies the corresponding elements of two 128-bit signed [8 x i16]2273/// vectors, producing eight intermediate 32-bit signed integer products, and2274/// adds the consecutive pairs of 32-bit products to form a 128-bit signed2275/// [4 x i32] vector.2276///2277/// For example, bits [15:0] of both parameters are multiplied producing a2278/// 32-bit product, bits [31:16] of both parameters are multiplied producing2279/// a 32-bit product, and the sum of those two products becomes bits [31:0]2280/// of the result.2281///2282/// \headerfile <x86intrin.h>2283///2284/// This intrinsic corresponds to the <c> VPMADDWD / PMADDWD </c> instruction.2285///2286/// \param __a2287/// A 128-bit signed [8 x i16] vector.2288/// \param __b2289/// A 128-bit signed [8 x i16] vector.2290/// \returns A 128-bit signed [4 x i32] vector containing the sums of products2291/// of both parameters.2292static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2293_mm_madd_epi16(__m128i __a, __m128i __b) {2294 return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);2295}2296 2297/// Compares corresponding elements of two 128-bit signed [8 x i16]2298/// vectors, saving the greater value from each comparison in the2299/// corresponding element of a 128-bit result vector of [8 x i16].2300///2301/// \headerfile <x86intrin.h>2302///2303/// This intrinsic corresponds to the <c> VPMAXSW / PMAXSW </c> instruction.2304///2305/// \param __a2306/// A 128-bit signed [8 x i16] vector.2307/// \param __b2308/// A 128-bit signed [8 x i16] vector.2309/// \returns A 128-bit signed [8 x i16] vector containing the greater value of2310/// each comparison.2311static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2312_mm_max_epi16(__m128i __a, __m128i __b) {2313 return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b);2314}2315 2316/// Compares corresponding elements of two 128-bit unsigned [16 x i8]2317/// vectors, saving the greater value from each comparison in the2318/// corresponding element of a 128-bit result vector of [16 x i8].2319///2320/// \headerfile <x86intrin.h>2321///2322/// This intrinsic corresponds to the <c> VPMAXUB / PMAXUB </c> instruction.2323///2324/// \param __a2325/// A 128-bit unsigned [16 x i8] vector.2326/// \param __b2327/// A 128-bit unsigned [16 x i8] vector.2328/// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of2329/// each comparison.2330static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2331_mm_max_epu8(__m128i __a, __m128i __b) {2332 return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b);2333}2334 2335/// Compares corresponding elements of two 128-bit signed [8 x i16]2336/// vectors, saving the smaller value from each comparison in the2337/// corresponding element of a 128-bit result vector of [8 x i16].2338///2339/// \headerfile <x86intrin.h>2340///2341/// This intrinsic corresponds to the <c> VPMINSW / PMINSW </c> instruction.2342///2343/// \param __a2344/// A 128-bit signed [8 x i16] vector.2345/// \param __b2346/// A 128-bit signed [8 x i16] vector.2347/// \returns A 128-bit signed [8 x i16] vector containing the smaller value of2348/// each comparison.2349static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2350_mm_min_epi16(__m128i __a, __m128i __b) {2351 return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b);2352}2353 2354/// Compares corresponding elements of two 128-bit unsigned [16 x i8]2355/// vectors, saving the smaller value from each comparison in the2356/// corresponding element of a 128-bit result vector of [16 x i8].2357///2358/// \headerfile <x86intrin.h>2359///2360/// This intrinsic corresponds to the <c> VPMINUB / PMINUB </c> instruction.2361///2362/// \param __a2363/// A 128-bit unsigned [16 x i8] vector.2364/// \param __b2365/// A 128-bit unsigned [16 x i8] vector.2366/// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of2367/// each comparison.2368static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2369_mm_min_epu8(__m128i __a, __m128i __b) {2370 return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b);2371}2372 2373/// Multiplies the corresponding elements of two signed [8 x i16]2374/// vectors, saving the upper 16 bits of each 32-bit product in the2375/// corresponding element of a 128-bit signed [8 x i16] result vector.2376///2377/// \headerfile <x86intrin.h>2378///2379/// This intrinsic corresponds to the <c> VPMULHW / PMULHW </c> instruction.2380///2381/// \param __a2382/// A 128-bit signed [8 x i16] vector.2383/// \param __b2384/// A 128-bit signed [8 x i16] vector.2385/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of2386/// each of the eight 32-bit products.2387static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2388_mm_mulhi_epi16(__m128i __a, __m128i __b) {2389 return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);2390}2391 2392/// Multiplies the corresponding elements of two unsigned [8 x i16]2393/// vectors, saving the upper 16 bits of each 32-bit product in the2394/// corresponding element of a 128-bit unsigned [8 x i16] result vector.2395///2396/// \headerfile <x86intrin.h>2397///2398/// This intrinsic corresponds to the <c> VPMULHUW / PMULHUW </c> instruction.2399///2400/// \param __a2401/// A 128-bit unsigned [8 x i16] vector.2402/// \param __b2403/// A 128-bit unsigned [8 x i16] vector.2404/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits2405/// of each of the eight 32-bit products.2406static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2407_mm_mulhi_epu16(__m128i __a, __m128i __b) {2408 return (__m128i)__builtin_ia32_pmulhuw128((__v8hu)__a, (__v8hu)__b);2409}2410 2411/// Multiplies the corresponding elements of two signed [8 x i16]2412/// vectors, saving the lower 16 bits of each 32-bit product in the2413/// corresponding element of a 128-bit signed [8 x i16] result vector.2414///2415/// \headerfile <x86intrin.h>2416///2417/// This intrinsic corresponds to the <c> VPMULLW / PMULLW </c> instruction.2418///2419/// \param __a2420/// A 128-bit signed [8 x i16] vector.2421/// \param __b2422/// A 128-bit signed [8 x i16] vector.2423/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of2424/// each of the eight 32-bit products.2425static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2426_mm_mullo_epi16(__m128i __a, __m128i __b) {2427 return (__m128i)((__v8hu)__a * (__v8hu)__b);2428}2429 2430/// Multiplies 32-bit unsigned integer values contained in the lower bits2431/// of the two 64-bit integer vectors and returns the 64-bit unsigned2432/// product.2433///2434/// \headerfile <x86intrin.h>2435///2436/// This intrinsic corresponds to the <c> PMULUDQ </c> instruction.2437///2438/// \param __a2439/// A 64-bit integer containing one of the source operands.2440/// \param __b2441/// A 64-bit integer containing one of the source operands.2442/// \returns A 64-bit integer vector containing the product of both operands.2443static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_su32(__m64 __a,2444 __m64 __b) {2445 return __trunc64(__builtin_ia32_pmuludq128((__v4si)__zext128(__a),2446 (__v4si)__zext128(__b)));2447}2448 2449/// Multiplies 32-bit unsigned integer values contained in the lower2450/// bits of the corresponding elements of two [2 x i64] vectors, and returns2451/// the 64-bit products in the corresponding elements of a [2 x i64] vector.2452///2453/// \headerfile <x86intrin.h>2454///2455/// This intrinsic corresponds to the <c> VPMULUDQ / PMULUDQ </c> instruction.2456///2457/// \param __a2458/// A [2 x i64] vector containing one of the source operands.2459/// \param __b2460/// A [2 x i64] vector containing one of the source operands.2461/// \returns A [2 x i64] vector containing the product of both operands.2462static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2463_mm_mul_epu32(__m128i __a, __m128i __b) {2464 return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);2465}2466 2467/// Computes the absolute differences of corresponding 8-bit integer2468/// values in two 128-bit vectors. Sums the first 8 absolute differences, and2469/// separately sums the second 8 absolute differences. Packs these two2470/// unsigned 16-bit integer sums into the upper and lower elements of a2471/// [2 x i64] vector.2472///2473/// \headerfile <x86intrin.h>2474///2475/// This intrinsic corresponds to the <c> VPSADBW / PSADBW </c> instruction.2476///2477/// \param __a2478/// A 128-bit integer vector containing one of the source operands.2479/// \param __b2480/// A 128-bit integer vector containing one of the source operands.2481/// \returns A [2 x i64] vector containing the sums of the sets of absolute2482/// differences between both operands.2483static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a,2484 __m128i __b) {2485 return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);2486}2487 2488/// Subtracts the corresponding 8-bit integer values in the operands.2489///2490/// \headerfile <x86intrin.h>2491///2492/// This intrinsic corresponds to the <c> VPSUBB / PSUBB </c> instruction.2493///2494/// \param __a2495/// A 128-bit integer vector containing the minuends.2496/// \param __b2497/// A 128-bit integer vector containing the subtrahends.2498/// \returns A 128-bit integer vector containing the differences of the values2499/// in the operands.2500static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2501_mm_sub_epi8(__m128i __a, __m128i __b) {2502 return (__m128i)((__v16qu)__a - (__v16qu)__b);2503}2504 2505/// Subtracts the corresponding 16-bit integer values in the operands.2506///2507/// \headerfile <x86intrin.h>2508///2509/// This intrinsic corresponds to the <c> VPSUBW / PSUBW </c> instruction.2510///2511/// \param __a2512/// A 128-bit integer vector containing the minuends.2513/// \param __b2514/// A 128-bit integer vector containing the subtrahends.2515/// \returns A 128-bit integer vector containing the differences of the values2516/// in the operands.2517static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2518_mm_sub_epi16(__m128i __a, __m128i __b) {2519 return (__m128i)((__v8hu)__a - (__v8hu)__b);2520}2521 2522/// Subtracts the corresponding 32-bit integer values in the operands.2523///2524/// \headerfile <x86intrin.h>2525///2526/// This intrinsic corresponds to the <c> VPSUBD / PSUBD </c> instruction.2527///2528/// \param __a2529/// A 128-bit integer vector containing the minuends.2530/// \param __b2531/// A 128-bit integer vector containing the subtrahends.2532/// \returns A 128-bit integer vector containing the differences of the values2533/// in the operands.2534static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2535_mm_sub_epi32(__m128i __a, __m128i __b) {2536 return (__m128i)((__v4su)__a - (__v4su)__b);2537}2538 2539/// Subtracts signed or unsigned 64-bit integer values and writes the2540/// difference to the corresponding bits in the destination.2541///2542/// \headerfile <x86intrin.h>2543///2544/// This intrinsic corresponds to the <c> PSUBQ </c> instruction.2545///2546/// \param __a2547/// A 64-bit integer vector containing the minuend.2548/// \param __b2549/// A 64-bit integer vector containing the subtrahend.2550/// \returns A 64-bit integer vector containing the difference of the values in2551/// the operands.2552static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_si64(__m64 __a,2553 __m64 __b) {2554 return (__m64)(((__v1du)__a)[0] - ((__v1du)__b)[0]);2555}2556 2557/// Subtracts the corresponding elements of two [2 x i64] vectors.2558///2559/// \headerfile <x86intrin.h>2560///2561/// This intrinsic corresponds to the <c> VPSUBQ / PSUBQ </c> instruction.2562///2563/// \param __a2564/// A 128-bit integer vector containing the minuends.2565/// \param __b2566/// A 128-bit integer vector containing the subtrahends.2567/// \returns A 128-bit integer vector containing the differences of the values2568/// in the operands.2569static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2570_mm_sub_epi64(__m128i __a, __m128i __b) {2571 return (__m128i)((__v2du)__a - (__v2du)__b);2572}2573 2574/// Subtracts, with saturation, corresponding 8-bit signed integer values in2575/// the input and returns the differences in the corresponding bytes in the2576/// destination.2577///2578/// Differences greater than 0x7F are saturated to 0x7F, and differences2579/// less than 0x80 are saturated to 0x80.2580///2581/// \headerfile <x86intrin.h>2582///2583/// This intrinsic corresponds to the <c> VPSUBSB / PSUBSB </c> instruction.2584///2585/// \param __a2586/// A 128-bit integer vector containing the minuends.2587/// \param __b2588/// A 128-bit integer vector containing the subtrahends.2589/// \returns A 128-bit integer vector containing the differences of the values2590/// in the operands.2591static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2592_mm_subs_epi8(__m128i __a, __m128i __b) {2593 return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b);2594}2595 2596/// Subtracts, with saturation, corresponding 16-bit signed integer values in2597/// the input and returns the differences in the corresponding bytes in the2598/// destination.2599///2600/// Differences greater than 0x7FFF are saturated to 0x7FFF, and values less2601/// than 0x8000 are saturated to 0x8000.2602///2603/// \headerfile <x86intrin.h>2604///2605/// This intrinsic corresponds to the <c> VPSUBSW / PSUBSW </c> instruction.2606///2607/// \param __a2608/// A 128-bit integer vector containing the minuends.2609/// \param __b2610/// A 128-bit integer vector containing the subtrahends.2611/// \returns A 128-bit integer vector containing the differences of the values2612/// in the operands.2613static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2614_mm_subs_epi16(__m128i __a, __m128i __b) {2615 return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b);2616}2617 2618/// Subtracts, with saturation, corresponding 8-bit unsigned integer values in2619/// the input and returns the differences in the corresponding bytes in the2620/// destination.2621///2622/// Differences less than 0x00 are saturated to 0x00.2623///2624/// \headerfile <x86intrin.h>2625///2626/// This intrinsic corresponds to the <c> VPSUBUSB / PSUBUSB </c> instruction.2627///2628/// \param __a2629/// A 128-bit integer vector containing the minuends.2630/// \param __b2631/// A 128-bit integer vector containing the subtrahends.2632/// \returns A 128-bit integer vector containing the unsigned integer2633/// differences of the values in the operands.2634static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2635_mm_subs_epu8(__m128i __a, __m128i __b) {2636 return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b);2637}2638 2639/// Subtracts, with saturation, corresponding 16-bit unsigned integer values in2640/// the input and returns the differences in the corresponding bytes in the2641/// destination.2642///2643/// Differences less than 0x0000 are saturated to 0x0000.2644///2645/// \headerfile <x86intrin.h>2646///2647/// This intrinsic corresponds to the <c> VPSUBUSW / PSUBUSW </c> instruction.2648///2649/// \param __a2650/// A 128-bit integer vector containing the minuends.2651/// \param __b2652/// A 128-bit integer vector containing the subtrahends.2653/// \returns A 128-bit integer vector containing the unsigned integer2654/// differences of the values in the operands.2655static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2656_mm_subs_epu16(__m128i __a, __m128i __b) {2657 return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b);2658}2659 2660/// Performs a bitwise AND of two 128-bit integer vectors.2661///2662/// \headerfile <x86intrin.h>2663///2664/// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.2665///2666/// \param __a2667/// A 128-bit integer vector containing one of the source operands.2668/// \param __b2669/// A 128-bit integer vector containing one of the source operands.2670/// \returns A 128-bit integer vector containing the bitwise AND of the values2671/// in both operands.2672static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2673_mm_and_si128(__m128i __a, __m128i __b) {2674 return (__m128i)((__v2du)__a & (__v2du)__b);2675}2676 2677/// Performs a bitwise AND of two 128-bit integer vectors, using the2678/// one's complement of the values contained in the first source operand.2679///2680/// \headerfile <x86intrin.h>2681///2682/// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.2683///2684/// \param __a2685/// A 128-bit vector containing the left source operand. The one's complement2686/// of this value is used in the bitwise AND.2687/// \param __b2688/// A 128-bit vector containing the right source operand.2689/// \returns A 128-bit integer vector containing the bitwise AND of the one's2690/// complement of the first operand and the values in the second operand.2691static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2692_mm_andnot_si128(__m128i __a, __m128i __b) {2693 return (__m128i)(~(__v2du)__a & (__v2du)__b);2694}2695/// Performs a bitwise OR of two 128-bit integer vectors.2696///2697/// \headerfile <x86intrin.h>2698///2699/// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.2700///2701/// \param __a2702/// A 128-bit integer vector containing one of the source operands.2703/// \param __b2704/// A 128-bit integer vector containing one of the source operands.2705/// \returns A 128-bit integer vector containing the bitwise OR of the values2706/// in both operands.2707static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2708_mm_or_si128(__m128i __a, __m128i __b) {2709 return (__m128i)((__v2du)__a | (__v2du)__b);2710}2711 2712/// Performs a bitwise exclusive OR of two 128-bit integer vectors.2713///2714/// \headerfile <x86intrin.h>2715///2716/// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.2717///2718/// \param __a2719/// A 128-bit integer vector containing one of the source operands.2720/// \param __b2721/// A 128-bit integer vector containing one of the source operands.2722/// \returns A 128-bit integer vector containing the bitwise exclusive OR of the2723/// values in both operands.2724static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2725_mm_xor_si128(__m128i __a, __m128i __b) {2726 return (__m128i)((__v2du)__a ^ (__v2du)__b);2727}2728 2729/// Left-shifts the 128-bit integer vector operand by the specified2730/// number of bytes. Low-order bits are cleared.2731///2732/// \headerfile <x86intrin.h>2733///2734/// \code2735/// __m128i _mm_slli_si128(__m128i a, const int imm);2736/// \endcode2737///2738/// This intrinsic corresponds to the <c> VPSLLDQ / PSLLDQ </c> instruction.2739///2740/// \param a2741/// A 128-bit integer vector containing the source operand.2742/// \param imm2743/// An immediate value specifying the number of bytes to left-shift operand2744/// \a a.2745/// \returns A 128-bit integer vector containing the left-shifted value.2746#define _mm_slli_si128(a, imm) \2747 ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)(__m128i)(a), \2748 (int)(imm)))2749 2750#define _mm_bslli_si128(a, imm) \2751 ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)(__m128i)(a), \2752 (int)(imm)))2753 2754/// Left-shifts each 16-bit value in the 128-bit integer vector operand2755/// by the specified number of bits. Low-order bits are cleared.2756///2757/// \headerfile <x86intrin.h>2758///2759/// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.2760///2761/// \param __a2762/// A 128-bit integer vector containing the source operand.2763/// \param __count2764/// An integer value specifying the number of bits to left-shift each value2765/// in operand \a __a.2766/// \returns A 128-bit integer vector containing the left-shifted values.2767static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2768_mm_slli_epi16(__m128i __a, int __count) {2769 return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);2770}2771 2772/// Left-shifts each 16-bit value in the 128-bit integer vector operand2773/// by the specified number of bits. Low-order bits are cleared.2774///2775/// \headerfile <x86intrin.h>2776///2777/// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.2778///2779/// \param __a2780/// A 128-bit integer vector containing the source operand.2781/// \param __count2782/// A 128-bit integer vector in which bits [63:0] specify the number of bits2783/// to left-shift each value in operand \a __a.2784/// \returns A 128-bit integer vector containing the left-shifted values.2785static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2786_mm_sll_epi16(__m128i __a, __m128i __count) {2787 return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);2788}2789 2790/// Left-shifts each 32-bit value in the 128-bit integer vector operand2791/// by the specified number of bits. Low-order bits are cleared.2792///2793/// \headerfile <x86intrin.h>2794///2795/// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.2796///2797/// \param __a2798/// A 128-bit integer vector containing the source operand.2799/// \param __count2800/// An integer value specifying the number of bits to left-shift each value2801/// in operand \a __a.2802/// \returns A 128-bit integer vector containing the left-shifted values.2803static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2804_mm_slli_epi32(__m128i __a, int __count) {2805 return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);2806}2807 2808/// Left-shifts each 32-bit value in the 128-bit integer vector operand2809/// by the specified number of bits. Low-order bits are cleared.2810///2811/// \headerfile <x86intrin.h>2812///2813/// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.2814///2815/// \param __a2816/// A 128-bit integer vector containing the source operand.2817/// \param __count2818/// A 128-bit integer vector in which bits [63:0] specify the number of bits2819/// to left-shift each value in operand \a __a.2820/// \returns A 128-bit integer vector containing the left-shifted values.2821static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2822_mm_sll_epi32(__m128i __a, __m128i __count) {2823 return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);2824}2825 2826/// Left-shifts each 64-bit value in the 128-bit integer vector operand2827/// by the specified number of bits. Low-order bits are cleared.2828///2829/// \headerfile <x86intrin.h>2830///2831/// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.2832///2833/// \param __a2834/// A 128-bit integer vector containing the source operand.2835/// \param __count2836/// An integer value specifying the number of bits to left-shift each value2837/// in operand \a __a.2838/// \returns A 128-bit integer vector containing the left-shifted values.2839static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2840_mm_slli_epi64(__m128i __a, int __count) {2841 return __builtin_ia32_psllqi128((__v2di)__a, __count);2842}2843 2844/// Left-shifts each 64-bit value in the 128-bit integer vector operand2845/// by the specified number of bits. Low-order bits are cleared.2846///2847/// \headerfile <x86intrin.h>2848///2849/// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.2850///2851/// \param __a2852/// A 128-bit integer vector containing the source operand.2853/// \param __count2854/// A 128-bit integer vector in which bits [63:0] specify the number of bits2855/// to left-shift each value in operand \a __a.2856/// \returns A 128-bit integer vector containing the left-shifted values.2857static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2858_mm_sll_epi64(__m128i __a, __m128i __count) {2859 return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);2860}2861 2862/// Right-shifts each 16-bit value in the 128-bit integer vector operand2863/// by the specified number of bits. High-order bits are filled with the sign2864/// bit of the initial value.2865///2866/// \headerfile <x86intrin.h>2867///2868/// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.2869///2870/// \param __a2871/// A 128-bit integer vector containing the source operand.2872/// \param __count2873/// An integer value specifying the number of bits to right-shift each value2874/// in operand \a __a.2875/// \returns A 128-bit integer vector containing the right-shifted values.2876static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2877_mm_srai_epi16(__m128i __a, int __count) {2878 return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);2879}2880 2881/// Right-shifts each 16-bit value in the 128-bit integer vector operand2882/// by the specified number of bits. High-order bits are filled with the sign2883/// bit of the initial value.2884///2885/// \headerfile <x86intrin.h>2886///2887/// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.2888///2889/// \param __a2890/// A 128-bit integer vector containing the source operand.2891/// \param __count2892/// A 128-bit integer vector in which bits [63:0] specify the number of bits2893/// to right-shift each value in operand \a __a.2894/// \returns A 128-bit integer vector containing the right-shifted values.2895static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2896_mm_sra_epi16(__m128i __a, __m128i __count) {2897 return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);2898}2899 2900/// Right-shifts each 32-bit value in the 128-bit integer vector operand2901/// by the specified number of bits. High-order bits are filled with the sign2902/// bit of the initial value.2903///2904/// \headerfile <x86intrin.h>2905///2906/// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.2907///2908/// \param __a2909/// A 128-bit integer vector containing the source operand.2910/// \param __count2911/// An integer value specifying the number of bits to right-shift each value2912/// in operand \a __a.2913/// \returns A 128-bit integer vector containing the right-shifted values.2914static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2915_mm_srai_epi32(__m128i __a, int __count) {2916 return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);2917}2918 2919/// Right-shifts each 32-bit value in the 128-bit integer vector operand2920/// by the specified number of bits. High-order bits are filled with the sign2921/// bit of the initial value.2922///2923/// \headerfile <x86intrin.h>2924///2925/// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.2926///2927/// \param __a2928/// A 128-bit integer vector containing the source operand.2929/// \param __count2930/// A 128-bit integer vector in which bits [63:0] specify the number of bits2931/// to right-shift each value in operand \a __a.2932/// \returns A 128-bit integer vector containing the right-shifted values.2933static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2934_mm_sra_epi32(__m128i __a, __m128i __count) {2935 return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);2936}2937 2938/// Right-shifts the 128-bit integer vector operand by the specified2939/// number of bytes. High-order bits are cleared.2940///2941/// \headerfile <x86intrin.h>2942///2943/// \code2944/// __m128i _mm_srli_si128(__m128i a, const int imm);2945/// \endcode2946///2947/// This intrinsic corresponds to the <c> VPSRLDQ / PSRLDQ </c> instruction.2948///2949/// \param a2950/// A 128-bit integer vector containing the source operand.2951/// \param imm2952/// An immediate value specifying the number of bytes to right-shift operand2953/// \a a.2954/// \returns A 128-bit integer vector containing the right-shifted value.2955#define _mm_srli_si128(a, imm) \2956 ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v16qi)(__m128i)(a), \2957 (int)(imm)))2958 2959#define _mm_bsrli_si128(a, imm) \2960 ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v16qi)(__m128i)(a), \2961 (int)(imm)))2962 2963/// Right-shifts each of 16-bit values in the 128-bit integer vector2964/// operand by the specified number of bits. High-order bits are cleared.2965///2966/// \headerfile <x86intrin.h>2967///2968/// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.2969///2970/// \param __a2971/// A 128-bit integer vector containing the source operand.2972/// \param __count2973/// An integer value specifying the number of bits to right-shift each value2974/// in operand \a __a.2975/// \returns A 128-bit integer vector containing the right-shifted values.2976static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2977_mm_srli_epi16(__m128i __a, int __count) {2978 return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);2979}2980 2981/// Right-shifts each of 16-bit values in the 128-bit integer vector2982/// operand by the specified number of bits. High-order bits are cleared.2983///2984/// \headerfile <x86intrin.h>2985///2986/// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.2987///2988/// \param __a2989/// A 128-bit integer vector containing the source operand.2990/// \param __count2991/// A 128-bit integer vector in which bits [63:0] specify the number of bits2992/// to right-shift each value in operand \a __a.2993/// \returns A 128-bit integer vector containing the right-shifted values.2994static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR2995_mm_srl_epi16(__m128i __a, __m128i __count) {2996 return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);2997}2998 2999/// Right-shifts each of 32-bit values in the 128-bit integer vector3000/// operand by the specified number of bits. High-order bits are cleared.3001///3002/// \headerfile <x86intrin.h>3003///3004/// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.3005///3006/// \param __a3007/// A 128-bit integer vector containing the source operand.3008/// \param __count3009/// An integer value specifying the number of bits to right-shift each value3010/// in operand \a __a.3011/// \returns A 128-bit integer vector containing the right-shifted values.3012static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3013_mm_srli_epi32(__m128i __a, int __count) {3014 return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);3015}3016 3017/// Right-shifts each of 32-bit values in the 128-bit integer vector3018/// operand by the specified number of bits. High-order bits are cleared.3019///3020/// \headerfile <x86intrin.h>3021///3022/// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.3023///3024/// \param __a3025/// A 128-bit integer vector containing the source operand.3026/// \param __count3027/// A 128-bit integer vector in which bits [63:0] specify the number of bits3028/// to right-shift each value in operand \a __a.3029/// \returns A 128-bit integer vector containing the right-shifted values.3030static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3031_mm_srl_epi32(__m128i __a, __m128i __count) {3032 return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);3033}3034 3035/// Right-shifts each of 64-bit values in the 128-bit integer vector3036/// operand by the specified number of bits. High-order bits are cleared.3037///3038/// \headerfile <x86intrin.h>3039///3040/// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.3041///3042/// \param __a3043/// A 128-bit integer vector containing the source operand.3044/// \param __count3045/// An integer value specifying the number of bits to right-shift each value3046/// in operand \a __a.3047/// \returns A 128-bit integer vector containing the right-shifted values.3048static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3049_mm_srli_epi64(__m128i __a, int __count) {3050 return __builtin_ia32_psrlqi128((__v2di)__a, __count);3051}3052 3053/// Right-shifts each of 64-bit values in the 128-bit integer vector3054/// operand by the specified number of bits. High-order bits are cleared.3055///3056/// \headerfile <x86intrin.h>3057///3058/// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.3059///3060/// \param __a3061/// A 128-bit integer vector containing the source operand.3062/// \param __count3063/// A 128-bit integer vector in which bits [63:0] specify the number of bits3064/// to right-shift each value in operand \a __a.3065/// \returns A 128-bit integer vector containing the right-shifted values.3066static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3067_mm_srl_epi64(__m128i __a, __m128i __count) {3068 return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);3069}3070 3071/// Compares each of the corresponding 8-bit values of the 128-bit3072/// integer vectors for equality.3073///3074/// Each comparison returns 0x0 for false, 0xFF for true.3075///3076/// \headerfile <x86intrin.h>3077///3078/// This intrinsic corresponds to the <c> VPCMPEQB / PCMPEQB </c> instruction.3079///3080/// \param __a3081/// A 128-bit integer vector.3082/// \param __b3083/// A 128-bit integer vector.3084/// \returns A 128-bit integer vector containing the comparison results.3085static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3086_mm_cmpeq_epi8(__m128i __a, __m128i __b) {3087 return (__m128i)((__v16qi)__a == (__v16qi)__b);3088}3089 3090/// Compares each of the corresponding 16-bit values of the 128-bit3091/// integer vectors for equality.3092///3093/// Each comparison returns 0x0 for false, 0xFFFF for true.3094///3095/// \headerfile <x86intrin.h>3096///3097/// This intrinsic corresponds to the <c> VPCMPEQW / PCMPEQW </c> instruction.3098///3099/// \param __a3100/// A 128-bit integer vector.3101/// \param __b3102/// A 128-bit integer vector.3103/// \returns A 128-bit integer vector containing the comparison results.3104static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3105_mm_cmpeq_epi16(__m128i __a, __m128i __b) {3106 return (__m128i)((__v8hi)__a == (__v8hi)__b);3107}3108 3109/// Compares each of the corresponding 32-bit values of the 128-bit3110/// integer vectors for equality.3111///3112/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true.3113///3114/// \headerfile <x86intrin.h>3115///3116/// This intrinsic corresponds to the <c> VPCMPEQD / PCMPEQD </c> instruction.3117///3118/// \param __a3119/// A 128-bit integer vector.3120/// \param __b3121/// A 128-bit integer vector.3122/// \returns A 128-bit integer vector containing the comparison results.3123static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3124_mm_cmpeq_epi32(__m128i __a, __m128i __b) {3125 return (__m128i)((__v4si)__a == (__v4si)__b);3126}3127 3128/// Compares each of the corresponding signed 8-bit values of the 128-bit3129/// integer vectors to determine if the values in the first operand are3130/// greater than those in the second operand.3131///3132/// Each comparison returns 0x0 for false, 0xFF for true.3133///3134/// \headerfile <x86intrin.h>3135///3136/// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.3137///3138/// \param __a3139/// A 128-bit integer vector.3140/// \param __b3141/// A 128-bit integer vector.3142/// \returns A 128-bit integer vector containing the comparison results.3143static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3144_mm_cmpgt_epi8(__m128i __a, __m128i __b) {3145 /* This function always performs a signed comparison, but __v16qi is a char3146 which may be signed or unsigned, so use __v16qs. */3147 return (__m128i)((__v16qs)__a > (__v16qs)__b);3148}3149 3150/// Compares each of the corresponding signed 16-bit values of the3151/// 128-bit integer vectors to determine if the values in the first operand3152/// are greater than those in the second operand.3153///3154/// Each comparison returns 0x0 for false, 0xFFFF for true.3155///3156/// \headerfile <x86intrin.h>3157///3158/// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.3159///3160/// \param __a3161/// A 128-bit integer vector.3162/// \param __b3163/// A 128-bit integer vector.3164/// \returns A 128-bit integer vector containing the comparison results.3165static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3166_mm_cmpgt_epi16(__m128i __a, __m128i __b) {3167 return (__m128i)((__v8hi)__a > (__v8hi)__b);3168}3169 3170/// Compares each of the corresponding signed 32-bit values of the3171/// 128-bit integer vectors to determine if the values in the first operand3172/// are greater than those in the second operand.3173///3174/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true.3175///3176/// \headerfile <x86intrin.h>3177///3178/// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.3179///3180/// \param __a3181/// A 128-bit integer vector.3182/// \param __b3183/// A 128-bit integer vector.3184/// \returns A 128-bit integer vector containing the comparison results.3185static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3186_mm_cmpgt_epi32(__m128i __a, __m128i __b) {3187 return (__m128i)((__v4si)__a > (__v4si)__b);3188}3189 3190/// Compares each of the corresponding signed 8-bit values of the 128-bit3191/// integer vectors to determine if the values in the first operand are less3192/// than those in the second operand.3193///3194/// Each comparison returns 0x0 for false, 0xFF for true.3195///3196/// \headerfile <x86intrin.h>3197///3198/// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.3199///3200/// \param __a3201/// A 128-bit integer vector.3202/// \param __b3203/// A 128-bit integer vector.3204/// \returns A 128-bit integer vector containing the comparison results.3205static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3206_mm_cmplt_epi8(__m128i __a, __m128i __b) {3207 return _mm_cmpgt_epi8(__b, __a);3208}3209 3210/// Compares each of the corresponding signed 16-bit values of the3211/// 128-bit integer vectors to determine if the values in the first operand3212/// are less than those in the second operand.3213///3214/// Each comparison returns 0x0 for false, 0xFFFF for true.3215///3216/// \headerfile <x86intrin.h>3217///3218/// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.3219///3220/// \param __a3221/// A 128-bit integer vector.3222/// \param __b3223/// A 128-bit integer vector.3224/// \returns A 128-bit integer vector containing the comparison results.3225static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3226_mm_cmplt_epi16(__m128i __a, __m128i __b) {3227 return _mm_cmpgt_epi16(__b, __a);3228}3229 3230/// Compares each of the corresponding signed 32-bit values of the3231/// 128-bit integer vectors to determine if the values in the first operand3232/// are less than those in the second operand.3233///3234/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true.3235///3236/// \headerfile <x86intrin.h>3237///3238/// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.3239///3240/// \param __a3241/// A 128-bit integer vector.3242/// \param __b3243/// A 128-bit integer vector.3244/// \returns A 128-bit integer vector containing the comparison results.3245static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3246_mm_cmplt_epi32(__m128i __a, __m128i __b) {3247 return _mm_cmpgt_epi32(__b, __a);3248}3249 3250#ifdef __x86_64__3251/// Converts a 64-bit signed integer value from the second operand into a3252/// double-precision value and returns it in the lower element of a [2 x3253/// double] vector; the upper element of the returned vector is copied from3254/// the upper element of the first operand.3255///3256/// \headerfile <x86intrin.h>3257///3258/// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.3259///3260/// \param __a3261/// A 128-bit vector of [2 x double]. The upper 64 bits of this operand are3262/// copied to the upper 64 bits of the destination.3263/// \param __b3264/// A 64-bit signed integer operand containing the value to be converted.3265/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the3266/// converted value of the second operand. The upper 64 bits are copied from3267/// the upper 64 bits of the first operand.3268static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR3269_mm_cvtsi64_sd(__m128d __a, long long __b) {3270 __a[0] = __b;3271 return __a;3272}3273 3274/// Converts the first (lower) element of a vector of [2 x double] into a3275/// 64-bit signed integer value.3276///3277/// If the converted value does not fit in a 64-bit integer, raises a3278/// floating-point invalid exception. If the exception is masked, returns3279/// the most negative integer.3280///3281/// \headerfile <x86intrin.h>3282///3283/// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.3284///3285/// \param __a3286/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the3287/// conversion.3288/// \returns A 64-bit signed integer containing the converted value.3289static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsd_si64(__m128d __a) {3290 return __builtin_ia32_cvtsd2si64((__v2df)__a);3291}3292 3293/// Converts the first (lower) element of a vector of [2 x double] into a3294/// 64-bit signed truncated (rounded toward zero) integer value.3295///3296/// If a converted value does not fit in a 64-bit integer, raises a3297/// floating-point invalid exception. If the exception is masked, returns3298/// the most negative integer.3299///3300/// \headerfile <x86intrin.h>3301///3302/// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>3303/// instruction.3304///3305/// \param __a3306/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the3307/// conversion.3308/// \returns A 64-bit signed integer containing the converted value.3309static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvttsd_si64(__m128d __a) {3310 return __builtin_ia32_cvttsd2si64((__v2df)__a);3311}3312#endif3313 3314/// Converts a vector of [4 x i32] into a vector of [4 x float].3315///3316/// \headerfile <x86intrin.h>3317///3318/// This intrinsic corresponds to the <c> VCVTDQ2PS / CVTDQ2PS </c> instruction.3319///3320/// \param __a3321/// A 128-bit integer vector.3322/// \returns A 128-bit vector of [4 x float] containing the converted values.3323static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR3324_mm_cvtepi32_ps(__m128i __a) {3325 return (__m128) __builtin_convertvector((__v4si)__a, __v4sf);3326}3327 3328/// Converts a vector of [4 x float] into a vector of [4 x i32].3329///3330/// If a converted value does not fit in a 32-bit integer, raises a3331/// floating-point invalid exception. If the exception is masked, returns3332/// the most negative integer.3333///3334/// \headerfile <x86intrin.h>3335///3336/// This intrinsic corresponds to the <c> VCVTPS2DQ / CVTPS2DQ </c> instruction.3337///3338/// \param __a3339/// A 128-bit vector of [4 x float].3340/// \returns A 128-bit integer vector of [4 x i32] containing the converted3341/// values.3342static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a) {3343 return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);3344}3345 3346/// Converts a vector of [4 x float] into four signed truncated (rounded toward3347/// zero) 32-bit integers, returned in a vector of [4 x i32].3348///3349/// If a converted value does not fit in a 32-bit integer, raises a3350/// floating-point invalid exception. If the exception is masked, returns3351/// the most negative integer.3352///3353/// \headerfile <x86intrin.h>3354///3355/// This intrinsic corresponds to the <c> VCVTTPS2DQ / CVTTPS2DQ </c>3356/// instruction.3357///3358/// \param __a3359/// A 128-bit vector of [4 x float].3360/// \returns A 128-bit vector of [4 x i32] containing the converted values.3361static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) {3362 return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);3363}3364 3365/// Returns a vector of [4 x i32] where the lowest element is the input3366/// operand and the remaining elements are zero.3367///3368/// \headerfile <x86intrin.h>3369///3370/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.3371///3372/// \param __a3373/// A 32-bit signed integer operand.3374/// \returns A 128-bit vector of [4 x i32].3375static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3376_mm_cvtsi32_si128(int __a) {3377 return __extension__(__m128i)(__v4si){__a, 0, 0, 0};3378}3379 3380/// Returns a vector of [2 x i64] where the lower element is the input3381/// operand and the upper element is zero.3382///3383/// \headerfile <x86intrin.h>3384///3385/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction3386/// in 64-bit mode.3387///3388/// \param __a3389/// A 64-bit signed integer operand containing the value to be converted.3390/// \returns A 128-bit vector of [2 x i64] containing the converted value.3391static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3392_mm_cvtsi64_si128(long long __a) {3393 return __extension__(__m128i)(__v2di){__a, 0};3394}3395 3396/// Moves the least significant 32 bits of a vector of [4 x i32] to a3397/// 32-bit signed integer value.3398///3399/// \headerfile <x86intrin.h>3400///3401/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.3402///3403/// \param __a3404/// A vector of [4 x i32]. The least significant 32 bits are moved to the3405/// destination.3406/// \returns A 32-bit signed integer containing the moved value.3407static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR3408_mm_cvtsi128_si32(__m128i __a) {3409 __v4si __b = (__v4si)__a;3410 return __b[0];3411}3412 3413/// Moves the least significant 64 bits of a vector of [2 x i64] to a3414/// 64-bit signed integer value.3415///3416/// \headerfile <x86intrin.h>3417///3418/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.3419///3420/// \param __a3421/// A vector of [2 x i64]. The least significant 64 bits are moved to the3422/// destination.3423/// \returns A 64-bit signed integer containing the moved value.3424static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR3425_mm_cvtsi128_si64(__m128i __a) {3426 return __a[0];3427}3428 3429/// Moves packed integer values from an aligned 128-bit memory location3430/// to elements in a 128-bit integer vector.3431///3432/// \headerfile <x86intrin.h>3433///3434/// This intrinsic corresponds to the <c> VMOVDQA / MOVDQA </c> instruction.3435///3436/// \param __p3437/// An aligned pointer to a memory location containing integer values.3438/// \returns A 128-bit integer vector containing the moved values.3439static __inline__ __m128i __DEFAULT_FN_ATTRS3440_mm_load_si128(__m128i const *__p) {3441 return *__p;3442}3443 3444/// Moves packed integer values from an unaligned 128-bit memory location3445/// to elements in a 128-bit integer vector.3446///3447/// \headerfile <x86intrin.h>3448///3449/// This intrinsic corresponds to the <c> VMOVDQU / MOVDQU </c> instruction.3450///3451/// \param __p3452/// A pointer to a memory location containing integer values.3453/// \returns A 128-bit integer vector containing the moved values.3454static __inline__ __m128i __DEFAULT_FN_ATTRS3455_mm_loadu_si128(__m128i_u const *__p) {3456 struct __loadu_si128 {3457 __m128i_u __v;3458 } __attribute__((__packed__, __may_alias__));3459 return ((const struct __loadu_si128 *)__p)->__v;3460}3461 3462/// Returns a vector of [2 x i64] where the lower element is taken from3463/// the lower element of the operand, and the upper element is zero.3464///3465/// \headerfile <x86intrin.h>3466///3467/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.3468///3469/// \param __p3470/// A 128-bit vector of [2 x i64]. Bits [63:0] are written to bits [63:0] of3471/// the destination.3472/// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the3473/// moved value. The higher order bits are cleared.3474static __inline__ __m128i __DEFAULT_FN_ATTRS3475_mm_loadl_epi64(__m128i_u const *__p) {3476 struct __mm_loadl_epi64_struct {3477 long long __u;3478 } __attribute__((__packed__, __may_alias__));3479 return __extension__(__m128i){3480 ((const struct __mm_loadl_epi64_struct *)__p)->__u, 0};3481}3482 3483/// Generates a 128-bit vector of [4 x i32] with unspecified content.3484/// This could be used as an argument to another intrinsic function where the3485/// argument is required but the value is not actually used.3486///3487/// \headerfile <x86intrin.h>3488///3489/// This intrinsic has no corresponding instruction.3490///3491/// \returns A 128-bit vector of [4 x i32] with unspecified content.3492static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void) {3493 return (__m128i)__builtin_ia32_undef128();3494}3495 3496/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with3497/// the specified 64-bit integer values.3498///3499/// \headerfile <x86intrin.h>3500///3501/// This intrinsic is a utility function and does not correspond to a specific3502/// instruction.3503///3504/// \param __q13505/// A 64-bit integer value used to initialize the upper 64 bits of the3506/// destination vector of [2 x i64].3507/// \param __q03508/// A 64-bit integer value used to initialize the lower 64 bits of the3509/// destination vector of [2 x i64].3510/// \returns An initialized 128-bit vector of [2 x i64] containing the values3511/// provided in the operands.3512static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3513_mm_set_epi64x(long long __q1, long long __q0) {3514 return __extension__(__m128i)(__v2di){__q0, __q1};3515}3516 3517/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with3518/// the specified 64-bit integer values.3519///3520/// \headerfile <x86intrin.h>3521///3522/// This intrinsic is a utility function and does not correspond to a specific3523/// instruction.3524///3525/// \param __q13526/// A 64-bit integer value used to initialize the upper 64 bits of the3527/// destination vector of [2 x i64].3528/// \param __q03529/// A 64-bit integer value used to initialize the lower 64 bits of the3530/// destination vector of [2 x i64].3531/// \returns An initialized 128-bit vector of [2 x i64] containing the values3532/// provided in the operands.3533static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3534_mm_set_epi64(__m64 __q1, __m64 __q0) {3535 return _mm_set_epi64x((long long)__q1[0], (long long)__q0[0]);3536}3537 3538/// Initializes the 32-bit values in a 128-bit vector of [4 x i32] with3539/// the specified 32-bit integer values.3540///3541/// \headerfile <x86intrin.h>3542///3543/// This intrinsic is a utility function and does not correspond to a specific3544/// instruction.3545///3546/// \param __i33547/// A 32-bit integer value used to initialize bits [127:96] of the3548/// destination vector.3549/// \param __i23550/// A 32-bit integer value used to initialize bits [95:64] of the destination3551/// vector.3552/// \param __i13553/// A 32-bit integer value used to initialize bits [63:32] of the destination3554/// vector.3555/// \param __i03556/// A 32-bit integer value used to initialize bits [31:0] of the destination3557/// vector.3558/// \returns An initialized 128-bit vector of [4 x i32] containing the values3559/// provided in the operands.3560static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set_epi32(int __i3,3561 int __i2,3562 int __i1,3563 int __i0) {3564 return __extension__(__m128i)(__v4si){__i0, __i1, __i2, __i3};3565}3566 3567/// Initializes the 16-bit values in a 128-bit vector of [8 x i16] with3568/// the specified 16-bit integer values.3569///3570/// \headerfile <x86intrin.h>3571///3572/// This intrinsic is a utility function and does not correspond to a specific3573/// instruction.3574///3575/// \param __w73576/// A 16-bit integer value used to initialize bits [127:112] of the3577/// destination vector.3578/// \param __w63579/// A 16-bit integer value used to initialize bits [111:96] of the3580/// destination vector.3581/// \param __w53582/// A 16-bit integer value used to initialize bits [95:80] of the destination3583/// vector.3584/// \param __w43585/// A 16-bit integer value used to initialize bits [79:64] of the destination3586/// vector.3587/// \param __w33588/// A 16-bit integer value used to initialize bits [63:48] of the destination3589/// vector.3590/// \param __w23591/// A 16-bit integer value used to initialize bits [47:32] of the destination3592/// vector.3593/// \param __w13594/// A 16-bit integer value used to initialize bits [31:16] of the destination3595/// vector.3596/// \param __w03597/// A 16-bit integer value used to initialize bits [15:0] of the destination3598/// vector.3599/// \returns An initialized 128-bit vector of [8 x i16] containing the values3600/// provided in the operands.3601static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3602_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3,3603 short __w2, short __w1, short __w0) {3604 return __extension__(__m128i)(__v8hi){__w0, __w1, __w2, __w3,3605 __w4, __w5, __w6, __w7};3606}3607 3608/// Initializes the 8-bit values in a 128-bit vector of [16 x i8] with3609/// the specified 8-bit integer values.3610///3611/// \headerfile <x86intrin.h>3612///3613/// This intrinsic is a utility function and does not correspond to a specific3614/// instruction.3615///3616/// \param __b153617/// Initializes bits [127:120] of the destination vector.3618/// \param __b143619/// Initializes bits [119:112] of the destination vector.3620/// \param __b133621/// Initializes bits [111:104] of the destination vector.3622/// \param __b123623/// Initializes bits [103:96] of the destination vector.3624/// \param __b113625/// Initializes bits [95:88] of the destination vector.3626/// \param __b103627/// Initializes bits [87:80] of the destination vector.3628/// \param __b93629/// Initializes bits [79:72] of the destination vector.3630/// \param __b83631/// Initializes bits [71:64] of the destination vector.3632/// \param __b73633/// Initializes bits [63:56] of the destination vector.3634/// \param __b63635/// Initializes bits [55:48] of the destination vector.3636/// \param __b53637/// Initializes bits [47:40] of the destination vector.3638/// \param __b43639/// Initializes bits [39:32] of the destination vector.3640/// \param __b33641/// Initializes bits [31:24] of the destination vector.3642/// \param __b23643/// Initializes bits [23:16] of the destination vector.3644/// \param __b13645/// Initializes bits [15:8] of the destination vector.3646/// \param __b03647/// Initializes bits [7:0] of the destination vector.3648/// \returns An initialized 128-bit vector of [16 x i8] containing the values3649/// provided in the operands.3650static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3651_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11,3652 char __b10, char __b9, char __b8, char __b7, char __b6, char __b5,3653 char __b4, char __b3, char __b2, char __b1, char __b0) {3654 return __extension__(__m128i)(__v16qi){3655 __b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7,3656 __b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15};3657}3658 3659/// Initializes both values in a 128-bit integer vector with the3660/// specified 64-bit integer value.3661///3662/// \headerfile <x86intrin.h>3663///3664/// This intrinsic is a utility function and does not correspond to a specific3665/// instruction.3666///3667/// \param __q3668/// Integer value used to initialize the elements of the destination integer3669/// vector.3670/// \returns An initialized 128-bit integer vector of [2 x i64] with both3671/// elements containing the value provided in the operand.3672static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3673_mm_set1_epi64x(long long __q) {3674 return _mm_set_epi64x(__q, __q);3675}3676 3677/// Initializes both values in a 128-bit vector of [2 x i64] with the3678/// specified 64-bit value.3679///3680/// \headerfile <x86intrin.h>3681///3682/// This intrinsic is a utility function and does not correspond to a specific3683/// instruction.3684///3685/// \param __q3686/// A 64-bit value used to initialize the elements of the destination integer3687/// vector.3688/// \returns An initialized 128-bit vector of [2 x i64] with all elements3689/// containing the value provided in the operand.3690static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3691_mm_set1_epi64(__m64 __q) {3692 return _mm_set_epi64(__q, __q);3693}3694 3695/// Initializes all values in a 128-bit vector of [4 x i32] with the3696/// specified 32-bit value.3697///3698/// \headerfile <x86intrin.h>3699///3700/// This intrinsic is a utility function and does not correspond to a specific3701/// instruction.3702///3703/// \param __i3704/// A 32-bit value used to initialize the elements of the destination integer3705/// vector.3706/// \returns An initialized 128-bit vector of [4 x i32] with all elements3707/// containing the value provided in the operand.3708static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set1_epi32(int __i) {3709 return _mm_set_epi32(__i, __i, __i, __i);3710}3711 3712/// Initializes all values in a 128-bit vector of [8 x i16] with the3713/// specified 16-bit value.3714///3715/// \headerfile <x86intrin.h>3716///3717/// This intrinsic is a utility function and does not correspond to a specific3718/// instruction.3719///3720/// \param __w3721/// A 16-bit value used to initialize the elements of the destination integer3722/// vector.3723/// \returns An initialized 128-bit vector of [8 x i16] with all elements3724/// containing the value provided in the operand.3725static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3726_mm_set1_epi16(short __w) {3727 return _mm_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w);3728}3729 3730/// Initializes all values in a 128-bit vector of [16 x i8] with the3731/// specified 8-bit value.3732///3733/// \headerfile <x86intrin.h>3734///3735/// This intrinsic is a utility function and does not correspond to a specific3736/// instruction.3737///3738/// \param __b3739/// An 8-bit value used to initialize the elements of the destination integer3740/// vector.3741/// \returns An initialized 128-bit vector of [16 x i8] with all elements3742/// containing the value provided in the operand.3743static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_set1_epi8(char __b) {3744 return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b,3745 __b, __b, __b, __b, __b);3746}3747 3748/// Constructs a 128-bit integer vector, initialized in reverse order3749/// with the specified 64-bit integral values.3750///3751/// \headerfile <x86intrin.h>3752///3753/// This intrinsic does not correspond to a specific instruction.3754///3755/// \param __q03756/// A 64-bit integral value used to initialize the lower 64 bits of the3757/// result.3758/// \param __q13759/// A 64-bit integral value used to initialize the upper 64 bits of the3760/// result.3761/// \returns An initialized 128-bit integer vector.3762static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3763_mm_setr_epi64(__m64 __q0, __m64 __q1) {3764 return _mm_set_epi64(__q1, __q0);3765}3766 3767/// Constructs a 128-bit integer vector, initialized in reverse order3768/// with the specified 32-bit integral values.3769///3770/// \headerfile <x86intrin.h>3771///3772/// This intrinsic is a utility function and does not correspond to a specific3773/// instruction.3774///3775/// \param __i03776/// A 32-bit integral value used to initialize bits [31:0] of the result.3777/// \param __i13778/// A 32-bit integral value used to initialize bits [63:32] of the result.3779/// \param __i23780/// A 32-bit integral value used to initialize bits [95:64] of the result.3781/// \param __i33782/// A 32-bit integral value used to initialize bits [127:96] of the result.3783/// \returns An initialized 128-bit integer vector.3784static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3785_mm_setr_epi32(int __i0, int __i1, int __i2, int __i3) {3786 return _mm_set_epi32(__i3, __i2, __i1, __i0);3787}3788 3789/// Constructs a 128-bit integer vector, initialized in reverse order3790/// with the specified 16-bit integral values.3791///3792/// \headerfile <x86intrin.h>3793///3794/// This intrinsic is a utility function and does not correspond to a specific3795/// instruction.3796///3797/// \param __w03798/// A 16-bit integral value used to initialize bits [15:0] of the result.3799/// \param __w13800/// A 16-bit integral value used to initialize bits [31:16] of the result.3801/// \param __w23802/// A 16-bit integral value used to initialize bits [47:32] of the result.3803/// \param __w33804/// A 16-bit integral value used to initialize bits [63:48] of the result.3805/// \param __w43806/// A 16-bit integral value used to initialize bits [79:64] of the result.3807/// \param __w53808/// A 16-bit integral value used to initialize bits [95:80] of the result.3809/// \param __w63810/// A 16-bit integral value used to initialize bits [111:96] of the result.3811/// \param __w73812/// A 16-bit integral value used to initialize bits [127:112] of the result.3813/// \returns An initialized 128-bit integer vector.3814static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3815_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4,3816 short __w5, short __w6, short __w7) {3817 return _mm_set_epi16(__w7, __w6, __w5, __w4, __w3, __w2, __w1, __w0);3818}3819 3820/// Constructs a 128-bit integer vector, initialized in reverse order3821/// with the specified 8-bit integral values.3822///3823/// \headerfile <x86intrin.h>3824///3825/// This intrinsic is a utility function and does not correspond to a specific3826/// instruction.3827///3828/// \param __b03829/// An 8-bit integral value used to initialize bits [7:0] of the result.3830/// \param __b13831/// An 8-bit integral value used to initialize bits [15:8] of the result.3832/// \param __b23833/// An 8-bit integral value used to initialize bits [23:16] of the result.3834/// \param __b33835/// An 8-bit integral value used to initialize bits [31:24] of the result.3836/// \param __b43837/// An 8-bit integral value used to initialize bits [39:32] of the result.3838/// \param __b53839/// An 8-bit integral value used to initialize bits [47:40] of the result.3840/// \param __b63841/// An 8-bit integral value used to initialize bits [55:48] of the result.3842/// \param __b73843/// An 8-bit integral value used to initialize bits [63:56] of the result.3844/// \param __b83845/// An 8-bit integral value used to initialize bits [71:64] of the result.3846/// \param __b93847/// An 8-bit integral value used to initialize bits [79:72] of the result.3848/// \param __b103849/// An 8-bit integral value used to initialize bits [87:80] of the result.3850/// \param __b113851/// An 8-bit integral value used to initialize bits [95:88] of the result.3852/// \param __b123853/// An 8-bit integral value used to initialize bits [103:96] of the result.3854/// \param __b133855/// An 8-bit integral value used to initialize bits [111:104] of the result.3856/// \param __b143857/// An 8-bit integral value used to initialize bits [119:112] of the result.3858/// \param __b153859/// An 8-bit integral value used to initialize bits [127:120] of the result.3860/// \returns An initialized 128-bit integer vector.3861static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR3862_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,3863 char __b6, char __b7, char __b8, char __b9, char __b10,3864 char __b11, char __b12, char __b13, char __b14, char __b15) {3865 return _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b9, __b8,3866 __b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);3867}3868 3869/// Creates a 128-bit integer vector initialized to zero.3870///3871/// \headerfile <x86intrin.h>3872///3873/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.3874///3875/// \returns An initialized 128-bit integer vector with all elements set to3876/// zero.3877static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm_setzero_si128(void) {3878 return __extension__(__m128i)(__v2di){0LL, 0LL};3879}3880 3881/// Stores a 128-bit integer vector to a memory location aligned on a3882/// 128-bit boundary.3883///3884/// \headerfile <x86intrin.h>3885///3886/// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.3887///3888/// \param __p3889/// A pointer to an aligned memory location that will receive the integer3890/// values.3891/// \param __b3892/// A 128-bit integer vector containing the values to be moved.3893static __inline__ void __DEFAULT_FN_ATTRS _mm_store_si128(__m128i *__p,3894 __m128i __b) {3895 *__p = __b;3896}3897 3898/// Stores a 128-bit integer vector to an unaligned memory location.3899///3900/// \headerfile <x86intrin.h>3901///3902/// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.3903///3904/// \param __p3905/// A pointer to a memory location that will receive the integer values.3906/// \param __b3907/// A 128-bit integer vector containing the values to be moved.3908static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si128(__m128i_u *__p,3909 __m128i __b) {3910 struct __storeu_si128 {3911 __m128i_u __v;3912 } __attribute__((__packed__, __may_alias__));3913 ((struct __storeu_si128 *)__p)->__v = __b;3914}3915 3916/// Stores a 64-bit integer value from the low element of a 128-bit integer3917/// vector.3918///3919/// \headerfile <x86intrin.h>3920///3921/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.3922///3923/// \param __p3924/// A pointer to a 64-bit memory location. The address of the memory3925/// location does not have to be aligned.3926/// \param __b3927/// A 128-bit integer vector containing the value to be stored.3928static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si64(void *__p,3929 __m128i __b) {3930 struct __storeu_si64 {3931 long long __v;3932 } __attribute__((__packed__, __may_alias__));3933 ((struct __storeu_si64 *)__p)->__v = ((__v2di)__b)[0];3934}3935 3936/// Stores a 32-bit integer value from the low element of a 128-bit integer3937/// vector.3938///3939/// \headerfile <x86intrin.h>3940///3941/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.3942///3943/// \param __p3944/// A pointer to a 32-bit memory location. The address of the memory3945/// location does not have to be aligned.3946/// \param __b3947/// A 128-bit integer vector containing the value to be stored.3948static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si32(void *__p,3949 __m128i __b) {3950 struct __storeu_si32 {3951 int __v;3952 } __attribute__((__packed__, __may_alias__));3953 ((struct __storeu_si32 *)__p)->__v = ((__v4si)__b)[0];3954}3955 3956/// Stores a 16-bit integer value from the low element of a 128-bit integer3957/// vector.3958///3959/// \headerfile <x86intrin.h>3960///3961/// This intrinsic does not correspond to a specific instruction.3962///3963/// \param __p3964/// A pointer to a 16-bit memory location. The address of the memory3965/// location does not have to be aligned.3966/// \param __b3967/// A 128-bit integer vector containing the value to be stored.3968static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si16(void *__p,3969 __m128i __b) {3970 struct __storeu_si16 {3971 short __v;3972 } __attribute__((__packed__, __may_alias__));3973 ((struct __storeu_si16 *)__p)->__v = ((__v8hi)__b)[0];3974}3975 3976/// Moves bytes selected by the mask from the first operand to the3977/// specified unaligned memory location. When a mask bit is 1, the3978/// corresponding byte is written, otherwise it is not written.3979///3980/// To minimize caching, the data is flagged as non-temporal (unlikely to be3981/// used again soon). Exception and trap behavior for elements not selected3982/// for storage to memory are implementation dependent.3983///3984/// \headerfile <x86intrin.h>3985///3986/// This intrinsic corresponds to the <c> VMASKMOVDQU / MASKMOVDQU </c>3987/// instruction.3988///3989/// \param __d3990/// A 128-bit integer vector containing the values to be moved.3991/// \param __n3992/// A 128-bit integer vector containing the mask. The most significant bit of3993/// each byte represents the mask bits.3994/// \param __p3995/// A pointer to an unaligned 128-bit memory location where the specified3996/// values are moved.3997static __inline__ void __DEFAULT_FN_ATTRS _mm_maskmoveu_si128(__m128i __d,3998 __m128i __n,3999 char *__p) {4000 __builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);4001}4002 4003/// Stores the lower 64 bits of a 128-bit integer vector of [2 x i64] to4004/// a memory location.4005///4006/// \headerfile <x86intrin.h>4007///4008/// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.4009///4010/// \param __p4011/// A pointer to a 64-bit memory location that will receive the lower 64 bits4012/// of the integer vector parameter.4013/// \param __a4014/// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the4015/// value to be stored.4016static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_epi64(__m128i_u *__p,4017 __m128i __a) {4018 struct __mm_storel_epi64_struct {4019 long long __u;4020 } __attribute__((__packed__, __may_alias__));4021 ((struct __mm_storel_epi64_struct *)__p)->__u = __a[0];4022}4023 4024/// Stores a 128-bit floating point vector of [2 x double] to a 128-bit4025/// aligned memory location.4026///4027/// To minimize caching, the data is flagged as non-temporal (unlikely to be4028/// used again soon).4029///4030/// \headerfile <x86intrin.h>4031///4032/// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.4033///4034/// \param __p4035/// A pointer to the 128-bit aligned memory location used to store the value.4036/// \param __a4037/// A vector of [2 x double] containing the 64-bit values to be stored.4038static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_pd(void *__p,4039 __m128d __a) {4040 __builtin_nontemporal_store((__v2df)__a, (__v2df *)__p);4041}4042 4043/// Stores a 128-bit integer vector to a 128-bit aligned memory location.4044///4045/// To minimize caching, the data is flagged as non-temporal (unlikely to be4046/// used again soon).4047///4048/// \headerfile <x86intrin.h>4049///4050/// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.4051///4052/// \param __p4053/// A pointer to the 128-bit aligned memory location used to store the value.4054/// \param __a4055/// A 128-bit integer vector containing the values to be stored.4056static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_si128(void *__p,4057 __m128i __a) {4058 __builtin_nontemporal_store((__v2di)__a, (__v2di *)__p);4059}4060 4061/// Stores a 32-bit integer value in the specified memory location.4062///4063/// To minimize caching, the data is flagged as non-temporal (unlikely to be4064/// used again soon).4065///4066/// \headerfile <x86intrin.h>4067///4068/// This intrinsic corresponds to the <c> MOVNTI </c> instruction.4069///4070/// \param __p4071/// A pointer to the 32-bit memory location used to store the value.4072/// \param __a4073/// A 32-bit integer containing the value to be stored.4074static __inline__ void4075 __attribute__((__always_inline__, __nodebug__, __target__("sse2")))4076 _mm_stream_si32(void *__p, int __a) {4077 __builtin_ia32_movnti((int *)__p, __a);4078}4079 4080#ifdef __x86_64__4081/// Stores a 64-bit integer value in the specified memory location.4082///4083/// To minimize caching, the data is flagged as non-temporal (unlikely to be4084/// used again soon).4085///4086/// \headerfile <x86intrin.h>4087///4088/// This intrinsic corresponds to the <c> MOVNTIQ </c> instruction.4089///4090/// \param __p4091/// A pointer to the 64-bit memory location used to store the value.4092/// \param __a4093/// A 64-bit integer containing the value to be stored.4094static __inline__ void4095 __attribute__((__always_inline__, __nodebug__, __target__("sse2")))4096 _mm_stream_si64(void *__p, long long __a) {4097 __builtin_ia32_movnti64((long long *)__p, __a);4098}4099#endif4100 4101#if defined(__cplusplus)4102extern "C" {4103#endif4104 4105/// The cache line containing \a __p is flushed and invalidated from all4106/// caches in the coherency domain.4107///4108/// \headerfile <x86intrin.h>4109///4110/// This intrinsic corresponds to the <c> CLFLUSH </c> instruction.4111///4112/// \param __p4113/// A pointer to the memory location used to identify the cache line to be4114/// flushed.4115void _mm_clflush(void const *__p);4116 4117/// Forces strong memory ordering (serialization) between load4118/// instructions preceding this instruction and load instructions following4119/// this instruction, ensuring the system completes all previous loads before4120/// executing subsequent loads.4121///4122/// \headerfile <x86intrin.h>4123///4124/// This intrinsic corresponds to the <c> LFENCE </c> instruction.4125///4126void _mm_lfence(void);4127 4128/// Forces strong memory ordering (serialization) between load and store4129/// instructions preceding this instruction and load and store instructions4130/// following this instruction, ensuring that the system completes all4131/// previous memory accesses before executing subsequent memory accesses.4132///4133/// \headerfile <x86intrin.h>4134///4135/// This intrinsic corresponds to the <c> MFENCE </c> instruction.4136///4137void _mm_mfence(void);4138 4139#if defined(__cplusplus)4140} // extern "C"4141#endif4142 4143/// Converts, with saturation, 16-bit signed integers from both 128-bit integer4144/// vector operands into 8-bit signed integers, and packs the results into4145/// the destination.4146///4147/// Positive values greater than 0x7F are saturated to 0x7F. Negative values4148/// less than 0x80 are saturated to 0x80.4149///4150/// \headerfile <x86intrin.h>4151///4152/// This intrinsic corresponds to the <c> VPACKSSWB / PACKSSWB </c> instruction.4153///4154/// \param __a4155/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are4156/// written to the lower 64 bits of the result.4157/// \param __b4158/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are4159/// written to the higher 64 bits of the result.4160/// \returns A 128-bit vector of [16 x i8] containing the converted values.4161static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4162_mm_packs_epi16(__m128i __a, __m128i __b) {4163 return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);4164}4165 4166/// Converts, with saturation, 32-bit signed integers from both 128-bit integer4167/// vector operands into 16-bit signed integers, and packs the results into4168/// the destination.4169///4170/// Positive values greater than 0x7FFF are saturated to 0x7FFF. Negative4171/// values less than 0x8000 are saturated to 0x8000.4172///4173/// \headerfile <x86intrin.h>4174///4175/// This intrinsic corresponds to the <c> VPACKSSDW / PACKSSDW </c> instruction.4176///4177/// \param __a4178/// A 128-bit integer vector of [4 x i32]. The converted [4 x i16] values4179/// are written to the lower 64 bits of the result.4180/// \param __b4181/// A 128-bit integer vector of [4 x i32]. The converted [4 x i16] values4182/// are written to the higher 64 bits of the result.4183/// \returns A 128-bit vector of [8 x i16] containing the converted values.4184static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4185_mm_packs_epi32(__m128i __a, __m128i __b) {4186 return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);4187}4188 4189/// Converts, with saturation, 16-bit signed integers from both 128-bit integer4190/// vector operands into 8-bit unsigned integers, and packs the results into4191/// the destination.4192///4193/// Values greater than 0xFF are saturated to 0xFF. Values less than 0x004194/// are saturated to 0x00.4195///4196/// \headerfile <x86intrin.h>4197///4198/// This intrinsic corresponds to the <c> VPACKUSWB / PACKUSWB </c> instruction.4199///4200/// \param __a4201/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are4202/// written to the lower 64 bits of the result.4203/// \param __b4204/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are4205/// written to the higher 64 bits of the result.4206/// \returns A 128-bit vector of [16 x i8] containing the converted values.4207static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4208_mm_packus_epi16(__m128i __a, __m128i __b) {4209 return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);4210}4211 4212/// Extracts 16 bits from a 128-bit integer vector of [8 x i16], using4213/// the immediate-value parameter as a selector.4214///4215/// \headerfile <x86intrin.h>4216///4217/// \code4218/// __m128i _mm_extract_epi16(__m128i a, const int imm);4219/// \endcode4220///4221/// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.4222///4223/// \param a4224/// A 128-bit integer vector.4225/// \param imm4226/// An immediate value. Bits [2:0] selects values from \a a to be assigned4227/// to bits[15:0] of the result. \n4228/// 000: assign values from bits [15:0] of \a a. \n4229/// 001: assign values from bits [31:16] of \a a. \n4230/// 010: assign values from bits [47:32] of \a a. \n4231/// 011: assign values from bits [63:48] of \a a. \n4232/// 100: assign values from bits [79:64] of \a a. \n4233/// 101: assign values from bits [95:80] of \a a. \n4234/// 110: assign values from bits [111:96] of \a a. \n4235/// 111: assign values from bits [127:112] of \a a.4236/// \returns An integer, whose lower 16 bits are selected from the 128-bit4237/// integer vector parameter and the remaining bits are assigned zeros.4238#define _mm_extract_epi16(a, imm) \4239 ((int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a), \4240 (int)(imm)))4241 4242/// Constructs a 128-bit integer vector by first making a copy of the4243/// 128-bit integer vector parameter, and then inserting the lower 16 bits4244/// of an integer parameter into an offset specified by the immediate-value4245/// parameter.4246///4247/// \headerfile <x86intrin.h>4248///4249/// \code4250/// __m128i _mm_insert_epi16(__m128i a, int b, const int imm);4251/// \endcode4252///4253/// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.4254///4255/// \param a4256/// A 128-bit integer vector of [8 x i16]. This vector is copied to the4257/// result and then one of the eight elements in the result is replaced by4258/// the lower 16 bits of \a b.4259/// \param b4260/// An integer. The lower 16 bits of this parameter are written to the4261/// result beginning at an offset specified by \a imm.4262/// \param imm4263/// An immediate value specifying the bit offset in the result at which the4264/// lower 16 bits of \a b are written.4265/// \returns A 128-bit integer vector containing the constructed values.4266#define _mm_insert_epi16(a, b, imm) \4267 ((__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b), \4268 (int)(imm)))4269 4270/// Copies the values of the most significant bits from each 8-bit4271/// element in a 128-bit integer vector of [16 x i8] to create a 16-bit mask4272/// value, zero-extends the value, and writes it to the destination.4273///4274/// \headerfile <x86intrin.h>4275///4276/// This intrinsic corresponds to the <c> VPMOVMSKB / PMOVMSKB </c> instruction.4277///4278/// \param __a4279/// A 128-bit integer vector containing the values with bits to be extracted.4280/// \returns The most significant bits from each 8-bit element in \a __a,4281/// written to bits [15:0]. The other bits are assigned zeros.4282static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR4283_mm_movemask_epi8(__m128i __a) {4284 return __builtin_ia32_pmovmskb128((__v16qi)__a);4285}4286 4287/// Constructs a 128-bit integer vector by shuffling four 32-bit4288/// elements of a 128-bit integer vector parameter, using the immediate-value4289/// parameter as a specifier.4290///4291/// \headerfile <x86intrin.h>4292///4293/// \code4294/// __m128i _mm_shuffle_epi32(__m128i a, const int imm);4295/// \endcode4296///4297/// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.4298///4299/// \param a4300/// A 128-bit integer vector containing the values to be copied.4301/// \param imm4302/// An immediate value containing an 8-bit value specifying which elements to4303/// copy from a. The destinations within the 128-bit destination are assigned4304/// values as follows: \n4305/// Bits [1:0] are used to assign values to bits [31:0] of the result. \n4306/// Bits [3:2] are used to assign values to bits [63:32] of the result. \n4307/// Bits [5:4] are used to assign values to bits [95:64] of the result. \n4308/// Bits [7:6] are used to assign values to bits [127:96] of the result. \n4309/// Bit value assignments: \n4310/// 00: assign values from bits [31:0] of \a a. \n4311/// 01: assign values from bits [63:32] of \a a. \n4312/// 10: assign values from bits [95:64] of \a a. \n4313/// 11: assign values from bits [127:96] of \a a. \n4314/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.4315/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form4316/// <c>[b6, b4, b2, b0]</c>.4317/// \returns A 128-bit integer vector containing the shuffled values.4318#define _mm_shuffle_epi32(a, imm) \4319 ((__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm)))4320 4321/// Constructs a 128-bit integer vector by shuffling four lower 16-bit4322/// elements of a 128-bit integer vector of [8 x i16], using the immediate4323/// value parameter as a specifier.4324///4325/// \headerfile <x86intrin.h>4326///4327/// \code4328/// __m128i _mm_shufflelo_epi16(__m128i a, const int imm);4329/// \endcode4330///4331/// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.4332///4333/// \param a4334/// A 128-bit integer vector of [8 x i16]. Bits [127:64] are copied to bits4335/// [127:64] of the result.4336/// \param imm4337/// An 8-bit immediate value specifying which elements to copy from \a a. \n4338/// Bits[1:0] are used to assign values to bits [15:0] of the result. \n4339/// Bits[3:2] are used to assign values to bits [31:16] of the result. \n4340/// Bits[5:4] are used to assign values to bits [47:32] of the result. \n4341/// Bits[7:6] are used to assign values to bits [63:48] of the result. \n4342/// Bit value assignments: \n4343/// 00: assign values from bits [15:0] of \a a. \n4344/// 01: assign values from bits [31:16] of \a a. \n4345/// 10: assign values from bits [47:32] of \a a. \n4346/// 11: assign values from bits [63:48] of \a a. \n4347/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.4348/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form4349/// <c>[b6, b4, b2, b0]</c>.4350/// \returns A 128-bit integer vector containing the shuffled values.4351#define _mm_shufflelo_epi16(a, imm) \4352 ((__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm)))4353 4354/// Constructs a 128-bit integer vector by shuffling four upper 16-bit4355/// elements of a 128-bit integer vector of [8 x i16], using the immediate4356/// value parameter as a specifier.4357///4358/// \headerfile <x86intrin.h>4359///4360/// \code4361/// __m128i _mm_shufflehi_epi16(__m128i a, const int imm);4362/// \endcode4363///4364/// This intrinsic corresponds to the <c> VPSHUFHW / PSHUFHW </c> instruction.4365///4366/// \param a4367/// A 128-bit integer vector of [8 x i16]. Bits [63:0] are copied to bits4368/// [63:0] of the result.4369/// \param imm4370/// An 8-bit immediate value specifying which elements to copy from \a a. \n4371/// Bits[1:0] are used to assign values to bits [79:64] of the result. \n4372/// Bits[3:2] are used to assign values to bits [95:80] of the result. \n4373/// Bits[5:4] are used to assign values to bits [111:96] of the result. \n4374/// Bits[7:6] are used to assign values to bits [127:112] of the result. \n4375/// Bit value assignments: \n4376/// 00: assign values from bits [79:64] of \a a. \n4377/// 01: assign values from bits [95:80] of \a a. \n4378/// 10: assign values from bits [111:96] of \a a. \n4379/// 11: assign values from bits [127:112] of \a a. \n4380/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.4381/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form4382/// <c>[b6, b4, b2, b0]</c>.4383/// \returns A 128-bit integer vector containing the shuffled values.4384#define _mm_shufflehi_epi16(a, imm) \4385 ((__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm)))4386 4387/// Unpacks the high-order (index 8-15) values from two 128-bit vectors4388/// of [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].4389///4390/// \headerfile <x86intrin.h>4391///4392/// This intrinsic corresponds to the <c> VPUNPCKHBW / PUNPCKHBW </c>4393/// instruction.4394///4395/// \param __a4396/// A 128-bit vector of [16 x i8].4397/// Bits [71:64] are written to bits [7:0] of the result. \n4398/// Bits [79:72] are written to bits [23:16] of the result. \n4399/// Bits [87:80] are written to bits [39:32] of the result. \n4400/// Bits [95:88] are written to bits [55:48] of the result. \n4401/// Bits [103:96] are written to bits [71:64] of the result. \n4402/// Bits [111:104] are written to bits [87:80] of the result. \n4403/// Bits [119:112] are written to bits [103:96] of the result. \n4404/// Bits [127:120] are written to bits [119:112] of the result.4405/// \param __b4406/// A 128-bit vector of [16 x i8]. \n4407/// Bits [71:64] are written to bits [15:8] of the result. \n4408/// Bits [79:72] are written to bits [31:24] of the result. \n4409/// Bits [87:80] are written to bits [47:40] of the result. \n4410/// Bits [95:88] are written to bits [63:56] of the result. \n4411/// Bits [103:96] are written to bits [79:72] of the result. \n4412/// Bits [111:104] are written to bits [95:88] of the result. \n4413/// Bits [119:112] are written to bits [111:104] of the result. \n4414/// Bits [127:120] are written to bits [127:120] of the result.4415/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.4416static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4417_mm_unpackhi_epi8(__m128i __a, __m128i __b) {4418 return (__m128i)__builtin_shufflevector(4419 (__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11,4420 16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15);4421}4422 4423/// Unpacks the high-order (index 4-7) values from two 128-bit vectors of4424/// [8 x i16] and interleaves them into a 128-bit vector of [8 x i16].4425///4426/// \headerfile <x86intrin.h>4427///4428/// This intrinsic corresponds to the <c> VPUNPCKHWD / PUNPCKHWD </c>4429/// instruction.4430///4431/// \param __a4432/// A 128-bit vector of [8 x i16].4433/// Bits [79:64] are written to bits [15:0] of the result. \n4434/// Bits [95:80] are written to bits [47:32] of the result. \n4435/// Bits [111:96] are written to bits [79:64] of the result. \n4436/// Bits [127:112] are written to bits [111:96] of the result.4437/// \param __b4438/// A 128-bit vector of [8 x i16].4439/// Bits [79:64] are written to bits [31:16] of the result. \n4440/// Bits [95:80] are written to bits [63:48] of the result. \n4441/// Bits [111:96] are written to bits [95:80] of the result. \n4442/// Bits [127:112] are written to bits [127:112] of the result.4443/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.4444static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4445_mm_unpackhi_epi16(__m128i __a, __m128i __b) {4446 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5,4447 8 + 5, 6, 8 + 6, 7, 8 + 7);4448}4449 4450/// Unpacks the high-order (index 2,3) values from two 128-bit vectors of4451/// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].4452///4453/// \headerfile <x86intrin.h>4454///4455/// This intrinsic corresponds to the <c> VPUNPCKHDQ / PUNPCKHDQ </c>4456/// instruction.4457///4458/// \param __a4459/// A 128-bit vector of [4 x i32]. \n4460/// Bits [95:64] are written to bits [31:0] of the destination. \n4461/// Bits [127:96] are written to bits [95:64] of the destination.4462/// \param __b4463/// A 128-bit vector of [4 x i32]. \n4464/// Bits [95:64] are written to bits [64:32] of the destination. \n4465/// Bits [127:96] are written to bits [127:96] of the destination.4466/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.4467static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4468_mm_unpackhi_epi32(__m128i __a, __m128i __b) {4469 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3,4470 4 + 3);4471}4472 4473/// Unpacks the high-order 64-bit elements from two 128-bit vectors of4474/// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].4475///4476/// \headerfile <x86intrin.h>4477///4478/// This intrinsic corresponds to the <c> VPUNPCKHQDQ / PUNPCKHQDQ </c>4479/// instruction.4480///4481/// \param __a4482/// A 128-bit vector of [2 x i64]. \n4483/// Bits [127:64] are written to bits [63:0] of the destination.4484/// \param __b4485/// A 128-bit vector of [2 x i64]. \n4486/// Bits [127:64] are written to bits [127:64] of the destination.4487/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.4488static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4489_mm_unpackhi_epi64(__m128i __a, __m128i __b) {4490 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1);4491}4492 4493/// Unpacks the low-order (index 0-7) values from two 128-bit vectors of4494/// [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].4495///4496/// \headerfile <x86intrin.h>4497///4498/// This intrinsic corresponds to the <c> VPUNPCKLBW / PUNPCKLBW </c>4499/// instruction.4500///4501/// \param __a4502/// A 128-bit vector of [16 x i8]. \n4503/// Bits [7:0] are written to bits [7:0] of the result. \n4504/// Bits [15:8] are written to bits [23:16] of the result. \n4505/// Bits [23:16] are written to bits [39:32] of the result. \n4506/// Bits [31:24] are written to bits [55:48] of the result. \n4507/// Bits [39:32] are written to bits [71:64] of the result. \n4508/// Bits [47:40] are written to bits [87:80] of the result. \n4509/// Bits [55:48] are written to bits [103:96] of the result. \n4510/// Bits [63:56] are written to bits [119:112] of the result.4511/// \param __b4512/// A 128-bit vector of [16 x i8].4513/// Bits [7:0] are written to bits [15:8] of the result. \n4514/// Bits [15:8] are written to bits [31:24] of the result. \n4515/// Bits [23:16] are written to bits [47:40] of the result. \n4516/// Bits [31:24] are written to bits [63:56] of the result. \n4517/// Bits [39:32] are written to bits [79:72] of the result. \n4518/// Bits [47:40] are written to bits [95:88] of the result. \n4519/// Bits [55:48] are written to bits [111:104] of the result. \n4520/// Bits [63:56] are written to bits [127:120] of the result.4521/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.4522static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4523_mm_unpacklo_epi8(__m128i __a, __m128i __b) {4524 return (__m128i)__builtin_shufflevector(4525 (__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4,4526 16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7);4527}4528 4529/// Unpacks the low-order (index 0-3) values from each of the two 128-bit4530/// vectors of [8 x i16] and interleaves them into a 128-bit vector of4531/// [8 x i16].4532///4533/// \headerfile <x86intrin.h>4534///4535/// This intrinsic corresponds to the <c> VPUNPCKLWD / PUNPCKLWD </c>4536/// instruction.4537///4538/// \param __a4539/// A 128-bit vector of [8 x i16].4540/// Bits [15:0] are written to bits [15:0] of the result. \n4541/// Bits [31:16] are written to bits [47:32] of the result. \n4542/// Bits [47:32] are written to bits [79:64] of the result. \n4543/// Bits [63:48] are written to bits [111:96] of the result.4544/// \param __b4545/// A 128-bit vector of [8 x i16].4546/// Bits [15:0] are written to bits [31:16] of the result. \n4547/// Bits [31:16] are written to bits [63:48] of the result. \n4548/// Bits [47:32] are written to bits [95:80] of the result. \n4549/// Bits [63:48] are written to bits [127:112] of the result.4550/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.4551static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4552_mm_unpacklo_epi16(__m128i __a, __m128i __b) {4553 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1,4554 8 + 1, 2, 8 + 2, 3, 8 + 3);4555}4556 4557/// Unpacks the low-order (index 0,1) values from two 128-bit vectors of4558/// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].4559///4560/// \headerfile <x86intrin.h>4561///4562/// This intrinsic corresponds to the <c> VPUNPCKLDQ / PUNPCKLDQ </c>4563/// instruction.4564///4565/// \param __a4566/// A 128-bit vector of [4 x i32]. \n4567/// Bits [31:0] are written to bits [31:0] of the destination. \n4568/// Bits [63:32] are written to bits [95:64] of the destination.4569/// \param __b4570/// A 128-bit vector of [4 x i32]. \n4571/// Bits [31:0] are written to bits [64:32] of the destination. \n4572/// Bits [63:32] are written to bits [127:96] of the destination.4573/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.4574static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4575_mm_unpacklo_epi32(__m128i __a, __m128i __b) {4576 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1,4577 4 + 1);4578}4579 4580/// Unpacks the low-order 64-bit elements from two 128-bit vectors of4581/// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].4582///4583/// \headerfile <x86intrin.h>4584///4585/// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c>4586/// instruction.4587///4588/// \param __a4589/// A 128-bit vector of [2 x i64]. \n4590/// Bits [63:0] are written to bits [63:0] of the destination. \n4591/// \param __b4592/// A 128-bit vector of [2 x i64]. \n4593/// Bits [63:0] are written to bits [127:64] of the destination. \n4594/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.4595static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4596_mm_unpacklo_epi64(__m128i __a, __m128i __b) {4597 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0);4598}4599 4600/// Returns the lower 64 bits of a 128-bit integer vector as a 64-bit4601/// integer.4602///4603/// \headerfile <x86intrin.h>4604///4605/// This intrinsic corresponds to the <c> MOVDQ2Q </c> instruction.4606///4607/// \param __a4608/// A 128-bit integer vector operand. The lower 64 bits are moved to the4609/// destination.4610/// \returns A 64-bit integer containing the lower 64 bits of the parameter.4611static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR4612_mm_movepi64_pi64(__m128i __a) {4613 return (__m64)__a[0];4614}4615 4616/// Moves the 64-bit operand to a 128-bit integer vector, zeroing the4617/// upper bits.4618///4619/// \headerfile <x86intrin.h>4620///4621/// This intrinsic corresponds to the <c> MOVD+VMOVQ </c> instruction.4622///4623/// \param __a4624/// A 64-bit value.4625/// \returns A 128-bit integer vector. The lower 64 bits contain the value from4626/// the operand. The upper 64 bits are assigned zeros.4627static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4628_mm_movpi64_epi64(__m64 __a) {4629 return __builtin_shufflevector((__v1di)__a, _mm_setzero_si64(), 0, 1);4630}4631 4632/// Moves the lower 64 bits of a 128-bit integer vector to a 128-bit4633/// integer vector, zeroing the upper bits.4634///4635/// \headerfile <x86intrin.h>4636///4637/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.4638///4639/// \param __a4640/// A 128-bit integer vector operand. The lower 64 bits are moved to the4641/// destination.4642/// \returns A 128-bit integer vector. The lower 64 bits contain the value from4643/// the operand. The upper 64 bits are assigned zeros.4644static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4645_mm_move_epi64(__m128i __a) {4646 return __builtin_shufflevector((__v2di)__a, _mm_setzero_si128(), 0, 2);4647}4648 4649/// Unpacks the high-order 64-bit elements from two 128-bit vectors of4650/// [2 x double] and interleaves them into a 128-bit vector of [2 x4651/// double].4652///4653/// \headerfile <x86intrin.h>4654///4655/// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.4656///4657/// \param __a4658/// A 128-bit vector of [2 x double]. \n4659/// Bits [127:64] are written to bits [63:0] of the destination.4660/// \param __b4661/// A 128-bit vector of [2 x double]. \n4662/// Bits [127:64] are written to bits [127:64] of the destination.4663/// \returns A 128-bit vector of [2 x double] containing the interleaved values.4664static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR4665_mm_unpackhi_pd(__m128d __a, __m128d __b) {4666 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2 + 1);4667}4668 4669/// Unpacks the low-order 64-bit elements from two 128-bit vectors4670/// of [2 x double] and interleaves them into a 128-bit vector of [2 x4671/// double].4672///4673/// \headerfile <x86intrin.h>4674///4675/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.4676///4677/// \param __a4678/// A 128-bit vector of [2 x double]. \n4679/// Bits [63:0] are written to bits [63:0] of the destination.4680/// \param __b4681/// A 128-bit vector of [2 x double]. \n4682/// Bits [63:0] are written to bits [127:64] of the destination.4683/// \returns A 128-bit vector of [2 x double] containing the interleaved values.4684static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR4685_mm_unpacklo_pd(__m128d __a, __m128d __b) {4686 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2 + 0);4687}4688 4689/// Extracts the sign bits of the double-precision values in the 128-bit4690/// vector of [2 x double], zero-extends the value, and writes it to the4691/// low-order bits of the destination.4692///4693/// \headerfile <x86intrin.h>4694///4695/// This intrinsic corresponds to the <c> VMOVMSKPD / MOVMSKPD </c> instruction.4696///4697/// \param __a4698/// A 128-bit vector of [2 x double] containing the values with sign bits to4699/// be extracted.4700/// \returns The sign bits from each of the double-precision elements in \a __a,4701/// written to bits [1:0]. The remaining bits are assigned values of zero.4702static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR4703_mm_movemask_pd(__m128d __a) {4704 return __builtin_ia32_movmskpd((__v2df)__a);4705}4706 4707/// Constructs a 128-bit floating-point vector of [2 x double] from two4708/// 128-bit vector parameters of [2 x double], using the immediate-value4709/// parameter as a specifier.4710///4711/// \headerfile <x86intrin.h>4712///4713/// \code4714/// __m128d _mm_shuffle_pd(__m128d a, __m128d b, const int i);4715/// \endcode4716///4717/// This intrinsic corresponds to the <c> VSHUFPD / SHUFPD </c> instruction.4718///4719/// \param a4720/// A 128-bit vector of [2 x double].4721/// \param b4722/// A 128-bit vector of [2 x double].4723/// \param i4724/// An 8-bit immediate value. The least significant two bits specify which4725/// elements to copy from \a a and \a b: \n4726/// Bit[0] = 0: lower element of \a a copied to lower element of result. \n4727/// Bit[0] = 1: upper element of \a a copied to lower element of result. \n4728/// Bit[1] = 0: lower element of \a b copied to upper element of result. \n4729/// Bit[1] = 1: upper element of \a b copied to upper element of result. \n4730/// Note: To generate a mask, you can use the \c _MM_SHUFFLE2 macro.4731/// <c>_MM_SHUFFLE2(b1, b0)</c> can create a 2-bit mask of the form4732/// <c>[b1, b0]</c>.4733/// \returns A 128-bit vector of [2 x double] containing the shuffled values.4734#define _mm_shuffle_pd(a, b, i) \4735 ((__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \4736 (int)(i)))4737 4738/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit4739/// floating-point vector of [4 x float].4740///4741/// \headerfile <x86intrin.h>4742///4743/// This intrinsic has no corresponding instruction.4744///4745/// \param __a4746/// A 128-bit floating-point vector of [2 x double].4747/// \returns A 128-bit floating-point vector of [4 x float] containing the same4748/// bitwise pattern as the parameter.4749static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR4750_mm_castpd_ps(__m128d __a) {4751 return (__m128)__a;4752}4753 4754/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit4755/// integer vector.4756///4757/// \headerfile <x86intrin.h>4758///4759/// This intrinsic has no corresponding instruction.4760///4761/// \param __a4762/// A 128-bit floating-point vector of [2 x double].4763/// \returns A 128-bit integer vector containing the same bitwise pattern as the4764/// parameter.4765static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4766_mm_castpd_si128(__m128d __a) {4767 return (__m128i)__a;4768}4769 4770/// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit4771/// floating-point vector of [2 x double].4772///4773/// \headerfile <x86intrin.h>4774///4775/// This intrinsic has no corresponding instruction.4776///4777/// \param __a4778/// A 128-bit floating-point vector of [4 x float].4779/// \returns A 128-bit floating-point vector of [2 x double] containing the same4780/// bitwise pattern as the parameter.4781static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR4782_mm_castps_pd(__m128 __a) {4783 return (__m128d)__a;4784}4785 4786/// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit4787/// integer vector.4788///4789/// \headerfile <x86intrin.h>4790///4791/// This intrinsic has no corresponding instruction.4792///4793/// \param __a4794/// A 128-bit floating-point vector of [4 x float].4795/// \returns A 128-bit integer vector containing the same bitwise pattern as the4796/// parameter.4797static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR4798_mm_castps_si128(__m128 __a) {4799 return (__m128i)__a;4800}4801 4802/// Casts a 128-bit integer vector into a 128-bit floating-point vector4803/// of [4 x float].4804///4805/// \headerfile <x86intrin.h>4806///4807/// This intrinsic has no corresponding instruction.4808///4809/// \param __a4810/// A 128-bit integer vector.4811/// \returns A 128-bit floating-point vector of [4 x float] containing the same4812/// bitwise pattern as the parameter.4813static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR4814_mm_castsi128_ps(__m128i __a) {4815 return (__m128)__a;4816}4817 4818/// Casts a 128-bit integer vector into a 128-bit floating-point vector4819/// of [2 x double].4820///4821/// \headerfile <x86intrin.h>4822///4823/// This intrinsic has no corresponding instruction.4824///4825/// \param __a4826/// A 128-bit integer vector.4827/// \returns A 128-bit floating-point vector of [2 x double] containing the same4828/// bitwise pattern as the parameter.4829static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR4830_mm_castsi128_pd(__m128i __a) {4831 return (__m128d)__a;4832}4833 4834/// Compares each of the corresponding double-precision values of two4835/// 128-bit vectors of [2 x double], using the operation specified by the4836/// immediate integer operand.4837///4838/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.4839/// If either value in a comparison is NaN, comparisons that are ordered4840/// return false, and comparisons that are unordered return true.4841///4842/// \headerfile <x86intrin.h>4843///4844/// \code4845/// __m128d _mm_cmp_pd(__m128d a, __m128d b, const int c);4846/// \endcode4847///4848/// This intrinsic corresponds to the <c> (V)CMPPD </c> instruction.4849///4850/// \param a4851/// A 128-bit vector of [2 x double].4852/// \param b4853/// A 128-bit vector of [2 x double].4854/// \param c4855/// An immediate integer operand, with bits [4:0] specifying which comparison4856/// operation to use: \n4857/// 0x00: Equal (ordered, non-signaling) \n4858/// 0x01: Less-than (ordered, signaling) \n4859/// 0x02: Less-than-or-equal (ordered, signaling) \n4860/// 0x03: Unordered (non-signaling) \n4861/// 0x04: Not-equal (unordered, non-signaling) \n4862/// 0x05: Not-less-than (unordered, signaling) \n4863/// 0x06: Not-less-than-or-equal (unordered, signaling) \n4864/// 0x07: Ordered (non-signaling) \n4865/// \returns A 128-bit vector of [2 x double] containing the comparison results.4866#define _mm_cmp_pd(a, b, c) \4867 ((__m128d)__builtin_ia32_cmppd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \4868 (c)))4869 4870/// Compares each of the corresponding scalar double-precision values of4871/// two 128-bit vectors of [2 x double], using the operation specified by the4872/// immediate integer operand.4873///4874/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.4875/// If either value in a comparison is NaN, comparisons that are ordered4876/// return false, and comparisons that are unordered return true.4877///4878/// \headerfile <x86intrin.h>4879///4880/// \code4881/// __m128d _mm_cmp_sd(__m128d a, __m128d b, const int c);4882/// \endcode4883///4884/// This intrinsic corresponds to the <c> (V)CMPSD </c> instruction.4885///4886/// \param a4887/// A 128-bit vector of [2 x double].4888/// \param b4889/// A 128-bit vector of [2 x double].4890/// \param c4891/// An immediate integer operand, with bits [4:0] specifying which comparison4892/// operation to use: \n4893/// 0x00: Equal (ordered, non-signaling) \n4894/// 0x01: Less-than (ordered, signaling) \n4895/// 0x02: Less-than-or-equal (ordered, signaling) \n4896/// 0x03: Unordered (non-signaling) \n4897/// 0x04: Not-equal (unordered, non-signaling) \n4898/// 0x05: Not-less-than (unordered, signaling) \n4899/// 0x06: Not-less-than-or-equal (unordered, signaling) \n4900/// 0x07: Ordered (non-signaling) \n4901/// \returns A 128-bit vector of [2 x double] containing the comparison results.4902#define _mm_cmp_sd(a, b, c) \4903 ((__m128d)__builtin_ia32_cmpsd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \4904 (c)))4905 4906#if defined(__cplusplus)4907extern "C" {4908#endif4909 4910/// Indicates that a spin loop is being executed for the purposes of4911/// optimizing power consumption during the loop.4912///4913/// \headerfile <x86intrin.h>4914///4915/// This intrinsic corresponds to the <c> PAUSE </c> instruction.4916///4917void _mm_pause(void);4918 4919#if defined(__cplusplus)4920} // extern "C"4921#endif4922 4923#undef __anyext1284924#undef __trunc644925#undef __DEFAULT_FN_ATTRS4926#undef __DEFAULT_FN_ATTRS_CONSTEXPR4927 4928#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))4929 4930#define _MM_DENORMALS_ZERO_ON (0x0040U)4931#define _MM_DENORMALS_ZERO_OFF (0x0000U)4932 4933#define _MM_DENORMALS_ZERO_MASK (0x0040U)4934 4935#define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)4936#define _MM_SET_DENORMALS_ZERO_MODE(x) \4937 (_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))4938 4939#endif /* __EMMINTRIN_H */4940