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1/*===---------------- movrsintrin.h - MOVRS intrinsics ----------------------===2 *3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4 * See https://llvm.org/LICENSE.txt for license information.5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6 *7 *===----------------------------------------------------------------------===*/8 9#ifndef __IMMINTRIN_H10#error "Never use <movrsintrin.h> directly; include <immintrin.h> instead."11#endif // __IMMINTRIN_H12 13#ifndef __MOVRSINTRIN_H14#define __MOVRSINTRIN_H15 16#define __DEFAULT_FN_ATTRS \17 __attribute__((__always_inline__, __nodebug__, __target__("movrs")))18 19#ifdef __x86_64__20static __inline__ char __DEFAULT_FN_ATTRS _movrs_i8(const void *__A) {21 return (char)__builtin_ia32_movrsqi((const void *)__A);22}23 24static __inline__ short __DEFAULT_FN_ATTRS _movrs_i16(const void *__A) {25 return (short)__builtin_ia32_movrshi((const void *)__A);26}27 28static __inline__ int __DEFAULT_FN_ATTRS _movrs_i32(const void *__A) {29 return (int)__builtin_ia32_movrssi((const void *)__A);30}31 32static __inline__ long long __DEFAULT_FN_ATTRS _movrs_i64(const void *__A) {33 return (long long)__builtin_ia32_movrsdi((const void *)__A);34}35#endif // __x86_64__36 37// Loads a memory sequence containing the specified memory address into38/// the L3 data cache. Data will be shared (read/written) to by requesting39/// core and other cores.40///41/// Note that the effect of this intrinsic is dependent on the processor42/// implementation.43///44/// \headerfile <x86intrin.h>45///46/// This intrinsic corresponds to the \c PREFETCHRS instruction.47///48/// \param __P49/// A pointer specifying the memory address to be prefetched.50static __inline__ void __DEFAULT_FN_ATTRS51_m_prefetchrs(volatile const void *__P) {52#pragma clang diagnostic push53#pragma clang diagnostic ignored "-Wcast-qual"54 __builtin_ia32_prefetchrs((const void *)__P);55#pragma clang diagnostic pop56}57 58#undef __DEFAULT_FN_ATTRS59#endif // __MOVRSINTRIN_H60