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1/*===------------------ uintrintrin.h - UINTR intrinsics -------------------===2 *3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4 * See https://llvm.org/LICENSE.txt for license information.5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6 *7 *===-----------------------------------------------------------------------===8 */9 10#ifndef __X86GPRINTRIN_H11#error "Never use <uintrintrin.h> directly; include <x86gprintrin.h> instead."12#endif13 14#ifndef __UINTRINTRIN_H15#define __UINTRINTRIN_H16 17/* Define the default attributes for the functions in this file */18#define __DEFAULT_FN_ATTRS \19  __attribute__((__always_inline__, __nodebug__, __target__("uintr")))20 21#ifdef __x86_64__22 23struct __uintr_frame24{25  unsigned long long rip;26  unsigned long long rflags;27  unsigned long long rsp;28};29 30/// Clears the user interrupt flag (UIF). Its effect takes place immediately: a31///    user interrupt cannot be delivered on the instruction boundary following32///    CLUI. Can be executed only if CR4.UINT = 1, the logical processor is in33///    64-bit mode, and software is not executing inside an enclave; otherwise,34///    each causes an invalid-opcode exception. Causes a transactional abort if35///    executed inside a transactional region; the abort loads EAX as it would36///    had it been due to an execution of CLI.37///38/// \headerfile <x86gprintrin.h>39///40/// This intrinsic corresponds to the <c> CLUI </c> instruction.41///42/// \code{.operation}43///   UIF := 044/// \endcode45static __inline__ void __DEFAULT_FN_ATTRS46_clui (void)47{48  __builtin_ia32_clui();49}50 51/// Sets the user interrupt flag (UIF). Its effect takes place immediately; a52///    user interrupt may be delivered on the instruction boundary following53///    STUI. Can be executed only if CR4.UINT = 1, the logical processor is in54///    64-bit mode, and software is not executing inside an enclave; otherwise,55///    each causes an invalid-opcode exception. Causes a transactional abort if56///    executed inside a transactional region; the abort loads EAX as it would57///    had it been due to an execution of STI.58///59/// \headerfile <x86gprintrin.h>60///61/// This intrinsic corresponds to the <c> STUI </c> instruction.62///63/// \code{.operation}64///   UIF := 165/// \endcode66static __inline__ void __DEFAULT_FN_ATTRS67_stui (void)68{69  __builtin_ia32_stui();70}71 72/// Get the current value of the user interrupt flag (UIF). Can be executed73///    regardless of CPL and inside a transactional region. Can be executed only74///    if CR4.UINT = 1, the logical processor is in 64-bit mode, and software is75///    not executing inside an enclave; otherwise, it causes an invalid-opcode76///    exception.77///78/// \headerfile <x86gprintrin.h>79///80/// This intrinsic corresponds to the <c> TESTUI </c> instruction.81///82/// \returns The current value of the user interrupt flag (UIF).83///84/// \code{.operation}85///   CF := UIF86///   ZF := 087///   AF := 088///   OF := 089///   PF := 090///   SF := 091///   dst := CF92/// \endcode93static __inline__ unsigned char __DEFAULT_FN_ATTRS94_testui (void)95{96  return __builtin_ia32_testui();97}98 99/// Send interprocessor user interrupt. Can be executed only if100///    CR4.UINT = IA32_UINT_TT[0] = 1, the logical processor is in 64-bit mode,101///    and software is not executing inside an enclave; otherwise, it causes an102///    invalid-opcode exception. May be executed at any privilege level, all of103///    its memory accesses are performed with supervisor privilege.104///105/// \headerfile <x86gprintrin.h>106///107/// This intrinsic corresponds to the <c> SENDUIPI </c> instruction108///109/// \param __a110///    Index of user-interrupt target table entry in user-interrupt target111///    table.112///113/// \code{.operation}114///   IF __a > UITTSZ115///     GP (0)116///   FI117///   tempUITTE := MEM[UITTADDR + (a<<4)]118///   // tempUITTE must be valid, and can't have any reserved bit set119///   IF (tempUITTE.V == 0 OR tempUITTE[7:1] != 0)120///     GP (0)121///   FI122///   tempUPID := MEM[tempUITTE.UPIDADDR] // under lock123///   // tempUPID can't have any reserved bit set124///   IF (tempUPID[15:2] != 0 OR tempUPID[31:24] != 0)125///     GP (0) // release lock126///   FI127///   tempUPID.PIR[tempUITTE.UV] := 1;128///   IF (tempUPID.SN == 0 AND tempUPID.ON == 0)129///     tempUPID.ON := 1130///     sendNotify := 1131///   ELSE132///     sendNotify := 0133///   FI134///   MEM[tempUITTE.UPIDADDR] := tempUPID // release lock135///   IF sendNotify == 1136///     IF IA32_APIC_BASE[10] == 1 // local APIC is in x2APIC mode137///       // send ordinary IPI with vector tempUPID.NV to 32-bit physical APIC138///       // ID tempUPID.NDST139///       SendOrdinaryIPI(tempUPID.NV, tempUPID.NDST)140///     ELSE141///       // send ordinary IPI with vector tempUPID.NV to 8-bit physical APIC142///       // ID tempUPID.NDST[15:8]143///       SendOrdinaryIPI(tempUPID.NV, tempUPID.NDST[15:8])144///     FI145///   FI146/// \endcode147static __inline__ void __DEFAULT_FN_ATTRS148_senduipi (unsigned long long __a)149{150  __builtin_ia32_senduipi(__a);151}152 153#endif /* __x86_64__ */154 155#undef __DEFAULT_FN_ATTRS156 157#endif /* __UINTRINTRIN_H */158