471 lines · cpp
1// RUN: %clang_cc1 -std=c++17 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir2// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR3// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll4// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM5// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll6// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG7 8void c0(int a, int b) {9 bool x = a > b;10 x = a < b;11 x = a <= b;12 x = a >= b;13 x = a != b;14 x = a == b;15}16 17// CIR-LABEL: cir.func{{.*}} @_Z2c0ii(18 19// CIR: %[[A_PTR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["a", init]20// CIR: %[[B_PTR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["b", init]21// CIR: %[[X_PTR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["x", init]22 23// CIR: %[[A1:.*]] = cir.load{{.*}} %[[A_PTR]]24// CIR: %[[B1:.*]] = cir.load{{.*}} %[[B_PTR]]25// CIR: %{{.*}} = cir.cmp(gt, %[[A1]], %[[B1]]) : !s32i, !cir.bool26// CIR: cir.store{{.*}} {{.*}}, %[[X_PTR]]27 28// CIR: %[[A2:.*]] = cir.load{{.*}} %[[A_PTR]]29// CIR: %[[B2:.*]] = cir.load{{.*}} %[[B_PTR]]30// CIR: %{{.*}} = cir.cmp(lt, %[[A2]], %[[B2]]) : !s32i, !cir.bool31 32// CIR: %[[A3:.*]] = cir.load{{.*}} %[[A_PTR]]33// CIR: %[[B3:.*]] = cir.load{{.*}} %[[B_PTR]]34// CIR: %{{.*}} = cir.cmp(le, %[[A3]], %[[B3]]) : !s32i, !cir.bool35 36// CIR: %[[A4:.*]] = cir.load{{.*}} %[[A_PTR]]37// CIR: %[[B4:.*]] = cir.load{{.*}} %[[B_PTR]]38// CIR: %{{.*}} = cir.cmp(ge, %[[A4]], %[[B4]]) : !s32i, !cir.bool39 40// CIR: %[[A5:.*]] = cir.load{{.*}} %[[A_PTR]]41// CIR: %[[B5:.*]] = cir.load{{.*}} %[[B_PTR]]42// CIR: %{{.*}} = cir.cmp(ne, %[[A5]], %[[B5]]) : !s32i, !cir.bool43 44// CIR: %[[A6:.*]] = cir.load{{.*}} %[[A_PTR]]45// CIR: %[[B6:.*]] = cir.load{{.*}} %[[B_PTR]]46// CIR: %{{.*}} = cir.cmp(eq, %[[A6]], %[[B6]]) : !s32i, !cir.bool47 48// LLVM-LABEL: define{{.*}} void @_Z2c0ii(i32 %0, i32 %1){{.*}} {49// LLVM: %[[PTR1:.*]] = alloca i32, i64 150// LLVM: %[[PTR2:.*]] = alloca i32, i64 151// LLVM: %[[BOOL_PTR:.*]] = alloca i8, i64 152// LLVM: store i32 %0, ptr %[[PTR1]]53// LLVM: store i32 %1, ptr %[[PTR2]]54 55// LLVM: %[[A1:.*]] = load i32, ptr %[[PTR1]]56// LLVM: %[[B1:.*]] = load i32, ptr %[[PTR2]]57// LLVM: %[[CMP1:.*]] = icmp sgt i32 %[[A1]], %[[B1]]58// LLVM: %[[ZEXT1:.*]] = zext i1 %[[CMP1]] to i859// LLVM: store i8 %[[ZEXT1]], ptr %[[BOOL_PTR]]60 61// LLVM: %[[A2:.*]] = load i32, ptr %[[PTR1]]62// LLVM: %[[B2:.*]] = load i32, ptr %[[PTR2]]63// LLVM: %[[CMP2:.*]] = icmp slt i32 %[[A2]], %[[B2]]64// LLVM: %[[ZEXT2:.*]] = zext i1 %[[CMP2]] to i865// LLVM: store i8 %[[ZEXT2]], ptr %[[BOOL_PTR]]66 67// LLVM: %[[A3:.*]] = load i32, ptr %[[PTR1]]68// LLVM: %[[B3:.*]] = load i32, ptr %[[PTR2]]69// LLVM: %[[CMP3:.*]] = icmp sle i32 %[[A3]], %[[B3]]70// LLVM: %[[ZEXT3:.*]] = zext i1 %[[CMP3]] to i871// LLVM: store i8 %[[ZEXT3]], ptr %[[BOOL_PTR]]72 73// LLVM: %[[A4:.*]] = load i32, ptr %[[PTR1]]74// LLVM: %[[B4:.*]] = load i32, ptr %[[PTR2]]75// LLVM: %[[CMP4:.*]] = icmp sge i32 %[[A4]], %[[B4]]76// LLVM: %[[ZEXT4:.*]] = zext i1 %[[CMP4]] to i877// LLVM: store i8 %[[ZEXT4]], ptr %[[BOOL_PTR]]78 79// LLVM: %[[A5:.*]] = load i32, ptr %[[PTR1]]80// LLVM: %[[B5:.*]] = load i32, ptr %[[PTR2]]81// LLVM: %[[CMP5:.*]] = icmp ne i32 %[[A5]], %[[B5]]82// LLVM: %[[ZEXT5:.*]] = zext i1 %[[CMP5]] to i883// LLVM: store i8 %[[ZEXT5]], ptr %[[BOOL_PTR]]84 85// LLVM: %[[A6:.*]] = load i32, ptr %[[PTR1]]86// LLVM: %[[B6:.*]] = load i32, ptr %[[PTR2]]87// LLVM: %[[CMP6:.*]] = icmp eq i32 %[[A6]], %[[B6]]88// LLVM: %[[ZEXT6:.*]] = zext i1 %[[CMP6]] to i889// LLVM: store i8 %[[ZEXT6]], ptr %[[BOOL_PTR]]90 91// OGCG-LABEL: define{{.*}} void @_Z2c0ii(i32 {{.*}} %a, i32 {{.*}} %b) {{.*}} {92// OGCG: %[[PTR1:.*]] = alloca i3293// OGCG: %[[PTR2:.*]] = alloca i3294// OGCG: %[[BOOL_PTR:.*]] = alloca i895// OGCG: store i32 %a, ptr %[[PTR1]]96// OGCG: store i32 %b, ptr %[[PTR2]]97 98// OGCO: %[[A1:.*]] = load i32, ptr %[[PTR1]]99// OGCO: %[[B1:.*]] = load i32, ptr %[[PTR2]]100// OGCO: %[[CMP1:.*]] = icmp sgt i32 %[[A1]], %[[B1]]101// OGCO: %[[ZEXT1:.*]] = zext i1 %[[CMP1]] to i8102// OGCO: store i8 %[[ZEXT1]], ptr %[[BOOL_PTR]]103 104// OGCO: %[[A2:.*]] = load i32, ptr %[[PTR1]]105// OGCO: %[[B2:.*]] = load i32, ptr %[[PTR2]]106// OGCO: %[[CMP2:.*]] = icmp slt i32 %[[A2]], %[[B2]]107// OGCO: %[[ZEXT2:.*]] = zext i1 %[[CMP2]] to i8108// OGCO: store i8 %[[ZEXT2]], ptr %[[BOOL_PTR]]109 110// OGCO: %[[A3:.*]] = load i32, ptr %[[PTR1]]111// OGCO: %[[B3:.*]] = load i32, ptr %[[PTR2]]112// OGCO: %[[CMP3:.*]] = icmp sle i32 %[[A3]], %[[B3]]113// OGCO: %[[ZEXT3:.*]] = zext i1 %[[CMP3]] to i8114// OGCO: store i8 %[[ZEXT3]], ptr %[[BOOL_PTR]]115 116// OGCO: %[[A4:.*]] = load i32, ptr %[[PTR1]]117// OGCO: %[[B4:.*]] = load i32, ptr %[[PTR2]]118// OGCO: %[[CMP4:.*]] = icmp sge i32 %[[A4]], %[[B4]]119// OGCO: %[[ZEXT4:.*]] = zext i1 %[[CMP4]] to i8120// OGCO: store i8 %[[ZEXT4]], ptr %[[BOOL_PTR]]121 122// OGCO: %[[A5:.*]] = load i32, ptr %[[PTR1]]123// OGCO: %[[B5:.*]] = load i32, ptr %[[PTR2]]124// OGCO: %[[CMP5:.*]] = icmp ne i32 %[[A5]], %[[B5]]125// OGCO: %[[ZEXT5:.*]] = zext i1 %[[CMP5]] to i8126// OGCO: store i8 %[[ZEXT5]], ptr %[[BOOL_PTR]]127 128// OGCO: %[[A6:.*]] = load i32, ptr %[[PTR1]]129// OGCO: %[[B6:.*]] = load i32, ptr %[[PTR2]]130// OGCO: %[[CMP6:.*]] = icmp eq i32 %[[A6]], %[[B6]]131// OGCO: %[[ZEXT6:.*]] = zext i1 %[[CMP6]] to i8132// OGCO: store i8 %[[ZEXT6]], ptr %[[BOOL_PTR]]133 134void c0_unsigned(unsigned int a, unsigned int b) {135 bool x = a > b;136 x = a < b;137 x = a <= b;138 x = a >= b;139 x = a != b;140 x = a == b;141}142 143// CIR-LABEL: cir.func{{.*}} @_Z11c0_unsignedjj(144 145// CIR: %[[U_A_PTR:.*]] = cir.alloca !u32i, !cir.ptr<!u32i>, ["a", init]146// CIR: %[[U_B_PTR:.*]] = cir.alloca !u32i, !cir.ptr<!u32i>, ["b", init]147// CIR: %[[U_X_PTR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["x", init]148 149// CIR: %[[UA1:.*]] = cir.load{{.*}} %[[U_A_PTR]]150// CIR: %[[UB1:.*]] = cir.load{{.*}} %[[U_B_PTR]]151// CIR: %{{.*}} = cir.cmp(gt, %[[UA1]], %[[UB1]]) : !u32i, !cir.bool152 153// CIR: %[[UA2:.*]] = cir.load{{.*}} %[[U_A_PTR]]154// CIR: %[[UB2:.*]] = cir.load{{.*}} %[[U_B_PTR]]155// CIR: %{{.*}} = cir.cmp(lt, %[[UA2]], %[[UB2]]) : !u32i, !cir.bool156 157// CIR: %[[UA3:.*]] = cir.load{{.*}} %[[U_A_PTR]]158// CIR: %[[UB3:.*]] = cir.load{{.*}} %[[U_B_PTR]]159// CIR: %{{.*}} = cir.cmp(le, %[[UA3]], %[[UB3]]) : !u32i, !cir.bool160 161// CIR: %[[UA4:.*]] = cir.load{{.*}} %[[U_A_PTR]]162// CIR: %[[UB4:.*]] = cir.load{{.*}} %[[U_B_PTR]]163// CIR: %{{.*}} = cir.cmp(ge, %[[UA4]], %[[UB4]]) : !u32i, !cir.bool164 165// CIR: %[[UA5:.*]] = cir.load{{.*}} %[[U_A_PTR]]166// CIR: %[[UB5:.*]] = cir.load{{.*}} %[[U_B_PTR]]167// CIR: %{{.*}} = cir.cmp(ne, %[[UA5]], %[[UB5]]) : !u32i, !cir.bool168 169// CIR: %[[UA6:.*]] = cir.load{{.*}} %[[U_A_PTR]]170// CIR: %[[UB6:.*]] = cir.load{{.*}} %[[U_B_PTR]]171// CIR: %{{.*}} = cir.cmp(eq, %[[UA6]], %[[UB6]]) : !u32i, !cir.bool172 173// LLVM-LABEL: define{{.*}} void @_Z11c0_unsignedjj(i32 %0, i32 %1){{.*}} {174// LLVM: %[[U_PTR1:.*]] = alloca i32, i64 1175// LLVM: %[[U_PTR2:.*]] = alloca i32, i64 1176// LLVM: %[[U_BOOL_PTR:.*]] = alloca i8, i64 1177// LLVM: store i32 %0, ptr %[[U_PTR1]]178// LLVM: store i32 %1, ptr %[[U_PTR2]]179 180// LLVM: %[[UA1:.*]] = load i32, ptr %[[U_PTR1]]181// LLVM: %[[UB1:.*]] = load i32, ptr %[[U_PTR2]]182// LLVM: %[[UCMP1:.*]] = icmp ugt i32 %[[UA1]], %[[UB1]]183// LLVM: %[[UZEXT1:.*]] = zext i1 %[[UCMP1]] to i8184// LLVM: store i8 %[[UZEXT1]], ptr %[[U_BOOL_PTR]]185 186// LLVM: %[[UA2:.*]] = load i32, ptr %[[U_PTR1]]187// LLVM: %[[UB2:.*]] = load i32, ptr %[[U_PTR2]]188// LLVM: %[[UCMP2:.*]] = icmp ult i32 %[[UA2]], %[[UB2]]189// LLVM: %[[UZEXT2:.*]] = zext i1 %[[UCMP2]] to i8190// LLVM: store i8 %[[UZEXT2]], ptr %[[U_BOOL_PTR]]191 192// LLVM: %[[UA3:.*]] = load i32, ptr %[[U_PTR1]]193// LLVM: %[[UB3:.*]] = load i32, ptr %[[U_PTR2]]194// LLVM: %[[UCMP3:.*]] = icmp ule i32 %[[UA3]], %[[UB3]]195// LLVM: %[[UZEXT3:.*]] = zext i1 %[[UCMP3]] to i8196// LLVM: store i8 %[[UZEXT3]], ptr %[[U_BOOL_PTR]]197 198// LLVM: %[[UA4:.*]] = load i32, ptr %[[U_PTR1]]199// LLVM: %[[UB4:.*]] = load i32, ptr %[[U_PTR2]]200// LLVM: %[[UCMP4:.*]] = icmp uge i32 %[[UA4]], %[[UB4]]201// LLVM: %[[UZEXT4:.*]] = zext i1 %[[UCMP4]] to i8202// LLVM: store i8 %[[UZEXT4]], ptr %[[U_BOOL_PTR]]203 204// LLVM: %[[UA5:.*]] = load i32, ptr %[[U_PTR1]]205// LLVM: %[[UB5:.*]] = load i32, ptr %[[U_PTR2]]206// LLVM: %[[UCMP5:.*]] = icmp ne i32 %[[UA5]], %[[UB5]]207// LLVM: %[[UZEXT5:.*]] = zext i1 %[[UCMP5]] to i8208// LLVM: store i8 %[[UZEXT5]], ptr %[[U_BOOL_PTR]]209 210// LLVM: %[[UA6:.*]] = load i32, ptr %[[U_PTR1]]211// LLVM: %[[UB6:.*]] = load i32, ptr %[[U_PTR2]]212// LLVM: %[[UCMP6:.*]] = icmp eq i32 %[[UA6]], %[[UB6]]213// LLVM: %[[UZEXT6:.*]] = zext i1 %[[UCMP6]] to i8214// LLVM: store i8 %[[UZEXT6]], ptr %[[U_BOOL_PTR]]215 216// OGCG-LABEL: define{{.*}} void @_Z11c0_unsignedjj(i32 {{.*}} %a, i32 {{.*}} %b) {{.*}} {217// OGCG: %[[U_PTR1:.*]] = alloca i32218// OGCG: %[[U_PTR2:.*]] = alloca i32219// OGCG: %[[U_BOOL_PTR:.*]] = alloca i8220// OGCG: store i32 %a, ptr %[[U_PTR1]]221// OGCG: store i32 %b, ptr %[[U_PTR2]]222 223// OGCG: %[[UA1:.*]] = load i32, ptr %[[U_PTR1]]224// OGCG: %[[UB1:.*]] = load i32, ptr %[[U_PTR2]]225// OGCG: %[[UCMP1:.*]] = icmp ugt i32 %[[UA1]], %[[UB1]]226// OGCG: %[[UZEXT1:.*]] = zext i1 %[[UCMP1]] to i8227// OGCG: store i8 %[[UZEXT1]], ptr %[[U_BOOL_PTR]]228 229// OGCG: %[[UA2:.*]] = load i32, ptr %[[U_PTR1]]230// OGCG: %[[UB2:.*]] = load i32, ptr %[[U_PTR2]]231// OGCG: %[[UCMP2:.*]] = icmp ult i32 %[[UA2]], %[[UB2]]232// OGCG: %[[UZEXT2:.*]] = zext i1 %[[UCMP2]] to i8233// OGCG: store i8 %[[UZEXT2]], ptr %[[U_BOOL_PTR]]234 235// OGCG: %[[UA3:.*]] = load i32, ptr %[[U_PTR1]]236// OGCG: %[[UB3:.*]] = load i32, ptr %[[U_PTR2]]237// OGCG: %[[UCMP3:.*]] = icmp ule i32 %[[UA3]], %[[UB3]]238// OGCG: %[[UZEXT3:.*]] = zext i1 %[[UCMP3]] to i8239// OGCG: store i8 %[[UZEXT3]], ptr %[[U_BOOL_PTR]]240 241// OGCG: %[[UA4:.*]] = load i32, ptr %[[U_PTR1]]242// OGCG: %[[UB4:.*]] = load i32, ptr %[[U_PTR2]]243// OGCG: %[[UCMP4:.*]] = icmp uge i32 %[[UA4]], %[[UB4]]244// OGCG: %[[UZEXT4:.*]] = zext i1 %[[UCMP4]] to i8245// OGCG: store i8 %[[UZEXT4]], ptr %[[U_BOOL_PTR]]246 247// OGCG: %[[UA5:.*]] = load i32, ptr %[[U_PTR1]]248// OGCG: %[[UB5:.*]] = load i32, ptr %[[U_PTR2]]249// OGCG: %[[UCMP5:.*]] = icmp ne i32 %[[UA5]], %[[UB5]]250// OGCG: %[[UZEXT5:.*]] = zext i1 %[[UCMP5]] to i8251// OGCG: store i8 %[[UZEXT5]], ptr %[[U_BOOL_PTR]]252 253// OGCG: %[[UA6:.*]] = load i32, ptr %[[U_PTR1]]254// OGCG: %[[UB6:.*]] = load i32, ptr %[[U_PTR2]]255// OGCG: %[[UCMP6:.*]] = icmp eq i32 %[[UA6]], %[[UB6]]256// OGCG: %[[UZEXT6:.*]] = zext i1 %[[UCMP6]] to i8257// OGCG: store i8 %[[UZEXT6]], ptr %[[U_BOOL_PTR]]258 259void c0_float(float a, float b) {260 bool x = a > b;261 x = a < b;262 x = a <= b;263 x = a >= b;264 x = a != b;265 x = a == b;266}267 268// CIR-LABEL: cir.func{{.*}} @_Z8c0_floatff(%arg0: !cir.float{{.*}}, %arg1: !cir.float{{.*}})269// CIR: %[[A_PTR:.*]] = cir.alloca !cir.float, !cir.ptr<!cir.float>, ["a", init]270// CIR: %[[B_PTR:.*]] = cir.alloca !cir.float, !cir.ptr<!cir.float>, ["b", init]271// CIR: %[[X_PTR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["x", init]272 273// CIR: cir.store{{.*}} %arg0, %[[A_PTR]] : !cir.float, !cir.ptr<!cir.float>274// CIR: cir.store{{.*}} %arg1, %[[B_PTR]] : !cir.float, !cir.ptr<!cir.float>275 276// CIR: %[[A1:.*]] = cir.load{{.*}} %[[A_PTR]] : !cir.ptr<!cir.float>, !cir.float277// CIR: %[[B1:.*]] = cir.load{{.*}} %[[B_PTR]] : !cir.ptr<!cir.float>, !cir.float278// CIR: %[[CMP1:.*]] = cir.cmp(gt, %[[A1]], %[[B1]]) : !cir.float, !cir.bool279// CIR: cir.store{{.*}} %[[CMP1]], %[[X_PTR]] : !cir.bool, !cir.ptr<!cir.bool>280 281// CIR: %[[A2:.*]] = cir.load{{.*}} %[[A_PTR]] : !cir.ptr<!cir.float>, !cir.float282// CIR: %[[B2:.*]] = cir.load{{.*}} %[[B_PTR]] : !cir.ptr<!cir.float>, !cir.float283// CIR: %[[CMP2:.*]] = cir.cmp(lt, %[[A2]], %[[B2]]) : !cir.float, !cir.bool284// CIR: cir.store{{.*}} %[[CMP2]], %[[X_PTR]] : !cir.bool, !cir.ptr<!cir.bool>285 286// CIR: %[[A3:.*]] = cir.load{{.*}} %[[A_PTR]] : !cir.ptr<!cir.float>, !cir.float287// CIR: %[[B3:.*]] = cir.load{{.*}} %[[B_PTR]] : !cir.ptr<!cir.float>, !cir.float288// CIR: %[[CMP3:.*]] = cir.cmp(le, %[[A3]], %[[B3]]) : !cir.float, !cir.bool289// CIR: cir.store{{.*}} %[[CMP3]], %[[X_PTR]] : !cir.bool, !cir.ptr<!cir.bool>290 291// CIR: %[[A4:.*]] = cir.load{{.*}} %[[A_PTR]] : !cir.ptr<!cir.float>, !cir.float292// CIR: %[[B4:.*]] = cir.load{{.*}} %[[B_PTR]] : !cir.ptr<!cir.float>, !cir.float293// CIR: %[[CMP4:.*]] = cir.cmp(ge, %[[A4]], %[[B4]]) : !cir.float, !cir.bool294// CIR: cir.store{{.*}} %[[CMP4]], %[[X_PTR]] : !cir.bool, !cir.ptr<!cir.bool>295 296// CIR: %[[A5:.*]] = cir.load{{.*}} %[[A_PTR]] : !cir.ptr<!cir.float>, !cir.float297// CIR: %[[B5:.*]] = cir.load{{.*}} %[[B_PTR]] : !cir.ptr<!cir.float>, !cir.float298// CIR: %[[CMP5:.*]] = cir.cmp(ne, %[[A5]], %[[B5]]) : !cir.float, !cir.bool299// CIR: cir.store{{.*}} %[[CMP5]], %[[X_PTR]] : !cir.bool, !cir.ptr<!cir.bool>300 301// CIR: %[[A6:.*]] = cir.load{{.*}} %[[A_PTR]] : !cir.ptr<!cir.float>, !cir.float302// CIR: %[[B6:.*]] = cir.load{{.*}} %[[B_PTR]] : !cir.ptr<!cir.float>, !cir.float303// CIR: %[[CMP6:.*]] = cir.cmp(eq, %[[A6]], %[[B6]]) : !cir.float, !cir.bool304// CIR: cir.store{{.*}} %[[CMP6]], %[[X_PTR]] : !cir.bool, !cir.ptr<!cir.bool>305 306// LLVM-LABEL: define{{.*}} void @_Z8c0_floatff(float %0, float %1){{.*}} {307// LLVM: %[[A_PTR:.*]] = alloca float308// LLVM: %[[B_PTR:.*]] = alloca float309// LLVM: store float %0, ptr %[[A_PTR]]310// LLVM: store float %1, ptr %[[B_PTR]]311 312// LLVM: load float, ptr %[[A_PTR]]313// LLVM: load float, ptr %[[B_PTR]]314// LLVM: fcmp ogt float %{{.*}}, %{{.*}}315// LLVM: zext i1 %{{.*}} to i8316 317// LLVM: fcmp olt float %{{.*}}, %{{.*}}318// LLVM: fcmp ole float %{{.*}}, %{{.*}}319// LLVM: fcmp oge float %{{.*}}, %{{.*}}320// LLVM: fcmp une float %{{.*}}, %{{.*}}321// LLVM: fcmp oeq float %{{.*}}, %{{.*}}322 323// OGCG-LABEL: define{{.*}} void @_Z8c0_floatff(float {{.*}} %a, float {{.*}} %b) {{.*}} {324// OGCG: %[[A_PTR:.*]] = alloca float325// OGCG: %[[B_PTR:.*]] = alloca float326// OGCG: store float %a, ptr %[[A_PTR]]327// OGCG: store float %b, ptr %[[B_PTR]]328 329// OGCG: load float, ptr %[[A_PTR]]330// OGCG: load float, ptr %[[B_PTR]]331// OGCG: fcmp ogt float %{{.*}}, %{{.*}}332// OGCG: zext i1 %{{.*}} to i8333 334// OGCG: fcmp olt float %{{.*}}, %{{.*}}335// OGCG: fcmp ole float %{{.*}}, %{{.*}}336// OGCG: fcmp oge float %{{.*}}, %{{.*}}337// OGCG: fcmp une float %{{.*}}, %{{.*}}338// OGCG: fcmp oeq float %{{.*}}, %{{.*}}339 340void pointer_cmp(int *a, int *b) {341 bool x = a > b;342 x = a < b;343 x = a >= b;344 x = a <= b;345 x = a == b;346 x = a != b;347}348 349// CIR-LABEL: cir.func{{.*}} @_Z11pointer_cmpPiS_(%arg0: !cir.ptr<!s32i>{{.*}}, %arg1: !cir.ptr<!s32i>{{.*}}){{.*}} {350// CIR: %[[A_PTR:.*]] = cir.alloca !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>>, ["a", init]351// CIR: %[[B_PTR:.*]] = cir.alloca !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>>, ["b", init]352 353// CIR: %[[A1:.*]] = cir.load{{.*}} %[[A_PTR]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!s32i>354// CIR: %[[B1:.*]] = cir.load{{.*}} %[[B_PTR]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!s32i>355// CIR: %{{.*}} = cir.cmp(gt, %[[A1]], %[[B1]]) : !cir.ptr<!s32i>, !cir.bool356 357// CIR: cir.cmp(lt, {{.*}}, {{.*}}) : !cir.ptr<!s32i>, !cir.bool358// CIR: cir.cmp(ge, {{.*}}, {{.*}}) : !cir.ptr<!s32i>, !cir.bool359// CIR: cir.cmp(le, {{.*}}, {{.*}}) : !cir.ptr<!s32i>, !cir.bool360// CIR: cir.cmp(eq, {{.*}}, {{.*}}) : !cir.ptr<!s32i>, !cir.bool361// CIR: cir.cmp(ne, {{.*}}, {{.*}}) : !cir.ptr<!s32i>, !cir.bool362 363// LLVM-LABEL: define{{.*}} void @_Z11pointer_cmpPiS_(ptr %0, ptr %1){{.*}} {364// LLVM: %[[A_PTR:.*]] = alloca ptr365// LLVM: %[[B_PTR:.*]] = alloca ptr366// LLVM: store ptr %0, ptr %[[A_PTR]]367// LLVM: store ptr %1, ptr %[[B_PTR]]368 369// LLVM: load ptr, ptr %[[A_PTR]]370// LLVM: load ptr, ptr %[[B_PTR]]371// LLVM: icmp ugt ptr %{{.*}}, %{{.*}}372// LLVM: zext i1 %{{.*}} to i8373// LLVM: icmp ult ptr %{{.*}}, %{{.*}}374// LLVM: icmp uge ptr %{{.*}}, %{{.*}}375// LLVM: icmp ule ptr %{{.*}}, %{{.*}}376// LLVM: icmp eq ptr %{{.*}}, %{{.*}}377// LLVM: icmp ne ptr %{{.*}}, %{{.*}}378 379// OGCG-LABEL: define{{.*}} void @_Z11pointer_cmpPiS_(ptr {{.*}} %a, ptr {{.*}} %b) {{.*}} {380// OGCG: %[[A_PTR:.*]] = alloca ptr381// OGCG: %[[B_PTR:.*]] = alloca ptr382// OGCG: store ptr %a, ptr %[[A_PTR]]383// OGCG: store ptr %b, ptr %[[B_PTR]]384 385// OGCG: load ptr, ptr %[[A_PTR]]386// OGCG: load ptr, ptr %[[B_PTR]]387// OGCG: icmp ugt ptr %{{.*}}, %{{.*}}388// OGCG: zext i1 %{{.*}} to i8389// OGCG: icmp ult ptr %{{.*}}, %{{.*}}390// OGCG: icmp uge ptr %{{.*}}, %{{.*}}391// OGCG: icmp ule ptr %{{.*}}, %{{.*}}392// OGCG: icmp eq ptr %{{.*}}, %{{.*}}393// OGCG: icmp ne ptr %{{.*}}, %{{.*}}394 395void bool_cmp(bool a, bool b) {396 bool x = a > b;397 x = a < b;398 x = a >= b;399 x = a <= b;400 x = a == b;401 x = a != b;402}403 404// CIR-LABEL: cir.func{{.*}} @_Z8bool_cmpbb(%arg0: !cir.bool{{.*}}, %arg1: !cir.bool{{.*}}){{.*}} {405// CIR: %[[A_PTR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["a", init]406// CIR: %[[B_PTR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["b", init]407// CIR: %[[X_PTR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["x", init]408 409// CIR: %[[A1:.*]] = cir.load{{.*}} %[[A_PTR]] : !cir.ptr<!cir.bool>, !cir.bool410// CIR: %[[A1_INT:.*]] = cir.cast bool_to_int %[[A1]] : !cir.bool -> !s32i411// CIR: %[[B1:.*]] = cir.load{{.*}} %[[B_PTR]] : !cir.ptr<!cir.bool>, !cir.bool412// CIR: %[[B1_INT:.*]] = cir.cast bool_to_int %[[B1]] : !cir.bool -> !s32i413// CIR: %{{.*}} = cir.cmp(gt, %[[A1_INT]], %[[B1_INT]]) : !s32i, !cir.bool414// CIR: cir.store{{.*}} {{.*}}, %[[X_PTR]] : !cir.bool, !cir.ptr<!cir.bool>415 416// CIR: cir.cmp(lt417// CIR: cir.cmp(ge418// CIR: cir.cmp(le419// CIR: cir.cmp(eq420// CIR: cir.cmp(ne421 422// LLVM-LABEL: define{{.*}} void @_Z8bool_cmpbb(i1 %0, i1 %1){{.*}} {423// LLVM: %[[A_PTR:.*]] = alloca i8424// LLVM: %[[B_PTR:.*]] = alloca i8425// LLVM: %[[X_PTR:.*]] = alloca i8426// LLVM: %[[A_INIT:.*]] = zext i1 %0 to i8427// LLVM: store i8 %[[A_INIT]], ptr %[[A_PTR]]428// LLVM: %[[B_INIT:.*]] = zext i1 %1 to i8429// LLVM: store i8 %[[B_INIT]], ptr %[[B_PTR]]430 431// LLVM: %[[A1:.*]] = load i8, ptr %[[A_PTR]]432// LLVM: %[[A1_TRUNC:.*]] = trunc i8 %[[A1]] to i1433// LLVM: %[[A1_EXT:.*]] = zext i1 %[[A1_TRUNC]] to i32434// LLVM: %[[B1:.*]] = load i8, ptr %[[B_PTR]]435// LLVM: %[[B1_TRUNC:.*]] = trunc i8 %[[B1]] to i1436// LLVM: %[[B1_EXT:.*]] = zext i1 %[[B1_TRUNC]] to i32437// LLVM: %[[CMP1:.*]] = icmp sgt i32 %[[A1_EXT]], %[[B1_EXT]]438// LLVM: %[[CMP1_BOOL:.*]] = zext i1 %[[CMP1]] to i8439// LLVM: store i8 %[[CMP1_BOOL]], ptr %[[X_PTR]]440 441// LLVM: icmp slt442// LLVM: icmp sge443// LLVM: icmp sle444// LLVM: icmp eq445// LLVM: icmp ne446 447// OGCG-LABEL: define{{.*}} void @_Z8bool_cmpbb(i1 {{.*}} %a, i1 {{.*}} %b) {{.*}} {448// OGCG: %[[A_PTR:.*]] = alloca i8449// OGCG: %[[B_PTR:.*]] = alloca i8450// OGCG: %[[X_PTR:.*]] = alloca i8451// OGCG: %[[A_INIT:.*]] = zext i1 %a to i8452// OGCG: store i8 %[[A_INIT]], ptr %[[A_PTR]]453// OGCG: %[[B_INIT:.*]] = zext i1 %b to i8454// OGCG: store i8 %[[B_INIT]], ptr %[[B_PTR]]455 456// OGCG: %[[A1:.*]] = load i8, ptr %[[A_PTR]]457// OGCG: %[[A1_TRUNC:.*]] = trunc i8 %[[A1]] to i1458// OGCG: %[[A1_EXT:.*]] = zext i1 %[[A1_TRUNC]] to i32459// OGCG: %[[B1:.*]] = load i8, ptr %[[B_PTR]]460// OGCG: %[[B1_TRUNC:.*]] = trunc i8 %[[B1]] to i1461// OGCG: %[[B1_EXT:.*]] = zext i1 %[[B1_TRUNC]] to i32462// OGCG: %[[CMP1:.*]] = icmp sgt i32 %[[A1_EXT]], %[[B1_EXT]]463// OGCG: %[[CMP1_BOOL:.*]] = zext i1 %[[CMP1]] to i8464// OGCG: store i8 %[[CMP1_BOOL]], ptr %[[X_PTR]]465 466// OGCG: icmp slt467// OGCG: icmp sge468// OGCG: icmp sle469// OGCG: icmp eq470// OGCG: icmp ne471