74 lines · c
1// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -fclangir -emit-cir -o %t.cir -Wall -Werror2// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s3// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -fclangir -emit-llvm -o %t.ll -Wall -Werror4// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s5 6// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -fno-signed-char -fclangir -emit-cir -o %t.cir -Wall -Werror7// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s8// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -fclangir -emit-llvm -o %t.ll -Wall -Werror9// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s10 11// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG12// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG13 14// This test mimics clang/test/CodeGen/X86/sse-builtins.c, which eventually15// CIR shall be able to support fully.16 17#include <immintrin.h>18 19void test_mm_setcsr(unsigned int A) {20 // CIR-LABEL: test_mm_setcsr21 // CIR: cir.store {{.*}}, {{.*}} : !u32i22 // CIR: cir.call_llvm_intrinsic "x86.sse.ldmxcsr" {{.*}} : (!cir.ptr<!u32i>) -> !void23 24 // LLVM-LABEL: test_mm_setcsr25 // LLVM: store i3226 // LLVM: call void @llvm.x86.sse.ldmxcsr(ptr {{.*}})27 28 // OGCG-LABEL: test_mm_setcsr29 // OGCG: store i3230 // OGCG: call void @llvm.x86.sse.ldmxcsr(ptr {{.*}})31 _mm_setcsr(A);32}33 34unsigned int test_mm_getcsr(void) {35 // CIR-LABEL: test_mm_getcsr36 // CIR: cir.call_llvm_intrinsic "x86.sse.stmxcsr" %{{.*}} : (!cir.ptr<!u32i>) -> !void37 // CIR: cir.load {{.*}} : !cir.ptr<!u32i>, !u32i38 39 // LLVM-LABEL: test_mm_getcsr40 // LLVM: call void @llvm.x86.sse.stmxcsr(ptr %{{.*}})41 // LLVM: load i3242 43 // OGCG-LABEL: test_mm_getcsr44 // OGCG: call void @llvm.x86.sse.stmxcsr(ptr %{{.*}})45 // OGCG: load i3246 return _mm_getcsr();47}48 49void test_mm_sfence(void) {50 // CIR-LABEL: test_mm_sfence51 // LLVM-LABEL: test_mm_sfence52 // OGCG-LABEL: test_mm_sfence53 _mm_sfence();54 // CIR: {{%.*}} = cir.call_llvm_intrinsic "x86.sse.sfence" : () -> !void55 // LLVM: call void @llvm.x86.sse.sfence()56 // OGCG: call void @llvm.x86.sse.sfence()57}58 59__m128 test_mm_undefined_ps(void) {60 // CIR-LABEL: _mm_undefined_ps61 // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double>62 // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<4 x !cir.float>63 // CIR: cir.return %{{.*}} : !cir.vector<4 x !cir.float>64 65 // LLVM-LABEL: test_mm_undefined_ps66 // LLVM: store <4 x float> zeroinitializer, ptr %[[A:.*]], align 1667 // LLVM: %{{.*}} = load <4 x float>, ptr %[[A]], align 1668 // LLVM: ret <4 x float> %{{.*}}69 70 // OGCG-LABEL: test_mm_undefined_ps71 // OGCG: ret <4 x float> zeroinitializer72 return _mm_undefined_ps();73}74