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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 62// RUN: %clang_cc1 %s -emit-llvm -o - -ffreestanding -triple=aarch64-linux-gnu -pthread | FileCheck %s3 4#include <stdint.h>5#include <stdatomic.h>6 7// CHECK-LABEL: define dso_local void @test_minmax_postop(8// CHECK-SAME: ptr noundef [[F32:%.*]], ptr noundef [[F16:%.*]], ptr noundef [[BF16:%.*]], ptr noundef [[F64:%.*]]) #[[ATTR0:[0-9]+]] {9// CHECK-NEXT:  [[ENTRY:.*:]]10// CHECK-NEXT:    [[F32_ADDR:%.*]] = alloca ptr, align 811// CHECK-NEXT:    [[F16_ADDR:%.*]] = alloca ptr, align 812// CHECK-NEXT:    [[BF16_ADDR:%.*]] = alloca ptr, align 813// CHECK-NEXT:    [[F64_ADDR:%.*]] = alloca ptr, align 814// CHECK-NEXT:    [[DOTATOMICTMP:%.*]] = alloca double, align 815// CHECK-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca double, align 816// CHECK-NEXT:    [[DOTATOMICTMP1:%.*]] = alloca float, align 417// CHECK-NEXT:    [[ATOMIC_TEMP2:%.*]] = alloca float, align 418// CHECK-NEXT:    [[DOTATOMICTMP4:%.*]] = alloca half, align 219// CHECK-NEXT:    [[ATOMIC_TEMP5:%.*]] = alloca half, align 220// CHECK-NEXT:    [[DOTATOMICTMP7:%.*]] = alloca bfloat, align 221// CHECK-NEXT:    [[ATOMIC_TEMP8:%.*]] = alloca bfloat, align 222// CHECK-NEXT:    [[DOTATOMICTMP10:%.*]] = alloca double, align 823// CHECK-NEXT:    [[ATOMIC_TEMP11:%.*]] = alloca double, align 824// CHECK-NEXT:    [[DOTATOMICTMP13:%.*]] = alloca float, align 425// CHECK-NEXT:    [[ATOMIC_TEMP14:%.*]] = alloca float, align 426// CHECK-NEXT:    [[DOTATOMICTMP16:%.*]] = alloca half, align 227// CHECK-NEXT:    [[ATOMIC_TEMP17:%.*]] = alloca half, align 228// CHECK-NEXT:    [[DOTATOMICTMP19:%.*]] = alloca bfloat, align 229// CHECK-NEXT:    [[ATOMIC_TEMP20:%.*]] = alloca bfloat, align 230// CHECK-NEXT:    store ptr [[F32]], ptr [[F32_ADDR]], align 831// CHECK-NEXT:    store ptr [[F16]], ptr [[F16_ADDR]], align 832// CHECK-NEXT:    store ptr [[BF16]], ptr [[BF16_ADDR]], align 833// CHECK-NEXT:    store ptr [[F64]], ptr [[F64_ADDR]], align 834// CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[F64_ADDR]], align 835// CHECK-NEXT:    store double 4.210000e+01, ptr [[DOTATOMICTMP]], align 836// CHECK-NEXT:    [[TMP1:%.*]] = load double, ptr [[DOTATOMICTMP]], align 837// CHECK-NEXT:    [[TMP2:%.*]] = atomicrmw fmax ptr [[TMP0]], double [[TMP1]] release, align 838// CHECK-NEXT:    [[NEWVAL:%.*]] = call double @llvm.maxnum.f64(double [[TMP2]], double [[TMP1]])39// CHECK-NEXT:    store double [[NEWVAL]], ptr [[ATOMIC_TEMP]], align 840// CHECK-NEXT:    [[TMP3:%.*]] = load double, ptr [[ATOMIC_TEMP]], align 841// CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[F64_ADDR]], align 842// CHECK-NEXT:    store double [[TMP3]], ptr [[TMP4]], align 843// CHECK-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[F32_ADDR]], align 844// CHECK-NEXT:    store float 0x40450CCCC0000000, ptr [[DOTATOMICTMP1]], align 445// CHECK-NEXT:    [[TMP6:%.*]] = load float, ptr [[DOTATOMICTMP1]], align 446// CHECK-NEXT:    [[TMP7:%.*]] = atomicrmw fmax ptr [[TMP5]], float [[TMP6]] release, align 447// CHECK-NEXT:    [[NEWVAL3:%.*]] = call float @llvm.maxnum.f32(float [[TMP7]], float [[TMP6]])48// CHECK-NEXT:    store float [[NEWVAL3]], ptr [[ATOMIC_TEMP2]], align 449// CHECK-NEXT:    [[TMP8:%.*]] = load float, ptr [[ATOMIC_TEMP2]], align 450// CHECK-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[F32_ADDR]], align 851// CHECK-NEXT:    store float [[TMP8]], ptr [[TMP9]], align 452// CHECK-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[F16_ADDR]], align 853// CHECK-NEXT:    store half 0xH5143, ptr [[DOTATOMICTMP4]], align 254// CHECK-NEXT:    [[TMP11:%.*]] = load half, ptr [[DOTATOMICTMP4]], align 255// CHECK-NEXT:    [[TMP12:%.*]] = atomicrmw fmax ptr [[TMP10]], half [[TMP11]] release, align 256// CHECK-NEXT:    [[NEWVAL6:%.*]] = call half @llvm.maxnum.f16(half [[TMP12]], half [[TMP11]])57// CHECK-NEXT:    store half [[NEWVAL6]], ptr [[ATOMIC_TEMP5]], align 258// CHECK-NEXT:    [[TMP13:%.*]] = load half, ptr [[ATOMIC_TEMP5]], align 259// CHECK-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[F16_ADDR]], align 860// CHECK-NEXT:    store half [[TMP13]], ptr [[TMP14]], align 261// CHECK-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[BF16_ADDR]], align 862// CHECK-NEXT:    store bfloat 0xR4228, ptr [[DOTATOMICTMP7]], align 263// CHECK-NEXT:    [[TMP16:%.*]] = load bfloat, ptr [[DOTATOMICTMP7]], align 264// CHECK-NEXT:    [[TMP17:%.*]] = atomicrmw fmax ptr [[TMP15]], bfloat [[TMP16]] release, align 265// CHECK-NEXT:    [[NEWVAL9:%.*]] = call bfloat @llvm.maxnum.bf16(bfloat [[TMP17]], bfloat [[TMP16]])66// CHECK-NEXT:    store bfloat [[NEWVAL9]], ptr [[ATOMIC_TEMP8]], align 267// CHECK-NEXT:    [[TMP18:%.*]] = load bfloat, ptr [[ATOMIC_TEMP8]], align 268// CHECK-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[BF16_ADDR]], align 869// CHECK-NEXT:    store bfloat [[TMP18]], ptr [[TMP19]], align 270// CHECK-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[F64_ADDR]], align 871// CHECK-NEXT:    store double 4.210000e+01, ptr [[DOTATOMICTMP10]], align 872// CHECK-NEXT:    [[TMP21:%.*]] = load double, ptr [[DOTATOMICTMP10]], align 873// CHECK-NEXT:    [[TMP22:%.*]] = atomicrmw fmin ptr [[TMP20]], double [[TMP21]] release, align 874// CHECK-NEXT:    [[NEWVAL12:%.*]] = call double @llvm.minnum.f64(double [[TMP22]], double [[TMP21]])75// CHECK-NEXT:    store double [[NEWVAL12]], ptr [[ATOMIC_TEMP11]], align 876// CHECK-NEXT:    [[TMP23:%.*]] = load double, ptr [[ATOMIC_TEMP11]], align 877// CHECK-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[F64_ADDR]], align 878// CHECK-NEXT:    store double [[TMP23]], ptr [[TMP24]], align 879// CHECK-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[F32_ADDR]], align 880// CHECK-NEXT:    store float 0x40450CCCC0000000, ptr [[DOTATOMICTMP13]], align 481// CHECK-NEXT:    [[TMP26:%.*]] = load float, ptr [[DOTATOMICTMP13]], align 482// CHECK-NEXT:    [[TMP27:%.*]] = atomicrmw fmin ptr [[TMP25]], float [[TMP26]] release, align 483// CHECK-NEXT:    [[NEWVAL15:%.*]] = call float @llvm.minnum.f32(float [[TMP27]], float [[TMP26]])84// CHECK-NEXT:    store float [[NEWVAL15]], ptr [[ATOMIC_TEMP14]], align 485// CHECK-NEXT:    [[TMP28:%.*]] = load float, ptr [[ATOMIC_TEMP14]], align 486// CHECK-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[F32_ADDR]], align 887// CHECK-NEXT:    store float [[TMP28]], ptr [[TMP29]], align 488// CHECK-NEXT:    [[TMP30:%.*]] = load ptr, ptr [[F16_ADDR]], align 889// CHECK-NEXT:    store half 0xH5143, ptr [[DOTATOMICTMP16]], align 290// CHECK-NEXT:    [[TMP31:%.*]] = load half, ptr [[DOTATOMICTMP16]], align 291// CHECK-NEXT:    [[TMP32:%.*]] = atomicrmw fmin ptr [[TMP30]], half [[TMP31]] release, align 292// CHECK-NEXT:    [[NEWVAL18:%.*]] = call half @llvm.minnum.f16(half [[TMP32]], half [[TMP31]])93// CHECK-NEXT:    store half [[NEWVAL18]], ptr [[ATOMIC_TEMP17]], align 294// CHECK-NEXT:    [[TMP33:%.*]] = load half, ptr [[ATOMIC_TEMP17]], align 295// CHECK-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[F16_ADDR]], align 896// CHECK-NEXT:    store half [[TMP33]], ptr [[TMP34]], align 297// CHECK-NEXT:    [[TMP35:%.*]] = load ptr, ptr [[BF16_ADDR]], align 898// CHECK-NEXT:    store bfloat 0xR4228, ptr [[DOTATOMICTMP19]], align 299// CHECK-NEXT:    [[TMP36:%.*]] = load bfloat, ptr [[DOTATOMICTMP19]], align 2100// CHECK-NEXT:    [[TMP37:%.*]] = atomicrmw fmin ptr [[TMP35]], bfloat [[TMP36]] release, align 2101// CHECK-NEXT:    [[NEWVAL21:%.*]] = call bfloat @llvm.minnum.bf16(bfloat [[TMP37]], bfloat [[TMP36]])102// CHECK-NEXT:    store bfloat [[NEWVAL21]], ptr [[ATOMIC_TEMP20]], align 2103// CHECK-NEXT:    [[TMP38:%.*]] = load bfloat, ptr [[ATOMIC_TEMP20]], align 2104// CHECK-NEXT:    [[TMP39:%.*]] = load ptr, ptr [[BF16_ADDR]], align 8105// CHECK-NEXT:    store bfloat [[TMP38]], ptr [[TMP39]], align 2106// CHECK-NEXT:    ret void107//108void test_minmax_postop(float *f32, _Float16 *f16, __bf16 *bf16, double *f64) {109  *f64  = __atomic_max_fetch(f64,  42.1, memory_order_release);110  *f32  = __atomic_max_fetch(f32,  42.1, memory_order_release);111  *f16  = __atomic_max_fetch(f16,  42.1, memory_order_release);112  *bf16 = __atomic_max_fetch(bf16, 42.1, memory_order_release);113  *f64  = __atomic_min_fetch(f64,  42.1, memory_order_release);114  *f32  = __atomic_min_fetch(f32,  42.1, memory_order_release);115  *f16  = __atomic_min_fetch(f16,  42.1, memory_order_release);116  *bf16 = __atomic_min_fetch(bf16, 42.1, memory_order_release);117}118