333 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 52// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon -target-feature +bf16 -target-feature +fp8 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,sroa | FileCheck %s3// RUN: %clang_cc1 -x c++ -triple aarch64-none-linux-gnu -target-feature +neon -target-feature +bf16 -target-feature +fp8 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,sroa | FileCheck %s -check-prefix CHECK-CXX4 5// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon -target-feature +bf16 -target-feature +fp8 -S -O3 -o /dev/null %s6 7// REQUIRES: aarch64-registered-target8 9#include <arm_neon.h>10 11// CHECK-LABEL: define dso_local <8 x bfloat> @test_vcvt1_bf16_mf8_fpm(12// CHECK-SAME: <8 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0:[0-9]+]] {13// CHECK-NEXT: [[ENTRY:.*:]]14// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])15// CHECK-NEXT: [[VBFCVT1_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl1.v8bf16.v8i8(<8 x i8> [[OP]])16// CHECK-NEXT: ret <8 x bfloat> [[VBFCVT1_I]]17//18// CHECK-CXX-LABEL: define dso_local noundef <8 x bfloat> @_Z23test_vcvt1_bf16_mf8_fpm13__Mfloat8x8_tm(19// CHECK-CXX-SAME: <8 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0:[0-9]+]] {20// CHECK-CXX-NEXT: [[ENTRY:.*:]]21// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])22// CHECK-CXX-NEXT: [[VBFCVT1_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl1.v8bf16.v8i8(<8 x i8> [[OP]])23// CHECK-CXX-NEXT: ret <8 x bfloat> [[VBFCVT1_I]]24//25bfloat16x8_t test_vcvt1_bf16_mf8_fpm(mfloat8x8_t op, fpm_t fpm) {26 return vcvt1_bf16_mf8_fpm(op, fpm);27}28 29// CHECK-LABEL: define dso_local <8 x bfloat> @test_vcvt1_low_bf16_mf8_fpm(30// CHECK-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {31// CHECK-NEXT: [[ENTRY:.*:]]32// CHECK-NEXT: [[TMP0:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.v16i8(<16 x i8> [[OP]], i64 0)33// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])34// CHECK-NEXT: [[VBFCVT1_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl1.v8bf16.v8i8(<8 x i8> [[TMP0]])35// CHECK-NEXT: ret <8 x bfloat> [[VBFCVT1_I]]36//37// CHECK-CXX-LABEL: define dso_local noundef <8 x bfloat> @_Z27test_vcvt1_low_bf16_mf8_fpm14__Mfloat8x16_tm(38// CHECK-CXX-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {39// CHECK-CXX-NEXT: [[ENTRY:.*:]]40// CHECK-CXX-NEXT: [[TMP0:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.v16i8(<16 x i8> [[OP]], i64 0)41// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])42// CHECK-CXX-NEXT: [[VBFCVT1_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl1.v8bf16.v8i8(<8 x i8> [[TMP0]])43// CHECK-CXX-NEXT: ret <8 x bfloat> [[VBFCVT1_I]]44//45bfloat16x8_t test_vcvt1_low_bf16_mf8_fpm(mfloat8x16_t op, fpm_t fpm) {46 return vcvt1_low_bf16_mf8_fpm(op, fpm);47}48 49// CHECK-LABEL: define dso_local <8 x bfloat> @test_vcvt2_bf16_mf8_fpm(50// CHECK-SAME: <8 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {51// CHECK-NEXT: [[ENTRY:.*:]]52// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])53// CHECK-NEXT: [[VBFCVT2_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl2.v8bf16.v8i8(<8 x i8> [[OP]])54// CHECK-NEXT: ret <8 x bfloat> [[VBFCVT2_I]]55//56// CHECK-CXX-LABEL: define dso_local noundef <8 x bfloat> @_Z23test_vcvt2_bf16_mf8_fpm13__Mfloat8x8_tm(57// CHECK-CXX-SAME: <8 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {58// CHECK-CXX-NEXT: [[ENTRY:.*:]]59// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])60// CHECK-CXX-NEXT: [[VBFCVT2_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl2.v8bf16.v8i8(<8 x i8> [[OP]])61// CHECK-CXX-NEXT: ret <8 x bfloat> [[VBFCVT2_I]]62//63bfloat16x8_t test_vcvt2_bf16_mf8_fpm(mfloat8x8_t op, fpm_t fpm) {64 return vcvt2_bf16_mf8_fpm(op, fpm);65}66 67// CHECK-LABEL: define dso_local <8 x bfloat> @test_vcvt2_low_bf16_mf8_fpm(68// CHECK-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {69// CHECK-NEXT: [[ENTRY:.*:]]70// CHECK-NEXT: [[TMP0:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.v16i8(<16 x i8> [[OP]], i64 0)71// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])72// CHECK-NEXT: [[VBFCVT2_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl2.v8bf16.v8i8(<8 x i8> [[TMP0]])73// CHECK-NEXT: ret <8 x bfloat> [[VBFCVT2_I]]74//75// CHECK-CXX-LABEL: define dso_local noundef <8 x bfloat> @_Z27test_vcvt2_low_bf16_mf8_fpm14__Mfloat8x16_tm(76// CHECK-CXX-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {77// CHECK-CXX-NEXT: [[ENTRY:.*:]]78// CHECK-CXX-NEXT: [[TMP0:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.v16i8(<16 x i8> [[OP]], i64 0)79// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])80// CHECK-CXX-NEXT: [[VBFCVT2_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl2.v8bf16.v8i8(<8 x i8> [[TMP0]])81// CHECK-CXX-NEXT: ret <8 x bfloat> [[VBFCVT2_I]]82//83bfloat16x8_t test_vcvt2_low_bf16_mf8_fpm(mfloat8x16_t op, fpm_t fpm) {84 return vcvt2_low_bf16_mf8_fpm(op, fpm);85}86 87// CHECK-LABEL: define dso_local <8 x bfloat> @test_vcvt1_high_bf16_mf8_fpm(88// CHECK-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {89// CHECK-NEXT: [[ENTRY:.*:]]90// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])91// CHECK-NEXT: [[VBFCVT1_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl1.v8bf16.v16i8(<16 x i8> [[OP]])92// CHECK-NEXT: ret <8 x bfloat> [[VBFCVT1_I]]93//94// CHECK-CXX-LABEL: define dso_local noundef <8 x bfloat> @_Z28test_vcvt1_high_bf16_mf8_fpm14__Mfloat8x16_tm(95// CHECK-CXX-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {96// CHECK-CXX-NEXT: [[ENTRY:.*:]]97// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])98// CHECK-CXX-NEXT: [[VBFCVT1_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl1.v8bf16.v16i8(<16 x i8> [[OP]])99// CHECK-CXX-NEXT: ret <8 x bfloat> [[VBFCVT1_I]]100//101bfloat16x8_t test_vcvt1_high_bf16_mf8_fpm(mfloat8x16_t op, fpm_t fpm) {102 return vcvt1_high_bf16_mf8_fpm(op, fpm);103}104 105// CHECK-LABEL: define dso_local <8 x bfloat> @test_vcvt2_high_bf16_mf8_fpm(106// CHECK-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {107// CHECK-NEXT: [[ENTRY:.*:]]108// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])109// CHECK-NEXT: [[VBFCVT2_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl2.v8bf16.v16i8(<16 x i8> [[OP]])110// CHECK-NEXT: ret <8 x bfloat> [[VBFCVT2_I]]111//112// CHECK-CXX-LABEL: define dso_local noundef <8 x bfloat> @_Z28test_vcvt2_high_bf16_mf8_fpm14__Mfloat8x16_tm(113// CHECK-CXX-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {114// CHECK-CXX-NEXT: [[ENTRY:.*:]]115// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])116// CHECK-CXX-NEXT: [[VBFCVT2_I:%.*]] = call <8 x bfloat> @llvm.aarch64.neon.fp8.cvtl2.v8bf16.v16i8(<16 x i8> [[OP]])117// CHECK-CXX-NEXT: ret <8 x bfloat> [[VBFCVT2_I]]118//119bfloat16x8_t test_vcvt2_high_bf16_mf8_fpm(mfloat8x16_t op, fpm_t fpm) {120 return vcvt2_high_bf16_mf8_fpm(op, fpm);121}122 123// CHECK-LABEL: define dso_local <8 x half> @test_vcvt1_f16_mf8_fpm(124// CHECK-SAME: <8 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {125// CHECK-NEXT: [[ENTRY:.*:]]126// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])127// CHECK-NEXT: [[VBFCVT1_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl1.v8f16.v8i8(<8 x i8> [[OP]])128// CHECK-NEXT: ret <8 x half> [[VBFCVT1_I]]129//130// CHECK-CXX-LABEL: define dso_local noundef <8 x half> @_Z22test_vcvt1_f16_mf8_fpm13__Mfloat8x8_tm(131// CHECK-CXX-SAME: <8 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {132// CHECK-CXX-NEXT: [[ENTRY:.*:]]133// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])134// CHECK-CXX-NEXT: [[VBFCVT1_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl1.v8f16.v8i8(<8 x i8> [[OP]])135// CHECK-CXX-NEXT: ret <8 x half> [[VBFCVT1_I]]136//137float16x8_t test_vcvt1_f16_mf8_fpm(mfloat8x8_t op, fpm_t fpm) {138 return vcvt1_f16_mf8_fpm(op, fpm);139}140 141// CHECK-LABEL: define dso_local <8 x half> @test_vcvt1_low_f16_mf8_fpm(142// CHECK-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {143// CHECK-NEXT: [[ENTRY:.*:]]144// CHECK-NEXT: [[TMP0:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.v16i8(<16 x i8> [[OP]], i64 0)145// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])146// CHECK-NEXT: [[VBFCVT1_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl1.v8f16.v8i8(<8 x i8> [[TMP0]])147// CHECK-NEXT: ret <8 x half> [[VBFCVT1_I]]148//149// CHECK-CXX-LABEL: define dso_local noundef <8 x half> @_Z26test_vcvt1_low_f16_mf8_fpm14__Mfloat8x16_tm(150// CHECK-CXX-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {151// CHECK-CXX-NEXT: [[ENTRY:.*:]]152// CHECK-CXX-NEXT: [[TMP0:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.v16i8(<16 x i8> [[OP]], i64 0)153// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])154// CHECK-CXX-NEXT: [[VBFCVT1_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl1.v8f16.v8i8(<8 x i8> [[TMP0]])155// CHECK-CXX-NEXT: ret <8 x half> [[VBFCVT1_I]]156//157float16x8_t test_vcvt1_low_f16_mf8_fpm(mfloat8x16_t op, fpm_t fpm) {158 return vcvt1_low_f16_mf8_fpm(op, fpm);159}160 161// CHECK-LABEL: define dso_local <8 x half> @test_vcvt2_f16_mf8_fpm(162// CHECK-SAME: <8 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {163// CHECK-NEXT: [[ENTRY:.*:]]164// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])165// CHECK-NEXT: [[VBFCVT2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl2.v8f16.v8i8(<8 x i8> [[OP]])166// CHECK-NEXT: ret <8 x half> [[VBFCVT2_I]]167//168// CHECK-CXX-LABEL: define dso_local noundef <8 x half> @_Z22test_vcvt2_f16_mf8_fpm13__Mfloat8x8_tm(169// CHECK-CXX-SAME: <8 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {170// CHECK-CXX-NEXT: [[ENTRY:.*:]]171// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])172// CHECK-CXX-NEXT: [[VBFCVT2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl2.v8f16.v8i8(<8 x i8> [[OP]])173// CHECK-CXX-NEXT: ret <8 x half> [[VBFCVT2_I]]174//175float16x8_t test_vcvt2_f16_mf8_fpm(mfloat8x8_t op, fpm_t fpm) {176 return vcvt2_f16_mf8_fpm(op, fpm);177}178 179// CHECK-LABEL: define dso_local <8 x half> @test_vcvt2_low_f16_mf8_fpm(180// CHECK-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {181// CHECK-NEXT: [[ENTRY:.*:]]182// CHECK-NEXT: [[TMP0:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.v16i8(<16 x i8> [[OP]], i64 0)183// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])184// CHECK-NEXT: [[VBFCVT2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl2.v8f16.v8i8(<8 x i8> [[TMP0]])185// CHECK-NEXT: ret <8 x half> [[VBFCVT2_I]]186//187// CHECK-CXX-LABEL: define dso_local noundef <8 x half> @_Z26test_vcvt2_low_f16_mf8_fpm14__Mfloat8x16_tm(188// CHECK-CXX-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {189// CHECK-CXX-NEXT: [[ENTRY:.*:]]190// CHECK-CXX-NEXT: [[TMP0:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.v16i8(<16 x i8> [[OP]], i64 0)191// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])192// CHECK-CXX-NEXT: [[VBFCVT2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl2.v8f16.v8i8(<8 x i8> [[TMP0]])193// CHECK-CXX-NEXT: ret <8 x half> [[VBFCVT2_I]]194//195float16x8_t test_vcvt2_low_f16_mf8_fpm(mfloat8x16_t op, fpm_t fpm) {196 return vcvt2_low_f16_mf8_fpm(op, fpm);197}198 199// CHECK-LABEL: define dso_local <8 x half> @test_vcvt1_high_f16_mf8_fpm(200// CHECK-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {201// CHECK-NEXT: [[ENTRY:.*:]]202// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])203// CHECK-NEXT: [[VBFCVT1_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl1.v8f16.v16i8(<16 x i8> [[OP]])204// CHECK-NEXT: ret <8 x half> [[VBFCVT1_I]]205//206// CHECK-CXX-LABEL: define dso_local noundef <8 x half> @_Z27test_vcvt1_high_f16_mf8_fpm14__Mfloat8x16_tm(207// CHECK-CXX-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {208// CHECK-CXX-NEXT: [[ENTRY:.*:]]209// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])210// CHECK-CXX-NEXT: [[VBFCVT1_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl1.v8f16.v16i8(<16 x i8> [[OP]])211// CHECK-CXX-NEXT: ret <8 x half> [[VBFCVT1_I]]212//213float16x8_t test_vcvt1_high_f16_mf8_fpm(mfloat8x16_t op, fpm_t fpm) {214 return vcvt1_high_f16_mf8_fpm(op, fpm);215}216 217// CHECK-LABEL: define dso_local <8 x half> @test_vcvt2_high_f16_mf8_fpm(218// CHECK-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {219// CHECK-NEXT: [[ENTRY:.*:]]220// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])221// CHECK-NEXT: [[VBFCVT2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl2.v8f16.v16i8(<16 x i8> [[OP]])222// CHECK-NEXT: ret <8 x half> [[VBFCVT2_I]]223//224// CHECK-CXX-LABEL: define dso_local noundef <8 x half> @_Z27test_vcvt2_high_f16_mf8_fpm14__Mfloat8x16_tm(225// CHECK-CXX-SAME: <16 x i8> [[OP:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {226// CHECK-CXX-NEXT: [[ENTRY:.*:]]227// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])228// CHECK-CXX-NEXT: [[VBFCVT2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fp8.cvtl2.v8f16.v16i8(<16 x i8> [[OP]])229// CHECK-CXX-NEXT: ret <8 x half> [[VBFCVT2_I]]230//231float16x8_t test_vcvt2_high_f16_mf8_fpm(mfloat8x16_t op, fpm_t fpm) {232 return vcvt2_high_f16_mf8_fpm(op, fpm);233}234 235// CHECK-LABEL: define dso_local <8 x i8> @test_vcvt_mf8_f32_fpm(236// CHECK-SAME: <4 x float> noundef [[VN:%.*]], <4 x float> noundef [[VM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {237// CHECK-NEXT: [[ENTRY:.*:]]238// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])239// CHECK-NEXT: [[VFCVTN_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.fp8.fcvtn.v8i8.v4f32(<4 x float> [[VN]], <4 x float> [[VM]])240// CHECK-NEXT: ret <8 x i8> [[VFCVTN_I]]241//242// CHECK-CXX-LABEL: define dso_local <8 x i8> @_Z21test_vcvt_mf8_f32_fpm13__Float32x4_tS_m(243// CHECK-CXX-SAME: <4 x float> noundef [[VN:%.*]], <4 x float> noundef [[VM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {244// CHECK-CXX-NEXT: [[ENTRY:.*:]]245// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])246// CHECK-CXX-NEXT: [[VFCVTN_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.fp8.fcvtn.v8i8.v4f32(<4 x float> [[VN]], <4 x float> [[VM]])247// CHECK-CXX-NEXT: ret <8 x i8> [[VFCVTN_I]]248//249mfloat8x8_t test_vcvt_mf8_f32_fpm(float32x4_t vn, float32x4_t vm, fpm_t fpm) {250 return vcvt_mf8_f32_fpm(vn, vm, fpm);251}252 253// CHECK-LABEL: define dso_local <16 x i8> @test_vcvt_high_mf8_f32_fpm(254// CHECK-SAME: <8 x i8> [[VD:%.*]], <4 x float> noundef [[VN:%.*]], <4 x float> noundef [[VM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {255// CHECK-NEXT: [[ENTRY:.*:]]256// CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.vector.insert.v16i8.v8i8(<16 x i8> poison, <8 x i8> [[VD]], i64 0)257// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])258// CHECK-NEXT: [[VFCVTN2_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.fp8.fcvtn2.v16i8.v4f32(<16 x i8> [[TMP0]], <4 x float> [[VN]], <4 x float> [[VM]])259// CHECK-NEXT: ret <16 x i8> [[VFCVTN2_I]]260//261// CHECK-CXX-LABEL: define dso_local <16 x i8> @_Z26test_vcvt_high_mf8_f32_fpm13__Mfloat8x8_t13__Float32x4_tS0_m(262// CHECK-CXX-SAME: <8 x i8> [[VD:%.*]], <4 x float> noundef [[VN:%.*]], <4 x float> noundef [[VM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {263// CHECK-CXX-NEXT: [[ENTRY:.*:]]264// CHECK-CXX-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.vector.insert.v16i8.v8i8(<16 x i8> poison, <8 x i8> [[VD]], i64 0)265// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])266// CHECK-CXX-NEXT: [[VFCVTN2_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.fp8.fcvtn2.v16i8.v4f32(<16 x i8> [[TMP0]], <4 x float> [[VN]], <4 x float> [[VM]])267// CHECK-CXX-NEXT: ret <16 x i8> [[VFCVTN2_I]]268//269mfloat8x16_t test_vcvt_high_mf8_f32_fpm(mfloat8x8_t vd, float32x4_t vn,270 float32x4_t vm, fpm_t fpm) {271 return vcvt_high_mf8_f32_fpm(vd, vn, vm, fpm);272}273 274// CHECK-LABEL: define dso_local <8 x i8> @test_vcvt_mf8_f16_fpm(275// CHECK-SAME: <4 x half> noundef [[VN:%.*]], <4 x half> noundef [[VM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {276// CHECK-NEXT: [[ENTRY:.*:]]277// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[VN]] to <4 x i16>278// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[VM]] to <4 x i16>279// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>280// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>281// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])282// CHECK-NEXT: [[VFCVTN_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>283// CHECK-NEXT: [[VFCVTN1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>284// CHECK-NEXT: [[VFCVTN2_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.fp8.fcvtn.v8i8.v4f16(<4 x half> [[VFCVTN_I]], <4 x half> [[VFCVTN1_I]])285// CHECK-NEXT: ret <8 x i8> [[VFCVTN2_I]]286//287// CHECK-CXX-LABEL: define dso_local <8 x i8> @_Z21test_vcvt_mf8_f16_fpm13__Float16x4_tS_m(288// CHECK-CXX-SAME: <4 x half> noundef [[VN:%.*]], <4 x half> noundef [[VM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {289// CHECK-CXX-NEXT: [[ENTRY:.*:]]290// CHECK-CXX-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[VN]] to <4 x i16>291// CHECK-CXX-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[VM]] to <4 x i16>292// CHECK-CXX-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>293// CHECK-CXX-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>294// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])295// CHECK-CXX-NEXT: [[VFCVTN_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>296// CHECK-CXX-NEXT: [[VFCVTN1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>297// CHECK-CXX-NEXT: [[VFCVTN2_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.fp8.fcvtn.v8i8.v4f16(<4 x half> [[VFCVTN_I]], <4 x half> [[VFCVTN1_I]])298// CHECK-CXX-NEXT: ret <8 x i8> [[VFCVTN2_I]]299//300mfloat8x8_t test_vcvt_mf8_f16_fpm(float16x4_t vn, float16x4_t vm, fpm_t fpm) {301 return vcvt_mf8_f16_fpm(vn, vm, fpm);302}303 304// CHECK-LABEL: define dso_local <16 x i8> @test_vcvtq_mf8_f16_fpm(305// CHECK-SAME: <8 x half> noundef [[VN:%.*]], <8 x half> noundef [[VM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {306// CHECK-NEXT: [[ENTRY:.*:]]307// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[VN]] to <8 x i16>308// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[VM]] to <8 x i16>309// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>310// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>311// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])312// CHECK-NEXT: [[VFCVTN_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>313// CHECK-NEXT: [[VFCVTN1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>314// CHECK-NEXT: [[VFCVTN2_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.fp8.fcvtn.v16i8.v8f16(<8 x half> [[VFCVTN_I]], <8 x half> [[VFCVTN1_I]])315// CHECK-NEXT: ret <16 x i8> [[VFCVTN2_I]]316//317// CHECK-CXX-LABEL: define dso_local <16 x i8> @_Z22test_vcvtq_mf8_f16_fpm13__Float16x8_tS_m(318// CHECK-CXX-SAME: <8 x half> noundef [[VN:%.*]], <8 x half> noundef [[VM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {319// CHECK-CXX-NEXT: [[ENTRY:.*:]]320// CHECK-CXX-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[VN]] to <8 x i16>321// CHECK-CXX-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[VM]] to <8 x i16>322// CHECK-CXX-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>323// CHECK-CXX-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>324// CHECK-CXX-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[FPM]])325// CHECK-CXX-NEXT: [[VFCVTN_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>326// CHECK-CXX-NEXT: [[VFCVTN1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>327// CHECK-CXX-NEXT: [[VFCVTN2_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.fp8.fcvtn.v16i8.v8f16(<8 x half> [[VFCVTN_I]], <8 x half> [[VFCVTN1_I]])328// CHECK-CXX-NEXT: ret <16 x i8> [[VFCVTN2_I]]329//330mfloat8x16_t test_vcvtq_mf8_f16_fpm(float16x8_t vn, float16x8_t vm, fpm_t fpm) {331 return vcvtq_mf8_f16_fpm(vn, vm, fpm);332}333