280 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple aarch64 -target-feature +ls64 -emit-llvm -x c %s -o - | FileCheck --check-prefixes=CHECK-C %s3// RUN: %clang_cc1 -triple aarch64 -target-feature +ls64 -emit-llvm -x c++ %s -o - | FileCheck --check-prefixes=CHECK-CXX %s4// RUN: %clang_cc1 -triple aarch64_be-eabi -target-feature +ls64 -emit-llvm -x c %s -o - | FileCheck --check-prefixes=CHECK-C %s5// RUN: %clang_cc1 -triple aarch64_be-eabi -target-feature +ls64 -emit-llvm -x c++ %s -o - | FileCheck --check-prefixes=CHECK-CXX %s6 7#include <arm_acle.h>8 9#ifdef __cplusplus10#define EXTERN_C extern "C"11#else12#define EXTERN_C13#endif14 15data512_t val;16void *addr;17uint64_t status;18 19// CHECK-C-LABEL: define {{[^@]+}}@test_ld64b(20// CHECK-C-NEXT: entry:21// CHECK-C-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 822// CHECK-C-NEXT: [[TMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 823// CHECK-C-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 824// CHECK-C-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])25// CHECK-C-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8, !noalias !226// CHECK-C-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8, !noalias !227// CHECK-C-NEXT: [[TMP2:%.*]] = call { i64, i64, i64, i64, i64, i64, i64, i64 } @llvm.aarch64.ld64b(ptr [[TMP1]]), !noalias !228// CHECK-C-NEXT: [[TMP3:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 029// CHECK-C-NEXT: store i64 [[TMP3]], ptr [[TMP]], align 8, !alias.scope !230// CHECK-C-NEXT: [[TMP4:%.*]] = getelementptr i64, ptr [[TMP]], i32 131// CHECK-C-NEXT: [[TMP5:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 132// CHECK-C-NEXT: store i64 [[TMP5]], ptr [[TMP4]], align 8, !alias.scope !233// CHECK-C-NEXT: [[TMP6:%.*]] = getelementptr i64, ptr [[TMP]], i32 234// CHECK-C-NEXT: [[TMP7:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 235// CHECK-C-NEXT: store i64 [[TMP7]], ptr [[TMP6]], align 8, !alias.scope !236// CHECK-C-NEXT: [[TMP8:%.*]] = getelementptr i64, ptr [[TMP]], i32 337// CHECK-C-NEXT: [[TMP9:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 338// CHECK-C-NEXT: store i64 [[TMP9]], ptr [[TMP8]], align 8, !alias.scope !239// CHECK-C-NEXT: [[TMP10:%.*]] = getelementptr i64, ptr [[TMP]], i32 440// CHECK-C-NEXT: [[TMP11:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 441// CHECK-C-NEXT: store i64 [[TMP11]], ptr [[TMP10]], align 8, !alias.scope !242// CHECK-C-NEXT: [[TMP12:%.*]] = getelementptr i64, ptr [[TMP]], i32 543// CHECK-C-NEXT: [[TMP13:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 544// CHECK-C-NEXT: store i64 [[TMP13]], ptr [[TMP12]], align 8, !alias.scope !245// CHECK-C-NEXT: [[TMP14:%.*]] = getelementptr i64, ptr [[TMP]], i32 646// CHECK-C-NEXT: [[TMP15:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 647// CHECK-C-NEXT: store i64 [[TMP15]], ptr [[TMP14]], align 8, !alias.scope !248// CHECK-C-NEXT: [[TMP16:%.*]] = getelementptr i64, ptr [[TMP]], i32 749// CHECK-C-NEXT: [[TMP17:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 750// CHECK-C-NEXT: store i64 [[TMP17]], ptr [[TMP16]], align 8, !alias.scope !251// CHECK-C-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @val, ptr align 8 [[TMP]], i64 64, i1 false)52// CHECK-C-NEXT: ret void53//54// CHECK-CXX-LABEL: define {{[^@]+}}@test_ld64b(55// CHECK-CXX-NEXT: entry:56// CHECK-CXX-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 857// CHECK-CXX-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 858// CHECK-CXX-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 859// CHECK-CXX-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META2:![0-9]+]])60// CHECK-CXX-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8, !noalias !261// CHECK-CXX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8, !noalias !262// CHECK-CXX-NEXT: [[TMP2:%.*]] = call { i64, i64, i64, i64, i64, i64, i64, i64 } @llvm.aarch64.ld64b(ptr [[TMP1]]), !noalias !263// CHECK-CXX-NEXT: [[TMP3:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 064// CHECK-CXX-NEXT: store i64 [[TMP3]], ptr [[REF_TMP]], align 8, !alias.scope !265// CHECK-CXX-NEXT: [[TMP4:%.*]] = getelementptr i64, ptr [[REF_TMP]], i32 166// CHECK-CXX-NEXT: [[TMP5:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 167// CHECK-CXX-NEXT: store i64 [[TMP5]], ptr [[TMP4]], align 8, !alias.scope !268// CHECK-CXX-NEXT: [[TMP6:%.*]] = getelementptr i64, ptr [[REF_TMP]], i32 269// CHECK-CXX-NEXT: [[TMP7:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 270// CHECK-CXX-NEXT: store i64 [[TMP7]], ptr [[TMP6]], align 8, !alias.scope !271// CHECK-CXX-NEXT: [[TMP8:%.*]] = getelementptr i64, ptr [[REF_TMP]], i32 372// CHECK-CXX-NEXT: [[TMP9:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 373// CHECK-CXX-NEXT: store i64 [[TMP9]], ptr [[TMP8]], align 8, !alias.scope !274// CHECK-CXX-NEXT: [[TMP10:%.*]] = getelementptr i64, ptr [[REF_TMP]], i32 475// CHECK-CXX-NEXT: [[TMP11:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 476// CHECK-CXX-NEXT: store i64 [[TMP11]], ptr [[TMP10]], align 8, !alias.scope !277// CHECK-CXX-NEXT: [[TMP12:%.*]] = getelementptr i64, ptr [[REF_TMP]], i32 578// CHECK-CXX-NEXT: [[TMP13:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 579// CHECK-CXX-NEXT: store i64 [[TMP13]], ptr [[TMP12]], align 8, !alias.scope !280// CHECK-CXX-NEXT: [[TMP14:%.*]] = getelementptr i64, ptr [[REF_TMP]], i32 681// CHECK-CXX-NEXT: [[TMP15:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 682// CHECK-CXX-NEXT: store i64 [[TMP15]], ptr [[TMP14]], align 8, !alias.scope !283// CHECK-CXX-NEXT: [[TMP16:%.*]] = getelementptr i64, ptr [[REF_TMP]], i32 784// CHECK-CXX-NEXT: [[TMP17:%.*]] = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64 } [[TMP2]], 785// CHECK-CXX-NEXT: store i64 [[TMP17]], ptr [[TMP16]], align 8, !alias.scope !286// CHECK-CXX-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @val, ptr align 8 [[REF_TMP]], i64 64, i1 false)87// CHECK-CXX-NEXT: ret void88//89EXTERN_C void test_ld64b(void)90{91 val = __arm_ld64b(addr);92}93 94// CHECK-C-LABEL: define {{[^@]+}}@test_st64b(95// CHECK-C-NEXT: entry:96// CHECK-C-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 897// CHECK-C-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 898// CHECK-C-NEXT: [[BYVAL_TEMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 899// CHECK-C-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8100// CHECK-C-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[BYVAL_TEMP]], ptr align 8 @val, i64 64, i1 false)101// CHECK-C-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8102// CHECK-C-NEXT: store ptr [[BYVAL_TEMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8103// CHECK-C-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8104// CHECK-C-NEXT: [[TMP2:%.*]] = load i64, ptr [[BYVAL_TEMP]], align 8105// CHECK-C-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 1106// CHECK-C-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8107// CHECK-C-NEXT: [[TMP5:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 2108// CHECK-C-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8109// CHECK-C-NEXT: [[TMP7:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 3110// CHECK-C-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP7]], align 8111// CHECK-C-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 4112// CHECK-C-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8113// CHECK-C-NEXT: [[TMP11:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 5114// CHECK-C-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8115// CHECK-C-NEXT: [[TMP13:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 6116// CHECK-C-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8117// CHECK-C-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 7118// CHECK-C-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP15]], align 8119// CHECK-C-NEXT: call void @llvm.aarch64.st64b(ptr [[TMP1]], i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]], i64 [[TMP14]], i64 [[TMP16]])120// CHECK-C-NEXT: ret void121//122// CHECK-CXX-LABEL: define {{[^@]+}}@test_st64b(123// CHECK-CXX-NEXT: entry:124// CHECK-CXX-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8125// CHECK-CXX-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8126// CHECK-CXX-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8127// CHECK-CXX-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8128// CHECK-CXX-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TMP]], ptr align 8 @val, i64 64, i1 false)129// CHECK-CXX-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8130// CHECK-CXX-NEXT: store ptr [[AGG_TMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8131// CHECK-CXX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8132// CHECK-CXX-NEXT: [[TMP2:%.*]] = load i64, ptr [[AGG_TMP]], align 8133// CHECK-CXX-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 1134// CHECK-CXX-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8135// CHECK-CXX-NEXT: [[TMP5:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 2136// CHECK-CXX-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8137// CHECK-CXX-NEXT: [[TMP7:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 3138// CHECK-CXX-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP7]], align 8139// CHECK-CXX-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 4140// CHECK-CXX-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8141// CHECK-CXX-NEXT: [[TMP11:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 5142// CHECK-CXX-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8143// CHECK-CXX-NEXT: [[TMP13:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 6144// CHECK-CXX-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8145// CHECK-CXX-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 7146// CHECK-CXX-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP15]], align 8147// CHECK-CXX-NEXT: call void @llvm.aarch64.st64b(ptr [[TMP1]], i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]], i64 [[TMP14]], i64 [[TMP16]])148// CHECK-CXX-NEXT: ret void149//150EXTERN_C void test_st64b(void)151{152 __arm_st64b(addr, val);153}154 155// CHECK-C-LABEL: define {{[^@]+}}@test_st64bv(156// CHECK-C-NEXT: entry:157// CHECK-C-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8158// CHECK-C-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8159// CHECK-C-NEXT: [[BYVAL_TEMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8160// CHECK-C-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8161// CHECK-C-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[BYVAL_TEMP]], ptr align 8 @val, i64 64, i1 false)162// CHECK-C-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8163// CHECK-C-NEXT: store ptr [[BYVAL_TEMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8164// CHECK-C-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8165// CHECK-C-NEXT: [[TMP2:%.*]] = load i64, ptr [[BYVAL_TEMP]], align 8166// CHECK-C-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 1167// CHECK-C-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8168// CHECK-C-NEXT: [[TMP5:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 2169// CHECK-C-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8170// CHECK-C-NEXT: [[TMP7:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 3171// CHECK-C-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP7]], align 8172// CHECK-C-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 4173// CHECK-C-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8174// CHECK-C-NEXT: [[TMP11:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 5175// CHECK-C-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8176// CHECK-C-NEXT: [[TMP13:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 6177// CHECK-C-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8178// CHECK-C-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 7179// CHECK-C-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP15]], align 8180// CHECK-C-NEXT: [[TMP17:%.*]] = call i64 @llvm.aarch64.st64bv(ptr [[TMP1]], i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]], i64 [[TMP14]], i64 [[TMP16]])181// CHECK-C-NEXT: store i64 [[TMP17]], ptr @status, align 8182// CHECK-C-NEXT: ret void183//184// CHECK-CXX-LABEL: define {{[^@]+}}@test_st64bv(185// CHECK-CXX-NEXT: entry:186// CHECK-CXX-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8187// CHECK-CXX-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8188// CHECK-CXX-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8189// CHECK-CXX-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8190// CHECK-CXX-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TMP]], ptr align 8 @val, i64 64, i1 false)191// CHECK-CXX-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8192// CHECK-CXX-NEXT: store ptr [[AGG_TMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8193// CHECK-CXX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8194// CHECK-CXX-NEXT: [[TMP2:%.*]] = load i64, ptr [[AGG_TMP]], align 8195// CHECK-CXX-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 1196// CHECK-CXX-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8197// CHECK-CXX-NEXT: [[TMP5:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 2198// CHECK-CXX-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8199// CHECK-CXX-NEXT: [[TMP7:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 3200// CHECK-CXX-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP7]], align 8201// CHECK-CXX-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 4202// CHECK-CXX-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8203// CHECK-CXX-NEXT: [[TMP11:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 5204// CHECK-CXX-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8205// CHECK-CXX-NEXT: [[TMP13:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 6206// CHECK-CXX-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8207// CHECK-CXX-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 7208// CHECK-CXX-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP15]], align 8209// CHECK-CXX-NEXT: [[TMP17:%.*]] = call noundef i64 @llvm.aarch64.st64bv(ptr [[TMP1]], i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]], i64 [[TMP14]], i64 [[TMP16]])210// CHECK-CXX-NEXT: store i64 [[TMP17]], ptr @status, align 8211// CHECK-CXX-NEXT: ret void212//213EXTERN_C void test_st64bv(void)214{215 status = __arm_st64bv(addr, val);216}217 218// CHECK-C-LABEL: define {{[^@]+}}@test_st64bv0(219// CHECK-C-NEXT: entry:220// CHECK-C-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8221// CHECK-C-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8222// CHECK-C-NEXT: [[BYVAL_TEMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8223// CHECK-C-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8224// CHECK-C-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[BYVAL_TEMP]], ptr align 8 @val, i64 64, i1 false)225// CHECK-C-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8226// CHECK-C-NEXT: store ptr [[BYVAL_TEMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8227// CHECK-C-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8228// CHECK-C-NEXT: [[TMP2:%.*]] = load i64, ptr [[BYVAL_TEMP]], align 8229// CHECK-C-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 1230// CHECK-C-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8231// CHECK-C-NEXT: [[TMP5:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 2232// CHECK-C-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8233// CHECK-C-NEXT: [[TMP7:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 3234// CHECK-C-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP7]], align 8235// CHECK-C-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 4236// CHECK-C-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8237// CHECK-C-NEXT: [[TMP11:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 5238// CHECK-C-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8239// CHECK-C-NEXT: [[TMP13:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 6240// CHECK-C-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8241// CHECK-C-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 7242// CHECK-C-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP15]], align 8243// CHECK-C-NEXT: [[TMP17:%.*]] = call i64 @llvm.aarch64.st64bv0(ptr [[TMP1]], i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]], i64 [[TMP14]], i64 [[TMP16]])244// CHECK-C-NEXT: store i64 [[TMP17]], ptr @status, align 8245// CHECK-C-NEXT: ret void246//247// CHECK-CXX-LABEL: define {{[^@]+}}@test_st64bv0(248// CHECK-CXX-NEXT: entry:249// CHECK-CXX-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8250// CHECK-CXX-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8251// CHECK-CXX-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8252// CHECK-CXX-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8253// CHECK-CXX-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TMP]], ptr align 8 @val, i64 64, i1 false)254// CHECK-CXX-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8255// CHECK-CXX-NEXT: store ptr [[AGG_TMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8256// CHECK-CXX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8257// CHECK-CXX-NEXT: [[TMP2:%.*]] = load i64, ptr [[AGG_TMP]], align 8258// CHECK-CXX-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 1259// CHECK-CXX-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8260// CHECK-CXX-NEXT: [[TMP5:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 2261// CHECK-CXX-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8262// CHECK-CXX-NEXT: [[TMP7:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 3263// CHECK-CXX-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP7]], align 8264// CHECK-CXX-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 4265// CHECK-CXX-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8266// CHECK-CXX-NEXT: [[TMP11:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 5267// CHECK-CXX-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8268// CHECK-CXX-NEXT: [[TMP13:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 6269// CHECK-CXX-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8270// CHECK-CXX-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 7271// CHECK-CXX-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP15]], align 8272// CHECK-CXX-NEXT: [[TMP17:%.*]] = call noundef i64 @llvm.aarch64.st64bv0(ptr [[TMP1]], i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]], i64 [[TMP14]], i64 [[TMP16]])273// CHECK-CXX-NEXT: store i64 [[TMP17]], ptr @status, align 8274// CHECK-CXX-NEXT: ret void275//276EXTERN_C void test_st64bv0(void)277{278 status = __arm_st64bv0(addr, val);279}280