330 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 52// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \3// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s4 5// REQUIRES: aarch64-registered-target6 7#include <arm_neon.h>8 9// CHECK-LABEL: define dso_local <8 x i8> @test_vext_s8(10// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {11// CHECK-NEXT: [[ENTRY:.*:]]12// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>13// CHECK-NEXT: ret <8 x i8> [[VEXT]]14//15int8x8_t test_vext_s8(int8x8_t a, int8x8_t b) {16 return vext_s8(a, b, 2);17}18 19// CHECK-LABEL: define dso_local <4 x i16> @test_vext_s16(20// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {21// CHECK-NEXT: [[ENTRY:.*:]]22// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>23// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>24// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>25// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>26// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <4 x i16> [[TMP2]], <4 x i16> [[TMP3]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>27// CHECK-NEXT: ret <4 x i16> [[VEXT]]28//29int16x4_t test_vext_s16(int16x4_t a, int16x4_t b) {30 return vext_s16(a, b, 3);31}32 33// CHECK-LABEL: define dso_local <2 x i32> @test_vext_s32(34// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {35// CHECK-NEXT: [[ENTRY:.*:]]36// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>37// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>38// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>39// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>40// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> [[TMP3]], <2 x i32> <i32 1, i32 2>41// CHECK-NEXT: ret <2 x i32> [[VEXT]]42//43int32x2_t test_vext_s32(int32x2_t a, int32x2_t b) {44 return vext_s32(a, b, 1);45}46 47// CHECK-LABEL: define dso_local <1 x i64> @test_vext_s64(48// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {49// CHECK-NEXT: [[ENTRY:.*:]]50// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>51// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>52// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>53// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>54// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <1 x i64> [[TMP2]], <1 x i64> [[TMP3]], <1 x i32> zeroinitializer55// CHECK-NEXT: ret <1 x i64> [[VEXT]]56//57int64x1_t test_vext_s64(int64x1_t a, int64x1_t b) {58 return vext_s64(a, b, 0);59}60 61// CHECK-LABEL: define dso_local <16 x i8> @test_vextq_s8(62// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {63// CHECK-NEXT: [[ENTRY:.*:]]64// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>65// CHECK-NEXT: ret <16 x i8> [[VEXT]]66//67int8x16_t test_vextq_s8(int8x16_t a, int8x16_t b) {68 return vextq_s8(a, b, 2);69}70 71// CHECK-LABEL: define dso_local <8 x i16> @test_vextq_s16(72// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {73// CHECK-NEXT: [[ENTRY:.*:]]74// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>75// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>76// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>77// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>78// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> [[TMP3]], <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>79// CHECK-NEXT: ret <8 x i16> [[VEXT]]80//81int16x8_t test_vextq_s16(int16x8_t a, int16x8_t b) {82 return vextq_s16(a, b, 3);83}84 85// CHECK-LABEL: define dso_local <4 x i32> @test_vextq_s32(86// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {87// CHECK-NEXT: [[ENTRY:.*:]]88// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>89// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>90// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>91// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>92// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> [[TMP3]], <4 x i32> <i32 1, i32 2, i32 3, i32 4>93// CHECK-NEXT: ret <4 x i32> [[VEXT]]94//95int32x4_t test_vextq_s32(int32x4_t a, int32x4_t b) {96 return vextq_s32(a, b, 1);97}98 99// CHECK-LABEL: define dso_local <2 x i64> @test_vextq_s64(100// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {101// CHECK-NEXT: [[ENTRY:.*:]]102// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>103// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>104// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>105// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>106// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> [[TMP3]], <2 x i32> <i32 1, i32 2>107// CHECK-NEXT: ret <2 x i64> [[VEXT]]108//109int64x2_t test_vextq_s64(int64x2_t a, int64x2_t b) {110 return vextq_s64(a, b, 1);111}112 113// CHECK-LABEL: define dso_local <8 x i8> @test_vext_u8(114// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {115// CHECK-NEXT: [[ENTRY:.*:]]116// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>117// CHECK-NEXT: ret <8 x i8> [[VEXT]]118//119uint8x8_t test_vext_u8(uint8x8_t a, uint8x8_t b) {120 return vext_u8(a, b, 2);121}122 123// CHECK-LABEL: define dso_local <4 x i16> @test_vext_u16(124// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {125// CHECK-NEXT: [[ENTRY:.*:]]126// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>127// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>128// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>129// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>130// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <4 x i16> [[TMP2]], <4 x i16> [[TMP3]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>131// CHECK-NEXT: ret <4 x i16> [[VEXT]]132//133uint16x4_t test_vext_u16(uint16x4_t a, uint16x4_t b) {134 return vext_u16(a, b, 3);135}136 137// CHECK-LABEL: define dso_local <2 x i32> @test_vext_u32(138// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {139// CHECK-NEXT: [[ENTRY:.*:]]140// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>141// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>142// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>143// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>144// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> [[TMP3]], <2 x i32> <i32 1, i32 2>145// CHECK-NEXT: ret <2 x i32> [[VEXT]]146//147uint32x2_t test_vext_u32(uint32x2_t a, uint32x2_t b) {148 return vext_u32(a, b, 1);149}150 151// CHECK-LABEL: define dso_local <1 x i64> @test_vext_u64(152// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {153// CHECK-NEXT: [[ENTRY:.*:]]154// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>155// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>156// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>157// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>158// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <1 x i64> [[TMP2]], <1 x i64> [[TMP3]], <1 x i32> zeroinitializer159// CHECK-NEXT: ret <1 x i64> [[VEXT]]160//161uint64x1_t test_vext_u64(uint64x1_t a, uint64x1_t b) {162 return vext_u64(a, b, 0);163}164 165// CHECK-LABEL: define dso_local <16 x i8> @test_vextq_u8(166// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {167// CHECK-NEXT: [[ENTRY:.*:]]168// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>169// CHECK-NEXT: ret <16 x i8> [[VEXT]]170//171uint8x16_t test_vextq_u8(uint8x16_t a, uint8x16_t b) {172 return vextq_u8(a, b, 2);173}174 175// CHECK-LABEL: define dso_local <8 x i16> @test_vextq_u16(176// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {177// CHECK-NEXT: [[ENTRY:.*:]]178// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>179// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>180// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>181// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>182// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> [[TMP3]], <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>183// CHECK-NEXT: ret <8 x i16> [[VEXT]]184//185uint16x8_t test_vextq_u16(uint16x8_t a, uint16x8_t b) {186 return vextq_u16(a, b, 3);187}188 189// CHECK-LABEL: define dso_local <4 x i32> @test_vextq_u32(190// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {191// CHECK-NEXT: [[ENTRY:.*:]]192// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>193// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>194// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>195// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>196// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> [[TMP3]], <4 x i32> <i32 1, i32 2, i32 3, i32 4>197// CHECK-NEXT: ret <4 x i32> [[VEXT]]198//199uint32x4_t test_vextq_u32(uint32x4_t a, uint32x4_t b) {200 return vextq_u32(a, b, 1);201}202 203// CHECK-LABEL: define dso_local <2 x i64> @test_vextq_u64(204// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {205// CHECK-NEXT: [[ENTRY:.*:]]206// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>207// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>208// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>209// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>210// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> [[TMP3]], <2 x i32> <i32 1, i32 2>211// CHECK-NEXT: ret <2 x i64> [[VEXT]]212//213uint64x2_t test_vextq_u64(uint64x2_t a, uint64x2_t b) {214 return vextq_u64(a, b, 1);215}216 217// CHECK-LABEL: define dso_local <2 x float> @test_vext_f32(218// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {219// CHECK-NEXT: [[ENTRY:.*:]]220// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>221// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>222// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>223// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>224// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>225// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>226// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> [[TMP5]], <2 x i32> <i32 1, i32 2>227// CHECK-NEXT: ret <2 x float> [[VEXT]]228//229float32x2_t test_vext_f32(float32x2_t a, float32x2_t b) {230 return vext_f32(a, b, 1);231}232 233// CHECK-LABEL: define dso_local <1 x double> @test_vext_f64(234// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {235// CHECK-NEXT: [[ENTRY:.*:]]236// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64237// CHECK-NEXT: [[__S0_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 0238// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x double> [[B]] to i64239// CHECK-NEXT: [[__S1_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 0240// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x i64> [[__S0_SROA_0_0_VEC_INSERT]] to <8 x i8>241// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[__S1_SROA_0_0_VEC_INSERT]] to <8 x i8>242// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>243// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>244// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <1 x double> [[TMP4]], <1 x double> [[TMP5]], <1 x i32> zeroinitializer245// CHECK-NEXT: ret <1 x double> [[VEXT]]246//247float64x1_t test_vext_f64(float64x1_t a, float64x1_t b) {248 return vext_f64(a, b, 0);249}250 251// CHECK-LABEL: define dso_local <4 x float> @test_vextq_f32(252// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {253// CHECK-NEXT: [[ENTRY:.*:]]254// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>255// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>256// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>257// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>258// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>259// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>260// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> [[TMP5]], <4 x i32> <i32 1, i32 2, i32 3, i32 4>261// CHECK-NEXT: ret <4 x float> [[VEXT]]262//263float32x4_t test_vextq_f32(float32x4_t a, float32x4_t b) {264 return vextq_f32(a, b, 1);265}266 267// CHECK-LABEL: define dso_local <2 x double> @test_vextq_f64(268// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {269// CHECK-NEXT: [[ENTRY:.*:]]270// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>271// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>272// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>273// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>274// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>275// CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>276// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <2 x double> [[TMP4]], <2 x double> [[TMP5]], <2 x i32> <i32 1, i32 2>277// CHECK-NEXT: ret <2 x double> [[VEXT]]278//279float64x2_t test_vextq_f64(float64x2_t a, float64x2_t b) {280 return vextq_f64(a, b, 1);281}282 283// CHECK-LABEL: define dso_local <8 x i8> @test_vext_p8(284// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {285// CHECK-NEXT: [[ENTRY:.*:]]286// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>287// CHECK-NEXT: ret <8 x i8> [[VEXT]]288//289poly8x8_t test_vext_p8(poly8x8_t a, poly8x8_t b) {290 return vext_p8(a, b, 2);291}292 293// CHECK-LABEL: define dso_local <4 x i16> @test_vext_p16(294// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {295// CHECK-NEXT: [[ENTRY:.*:]]296// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>297// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>298// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>299// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>300// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <4 x i16> [[TMP2]], <4 x i16> [[TMP3]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>301// CHECK-NEXT: ret <4 x i16> [[VEXT]]302//303poly16x4_t test_vext_p16(poly16x4_t a, poly16x4_t b) {304 return vext_p16(a, b, 3);305}306 307// CHECK-LABEL: define dso_local <16 x i8> @test_vextq_p8(308// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {309// CHECK-NEXT: [[ENTRY:.*:]]310// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>311// CHECK-NEXT: ret <16 x i8> [[VEXT]]312//313poly8x16_t test_vextq_p8(poly8x16_t a, poly8x16_t b) {314 return vextq_p8(a, b, 2);315}316 317// CHECK-LABEL: define dso_local <8 x i16> @test_vextq_p16(318// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {319// CHECK-NEXT: [[ENTRY:.*:]]320// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>321// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>322// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>323// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>324// CHECK-NEXT: [[VEXT:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> [[TMP3]], <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>325// CHECK-NEXT: ret <8 x i16> [[VEXT]]326//327poly16x8_t test_vextq_p16(poly16x8_t a, poly16x8_t b) {328 return vextq_p16(a, b, 3);329}330