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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 52// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \3// RUN:     -disable-O0-optnone \4// RUN:  -flax-vector-conversions=none -emit-llvm -o - %s \5// RUN: | opt -S -passes=mem2reg,sroa \6// RUN: | FileCheck %s7 8// REQUIRES: aarch64-registered-target || arm-registered-target9 10#include <arm_neon.h>11 12// CHECK-LABEL: define dso_local <8 x i8> @test_vadd_s8(13// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0:[0-9]+]] {14// CHECK-NEXT:  [[ENTRY:.*:]]15// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i8> [[V1]], [[V2]]16// CHECK-NEXT:    ret <8 x i8> [[ADD_I]]17//18int8x8_t test_vadd_s8(int8x8_t v1, int8x8_t v2) {19  return vadd_s8(v1, v2);20}21 22// CHECK-LABEL: define dso_local <4 x i16> @test_vadd_s16(23// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {24// CHECK-NEXT:  [[ENTRY:.*:]]25// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i16> [[V1]], [[V2]]26// CHECK-NEXT:    ret <4 x i16> [[ADD_I]]27//28int16x4_t test_vadd_s16(int16x4_t v1, int16x4_t v2) {29  return vadd_s16(v1, v2);30}31 32// CHECK-LABEL: define dso_local <2 x i32> @test_vadd_s32(33// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {34// CHECK-NEXT:  [[ENTRY:.*:]]35// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i32> [[V1]], [[V2]]36// CHECK-NEXT:    ret <2 x i32> [[ADD_I]]37//38int32x2_t test_vadd_s32(int32x2_t v1, int32x2_t v2) {39  return vadd_s32(v1, v2);40}41 42// CHECK-LABEL: define dso_local <1 x i64> @test_vadd_s64(43// CHECK-SAME: <1 x i64> noundef [[V1:%.*]], <1 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {44// CHECK-NEXT:  [[ENTRY:.*:]]45// CHECK-NEXT:    [[ADD_I:%.*]] = add <1 x i64> [[V1]], [[V2]]46// CHECK-NEXT:    ret <1 x i64> [[ADD_I]]47//48int64x1_t test_vadd_s64(int64x1_t v1, int64x1_t v2) {49  return vadd_s64(v1, v2);50}51 52// CHECK-LABEL: define dso_local <2 x float> @test_vadd_f32(53// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {54// CHECK-NEXT:  [[ENTRY:.*:]]55// CHECK-NEXT:    [[ADD_I:%.*]] = fadd <2 x float> [[V1]], [[V2]]56// CHECK-NEXT:    ret <2 x float> [[ADD_I]]57//58float32x2_t test_vadd_f32(float32x2_t v1, float32x2_t v2) {59  return vadd_f32(v1, v2);60}61 62// CHECK-LABEL: define dso_local <8 x i8> @test_vadd_u8(63// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {64// CHECK-NEXT:  [[ENTRY:.*:]]65// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i8> [[V1]], [[V2]]66// CHECK-NEXT:    ret <8 x i8> [[ADD_I]]67//68uint8x8_t test_vadd_u8(uint8x8_t v1, uint8x8_t v2) {69  return vadd_u8(v1, v2);70}71 72// CHECK-LABEL: define dso_local <4 x i16> @test_vadd_u16(73// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {74// CHECK-NEXT:  [[ENTRY:.*:]]75// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i16> [[V1]], [[V2]]76// CHECK-NEXT:    ret <4 x i16> [[ADD_I]]77//78uint16x4_t test_vadd_u16(uint16x4_t v1, uint16x4_t v2) {79  return vadd_u16(v1, v2);80}81 82// CHECK-LABEL: define dso_local <2 x i32> @test_vadd_u32(83// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {84// CHECK-NEXT:  [[ENTRY:.*:]]85// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i32> [[V1]], [[V2]]86// CHECK-NEXT:    ret <2 x i32> [[ADD_I]]87//88uint32x2_t test_vadd_u32(uint32x2_t v1, uint32x2_t v2) {89  return vadd_u32(v1, v2);90}91 92// CHECK-LABEL: define dso_local <1 x i64> @test_vadd_u64(93// CHECK-SAME: <1 x i64> noundef [[V1:%.*]], <1 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {94// CHECK-NEXT:  [[ENTRY:.*:]]95// CHECK-NEXT:    [[ADD_I:%.*]] = add <1 x i64> [[V1]], [[V2]]96// CHECK-NEXT:    ret <1 x i64> [[ADD_I]]97//98uint64x1_t test_vadd_u64(uint64x1_t v1, uint64x1_t v2) {99  return vadd_u64(v1, v2);100}101 102// CHECK-LABEL: define dso_local <16 x i8> @test_vaddq_s8(103// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {104// CHECK-NEXT:  [[ENTRY:.*:]]105// CHECK-NEXT:    [[ADD_I:%.*]] = add <16 x i8> [[V1]], [[V2]]106// CHECK-NEXT:    ret <16 x i8> [[ADD_I]]107//108int8x16_t test_vaddq_s8(int8x16_t v1, int8x16_t v2) {109  return vaddq_s8(v1, v2);110}111 112// CHECK-LABEL: define dso_local <8 x i16> @test_vaddq_s16(113// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {114// CHECK-NEXT:  [[ENTRY:.*:]]115// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[V1]], [[V2]]116// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]117//118int16x8_t test_vaddq_s16(int16x8_t v1, int16x8_t v2) {119  return vaddq_s16(v1, v2);120}121 122// CHECK-LABEL: define dso_local <4 x i32> @test_vaddq_s32(123// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {124// CHECK-NEXT:  [[ENTRY:.*:]]125// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[V1]], [[V2]]126// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]127//128int32x4_t test_vaddq_s32(int32x4_t v1, int32x4_t v2) {129  return vaddq_s32(v1, v2);130}131 132// CHECK-LABEL: define dso_local <2 x i64> @test_vaddq_s64(133// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {134// CHECK-NEXT:  [[ENTRY:.*:]]135// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[V1]], [[V2]]136// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]137//138int64x2_t test_vaddq_s64(int64x2_t v1, int64x2_t v2) {139  return vaddq_s64(v1, v2);140}141 142// CHECK-LABEL: define dso_local <4 x float> @test_vaddq_f32(143// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {144// CHECK-NEXT:  [[ENTRY:.*:]]145// CHECK-NEXT:    [[ADD_I:%.*]] = fadd <4 x float> [[V1]], [[V2]]146// CHECK-NEXT:    ret <4 x float> [[ADD_I]]147//148float32x4_t test_vaddq_f32(float32x4_t v1, float32x4_t v2) {149  return vaddq_f32(v1, v2);150}151 152// CHECK-LABEL: define dso_local <2 x double> @test_vaddq_f64(153// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {154// CHECK-NEXT:  [[ENTRY:.*:]]155// CHECK-NEXT:    [[ADD_I:%.*]] = fadd <2 x double> [[V1]], [[V2]]156// CHECK-NEXT:    ret <2 x double> [[ADD_I]]157//158float64x2_t test_vaddq_f64(float64x2_t v1, float64x2_t v2) {159  return vaddq_f64(v1, v2);160}161 162// CHECK-LABEL: define dso_local <16 x i8> @test_vaddq_u8(163// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {164// CHECK-NEXT:  [[ENTRY:.*:]]165// CHECK-NEXT:    [[ADD_I:%.*]] = add <16 x i8> [[V1]], [[V2]]166// CHECK-NEXT:    ret <16 x i8> [[ADD_I]]167//168uint8x16_t test_vaddq_u8(uint8x16_t v1, uint8x16_t v2) {169  return vaddq_u8(v1, v2);170}171 172// CHECK-LABEL: define dso_local <8 x i16> @test_vaddq_u16(173// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {174// CHECK-NEXT:  [[ENTRY:.*:]]175// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[V1]], [[V2]]176// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]177//178uint16x8_t test_vaddq_u16(uint16x8_t v1, uint16x8_t v2) {179  return vaddq_u16(v1, v2);180}181 182// CHECK-LABEL: define dso_local <4 x i32> @test_vaddq_u32(183// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {184// CHECK-NEXT:  [[ENTRY:.*:]]185// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[V1]], [[V2]]186// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]187//188uint32x4_t test_vaddq_u32(uint32x4_t v1, uint32x4_t v2) {189  return vaddq_u32(v1, v2);190}191 192// CHECK-LABEL: define dso_local <2 x i64> @test_vaddq_u64(193// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {194// CHECK-NEXT:  [[ENTRY:.*:]]195// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[V1]], [[V2]]196// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]197//198uint64x2_t test_vaddq_u64(uint64x2_t v1, uint64x2_t v2) {199  return vaddq_u64(v1, v2);200}201 202// CHECK-LABEL: define dso_local <8 x i8> @test_vsub_s8(203// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {204// CHECK-NEXT:  [[ENTRY:.*:]]205// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i8> [[V1]], [[V2]]206// CHECK-NEXT:    ret <8 x i8> [[SUB_I]]207//208int8x8_t test_vsub_s8(int8x8_t v1, int8x8_t v2) {209  return vsub_s8(v1, v2);210}211 212// CHECK-LABEL: define dso_local <4 x i16> @test_vsub_s16(213// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {214// CHECK-NEXT:  [[ENTRY:.*:]]215// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i16> [[V1]], [[V2]]216// CHECK-NEXT:    ret <4 x i16> [[SUB_I]]217//218int16x4_t test_vsub_s16(int16x4_t v1, int16x4_t v2) {219  return vsub_s16(v1, v2);220}221 222// CHECK-LABEL: define dso_local <2 x i32> @test_vsub_s32(223// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {224// CHECK-NEXT:  [[ENTRY:.*:]]225// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i32> [[V1]], [[V2]]226// CHECK-NEXT:    ret <2 x i32> [[SUB_I]]227//228int32x2_t test_vsub_s32(int32x2_t v1, int32x2_t v2) {229  return vsub_s32(v1, v2);230}231 232// CHECK-LABEL: define dso_local <1 x i64> @test_vsub_s64(233// CHECK-SAME: <1 x i64> noundef [[V1:%.*]], <1 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {234// CHECK-NEXT:  [[ENTRY:.*:]]235// CHECK-NEXT:    [[SUB_I:%.*]] = sub <1 x i64> [[V1]], [[V2]]236// CHECK-NEXT:    ret <1 x i64> [[SUB_I]]237//238int64x1_t test_vsub_s64(int64x1_t v1, int64x1_t v2) {239  return vsub_s64(v1, v2);240}241 242// CHECK-LABEL: define dso_local <2 x float> @test_vsub_f32(243// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {244// CHECK-NEXT:  [[ENTRY:.*:]]245// CHECK-NEXT:    [[SUB_I:%.*]] = fsub <2 x float> [[V1]], [[V2]]246// CHECK-NEXT:    ret <2 x float> [[SUB_I]]247//248float32x2_t test_vsub_f32(float32x2_t v1, float32x2_t v2) {249  return vsub_f32(v1, v2);250}251 252// CHECK-LABEL: define dso_local <8 x i8> @test_vsub_u8(253// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {254// CHECK-NEXT:  [[ENTRY:.*:]]255// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i8> [[V1]], [[V2]]256// CHECK-NEXT:    ret <8 x i8> [[SUB_I]]257//258uint8x8_t test_vsub_u8(uint8x8_t v1, uint8x8_t v2) {259  return vsub_u8(v1, v2);260}261 262// CHECK-LABEL: define dso_local <4 x i16> @test_vsub_u16(263// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {264// CHECK-NEXT:  [[ENTRY:.*:]]265// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i16> [[V1]], [[V2]]266// CHECK-NEXT:    ret <4 x i16> [[SUB_I]]267//268uint16x4_t test_vsub_u16(uint16x4_t v1, uint16x4_t v2) {269  return vsub_u16(v1, v2);270}271 272// CHECK-LABEL: define dso_local <2 x i32> @test_vsub_u32(273// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {274// CHECK-NEXT:  [[ENTRY:.*:]]275// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i32> [[V1]], [[V2]]276// CHECK-NEXT:    ret <2 x i32> [[SUB_I]]277//278uint32x2_t test_vsub_u32(uint32x2_t v1, uint32x2_t v2) {279  return vsub_u32(v1, v2);280}281 282// CHECK-LABEL: define dso_local <1 x i64> @test_vsub_u64(283// CHECK-SAME: <1 x i64> noundef [[V1:%.*]], <1 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {284// CHECK-NEXT:  [[ENTRY:.*:]]285// CHECK-NEXT:    [[SUB_I:%.*]] = sub <1 x i64> [[V1]], [[V2]]286// CHECK-NEXT:    ret <1 x i64> [[SUB_I]]287//288uint64x1_t test_vsub_u64(uint64x1_t v1, uint64x1_t v2) {289  return vsub_u64(v1, v2);290}291 292// CHECK-LABEL: define dso_local <16 x i8> @test_vsubq_s8(293// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {294// CHECK-NEXT:  [[ENTRY:.*:]]295// CHECK-NEXT:    [[SUB_I:%.*]] = sub <16 x i8> [[V1]], [[V2]]296// CHECK-NEXT:    ret <16 x i8> [[SUB_I]]297//298int8x16_t test_vsubq_s8(int8x16_t v1, int8x16_t v2) {299  return vsubq_s8(v1, v2);300}301 302// CHECK-LABEL: define dso_local <8 x i16> @test_vsubq_s16(303// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {304// CHECK-NEXT:  [[ENTRY:.*:]]305// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[V1]], [[V2]]306// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]307//308int16x8_t test_vsubq_s16(int16x8_t v1, int16x8_t v2) {309  return vsubq_s16(v1, v2);310}311 312// CHECK-LABEL: define dso_local <4 x i32> @test_vsubq_s32(313// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {314// CHECK-NEXT:  [[ENTRY:.*:]]315// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[V1]], [[V2]]316// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]317//318int32x4_t test_vsubq_s32(int32x4_t v1, int32x4_t v2) {319  return vsubq_s32(v1, v2);320}321 322// CHECK-LABEL: define dso_local <2 x i64> @test_vsubq_s64(323// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {324// CHECK-NEXT:  [[ENTRY:.*:]]325// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[V1]], [[V2]]326// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]327//328int64x2_t test_vsubq_s64(int64x2_t v1, int64x2_t v2) {329  return vsubq_s64(v1, v2);330}331 332// CHECK-LABEL: define dso_local <4 x float> @test_vsubq_f32(333// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {334// CHECK-NEXT:  [[ENTRY:.*:]]335// CHECK-NEXT:    [[SUB_I:%.*]] = fsub <4 x float> [[V1]], [[V2]]336// CHECK-NEXT:    ret <4 x float> [[SUB_I]]337//338float32x4_t test_vsubq_f32(float32x4_t v1, float32x4_t v2) {339  return vsubq_f32(v1, v2);340}341 342// CHECK-LABEL: define dso_local <2 x double> @test_vsubq_f64(343// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {344// CHECK-NEXT:  [[ENTRY:.*:]]345// CHECK-NEXT:    [[SUB_I:%.*]] = fsub <2 x double> [[V1]], [[V2]]346// CHECK-NEXT:    ret <2 x double> [[SUB_I]]347//348float64x2_t test_vsubq_f64(float64x2_t v1, float64x2_t v2) {349  return vsubq_f64(v1, v2);350}351 352// CHECK-LABEL: define dso_local <16 x i8> @test_vsubq_u8(353// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {354// CHECK-NEXT:  [[ENTRY:.*:]]355// CHECK-NEXT:    [[SUB_I:%.*]] = sub <16 x i8> [[V1]], [[V2]]356// CHECK-NEXT:    ret <16 x i8> [[SUB_I]]357//358uint8x16_t test_vsubq_u8(uint8x16_t v1, uint8x16_t v2) {359  return vsubq_u8(v1, v2);360}361 362// CHECK-LABEL: define dso_local <8 x i16> @test_vsubq_u16(363// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {364// CHECK-NEXT:  [[ENTRY:.*:]]365// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[V1]], [[V2]]366// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]367//368uint16x8_t test_vsubq_u16(uint16x8_t v1, uint16x8_t v2) {369  return vsubq_u16(v1, v2);370}371 372// CHECK-LABEL: define dso_local <4 x i32> @test_vsubq_u32(373// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {374// CHECK-NEXT:  [[ENTRY:.*:]]375// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[V1]], [[V2]]376// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]377//378uint32x4_t test_vsubq_u32(uint32x4_t v1, uint32x4_t v2) {379  return vsubq_u32(v1, v2);380}381 382// CHECK-LABEL: define dso_local <2 x i64> @test_vsubq_u64(383// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {384// CHECK-NEXT:  [[ENTRY:.*:]]385// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[V1]], [[V2]]386// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]387//388uint64x2_t test_vsubq_u64(uint64x2_t v1, uint64x2_t v2) {389  return vsubq_u64(v1, v2);390}391 392// CHECK-LABEL: define dso_local <8 x i8> @test_vmul_s8(393// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {394// CHECK-NEXT:  [[ENTRY:.*:]]395// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i8> [[V1]], [[V2]]396// CHECK-NEXT:    ret <8 x i8> [[MUL_I]]397//398int8x8_t test_vmul_s8(int8x8_t v1, int8x8_t v2) {399  return vmul_s8(v1, v2);400}401 402// CHECK-LABEL: define dso_local <4 x i16> @test_vmul_s16(403// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {404// CHECK-NEXT:  [[ENTRY:.*:]]405// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i16> [[V1]], [[V2]]406// CHECK-NEXT:    ret <4 x i16> [[MUL_I]]407//408int16x4_t test_vmul_s16(int16x4_t v1, int16x4_t v2) {409  return vmul_s16(v1, v2);410}411 412// CHECK-LABEL: define dso_local <2 x i32> @test_vmul_s32(413// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {414// CHECK-NEXT:  [[ENTRY:.*:]]415// CHECK-NEXT:    [[MUL_I:%.*]] = mul <2 x i32> [[V1]], [[V2]]416// CHECK-NEXT:    ret <2 x i32> [[MUL_I]]417//418int32x2_t test_vmul_s32(int32x2_t v1, int32x2_t v2) {419  return vmul_s32(v1, v2);420}421 422// CHECK-LABEL: define dso_local <2 x float> @test_vmul_f32(423// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {424// CHECK-NEXT:  [[ENTRY:.*:]]425// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <2 x float> [[V1]], [[V2]]426// CHECK-NEXT:    ret <2 x float> [[MUL_I]]427//428float32x2_t test_vmul_f32(float32x2_t v1, float32x2_t v2) {429  return vmul_f32(v1, v2);430}431 432// CHECK-LABEL: define dso_local <8 x i8> @test_vmul_u8(433// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {434// CHECK-NEXT:  [[ENTRY:.*:]]435// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i8> [[V1]], [[V2]]436// CHECK-NEXT:    ret <8 x i8> [[MUL_I]]437//438uint8x8_t test_vmul_u8(uint8x8_t v1, uint8x8_t v2) {439  return vmul_u8(v1, v2);440}441 442// CHECK-LABEL: define dso_local <4 x i16> @test_vmul_u16(443// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {444// CHECK-NEXT:  [[ENTRY:.*:]]445// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i16> [[V1]], [[V2]]446// CHECK-NEXT:    ret <4 x i16> [[MUL_I]]447//448uint16x4_t test_vmul_u16(uint16x4_t v1, uint16x4_t v2) {449  return vmul_u16(v1, v2);450}451 452// CHECK-LABEL: define dso_local <2 x i32> @test_vmul_u32(453// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {454// CHECK-NEXT:  [[ENTRY:.*:]]455// CHECK-NEXT:    [[MUL_I:%.*]] = mul <2 x i32> [[V1]], [[V2]]456// CHECK-NEXT:    ret <2 x i32> [[MUL_I]]457//458uint32x2_t test_vmul_u32(uint32x2_t v1, uint32x2_t v2) {459  return vmul_u32(v1, v2);460}461 462// CHECK-LABEL: define dso_local <16 x i8> @test_vmulq_s8(463// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {464// CHECK-NEXT:  [[ENTRY:.*:]]465// CHECK-NEXT:    [[MUL_I:%.*]] = mul <16 x i8> [[V1]], [[V2]]466// CHECK-NEXT:    ret <16 x i8> [[MUL_I]]467//468int8x16_t test_vmulq_s8(int8x16_t v1, int8x16_t v2) {469  return vmulq_s8(v1, v2);470}471 472// CHECK-LABEL: define dso_local <8 x i16> @test_vmulq_s16(473// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {474// CHECK-NEXT:  [[ENTRY:.*:]]475// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i16> [[V1]], [[V2]]476// CHECK-NEXT:    ret <8 x i16> [[MUL_I]]477//478int16x8_t test_vmulq_s16(int16x8_t v1, int16x8_t v2) {479  return vmulq_s16(v1, v2);480}481 482// CHECK-LABEL: define dso_local <4 x i32> @test_vmulq_s32(483// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {484// CHECK-NEXT:  [[ENTRY:.*:]]485// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i32> [[V1]], [[V2]]486// CHECK-NEXT:    ret <4 x i32> [[MUL_I]]487//488int32x4_t test_vmulq_s32(int32x4_t v1, int32x4_t v2) {489  return vmulq_s32(v1, v2);490}491 492// CHECK-LABEL: define dso_local <16 x i8> @test_vmulq_u8(493// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {494// CHECK-NEXT:  [[ENTRY:.*:]]495// CHECK-NEXT:    [[MUL_I:%.*]] = mul <16 x i8> [[V1]], [[V2]]496// CHECK-NEXT:    ret <16 x i8> [[MUL_I]]497//498uint8x16_t test_vmulq_u8(uint8x16_t v1, uint8x16_t v2) {499  return vmulq_u8(v1, v2);500}501 502// CHECK-LABEL: define dso_local <8 x i16> @test_vmulq_u16(503// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {504// CHECK-NEXT:  [[ENTRY:.*:]]505// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i16> [[V1]], [[V2]]506// CHECK-NEXT:    ret <8 x i16> [[MUL_I]]507//508uint16x8_t test_vmulq_u16(uint16x8_t v1, uint16x8_t v2) {509  return vmulq_u16(v1, v2);510}511 512// CHECK-LABEL: define dso_local <4 x i32> @test_vmulq_u32(513// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {514// CHECK-NEXT:  [[ENTRY:.*:]]515// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i32> [[V1]], [[V2]]516// CHECK-NEXT:    ret <4 x i32> [[MUL_I]]517//518uint32x4_t test_vmulq_u32(uint32x4_t v1, uint32x4_t v2) {519  return vmulq_u32(v1, v2);520}521 522// CHECK-LABEL: define dso_local <4 x float> @test_vmulq_f32(523// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {524// CHECK-NEXT:  [[ENTRY:.*:]]525// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <4 x float> [[V1]], [[V2]]526// CHECK-NEXT:    ret <4 x float> [[MUL_I]]527//528float32x4_t test_vmulq_f32(float32x4_t v1, float32x4_t v2) {529  return vmulq_f32(v1, v2);530}531 532// CHECK-LABEL: define dso_local <2 x double> @test_vmulq_f64(533// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {534// CHECK-NEXT:  [[ENTRY:.*:]]535// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <2 x double> [[V1]], [[V2]]536// CHECK-NEXT:    ret <2 x double> [[MUL_I]]537//538float64x2_t test_vmulq_f64(float64x2_t v1, float64x2_t v2) {539  return vmulq_f64(v1, v2);540}541 542// CHECK-LABEL: define dso_local <8 x i8> @test_vmul_p8(543// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {544// CHECK-NEXT:  [[ENTRY:.*:]]545// CHECK-NEXT:    [[VMUL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.pmul.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])546// CHECK-NEXT:    ret <8 x i8> [[VMUL_V_I]]547//548poly8x8_t test_vmul_p8(poly8x8_t v1, poly8x8_t v2) {549  return vmul_p8(v1, v2);550}551 552// CHECK-LABEL: define dso_local <16 x i8> @test_vmulq_p8(553// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {554// CHECK-NEXT:  [[ENTRY:.*:]]555// CHECK-NEXT:    [[VMULQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.pmul.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])556// CHECK-NEXT:    ret <16 x i8> [[VMULQ_V_I]]557//558poly8x16_t test_vmulq_p8(poly8x16_t v1, poly8x16_t v2) {559  return vmulq_p8(v1, v2);560}561 562// CHECK-LABEL: define dso_local <8 x i8> @test_vmla_s8(563// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {564// CHECK-NEXT:  [[ENTRY:.*:]]565// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i8> [[V2]], [[V3]]566// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i8> [[V1]], [[MUL_I]]567// CHECK-NEXT:    ret <8 x i8> [[ADD_I]]568//569int8x8_t test_vmla_s8(int8x8_t v1, int8x8_t v2, int8x8_t v3) {570  return vmla_s8(v1, v2, v3);571}572 573// CHECK-LABEL: define dso_local <8 x i8> @test_vmla_s16(574// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {575// CHECK-NEXT:  [[ENTRY:.*:]]576// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i16> [[V2]], [[V3]]577// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i16> [[V1]], [[MUL_I]]578// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[ADD_I]] to <8 x i8>579// CHECK-NEXT:    ret <8 x i8> [[TMP0]]580//581int8x8_t test_vmla_s16(int16x4_t v1, int16x4_t v2, int16x4_t v3) {582  return (int8x8_t)vmla_s16(v1, v2, v3);583}584 585// CHECK-LABEL: define dso_local <2 x i32> @test_vmla_s32(586// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]], <2 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {587// CHECK-NEXT:  [[ENTRY:.*:]]588// CHECK-NEXT:    [[MUL_I:%.*]] = mul <2 x i32> [[V2]], [[V3]]589// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i32> [[V1]], [[MUL_I]]590// CHECK-NEXT:    ret <2 x i32> [[ADD_I]]591//592int32x2_t test_vmla_s32(int32x2_t v1, int32x2_t v2, int32x2_t v3) {593  return vmla_s32(v1, v2, v3);594}595 596// CHECK-LABEL: define dso_local <2 x float> @test_vmla_f32(597// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]], <2 x float> noundef [[V3:%.*]]) #[[ATTR0]] {598// CHECK-NEXT:  [[ENTRY:.*:]]599// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <2 x float> [[V2]], [[V3]]600// CHECK-NEXT:    [[ADD_I:%.*]] = fadd <2 x float> [[V1]], [[MUL_I]]601// CHECK-NEXT:    ret <2 x float> [[ADD_I]]602//603float32x2_t test_vmla_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {604  return vmla_f32(v1, v2, v3);605}606 607// CHECK-LABEL: define dso_local <8 x i8> @test_vmla_u8(608// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {609// CHECK-NEXT:  [[ENTRY:.*:]]610// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i8> [[V2]], [[V3]]611// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i8> [[V1]], [[MUL_I]]612// CHECK-NEXT:    ret <8 x i8> [[ADD_I]]613//614uint8x8_t test_vmla_u8(uint8x8_t v1, uint8x8_t v2, uint8x8_t v3) {615  return vmla_u8(v1, v2, v3);616}617 618// CHECK-LABEL: define dso_local <4 x i16> @test_vmla_u16(619// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {620// CHECK-NEXT:  [[ENTRY:.*:]]621// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i16> [[V2]], [[V3]]622// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i16> [[V1]], [[MUL_I]]623// CHECK-NEXT:    ret <4 x i16> [[ADD_I]]624//625uint16x4_t test_vmla_u16(uint16x4_t v1, uint16x4_t v2, uint16x4_t v3) {626  return vmla_u16(v1, v2, v3);627}628 629// CHECK-LABEL: define dso_local <2 x i32> @test_vmla_u32(630// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]], <2 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {631// CHECK-NEXT:  [[ENTRY:.*:]]632// CHECK-NEXT:    [[MUL_I:%.*]] = mul <2 x i32> [[V2]], [[V3]]633// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i32> [[V1]], [[MUL_I]]634// CHECK-NEXT:    ret <2 x i32> [[ADD_I]]635//636uint32x2_t test_vmla_u32(uint32x2_t v1, uint32x2_t v2, uint32x2_t v3) {637  return vmla_u32(v1, v2, v3);638}639 640// CHECK-LABEL: define dso_local <16 x i8> @test_vmlaq_s8(641// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {642// CHECK-NEXT:  [[ENTRY:.*:]]643// CHECK-NEXT:    [[MUL_I:%.*]] = mul <16 x i8> [[V2]], [[V3]]644// CHECK-NEXT:    [[ADD_I:%.*]] = add <16 x i8> [[V1]], [[MUL_I]]645// CHECK-NEXT:    ret <16 x i8> [[ADD_I]]646//647int8x16_t test_vmlaq_s8(int8x16_t v1, int8x16_t v2, int8x16_t v3) {648  return vmlaq_s8(v1, v2, v3);649}650 651// CHECK-LABEL: define dso_local <8 x i16> @test_vmlaq_s16(652// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {653// CHECK-NEXT:  [[ENTRY:.*:]]654// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i16> [[V2]], [[V3]]655// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[V1]], [[MUL_I]]656// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]657//658int16x8_t test_vmlaq_s16(int16x8_t v1, int16x8_t v2, int16x8_t v3) {659  return vmlaq_s16(v1, v2, v3);660}661 662// CHECK-LABEL: define dso_local <4 x i32> @test_vmlaq_s32(663// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]], <4 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {664// CHECK-NEXT:  [[ENTRY:.*:]]665// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i32> [[V2]], [[V3]]666// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[V1]], [[MUL_I]]667// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]668//669int32x4_t test_vmlaq_s32(int32x4_t v1, int32x4_t v2, int32x4_t v3) {670  return vmlaq_s32(v1, v2, v3);671}672 673// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_f32(674// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]], <4 x float> noundef [[V3:%.*]]) #[[ATTR0]] {675// CHECK-NEXT:  [[ENTRY:.*:]]676// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <4 x float> [[V2]], [[V3]]677// CHECK-NEXT:    [[ADD_I:%.*]] = fadd <4 x float> [[V1]], [[MUL_I]]678// CHECK-NEXT:    ret <4 x float> [[ADD_I]]679//680float32x4_t test_vmlaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {681  return vmlaq_f32(v1, v2, v3);682}683 684// CHECK-LABEL: define dso_local <16 x i8> @test_vmlaq_u8(685// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {686// CHECK-NEXT:  [[ENTRY:.*:]]687// CHECK-NEXT:    [[MUL_I:%.*]] = mul <16 x i8> [[V2]], [[V3]]688// CHECK-NEXT:    [[ADD_I:%.*]] = add <16 x i8> [[V1]], [[MUL_I]]689// CHECK-NEXT:    ret <16 x i8> [[ADD_I]]690//691uint8x16_t test_vmlaq_u8(uint8x16_t v1, uint8x16_t v2, uint8x16_t v3) {692  return vmlaq_u8(v1, v2, v3);693}694 695// CHECK-LABEL: define dso_local <8 x i16> @test_vmlaq_u16(696// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {697// CHECK-NEXT:  [[ENTRY:.*:]]698// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i16> [[V2]], [[V3]]699// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[V1]], [[MUL_I]]700// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]701//702uint16x8_t test_vmlaq_u16(uint16x8_t v1, uint16x8_t v2, uint16x8_t v3) {703  return vmlaq_u16(v1, v2, v3);704}705 706// CHECK-LABEL: define dso_local <4 x i32> @test_vmlaq_u32(707// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]], <4 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {708// CHECK-NEXT:  [[ENTRY:.*:]]709// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i32> [[V2]], [[V3]]710// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[V1]], [[MUL_I]]711// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]712//713uint32x4_t test_vmlaq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) {714  return vmlaq_u32(v1, v2, v3);715}716 717// CHECK-LABEL: define dso_local <2 x double> @test_vmlaq_f64(718// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]], <2 x double> noundef [[V3:%.*]]) #[[ATTR0]] {719// CHECK-NEXT:  [[ENTRY:.*:]]720// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <2 x double> [[V2]], [[V3]]721// CHECK-NEXT:    [[ADD_I:%.*]] = fadd <2 x double> [[V1]], [[MUL_I]]722// CHECK-NEXT:    ret <2 x double> [[ADD_I]]723//724float64x2_t test_vmlaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {725  return vmlaq_f64(v1, v2, v3);726}727 728// CHECK-LABEL: define dso_local <8 x i8> @test_vmls_s8(729// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {730// CHECK-NEXT:  [[ENTRY:.*:]]731// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i8> [[V2]], [[V3]]732// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i8> [[V1]], [[MUL_I]]733// CHECK-NEXT:    ret <8 x i8> [[SUB_I]]734//735int8x8_t test_vmls_s8(int8x8_t v1, int8x8_t v2, int8x8_t v3) {736  return vmls_s8(v1, v2, v3);737}738 739// CHECK-LABEL: define dso_local <8 x i8> @test_vmls_s16(740// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {741// CHECK-NEXT:  [[ENTRY:.*:]]742// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i16> [[V2]], [[V3]]743// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i16> [[V1]], [[MUL_I]]744// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SUB_I]] to <8 x i8>745// CHECK-NEXT:    ret <8 x i8> [[TMP0]]746//747int8x8_t test_vmls_s16(int16x4_t v1, int16x4_t v2, int16x4_t v3) {748  return (int8x8_t)vmls_s16(v1, v2, v3);749}750 751// CHECK-LABEL: define dso_local <2 x i32> @test_vmls_s32(752// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]], <2 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {753// CHECK-NEXT:  [[ENTRY:.*:]]754// CHECK-NEXT:    [[MUL_I:%.*]] = mul <2 x i32> [[V2]], [[V3]]755// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i32> [[V1]], [[MUL_I]]756// CHECK-NEXT:    ret <2 x i32> [[SUB_I]]757//758int32x2_t test_vmls_s32(int32x2_t v1, int32x2_t v2, int32x2_t v3) {759  return vmls_s32(v1, v2, v3);760}761 762// CHECK-LABEL: define dso_local <2 x float> @test_vmls_f32(763// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]], <2 x float> noundef [[V3:%.*]]) #[[ATTR0]] {764// CHECK-NEXT:  [[ENTRY:.*:]]765// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <2 x float> [[V2]], [[V3]]766// CHECK-NEXT:    [[SUB_I:%.*]] = fsub <2 x float> [[V1]], [[MUL_I]]767// CHECK-NEXT:    ret <2 x float> [[SUB_I]]768//769float32x2_t test_vmls_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {770  return vmls_f32(v1, v2, v3);771}772 773// CHECK-LABEL: define dso_local <8 x i8> @test_vmls_u8(774// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {775// CHECK-NEXT:  [[ENTRY:.*:]]776// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i8> [[V2]], [[V3]]777// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i8> [[V1]], [[MUL_I]]778// CHECK-NEXT:    ret <8 x i8> [[SUB_I]]779//780uint8x8_t test_vmls_u8(uint8x8_t v1, uint8x8_t v2, uint8x8_t v3) {781  return vmls_u8(v1, v2, v3);782}783 784// CHECK-LABEL: define dso_local <4 x i16> @test_vmls_u16(785// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {786// CHECK-NEXT:  [[ENTRY:.*:]]787// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i16> [[V2]], [[V3]]788// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i16> [[V1]], [[MUL_I]]789// CHECK-NEXT:    ret <4 x i16> [[SUB_I]]790//791uint16x4_t test_vmls_u16(uint16x4_t v1, uint16x4_t v2, uint16x4_t v3) {792  return vmls_u16(v1, v2, v3);793}794 795// CHECK-LABEL: define dso_local <2 x i32> @test_vmls_u32(796// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]], <2 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {797// CHECK-NEXT:  [[ENTRY:.*:]]798// CHECK-NEXT:    [[MUL_I:%.*]] = mul <2 x i32> [[V2]], [[V3]]799// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i32> [[V1]], [[MUL_I]]800// CHECK-NEXT:    ret <2 x i32> [[SUB_I]]801//802uint32x2_t test_vmls_u32(uint32x2_t v1, uint32x2_t v2, uint32x2_t v3) {803  return vmls_u32(v1, v2, v3);804}805 806// CHECK-LABEL: define dso_local <16 x i8> @test_vmlsq_s8(807// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {808// CHECK-NEXT:  [[ENTRY:.*:]]809// CHECK-NEXT:    [[MUL_I:%.*]] = mul <16 x i8> [[V2]], [[V3]]810// CHECK-NEXT:    [[SUB_I:%.*]] = sub <16 x i8> [[V1]], [[MUL_I]]811// CHECK-NEXT:    ret <16 x i8> [[SUB_I]]812//813int8x16_t test_vmlsq_s8(int8x16_t v1, int8x16_t v2, int8x16_t v3) {814  return vmlsq_s8(v1, v2, v3);815}816 817// CHECK-LABEL: define dso_local <8 x i16> @test_vmlsq_s16(818// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {819// CHECK-NEXT:  [[ENTRY:.*:]]820// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i16> [[V2]], [[V3]]821// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[V1]], [[MUL_I]]822// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]823//824int16x8_t test_vmlsq_s16(int16x8_t v1, int16x8_t v2, int16x8_t v3) {825  return vmlsq_s16(v1, v2, v3);826}827 828// CHECK-LABEL: define dso_local <4 x i32> @test_vmlsq_s32(829// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]], <4 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {830// CHECK-NEXT:  [[ENTRY:.*:]]831// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i32> [[V2]], [[V3]]832// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[V1]], [[MUL_I]]833// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]834//835int32x4_t test_vmlsq_s32(int32x4_t v1, int32x4_t v2, int32x4_t v3) {836  return vmlsq_s32(v1, v2, v3);837}838 839// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_f32(840// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]], <4 x float> noundef [[V3:%.*]]) #[[ATTR0]] {841// CHECK-NEXT:  [[ENTRY:.*:]]842// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <4 x float> [[V2]], [[V3]]843// CHECK-NEXT:    [[SUB_I:%.*]] = fsub <4 x float> [[V1]], [[MUL_I]]844// CHECK-NEXT:    ret <4 x float> [[SUB_I]]845//846float32x4_t test_vmlsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {847  return vmlsq_f32(v1, v2, v3);848}849 850// CHECK-LABEL: define dso_local <16 x i8> @test_vmlsq_u8(851// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {852// CHECK-NEXT:  [[ENTRY:.*:]]853// CHECK-NEXT:    [[MUL_I:%.*]] = mul <16 x i8> [[V2]], [[V3]]854// CHECK-NEXT:    [[SUB_I:%.*]] = sub <16 x i8> [[V1]], [[MUL_I]]855// CHECK-NEXT:    ret <16 x i8> [[SUB_I]]856//857uint8x16_t test_vmlsq_u8(uint8x16_t v1, uint8x16_t v2, uint8x16_t v3) {858  return vmlsq_u8(v1, v2, v3);859}860 861// CHECK-LABEL: define dso_local <8 x i16> @test_vmlsq_u16(862// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {863// CHECK-NEXT:  [[ENTRY:.*:]]864// CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i16> [[V2]], [[V3]]865// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[V1]], [[MUL_I]]866// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]867//868uint16x8_t test_vmlsq_u16(uint16x8_t v1, uint16x8_t v2, uint16x8_t v3) {869  return vmlsq_u16(v1, v2, v3);870}871 872// CHECK-LABEL: define dso_local <4 x i32> @test_vmlsq_u32(873// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]], <4 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {874// CHECK-NEXT:  [[ENTRY:.*:]]875// CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i32> [[V2]], [[V3]]876// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[V1]], [[MUL_I]]877// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]878//879uint32x4_t test_vmlsq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) {880  return vmlsq_u32(v1, v2, v3);881}882 883// CHECK-LABEL: define dso_local <2 x double> @test_vmlsq_f64(884// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]], <2 x double> noundef [[V3:%.*]]) #[[ATTR0]] {885// CHECK-NEXT:  [[ENTRY:.*:]]886// CHECK-NEXT:    [[MUL_I:%.*]] = fmul <2 x double> [[V2]], [[V3]]887// CHECK-NEXT:    [[SUB_I:%.*]] = fsub <2 x double> [[V1]], [[MUL_I]]888// CHECK-NEXT:    ret <2 x double> [[SUB_I]]889//890float64x2_t test_vmlsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {891  return vmlsq_f64(v1, v2, v3);892}893 894// CHECK-LABEL: define dso_local <2 x float> @test_vfma_f32(895// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]], <2 x float> noundef [[V3:%.*]]) #[[ATTR0]] {896// CHECK-NEXT:  [[ENTRY:.*:]]897// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>898// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>899// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x float> [[V3]] to <2 x i32>900// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>901// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>902// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i32> [[TMP2]] to <8 x i8>903// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>904// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float>905// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float>906// CHECK-NEXT:    [[TMP9:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[TMP7]], <2 x float> [[TMP8]], <2 x float> [[TMP6]])907// CHECK-NEXT:    ret <2 x float> [[TMP9]]908//909float32x2_t test_vfma_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {910  return vfma_f32(v1, v2, v3);911}912 913// CHECK-LABEL: define dso_local <4 x float> @test_vfmaq_f32(914// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]], <4 x float> noundef [[V3:%.*]]) #[[ATTR0]] {915// CHECK-NEXT:  [[ENTRY:.*:]]916// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>917// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>918// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[V3]] to <4 x i32>919// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>920// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>921// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP2]] to <16 x i8>922// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>923// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float>924// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>925// CHECK-NEXT:    [[TMP9:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[TMP7]], <4 x float> [[TMP8]], <4 x float> [[TMP6]])926// CHECK-NEXT:    ret <4 x float> [[TMP9]]927//928float32x4_t test_vfmaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {929  return vfmaq_f32(v1, v2, v3);930}931 932// CHECK-LABEL: define dso_local <2 x double> @test_vfmaq_f64(933// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]], <2 x double> noundef [[V3:%.*]]) #[[ATTR0]] {934// CHECK-NEXT:  [[ENTRY:.*:]]935// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>936// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>937// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[V3]] to <2 x i64>938// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>939// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>940// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>941// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>942// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double>943// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>944// CHECK-NEXT:    [[TMP9:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[TMP7]], <2 x double> [[TMP8]], <2 x double> [[TMP6]])945// CHECK-NEXT:    ret <2 x double> [[TMP9]]946//947float64x2_t test_vfmaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {948  return vfmaq_f64(v1, v2, v3);949}950 951// CHECK-LABEL: define dso_local <2 x float> @test_vfms_f32(952// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]], <2 x float> noundef [[V3:%.*]]) #[[ATTR0]] {953// CHECK-NEXT:  [[ENTRY:.*:]]954// CHECK-NEXT:    [[FNEG_I:%.*]] = fneg <2 x float> [[V2]]955// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>956// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[FNEG_I]] to <2 x i32>957// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x float> [[V3]] to <2 x i32>958// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>959// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>960// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i32> [[TMP2]] to <8 x i8>961// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>962// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float>963// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float>964// CHECK-NEXT:    [[TMP9:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[TMP7]], <2 x float> [[TMP8]], <2 x float> [[TMP6]])965// CHECK-NEXT:    ret <2 x float> [[TMP9]]966//967float32x2_t test_vfms_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {968  return vfms_f32(v1, v2, v3);969}970 971// CHECK-LABEL: define dso_local <4 x float> @test_vfmsq_f32(972// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]], <4 x float> noundef [[V3:%.*]]) #[[ATTR0]] {973// CHECK-NEXT:  [[ENTRY:.*:]]974// CHECK-NEXT:    [[FNEG_I:%.*]] = fneg <4 x float> [[V2]]975// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>976// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[FNEG_I]] to <4 x i32>977// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[V3]] to <4 x i32>978// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>979// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>980// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP2]] to <16 x i8>981// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>982// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float>983// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>984// CHECK-NEXT:    [[TMP9:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[TMP7]], <4 x float> [[TMP8]], <4 x float> [[TMP6]])985// CHECK-NEXT:    ret <4 x float> [[TMP9]]986//987float32x4_t test_vfmsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {988  return vfmsq_f32(v1, v2, v3);989}990 991// CHECK-LABEL: define dso_local <2 x double> @test_vfmsq_f64(992// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]], <2 x double> noundef [[V3:%.*]]) #[[ATTR0]] {993// CHECK-NEXT:  [[ENTRY:.*:]]994// CHECK-NEXT:    [[FNEG_I:%.*]] = fneg <2 x double> [[V2]]995// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>996// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[FNEG_I]] to <2 x i64>997// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[V3]] to <2 x i64>998// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>999// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>1000// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>1001// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>1002// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double>1003// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>1004// CHECK-NEXT:    [[TMP9:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[TMP7]], <2 x double> [[TMP8]], <2 x double> [[TMP6]])1005// CHECK-NEXT:    ret <2 x double> [[TMP9]]1006//1007float64x2_t test_vfmsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {1008  return vfmsq_f64(v1, v2, v3);1009}1010 1011// CHECK-LABEL: define dso_local <2 x double> @test_vdivq_f64(1012// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {1013// CHECK-NEXT:  [[ENTRY:.*:]]1014// CHECK-NEXT:    [[DIV_I:%.*]] = fdiv <2 x double> [[V1]], [[V2]]1015// CHECK-NEXT:    ret <2 x double> [[DIV_I]]1016//1017float64x2_t test_vdivq_f64(float64x2_t v1, float64x2_t v2) {1018  return vdivq_f64(v1, v2);1019}1020 1021// CHECK-LABEL: define dso_local <4 x float> @test_vdivq_f32(1022// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1023// CHECK-NEXT:  [[ENTRY:.*:]]1024// CHECK-NEXT:    [[DIV_I:%.*]] = fdiv <4 x float> [[V1]], [[V2]]1025// CHECK-NEXT:    ret <4 x float> [[DIV_I]]1026//1027float32x4_t test_vdivq_f32(float32x4_t v1, float32x4_t v2) {1028  return vdivq_f32(v1, v2);1029}1030 1031// CHECK-LABEL: define dso_local <2 x float> @test_vdiv_f32(1032// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1033// CHECK-NEXT:  [[ENTRY:.*:]]1034// CHECK-NEXT:    [[DIV_I:%.*]] = fdiv <2 x float> [[V1]], [[V2]]1035// CHECK-NEXT:    ret <2 x float> [[DIV_I]]1036//1037float32x2_t test_vdiv_f32(float32x2_t v1, float32x2_t v2) {1038  return vdiv_f32(v1, v2);1039}1040 1041// CHECK-LABEL: define dso_local <8 x i8> @test_vaba_s8(1042// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1043// CHECK-NEXT:  [[ENTRY:.*:]]1044// CHECK-NEXT:    [[VABD_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> [[V2]], <8 x i8> [[V3]])1045// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i8> [[V1]], [[VABD_I]]1046// CHECK-NEXT:    ret <8 x i8> [[ADD_I]]1047//1048int8x8_t test_vaba_s8(int8x8_t v1, int8x8_t v2, int8x8_t v3) {1049  return vaba_s8(v1, v2, v3);1050}1051 1052// CHECK-LABEL: define dso_local <4 x i16> @test_vaba_s16(1053// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1054// CHECK-NEXT:  [[ENTRY:.*:]]1055// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>1056// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V3]] to <8 x i8>1057// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1058// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>1059// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I]], <4 x i16> [[VABD1_I]])1060// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i16> [[V1]], [[VABD2_I]]1061// CHECK-NEXT:    ret <4 x i16> [[ADD_I]]1062//1063int16x4_t test_vaba_s16(int16x4_t v1, int16x4_t v2, int16x4_t v3) {1064  return vaba_s16(v1, v2, v3);1065}1066 1067// CHECK-LABEL: define dso_local <2 x i32> @test_vaba_s32(1068// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]], <2 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {1069// CHECK-NEXT:  [[ENTRY:.*:]]1070// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>1071// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V3]] to <8 x i8>1072// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>1073// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>1074// CHECK-NEXT:    [[VABD2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I]], <2 x i32> [[VABD1_I]])1075// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i32> [[V1]], [[VABD2_I]]1076// CHECK-NEXT:    ret <2 x i32> [[ADD_I]]1077//1078int32x2_t test_vaba_s32(int32x2_t v1, int32x2_t v2, int32x2_t v3) {1079  return vaba_s32(v1, v2, v3);1080}1081 1082// CHECK-LABEL: define dso_local <8 x i8> @test_vaba_u8(1083// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1084// CHECK-NEXT:  [[ENTRY:.*:]]1085// CHECK-NEXT:    [[VABD_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> [[V2]], <8 x i8> [[V3]])1086// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i8> [[V1]], [[VABD_I]]1087// CHECK-NEXT:    ret <8 x i8> [[ADD_I]]1088//1089uint8x8_t test_vaba_u8(uint8x8_t v1, uint8x8_t v2, uint8x8_t v3) {1090  return vaba_u8(v1, v2, v3);1091}1092 1093// CHECK-LABEL: define dso_local <4 x i16> @test_vaba_u16(1094// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1095// CHECK-NEXT:  [[ENTRY:.*:]]1096// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>1097// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V3]] to <8 x i8>1098// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1099// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>1100// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I]], <4 x i16> [[VABD1_I]])1101// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i16> [[V1]], [[VABD2_I]]1102// CHECK-NEXT:    ret <4 x i16> [[ADD_I]]1103//1104uint16x4_t test_vaba_u16(uint16x4_t v1, uint16x4_t v2, uint16x4_t v3) {1105  return vaba_u16(v1, v2, v3);1106}1107 1108// CHECK-LABEL: define dso_local <2 x i32> @test_vaba_u32(1109// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]], <2 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {1110// CHECK-NEXT:  [[ENTRY:.*:]]1111// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>1112// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V3]] to <8 x i8>1113// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>1114// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>1115// CHECK-NEXT:    [[VABD2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I]], <2 x i32> [[VABD1_I]])1116// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i32> [[V1]], [[VABD2_I]]1117// CHECK-NEXT:    ret <2 x i32> [[ADD_I]]1118//1119uint32x2_t test_vaba_u32(uint32x2_t v1, uint32x2_t v2, uint32x2_t v3) {1120  return vaba_u32(v1, v2, v3);1121}1122 1123// CHECK-LABEL: define dso_local <16 x i8> @test_vabaq_s8(1124// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1125// CHECK-NEXT:  [[ENTRY:.*:]]1126// CHECK-NEXT:    [[VABD_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.sabd.v16i8(<16 x i8> [[V2]], <16 x i8> [[V3]])1127// CHECK-NEXT:    [[ADD_I:%.*]] = add <16 x i8> [[V1]], [[VABD_I]]1128// CHECK-NEXT:    ret <16 x i8> [[ADD_I]]1129//1130int8x16_t test_vabaq_s8(int8x16_t v1, int8x16_t v2, int8x16_t v3) {1131  return vabaq_s8(v1, v2, v3);1132}1133 1134// CHECK-LABEL: define dso_local <8 x i16> @test_vabaq_s16(1135// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1136// CHECK-NEXT:  [[ENTRY:.*:]]1137// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>1138// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V3]] to <16 x i8>1139// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1140// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>1141// CHECK-NEXT:    [[VABD2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sabd.v8i16(<8 x i16> [[VABD_I]], <8 x i16> [[VABD1_I]])1142// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[V1]], [[VABD2_I]]1143// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]1144//1145int16x8_t test_vabaq_s16(int16x8_t v1, int16x8_t v2, int16x8_t v3) {1146  return vabaq_s16(v1, v2, v3);1147}1148 1149// CHECK-LABEL: define dso_local <4 x i32> @test_vabaq_s32(1150// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]], <4 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {1151// CHECK-NEXT:  [[ENTRY:.*:]]1152// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>1153// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V3]] to <16 x i8>1154// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>1155// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>1156// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sabd.v4i32(<4 x i32> [[VABD_I]], <4 x i32> [[VABD1_I]])1157// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[V1]], [[VABD2_I]]1158// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]1159//1160int32x4_t test_vabaq_s32(int32x4_t v1, int32x4_t v2, int32x4_t v3) {1161  return vabaq_s32(v1, v2, v3);1162}1163 1164// CHECK-LABEL: define dso_local <16 x i8> @test_vabaq_u8(1165// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1166// CHECK-NEXT:  [[ENTRY:.*:]]1167// CHECK-NEXT:    [[VABD_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> [[V2]], <16 x i8> [[V3]])1168// CHECK-NEXT:    [[ADD_I:%.*]] = add <16 x i8> [[V1]], [[VABD_I]]1169// CHECK-NEXT:    ret <16 x i8> [[ADD_I]]1170//1171uint8x16_t test_vabaq_u8(uint8x16_t v1, uint8x16_t v2, uint8x16_t v3) {1172  return vabaq_u8(v1, v2, v3);1173}1174 1175// CHECK-LABEL: define dso_local <8 x i16> @test_vabaq_u16(1176// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1177// CHECK-NEXT:  [[ENTRY:.*:]]1178// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>1179// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V3]] to <16 x i8>1180// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1181// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>1182// CHECK-NEXT:    [[VABD2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uabd.v8i16(<8 x i16> [[VABD_I]], <8 x i16> [[VABD1_I]])1183// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[V1]], [[VABD2_I]]1184// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]1185//1186uint16x8_t test_vabaq_u16(uint16x8_t v1, uint16x8_t v2, uint16x8_t v3) {1187  return vabaq_u16(v1, v2, v3);1188}1189 1190// CHECK-LABEL: define dso_local <4 x i32> @test_vabaq_u32(1191// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]], <4 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {1192// CHECK-NEXT:  [[ENTRY:.*:]]1193// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>1194// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V3]] to <16 x i8>1195// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>1196// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>1197// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uabd.v4i32(<4 x i32> [[VABD_I]], <4 x i32> [[VABD1_I]])1198// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[V1]], [[VABD2_I]]1199// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]1200//1201uint32x4_t test_vabaq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) {1202  return vabaq_u32(v1, v2, v3);1203}1204 1205// CHECK-LABEL: define dso_local <8 x i8> @test_vabd_s8(1206// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {1207// CHECK-NEXT:  [[ENTRY:.*:]]1208// CHECK-NEXT:    [[VABD_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])1209// CHECK-NEXT:    ret <8 x i8> [[VABD_I]]1210//1211int8x8_t test_vabd_s8(int8x8_t v1, int8x8_t v2) {1212  return vabd_s8(v1, v2);1213}1214 1215// CHECK-LABEL: define dso_local <4 x i16> @test_vabd_s16(1216// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {1217// CHECK-NEXT:  [[ENTRY:.*:]]1218// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>1219// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>1220// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1221// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>1222// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I]], <4 x i16> [[VABD1_I]])1223// CHECK-NEXT:    ret <4 x i16> [[VABD2_I]]1224//1225int16x4_t test_vabd_s16(int16x4_t v1, int16x4_t v2) {1226  return vabd_s16(v1, v2);1227}1228 1229// CHECK-LABEL: define dso_local <2 x i32> @test_vabd_s32(1230// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {1231// CHECK-NEXT:  [[ENTRY:.*:]]1232// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>1233// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>1234// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>1235// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>1236// CHECK-NEXT:    [[VABD2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I]], <2 x i32> [[VABD1_I]])1237// CHECK-NEXT:    ret <2 x i32> [[VABD2_I]]1238//1239int32x2_t test_vabd_s32(int32x2_t v1, int32x2_t v2) {1240  return vabd_s32(v1, v2);1241}1242 1243// CHECK-LABEL: define dso_local <8 x i8> @test_vabd_u8(1244// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {1245// CHECK-NEXT:  [[ENTRY:.*:]]1246// CHECK-NEXT:    [[VABD_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])1247// CHECK-NEXT:    ret <8 x i8> [[VABD_I]]1248//1249uint8x8_t test_vabd_u8(uint8x8_t v1, uint8x8_t v2) {1250  return vabd_u8(v1, v2);1251}1252 1253// CHECK-LABEL: define dso_local <4 x i16> @test_vabd_u16(1254// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {1255// CHECK-NEXT:  [[ENTRY:.*:]]1256// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>1257// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>1258// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1259// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>1260// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I]], <4 x i16> [[VABD1_I]])1261// CHECK-NEXT:    ret <4 x i16> [[VABD2_I]]1262//1263uint16x4_t test_vabd_u16(uint16x4_t v1, uint16x4_t v2) {1264  return vabd_u16(v1, v2);1265}1266 1267// CHECK-LABEL: define dso_local <2 x i32> @test_vabd_u32(1268// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {1269// CHECK-NEXT:  [[ENTRY:.*:]]1270// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>1271// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>1272// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>1273// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>1274// CHECK-NEXT:    [[VABD2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I]], <2 x i32> [[VABD1_I]])1275// CHECK-NEXT:    ret <2 x i32> [[VABD2_I]]1276//1277uint32x2_t test_vabd_u32(uint32x2_t v1, uint32x2_t v2) {1278  return vabd_u32(v1, v2);1279}1280 1281// CHECK-LABEL: define dso_local <2 x float> @test_vabd_f32(1282// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1283// CHECK-NEXT:  [[ENTRY:.*:]]1284// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>1285// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>1286// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>1287// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>1288// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>1289// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>1290// CHECK-NEXT:    [[VABD2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fabd.v2f32(<2 x float> [[VABD_I]], <2 x float> [[VABD1_I]])1291// CHECK-NEXT:    ret <2 x float> [[VABD2_I]]1292//1293float32x2_t test_vabd_f32(float32x2_t v1, float32x2_t v2) {1294  return vabd_f32(v1, v2);1295}1296 1297// CHECK-LABEL: define dso_local <16 x i8> @test_vabdq_s8(1298// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {1299// CHECK-NEXT:  [[ENTRY:.*:]]1300// CHECK-NEXT:    [[VABD_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.sabd.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])1301// CHECK-NEXT:    ret <16 x i8> [[VABD_I]]1302//1303int8x16_t test_vabdq_s8(int8x16_t v1, int8x16_t v2) {1304  return vabdq_s8(v1, v2);1305}1306 1307// CHECK-LABEL: define dso_local <8 x i16> @test_vabdq_s16(1308// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {1309// CHECK-NEXT:  [[ENTRY:.*:]]1310// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>1311// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>1312// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1313// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>1314// CHECK-NEXT:    [[VABD2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sabd.v8i16(<8 x i16> [[VABD_I]], <8 x i16> [[VABD1_I]])1315// CHECK-NEXT:    ret <8 x i16> [[VABD2_I]]1316//1317int16x8_t test_vabdq_s16(int16x8_t v1, int16x8_t v2) {1318  return vabdq_s16(v1, v2);1319}1320 1321// CHECK-LABEL: define dso_local <4 x i32> @test_vabdq_s32(1322// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {1323// CHECK-NEXT:  [[ENTRY:.*:]]1324// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>1325// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>1326// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>1327// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>1328// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sabd.v4i32(<4 x i32> [[VABD_I]], <4 x i32> [[VABD1_I]])1329// CHECK-NEXT:    ret <4 x i32> [[VABD2_I]]1330//1331int32x4_t test_vabdq_s32(int32x4_t v1, int32x4_t v2) {1332  return vabdq_s32(v1, v2);1333}1334 1335// CHECK-LABEL: define dso_local <16 x i8> @test_vabdq_u8(1336// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {1337// CHECK-NEXT:  [[ENTRY:.*:]]1338// CHECK-NEXT:    [[VABD_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])1339// CHECK-NEXT:    ret <16 x i8> [[VABD_I]]1340//1341uint8x16_t test_vabdq_u8(uint8x16_t v1, uint8x16_t v2) {1342  return vabdq_u8(v1, v2);1343}1344 1345// CHECK-LABEL: define dso_local <8 x i16> @test_vabdq_u16(1346// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {1347// CHECK-NEXT:  [[ENTRY:.*:]]1348// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>1349// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>1350// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1351// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>1352// CHECK-NEXT:    [[VABD2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uabd.v8i16(<8 x i16> [[VABD_I]], <8 x i16> [[VABD1_I]])1353// CHECK-NEXT:    ret <8 x i16> [[VABD2_I]]1354//1355uint16x8_t test_vabdq_u16(uint16x8_t v1, uint16x8_t v2) {1356  return vabdq_u16(v1, v2);1357}1358 1359// CHECK-LABEL: define dso_local <4 x i32> @test_vabdq_u32(1360// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {1361// CHECK-NEXT:  [[ENTRY:.*:]]1362// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>1363// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>1364// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>1365// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>1366// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uabd.v4i32(<4 x i32> [[VABD_I]], <4 x i32> [[VABD1_I]])1367// CHECK-NEXT:    ret <4 x i32> [[VABD2_I]]1368//1369uint32x4_t test_vabdq_u32(uint32x4_t v1, uint32x4_t v2) {1370  return vabdq_u32(v1, v2);1371}1372 1373// CHECK-LABEL: define dso_local <4 x float> @test_vabdq_f32(1374// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1375// CHECK-NEXT:  [[ENTRY:.*:]]1376// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>1377// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>1378// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>1379// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>1380// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>1381// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>1382// CHECK-NEXT:    [[VABD2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fabd.v4f32(<4 x float> [[VABD_I]], <4 x float> [[VABD1_I]])1383// CHECK-NEXT:    ret <4 x float> [[VABD2_I]]1384//1385float32x4_t test_vabdq_f32(float32x4_t v1, float32x4_t v2) {1386  return vabdq_f32(v1, v2);1387}1388 1389// CHECK-LABEL: define dso_local <2 x double> @test_vabdq_f64(1390// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {1391// CHECK-NEXT:  [[ENTRY:.*:]]1392// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>1393// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>1394// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>1395// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>1396// CHECK-NEXT:    [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>1397// CHECK-NEXT:    [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>1398// CHECK-NEXT:    [[VABD2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fabd.v2f64(<2 x double> [[VABD_I]], <2 x double> [[VABD1_I]])1399// CHECK-NEXT:    ret <2 x double> [[VABD2_I]]1400//1401float64x2_t test_vabdq_f64(float64x2_t v1, float64x2_t v2) {1402  return vabdq_f64(v1, v2);1403}1404 1405// CHECK-LABEL: define dso_local <8 x i8> @test_vbsl_s8(1406// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1407// CHECK-NEXT:  [[ENTRY:.*:]]1408// CHECK-NEXT:    [[VBSL_I:%.*]] = and <8 x i8> [[V1]], [[V2]]1409// CHECK-NEXT:    [[TMP0:%.*]] = xor <8 x i8> [[V1]], splat (i8 -1)1410// CHECK-NEXT:    [[VBSL1_I:%.*]] = and <8 x i8> [[TMP0]], [[V3]]1411// CHECK-NEXT:    [[VBSL2_I:%.*]] = or <8 x i8> [[VBSL_I]], [[VBSL1_I]]1412// CHECK-NEXT:    ret <8 x i8> [[VBSL2_I]]1413//1414int8x8_t test_vbsl_s8(uint8x8_t v1, int8x8_t v2, int8x8_t v3) {1415  return vbsl_s8(v1, v2, v3);1416}1417 1418// CHECK-LABEL: define dso_local <8 x i8> @test_vbsl_s16(1419// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1420// CHECK-NEXT:  [[ENTRY:.*:]]1421// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>1422// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>1423// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[V3]] to <8 x i8>1424// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1425// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>1426// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>1427// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <4 x i16> [[VBSL_I]], [[VBSL1_I]]1428// CHECK-NEXT:    [[TMP3:%.*]] = xor <4 x i16> [[VBSL_I]], splat (i16 -1)1429// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <4 x i16> [[TMP3]], [[VBSL2_I]]1430// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <4 x i16> [[VBSL3_I]], [[VBSL4_I]]1431// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <4 x i16> [[VBSL5_I]] to <8 x i8>1432// CHECK-NEXT:    ret <8 x i8> [[TMP4]]1433//1434int8x8_t test_vbsl_s16(uint16x4_t v1, int16x4_t v2, int16x4_t v3) {1435  return (int8x8_t)vbsl_s16(v1, v2, v3);1436}1437 1438// CHECK-LABEL: define dso_local <2 x i32> @test_vbsl_s32(1439// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]], <2 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {1440// CHECK-NEXT:  [[ENTRY:.*:]]1441// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>1442// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>1443// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[V3]] to <8 x i8>1444// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>1445// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>1446// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>1447// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <2 x i32> [[VBSL_I]], [[VBSL1_I]]1448// CHECK-NEXT:    [[TMP3:%.*]] = xor <2 x i32> [[VBSL_I]], splat (i32 -1)1449// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <2 x i32> [[TMP3]], [[VBSL2_I]]1450// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <2 x i32> [[VBSL3_I]], [[VBSL4_I]]1451// CHECK-NEXT:    ret <2 x i32> [[VBSL5_I]]1452//1453int32x2_t test_vbsl_s32(uint32x2_t v1, int32x2_t v2, int32x2_t v3) {1454  return vbsl_s32(v1, v2, v3);1455}1456 1457// CHECK-LABEL: define dso_local <1 x i64> @test_vbsl_s64(1458// CHECK-SAME: <1 x i64> noundef [[V1:%.*]], <1 x i64> noundef [[V2:%.*]], <1 x i64> noundef [[V3:%.*]]) #[[ATTR0]] {1459// CHECK-NEXT:  [[ENTRY:.*:]]1460// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[V1]] to <8 x i8>1461// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[V2]] to <8 x i8>1462// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[V3]] to <8 x i8>1463// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>1464// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>1465// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>1466// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <1 x i64> [[VBSL_I]], [[VBSL1_I]]1467// CHECK-NEXT:    [[TMP3:%.*]] = xor <1 x i64> [[VBSL_I]], splat (i64 -1)1468// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], [[VBSL2_I]]1469// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <1 x i64> [[VBSL3_I]], [[VBSL4_I]]1470// CHECK-NEXT:    ret <1 x i64> [[VBSL5_I]]1471//1472int64x1_t test_vbsl_s64(uint64x1_t v1, int64x1_t v2, int64x1_t v3) {1473  return vbsl_s64(v1, v2, v3);1474}1475 1476// CHECK-LABEL: define dso_local <8 x i8> @test_vbsl_u8(1477// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1478// CHECK-NEXT:  [[ENTRY:.*:]]1479// CHECK-NEXT:    [[VBSL_I:%.*]] = and <8 x i8> [[V1]], [[V2]]1480// CHECK-NEXT:    [[TMP0:%.*]] = xor <8 x i8> [[V1]], splat (i8 -1)1481// CHECK-NEXT:    [[VBSL1_I:%.*]] = and <8 x i8> [[TMP0]], [[V3]]1482// CHECK-NEXT:    [[VBSL2_I:%.*]] = or <8 x i8> [[VBSL_I]], [[VBSL1_I]]1483// CHECK-NEXT:    ret <8 x i8> [[VBSL2_I]]1484//1485uint8x8_t test_vbsl_u8(uint8x8_t v1, uint8x8_t v2, uint8x8_t v3) {1486  return vbsl_u8(v1, v2, v3);1487}1488 1489// CHECK-LABEL: define dso_local <4 x i16> @test_vbsl_u16(1490// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1491// CHECK-NEXT:  [[ENTRY:.*:]]1492// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>1493// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>1494// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[V3]] to <8 x i8>1495// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1496// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>1497// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>1498// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <4 x i16> [[VBSL_I]], [[VBSL1_I]]1499// CHECK-NEXT:    [[TMP3:%.*]] = xor <4 x i16> [[VBSL_I]], splat (i16 -1)1500// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <4 x i16> [[TMP3]], [[VBSL2_I]]1501// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <4 x i16> [[VBSL3_I]], [[VBSL4_I]]1502// CHECK-NEXT:    ret <4 x i16> [[VBSL5_I]]1503//1504uint16x4_t test_vbsl_u16(uint16x4_t v1, uint16x4_t v2, uint16x4_t v3) {1505  return vbsl_u16(v1, v2, v3);1506}1507 1508// CHECK-LABEL: define dso_local <2 x i32> @test_vbsl_u32(1509// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]], <2 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {1510// CHECK-NEXT:  [[ENTRY:.*:]]1511// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>1512// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>1513// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[V3]] to <8 x i8>1514// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>1515// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>1516// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>1517// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <2 x i32> [[VBSL_I]], [[VBSL1_I]]1518// CHECK-NEXT:    [[TMP3:%.*]] = xor <2 x i32> [[VBSL_I]], splat (i32 -1)1519// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <2 x i32> [[TMP3]], [[VBSL2_I]]1520// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <2 x i32> [[VBSL3_I]], [[VBSL4_I]]1521// CHECK-NEXT:    ret <2 x i32> [[VBSL5_I]]1522//1523uint32x2_t test_vbsl_u32(uint32x2_t v1, uint32x2_t v2, uint32x2_t v3) {1524  return vbsl_u32(v1, v2, v3);1525}1526 1527// CHECK-LABEL: define dso_local <1 x i64> @test_vbsl_u64(1528// CHECK-SAME: <1 x i64> noundef [[V1:%.*]], <1 x i64> noundef [[V2:%.*]], <1 x i64> noundef [[V3:%.*]]) #[[ATTR0]] {1529// CHECK-NEXT:  [[ENTRY:.*:]]1530// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[V1]] to <8 x i8>1531// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[V2]] to <8 x i8>1532// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[V3]] to <8 x i8>1533// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>1534// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>1535// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>1536// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <1 x i64> [[VBSL_I]], [[VBSL1_I]]1537// CHECK-NEXT:    [[TMP3:%.*]] = xor <1 x i64> [[VBSL_I]], splat (i64 -1)1538// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], [[VBSL2_I]]1539// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <1 x i64> [[VBSL3_I]], [[VBSL4_I]]1540// CHECK-NEXT:    ret <1 x i64> [[VBSL5_I]]1541//1542uint64x1_t test_vbsl_u64(uint64x1_t v1, uint64x1_t v2, uint64x1_t v3) {1543  return vbsl_u64(v1, v2, v3);1544}1545 1546// CHECK-LABEL: define dso_local <2 x float> @test_vbsl_f32(1547// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]], <2 x float> noundef [[V3:%.*]]) #[[ATTR0]] {1548// CHECK-NEXT:  [[ENTRY:.*:]]1549// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>1550// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V3]] to <2 x i32>1551// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>1552// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>1553// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>1554// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>1555// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>1556// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x i32>1557// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <2 x i32> [[VBSL_I]], [[VBSL1_I]]1558// CHECK-NEXT:    [[TMP5:%.*]] = xor <2 x i32> [[VBSL_I]], splat (i32 -1)1559// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <2 x i32> [[TMP5]], [[VBSL2_I]]1560// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <2 x i32> [[VBSL3_I]], [[VBSL4_I]]1561// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <2 x i32> [[VBSL5_I]] to <2 x float>1562// CHECK-NEXT:    ret <2 x float> [[TMP6]]1563//1564float32x2_t test_vbsl_f32(uint32x2_t v1, float32x2_t v2, float32x2_t v3) {1565  return vbsl_f32(v1, v2, v3);1566}1567 1568// CHECK-LABEL: define dso_local <1 x double> @test_vbsl_f64(1569// CHECK-SAME: <1 x i64> noundef [[V1:%.*]], <1 x double> noundef [[V2:%.*]], <1 x double> noundef [[V3:%.*]]) #[[ATTR0]] {1570// CHECK-NEXT:  [[ENTRY:.*:]]1571// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[V2]] to i641572// CHECK-NEXT:    [[__P1_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 01573// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[V3]] to i641574// CHECK-NEXT:    [[__P2_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 01575// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[V1]] to <8 x i8>1576// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[__P1_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>1577// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i64> [[__P2_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>1578// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>1579// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x i64>1580// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64>1581// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <1 x i64> [[VBSL_I]], [[VBSL1_I]]1582// CHECK-NEXT:    [[TMP5:%.*]] = xor <1 x i64> [[VBSL_I]], splat (i64 -1)1583// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <1 x i64> [[TMP5]], [[VBSL2_I]]1584// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <1 x i64> [[VBSL3_I]], [[VBSL4_I]]1585// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <1 x i64> [[VBSL5_I]] to <1 x double>1586// CHECK-NEXT:    ret <1 x double> [[TMP6]]1587//1588float64x1_t test_vbsl_f64(uint64x1_t v1, float64x1_t v2, float64x1_t v3) {1589  return vbsl_f64(v1, v2, v3);1590}1591 1592// CHECK-LABEL: define dso_local <8 x i8> @test_vbsl_p8(1593// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]], <8 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1594// CHECK-NEXT:  [[ENTRY:.*:]]1595// CHECK-NEXT:    [[VBSL_I:%.*]] = and <8 x i8> [[V1]], [[V2]]1596// CHECK-NEXT:    [[TMP0:%.*]] = xor <8 x i8> [[V1]], splat (i8 -1)1597// CHECK-NEXT:    [[VBSL1_I:%.*]] = and <8 x i8> [[TMP0]], [[V3]]1598// CHECK-NEXT:    [[VBSL2_I:%.*]] = or <8 x i8> [[VBSL_I]], [[VBSL1_I]]1599// CHECK-NEXT:    ret <8 x i8> [[VBSL2_I]]1600//1601poly8x8_t test_vbsl_p8(uint8x8_t v1, poly8x8_t v2, poly8x8_t v3) {1602  return vbsl_p8(v1, v2, v3);1603}1604 1605// CHECK-LABEL: define dso_local <4 x i16> @test_vbsl_p16(1606// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]], <4 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1607// CHECK-NEXT:  [[ENTRY:.*:]]1608// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>1609// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>1610// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[V3]] to <8 x i8>1611// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1612// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>1613// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>1614// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <4 x i16> [[VBSL_I]], [[VBSL1_I]]1615// CHECK-NEXT:    [[TMP3:%.*]] = xor <4 x i16> [[VBSL_I]], splat (i16 -1)1616// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <4 x i16> [[TMP3]], [[VBSL2_I]]1617// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <4 x i16> [[VBSL3_I]], [[VBSL4_I]]1618// CHECK-NEXT:    ret <4 x i16> [[VBSL5_I]]1619//1620poly16x4_t test_vbsl_p16(uint16x4_t v1, poly16x4_t v2, poly16x4_t v3) {1621  return vbsl_p16(v1, v2, v3);1622}1623 1624// CHECK-LABEL: define dso_local <16 x i8> @test_vbslq_s8(1625// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1626// CHECK-NEXT:  [[ENTRY:.*:]]1627// CHECK-NEXT:    [[VBSL_I:%.*]] = and <16 x i8> [[V1]], [[V2]]1628// CHECK-NEXT:    [[TMP0:%.*]] = xor <16 x i8> [[V1]], splat (i8 -1)1629// CHECK-NEXT:    [[VBSL1_I:%.*]] = and <16 x i8> [[TMP0]], [[V3]]1630// CHECK-NEXT:    [[VBSL2_I:%.*]] = or <16 x i8> [[VBSL_I]], [[VBSL1_I]]1631// CHECK-NEXT:    ret <16 x i8> [[VBSL2_I]]1632//1633int8x16_t test_vbslq_s8(uint8x16_t v1, int8x16_t v2, int8x16_t v3) {1634  return vbslq_s8(v1, v2, v3);1635}1636 1637// CHECK-LABEL: define dso_local <8 x i16> @test_vbslq_s16(1638// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1639// CHECK-NEXT:  [[ENTRY:.*:]]1640// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>1641// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>1642// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[V3]] to <16 x i8>1643// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1644// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>1645// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>1646// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <8 x i16> [[VBSL_I]], [[VBSL1_I]]1647// CHECK-NEXT:    [[TMP3:%.*]] = xor <8 x i16> [[VBSL_I]], splat (i16 -1)1648// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <8 x i16> [[TMP3]], [[VBSL2_I]]1649// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <8 x i16> [[VBSL3_I]], [[VBSL4_I]]1650// CHECK-NEXT:    ret <8 x i16> [[VBSL5_I]]1651//1652int16x8_t test_vbslq_s16(uint16x8_t v1, int16x8_t v2, int16x8_t v3) {1653  return vbslq_s16(v1, v2, v3);1654}1655 1656// CHECK-LABEL: define dso_local <4 x i32> @test_vbslq_s32(1657// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]], <4 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {1658// CHECK-NEXT:  [[ENTRY:.*:]]1659// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>1660// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>1661// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[V3]] to <16 x i8>1662// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>1663// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>1664// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>1665// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <4 x i32> [[VBSL_I]], [[VBSL1_I]]1666// CHECK-NEXT:    [[TMP3:%.*]] = xor <4 x i32> [[VBSL_I]], splat (i32 -1)1667// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <4 x i32> [[TMP3]], [[VBSL2_I]]1668// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <4 x i32> [[VBSL3_I]], [[VBSL4_I]]1669// CHECK-NEXT:    ret <4 x i32> [[VBSL5_I]]1670//1671int32x4_t test_vbslq_s32(uint32x4_t v1, int32x4_t v2, int32x4_t v3) {1672  return vbslq_s32(v1, v2, v3);1673}1674 1675// CHECK-LABEL: define dso_local <2 x i64> @test_vbslq_s64(1676// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]], <2 x i64> noundef [[V3:%.*]]) #[[ATTR0]] {1677// CHECK-NEXT:  [[ENTRY:.*:]]1678// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[V1]] to <16 x i8>1679// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[V2]] to <16 x i8>1680// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[V3]] to <16 x i8>1681// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>1682// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>1683// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>1684// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <2 x i64> [[VBSL_I]], [[VBSL1_I]]1685// CHECK-NEXT:    [[TMP3:%.*]] = xor <2 x i64> [[VBSL_I]], splat (i64 -1)1686// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <2 x i64> [[TMP3]], [[VBSL2_I]]1687// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <2 x i64> [[VBSL3_I]], [[VBSL4_I]]1688// CHECK-NEXT:    ret <2 x i64> [[VBSL5_I]]1689//1690int64x2_t test_vbslq_s64(uint64x2_t v1, int64x2_t v2, int64x2_t v3) {1691  return vbslq_s64(v1, v2, v3);1692}1693 1694// CHECK-LABEL: define dso_local <16 x i8> @test_vbslq_u8(1695// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1696// CHECK-NEXT:  [[ENTRY:.*:]]1697// CHECK-NEXT:    [[VBSL_I:%.*]] = and <16 x i8> [[V1]], [[V2]]1698// CHECK-NEXT:    [[TMP0:%.*]] = xor <16 x i8> [[V1]], splat (i8 -1)1699// CHECK-NEXT:    [[VBSL1_I:%.*]] = and <16 x i8> [[TMP0]], [[V3]]1700// CHECK-NEXT:    [[VBSL2_I:%.*]] = or <16 x i8> [[VBSL_I]], [[VBSL1_I]]1701// CHECK-NEXT:    ret <16 x i8> [[VBSL2_I]]1702//1703uint8x16_t test_vbslq_u8(uint8x16_t v1, uint8x16_t v2, uint8x16_t v3) {1704  return vbslq_u8(v1, v2, v3);1705}1706 1707// CHECK-LABEL: define dso_local <8 x i16> @test_vbslq_u16(1708// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1709// CHECK-NEXT:  [[ENTRY:.*:]]1710// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>1711// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>1712// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[V3]] to <16 x i8>1713// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1714// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>1715// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>1716// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <8 x i16> [[VBSL_I]], [[VBSL1_I]]1717// CHECK-NEXT:    [[TMP3:%.*]] = xor <8 x i16> [[VBSL_I]], splat (i16 -1)1718// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <8 x i16> [[TMP3]], [[VBSL2_I]]1719// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <8 x i16> [[VBSL3_I]], [[VBSL4_I]]1720// CHECK-NEXT:    ret <8 x i16> [[VBSL5_I]]1721//1722uint16x8_t test_vbslq_u16(uint16x8_t v1, uint16x8_t v2, uint16x8_t v3) {1723  return vbslq_u16(v1, v2, v3);1724}1725 1726// CHECK-LABEL: define dso_local <4 x i32> @test_vbslq_u32(1727// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]], <4 x i32> noundef [[V3:%.*]]) #[[ATTR0]] {1728// CHECK-NEXT:  [[ENTRY:.*:]]1729// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>1730// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>1731// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[V3]] to <16 x i8>1732// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>1733// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>1734// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>1735// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <4 x i32> [[VBSL_I]], [[VBSL1_I]]1736// CHECK-NEXT:    [[TMP3:%.*]] = xor <4 x i32> [[VBSL_I]], splat (i32 -1)1737// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <4 x i32> [[TMP3]], [[VBSL2_I]]1738// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <4 x i32> [[VBSL3_I]], [[VBSL4_I]]1739// CHECK-NEXT:    ret <4 x i32> [[VBSL5_I]]1740//1741int32x4_t test_vbslq_u32(uint32x4_t v1, int32x4_t v2, int32x4_t v3) {1742  return vbslq_s32(v1, v2, v3);1743}1744 1745// CHECK-LABEL: define dso_local <2 x i64> @test_vbslq_u64(1746// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]], <2 x i64> noundef [[V3:%.*]]) #[[ATTR0]] {1747// CHECK-NEXT:  [[ENTRY:.*:]]1748// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[V1]] to <16 x i8>1749// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[V2]] to <16 x i8>1750// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[V3]] to <16 x i8>1751// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>1752// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>1753// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>1754// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <2 x i64> [[VBSL_I]], [[VBSL1_I]]1755// CHECK-NEXT:    [[TMP3:%.*]] = xor <2 x i64> [[VBSL_I]], splat (i64 -1)1756// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <2 x i64> [[TMP3]], [[VBSL2_I]]1757// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <2 x i64> [[VBSL3_I]], [[VBSL4_I]]1758// CHECK-NEXT:    ret <2 x i64> [[VBSL5_I]]1759//1760uint64x2_t test_vbslq_u64(uint64x2_t v1, uint64x2_t v2, uint64x2_t v3) {1761  return vbslq_u64(v1, v2, v3);1762}1763 1764// CHECK-LABEL: define dso_local <4 x float> @test_vbslq_f32(1765// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]], <4 x float> noundef [[V3:%.*]]) #[[ATTR0]] {1766// CHECK-NEXT:  [[ENTRY:.*:]]1767// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>1768// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V3]] to <4 x i32>1769// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>1770// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>1771// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>1772// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>1773// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x i32>1774// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x i32>1775// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <4 x i32> [[VBSL_I]], [[VBSL1_I]]1776// CHECK-NEXT:    [[TMP5:%.*]] = xor <4 x i32> [[VBSL_I]], splat (i32 -1)1777// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <4 x i32> [[TMP5]], [[VBSL2_I]]1778// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <4 x i32> [[VBSL3_I]], [[VBSL4_I]]1779// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <4 x i32> [[VBSL5_I]] to <4 x float>1780// CHECK-NEXT:    ret <4 x float> [[TMP6]]1781//1782float32x4_t test_vbslq_f32(uint32x4_t v1, float32x4_t v2, float32x4_t v3) {1783  return vbslq_f32(v1, v2, v3);1784}1785 1786// CHECK-LABEL: define dso_local <16 x i8> @test_vbslq_p8(1787// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]], <16 x i8> noundef [[V3:%.*]]) #[[ATTR0]] {1788// CHECK-NEXT:  [[ENTRY:.*:]]1789// CHECK-NEXT:    [[VBSL_I:%.*]] = and <16 x i8> [[V1]], [[V2]]1790// CHECK-NEXT:    [[TMP0:%.*]] = xor <16 x i8> [[V1]], splat (i8 -1)1791// CHECK-NEXT:    [[VBSL1_I:%.*]] = and <16 x i8> [[TMP0]], [[V3]]1792// CHECK-NEXT:    [[VBSL2_I:%.*]] = or <16 x i8> [[VBSL_I]], [[VBSL1_I]]1793// CHECK-NEXT:    ret <16 x i8> [[VBSL2_I]]1794//1795poly8x16_t test_vbslq_p8(uint8x16_t v1, poly8x16_t v2, poly8x16_t v3) {1796  return vbslq_p8(v1, v2, v3);1797}1798 1799// CHECK-LABEL: define dso_local <8 x i16> @test_vbslq_p16(1800// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]], <8 x i16> noundef [[V3:%.*]]) #[[ATTR0]] {1801// CHECK-NEXT:  [[ENTRY:.*:]]1802// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>1803// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>1804// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[V3]] to <16 x i8>1805// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1806// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>1807// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>1808// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <8 x i16> [[VBSL_I]], [[VBSL1_I]]1809// CHECK-NEXT:    [[TMP3:%.*]] = xor <8 x i16> [[VBSL_I]], splat (i16 -1)1810// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <8 x i16> [[TMP3]], [[VBSL2_I]]1811// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <8 x i16> [[VBSL3_I]], [[VBSL4_I]]1812// CHECK-NEXT:    ret <8 x i16> [[VBSL5_I]]1813//1814poly16x8_t test_vbslq_p16(uint16x8_t v1, poly16x8_t v2, poly16x8_t v3) {1815  return vbslq_p16(v1, v2, v3);1816}1817 1818// CHECK-LABEL: define dso_local <2 x double> @test_vbslq_f64(1819// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]], <2 x double> noundef [[V3:%.*]]) #[[ATTR0]] {1820// CHECK-NEXT:  [[ENTRY:.*:]]1821// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>1822// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V3]] to <2 x i64>1823// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[V1]] to <16 x i8>1824// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>1825// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>1826// CHECK-NEXT:    [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>1827// CHECK-NEXT:    [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x i64>1828// CHECK-NEXT:    [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64>1829// CHECK-NEXT:    [[VBSL3_I:%.*]] = and <2 x i64> [[VBSL_I]], [[VBSL1_I]]1830// CHECK-NEXT:    [[TMP5:%.*]] = xor <2 x i64> [[VBSL_I]], splat (i64 -1)1831// CHECK-NEXT:    [[VBSL4_I:%.*]] = and <2 x i64> [[TMP5]], [[VBSL2_I]]1832// CHECK-NEXT:    [[VBSL5_I:%.*]] = or <2 x i64> [[VBSL3_I]], [[VBSL4_I]]1833// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <2 x i64> [[VBSL5_I]] to <2 x double>1834// CHECK-NEXT:    ret <2 x double> [[TMP6]]1835//1836float64x2_t test_vbslq_f64(uint64x2_t v1, float64x2_t v2, float64x2_t v3) {1837  return vbslq_f64(v1, v2, v3);1838}1839 1840// CHECK-LABEL: define dso_local <2 x float> @test_vrecps_f32(1841// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1842// CHECK-NEXT:  [[ENTRY:.*:]]1843// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>1844// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>1845// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>1846// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>1847// CHECK-NEXT:    [[VRECPS_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>1848// CHECK-NEXT:    [[VRECPS_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>1849// CHECK-NEXT:    [[VRECPS_V2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> [[VRECPS_V_I]], <2 x float> [[VRECPS_V1_I]])1850// CHECK-NEXT:    [[VRECPS_V3_I:%.*]] = bitcast <2 x float> [[VRECPS_V2_I]] to <8 x i8>1851// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[VRECPS_V3_I]] to <2 x i32>1852// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <2 x float>1853// CHECK-NEXT:    ret <2 x float> [[TMP5]]1854//1855float32x2_t test_vrecps_f32(float32x2_t v1, float32x2_t v2) {1856  return vrecps_f32(v1, v2);1857}1858 1859// CHECK-LABEL: define dso_local <4 x float> @test_vrecpsq_f32(1860// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1861// CHECK-NEXT:  [[ENTRY:.*:]]1862// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>1863// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>1864// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>1865// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>1866// CHECK-NEXT:    [[VRECPSQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>1867// CHECK-NEXT:    [[VRECPSQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>1868// CHECK-NEXT:    [[VRECPSQ_V2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float> [[VRECPSQ_V_I]], <4 x float> [[VRECPSQ_V1_I]])1869// CHECK-NEXT:    [[VRECPSQ_V3_I:%.*]] = bitcast <4 x float> [[VRECPSQ_V2_I]] to <16 x i8>1870// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[VRECPSQ_V3_I]] to <4 x i32>1871// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <4 x float>1872// CHECK-NEXT:    ret <4 x float> [[TMP5]]1873//1874float32x4_t test_vrecpsq_f32(float32x4_t v1, float32x4_t v2) {1875  return vrecpsq_f32(v1, v2);1876}1877 1878// CHECK-LABEL: define dso_local <2 x double> @test_vrecpsq_f64(1879// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {1880// CHECK-NEXT:  [[ENTRY:.*:]]1881// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>1882// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>1883// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>1884// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>1885// CHECK-NEXT:    [[VRECPSQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>1886// CHECK-NEXT:    [[VRECPSQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>1887// CHECK-NEXT:    [[VRECPSQ_V2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double> [[VRECPSQ_V_I]], <2 x double> [[VRECPSQ_V1_I]])1888// CHECK-NEXT:    [[VRECPSQ_V3_I:%.*]] = bitcast <2 x double> [[VRECPSQ_V2_I]] to <16 x i8>1889// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[VRECPSQ_V3_I]] to <2 x i64>1890// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <2 x double>1891// CHECK-NEXT:    ret <2 x double> [[TMP5]]1892//1893float64x2_t test_vrecpsq_f64(float64x2_t v1, float64x2_t v2) {1894  return vrecpsq_f64(v1, v2);1895}1896 1897// CHECK-LABEL: define dso_local <2 x float> @test_vrsqrts_f32(1898// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1899// CHECK-NEXT:  [[ENTRY:.*:]]1900// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>1901// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>1902// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>1903// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>1904// CHECK-NEXT:    [[VRSQRTS_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>1905// CHECK-NEXT:    [[VRSQRTS_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>1906// CHECK-NEXT:    [[VRSQRTS_V2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float> [[VRSQRTS_V_I]], <2 x float> [[VRSQRTS_V1_I]])1907// CHECK-NEXT:    [[VRSQRTS_V3_I:%.*]] = bitcast <2 x float> [[VRSQRTS_V2_I]] to <8 x i8>1908// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[VRSQRTS_V3_I]] to <2 x i32>1909// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <2 x float>1910// CHECK-NEXT:    ret <2 x float> [[TMP5]]1911//1912float32x2_t test_vrsqrts_f32(float32x2_t v1, float32x2_t v2) {1913  return vrsqrts_f32(v1, v2);1914}1915 1916// CHECK-LABEL: define dso_local <4 x float> @test_vrsqrtsq_f32(1917// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1918// CHECK-NEXT:  [[ENTRY:.*:]]1919// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>1920// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>1921// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>1922// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>1923// CHECK-NEXT:    [[VRSQRTSQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>1924// CHECK-NEXT:    [[VRSQRTSQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>1925// CHECK-NEXT:    [[VRSQRTSQ_V2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float> [[VRSQRTSQ_V_I]], <4 x float> [[VRSQRTSQ_V1_I]])1926// CHECK-NEXT:    [[VRSQRTSQ_V3_I:%.*]] = bitcast <4 x float> [[VRSQRTSQ_V2_I]] to <16 x i8>1927// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[VRSQRTSQ_V3_I]] to <4 x i32>1928// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <4 x float>1929// CHECK-NEXT:    ret <4 x float> [[TMP5]]1930//1931float32x4_t test_vrsqrtsq_f32(float32x4_t v1, float32x4_t v2) {1932  return vrsqrtsq_f32(v1, v2);1933}1934 1935// CHECK-LABEL: define dso_local <2 x double> @test_vrsqrtsq_f64(1936// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {1937// CHECK-NEXT:  [[ENTRY:.*:]]1938// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>1939// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>1940// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>1941// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>1942// CHECK-NEXT:    [[VRSQRTSQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>1943// CHECK-NEXT:    [[VRSQRTSQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>1944// CHECK-NEXT:    [[VRSQRTSQ_V2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frsqrts.v2f64(<2 x double> [[VRSQRTSQ_V_I]], <2 x double> [[VRSQRTSQ_V1_I]])1945// CHECK-NEXT:    [[VRSQRTSQ_V3_I:%.*]] = bitcast <2 x double> [[VRSQRTSQ_V2_I]] to <16 x i8>1946// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[VRSQRTSQ_V3_I]] to <2 x i64>1947// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <2 x double>1948// CHECK-NEXT:    ret <2 x double> [[TMP5]]1949//1950float64x2_t test_vrsqrtsq_f64(float64x2_t v1, float64x2_t v2) {1951  return vrsqrtsq_f64(v1, v2);1952}1953 1954// CHECK-LABEL: define dso_local <2 x i32> @test_vcage_f32(1955// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1956// CHECK-NEXT:  [[ENTRY:.*:]]1957// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>1958// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>1959// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>1960// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>1961// CHECK-NEXT:    [[VCAGE_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>1962// CHECK-NEXT:    [[VCAGE_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>1963// CHECK-NEXT:    [[VCAGE_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.facge.v2i32.v2f32(<2 x float> [[VCAGE_V_I]], <2 x float> [[VCAGE_V1_I]])1964// CHECK-NEXT:    ret <2 x i32> [[VCAGE_V2_I]]1965//1966uint32x2_t test_vcage_f32(float32x2_t v1, float32x2_t v2) {1967  return vcage_f32(v1, v2);1968}1969 1970// CHECK-LABEL: define dso_local <1 x i64> @test_vcage_f64(1971// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {1972// CHECK-NEXT:  [[ENTRY:.*:]]1973// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i641974// CHECK-NEXT:    [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 01975// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B]] to i641976// CHECK-NEXT:    [[__P1_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 01977// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>1978// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[__P1_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>1979// CHECK-NEXT:    [[VCAGE_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>1980// CHECK-NEXT:    [[VCAGE_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>1981// CHECK-NEXT:    [[VCAGE_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.facge.v1i64.v1f64(<1 x double> [[VCAGE_V_I]], <1 x double> [[VCAGE_V1_I]])1982// CHECK-NEXT:    ret <1 x i64> [[VCAGE_V2_I]]1983//1984uint64x1_t test_vcage_f64(float64x1_t a, float64x1_t b) {1985  return vcage_f64(a, b);1986}1987 1988// CHECK-LABEL: define dso_local <4 x i32> @test_vcageq_f32(1989// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {1990// CHECK-NEXT:  [[ENTRY:.*:]]1991// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>1992// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>1993// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>1994// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>1995// CHECK-NEXT:    [[VCAGEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>1996// CHECK-NEXT:    [[VCAGEQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>1997// CHECK-NEXT:    [[VCAGEQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.facge.v4i32.v4f32(<4 x float> [[VCAGEQ_V_I]], <4 x float> [[VCAGEQ_V1_I]])1998// CHECK-NEXT:    ret <4 x i32> [[VCAGEQ_V2_I]]1999//2000uint32x4_t test_vcageq_f32(float32x4_t v1, float32x4_t v2) {2001  return vcageq_f32(v1, v2);2002}2003 2004// CHECK-LABEL: define dso_local <2 x i64> @test_vcageq_f64(2005// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {2006// CHECK-NEXT:  [[ENTRY:.*:]]2007// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>2008// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>2009// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>2010// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>2011// CHECK-NEXT:    [[VCAGEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>2012// CHECK-NEXT:    [[VCAGEQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>2013// CHECK-NEXT:    [[VCAGEQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.facge.v2i64.v2f64(<2 x double> [[VCAGEQ_V_I]], <2 x double> [[VCAGEQ_V1_I]])2014// CHECK-NEXT:    ret <2 x i64> [[VCAGEQ_V2_I]]2015//2016uint64x2_t test_vcageq_f64(float64x2_t v1, float64x2_t v2) {2017  return vcageq_f64(v1, v2);2018}2019 2020// CHECK-LABEL: define dso_local <2 x i32> @test_vcagt_f32(2021// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2022// CHECK-NEXT:  [[ENTRY:.*:]]2023// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>2024// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>2025// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>2026// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>2027// CHECK-NEXT:    [[VCAGT_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>2028// CHECK-NEXT:    [[VCAGT_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>2029// CHECK-NEXT:    [[VCAGT_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.facgt.v2i32.v2f32(<2 x float> [[VCAGT_V_I]], <2 x float> [[VCAGT_V1_I]])2030// CHECK-NEXT:    ret <2 x i32> [[VCAGT_V2_I]]2031//2032uint32x2_t test_vcagt_f32(float32x2_t v1, float32x2_t v2) {2033  return vcagt_f32(v1, v2);2034}2035 2036// CHECK-LABEL: define dso_local <1 x i64> @test_vcagt_f64(2037// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {2038// CHECK-NEXT:  [[ENTRY:.*:]]2039// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i642040// CHECK-NEXT:    [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 02041// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B]] to i642042// CHECK-NEXT:    [[__P1_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 02043// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>2044// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[__P1_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>2045// CHECK-NEXT:    [[VCAGT_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>2046// CHECK-NEXT:    [[VCAGT_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>2047// CHECK-NEXT:    [[VCAGT_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.facgt.v1i64.v1f64(<1 x double> [[VCAGT_V_I]], <1 x double> [[VCAGT_V1_I]])2048// CHECK-NEXT:    ret <1 x i64> [[VCAGT_V2_I]]2049//2050uint64x1_t test_vcagt_f64(float64x1_t a, float64x1_t b) {2051  return vcagt_f64(a, b);2052}2053 2054// CHECK-LABEL: define dso_local <4 x i32> @test_vcagtq_f32(2055// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2056// CHECK-NEXT:  [[ENTRY:.*:]]2057// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>2058// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>2059// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>2060// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>2061// CHECK-NEXT:    [[VCAGTQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>2062// CHECK-NEXT:    [[VCAGTQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>2063// CHECK-NEXT:    [[VCAGTQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.facgt.v4i32.v4f32(<4 x float> [[VCAGTQ_V_I]], <4 x float> [[VCAGTQ_V1_I]])2064// CHECK-NEXT:    ret <4 x i32> [[VCAGTQ_V2_I]]2065//2066uint32x4_t test_vcagtq_f32(float32x4_t v1, float32x4_t v2) {2067  return vcagtq_f32(v1, v2);2068}2069 2070// CHECK-LABEL: define dso_local <2 x i64> @test_vcagtq_f64(2071// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {2072// CHECK-NEXT:  [[ENTRY:.*:]]2073// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>2074// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>2075// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>2076// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>2077// CHECK-NEXT:    [[VCAGTQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>2078// CHECK-NEXT:    [[VCAGTQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>2079// CHECK-NEXT:    [[VCAGTQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.facgt.v2i64.v2f64(<2 x double> [[VCAGTQ_V_I]], <2 x double> [[VCAGTQ_V1_I]])2080// CHECK-NEXT:    ret <2 x i64> [[VCAGTQ_V2_I]]2081//2082uint64x2_t test_vcagtq_f64(float64x2_t v1, float64x2_t v2) {2083  return vcagtq_f64(v1, v2);2084}2085 2086// CHECK-LABEL: define dso_local <2 x i32> @test_vcale_f32(2087// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2088// CHECK-NEXT:  [[ENTRY:.*:]]2089// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>2090// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>2091// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>2092// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>2093// CHECK-NEXT:    [[VCALE_V_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>2094// CHECK-NEXT:    [[VCALE_V1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>2095// CHECK-NEXT:    [[VCALE_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.facge.v2i32.v2f32(<2 x float> [[VCALE_V_I]], <2 x float> [[VCALE_V1_I]])2096// CHECK-NEXT:    ret <2 x i32> [[VCALE_V2_I]]2097//2098uint32x2_t test_vcale_f32(float32x2_t v1, float32x2_t v2) {2099  return vcale_f32(v1, v2);2100  // Using registers other than v0, v1 are possible, but would be odd.2101}2102 2103// CHECK-LABEL: define dso_local <1 x i64> @test_vcale_f64(2104// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {2105// CHECK-NEXT:  [[ENTRY:.*:]]2106// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i642107// CHECK-NEXT:    [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 02108// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B]] to i642109// CHECK-NEXT:    [[__P1_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 02110// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>2111// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[__P1_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>2112// CHECK-NEXT:    [[VCALE_V_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>2113// CHECK-NEXT:    [[VCALE_V1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>2114// CHECK-NEXT:    [[VCALE_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.facge.v1i64.v1f64(<1 x double> [[VCALE_V_I]], <1 x double> [[VCALE_V1_I]])2115// CHECK-NEXT:    ret <1 x i64> [[VCALE_V2_I]]2116//2117uint64x1_t test_vcale_f64(float64x1_t a, float64x1_t b) {2118  return vcale_f64(a, b);2119}2120 2121// CHECK-LABEL: define dso_local <4 x i32> @test_vcaleq_f32(2122// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2123// CHECK-NEXT:  [[ENTRY:.*:]]2124// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>2125// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>2126// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>2127// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>2128// CHECK-NEXT:    [[VCALEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>2129// CHECK-NEXT:    [[VCALEQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>2130// CHECK-NEXT:    [[VCALEQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.facge.v4i32.v4f32(<4 x float> [[VCALEQ_V_I]], <4 x float> [[VCALEQ_V1_I]])2131// CHECK-NEXT:    ret <4 x i32> [[VCALEQ_V2_I]]2132//2133uint32x4_t test_vcaleq_f32(float32x4_t v1, float32x4_t v2) {2134  return vcaleq_f32(v1, v2);2135  // Using registers other than v0, v1 are possible, but would be odd.2136}2137 2138// CHECK-LABEL: define dso_local <2 x i64> @test_vcaleq_f64(2139// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {2140// CHECK-NEXT:  [[ENTRY:.*:]]2141// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>2142// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>2143// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>2144// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>2145// CHECK-NEXT:    [[VCALEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>2146// CHECK-NEXT:    [[VCALEQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>2147// CHECK-NEXT:    [[VCALEQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.facge.v2i64.v2f64(<2 x double> [[VCALEQ_V_I]], <2 x double> [[VCALEQ_V1_I]])2148// CHECK-NEXT:    ret <2 x i64> [[VCALEQ_V2_I]]2149//2150uint64x2_t test_vcaleq_f64(float64x2_t v1, float64x2_t v2) {2151  return vcaleq_f64(v1, v2);2152  // Using registers other than v0, v1 are possible, but would be odd.2153}2154 2155// CHECK-LABEL: define dso_local <2 x i32> @test_vcalt_f32(2156// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2157// CHECK-NEXT:  [[ENTRY:.*:]]2158// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[V1]] to <2 x i32>2159// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[V2]] to <2 x i32>2160// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>2161// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>2162// CHECK-NEXT:    [[VCALT_V_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>2163// CHECK-NEXT:    [[VCALT_V1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>2164// CHECK-NEXT:    [[VCALT_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.facgt.v2i32.v2f32(<2 x float> [[VCALT_V_I]], <2 x float> [[VCALT_V1_I]])2165// CHECK-NEXT:    ret <2 x i32> [[VCALT_V2_I]]2166//2167uint32x2_t test_vcalt_f32(float32x2_t v1, float32x2_t v2) {2168  return vcalt_f32(v1, v2);2169  // Using registers other than v0, v1 are possible, but would be odd.2170}2171 2172// CHECK-LABEL: define dso_local <1 x i64> @test_vcalt_f64(2173// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {2174// CHECK-NEXT:  [[ENTRY:.*:]]2175// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i642176// CHECK-NEXT:    [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 02177// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B]] to i642178// CHECK-NEXT:    [[__P1_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 02179// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>2180// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[__P1_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>2181// CHECK-NEXT:    [[VCALT_V_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>2182// CHECK-NEXT:    [[VCALT_V1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>2183// CHECK-NEXT:    [[VCALT_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.facgt.v1i64.v1f64(<1 x double> [[VCALT_V_I]], <1 x double> [[VCALT_V1_I]])2184// CHECK-NEXT:    ret <1 x i64> [[VCALT_V2_I]]2185//2186uint64x1_t test_vcalt_f64(float64x1_t a, float64x1_t b) {2187  return vcalt_f64(a, b);2188}2189 2190// CHECK-LABEL: define dso_local <4 x i32> @test_vcaltq_f32(2191// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2192// CHECK-NEXT:  [[ENTRY:.*:]]2193// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[V1]] to <4 x i32>2194// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[V2]] to <4 x i32>2195// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>2196// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>2197// CHECK-NEXT:    [[VCALTQ_V_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>2198// CHECK-NEXT:    [[VCALTQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>2199// CHECK-NEXT:    [[VCALTQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.facgt.v4i32.v4f32(<4 x float> [[VCALTQ_V_I]], <4 x float> [[VCALTQ_V1_I]])2200// CHECK-NEXT:    ret <4 x i32> [[VCALTQ_V2_I]]2201//2202uint32x4_t test_vcaltq_f32(float32x4_t v1, float32x4_t v2) {2203  return vcaltq_f32(v1, v2);2204  // Using registers other than v0, v1 are possible, but would be odd.2205}2206 2207// CHECK-LABEL: define dso_local <2 x i64> @test_vcaltq_f64(2208// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {2209// CHECK-NEXT:  [[ENTRY:.*:]]2210// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[V1]] to <2 x i64>2211// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[V2]] to <2 x i64>2212// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>2213// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>2214// CHECK-NEXT:    [[VCALTQ_V_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>2215// CHECK-NEXT:    [[VCALTQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>2216// CHECK-NEXT:    [[VCALTQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.facgt.v2i64.v2f64(<2 x double> [[VCALTQ_V_I]], <2 x double> [[VCALTQ_V1_I]])2217// CHECK-NEXT:    ret <2 x i64> [[VCALTQ_V2_I]]2218//2219uint64x2_t test_vcaltq_f64(float64x2_t v1, float64x2_t v2) {2220  return vcaltq_f64(v1, v2);2221  // Using registers other than v0, v1 are possible, but would be odd.2222}2223 2224// CHECK-LABEL: define dso_local <8 x i8> @test_vtst_s8(2225// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2226// CHECK-NEXT:  [[ENTRY:.*:]]2227// CHECK-NEXT:    [[TMP0:%.*]] = and <8 x i8> [[V1]], [[V2]]2228// CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <8 x i8> [[TMP0]], zeroinitializer2229// CHECK-NEXT:    [[VTST_I:%.*]] = sext <8 x i1> [[TMP1]] to <8 x i8>2230// CHECK-NEXT:    ret <8 x i8> [[VTST_I]]2231//2232uint8x8_t test_vtst_s8(int8x8_t v1, int8x8_t v2) {2233  return vtst_s8(v1, v2);2234}2235 2236// CHECK-LABEL: define dso_local <4 x i16> @test_vtst_s16(2237// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2238// CHECK-NEXT:  [[ENTRY:.*:]]2239// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>2240// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>2241// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>2242// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>2243// CHECK-NEXT:    [[TMP4:%.*]] = and <4 x i16> [[TMP2]], [[TMP3]]2244// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <4 x i16> [[TMP4]], zeroinitializer2245// CHECK-NEXT:    [[VTST_I:%.*]] = sext <4 x i1> [[TMP5]] to <4 x i16>2246// CHECK-NEXT:    ret <4 x i16> [[VTST_I]]2247//2248uint16x4_t test_vtst_s16(int16x4_t v1, int16x4_t v2) {2249  return vtst_s16(v1, v2);2250}2251 2252// CHECK-LABEL: define dso_local <2 x i32> @test_vtst_s32(2253// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2254// CHECK-NEXT:  [[ENTRY:.*:]]2255// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>2256// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>2257// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>2258// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>2259// CHECK-NEXT:    [[TMP4:%.*]] = and <2 x i32> [[TMP2]], [[TMP3]]2260// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <2 x i32> [[TMP4]], zeroinitializer2261// CHECK-NEXT:    [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i32>2262// CHECK-NEXT:    ret <2 x i32> [[VTST_I]]2263//2264uint32x2_t test_vtst_s32(int32x2_t v1, int32x2_t v2) {2265  return vtst_s32(v1, v2);2266}2267 2268// CHECK-LABEL: define dso_local <8 x i8> @test_vtst_u8(2269// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2270// CHECK-NEXT:  [[ENTRY:.*:]]2271// CHECK-NEXT:    [[TMP0:%.*]] = and <8 x i8> [[V1]], [[V2]]2272// CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <8 x i8> [[TMP0]], zeroinitializer2273// CHECK-NEXT:    [[VTST_I:%.*]] = sext <8 x i1> [[TMP1]] to <8 x i8>2274// CHECK-NEXT:    ret <8 x i8> [[VTST_I]]2275//2276uint8x8_t test_vtst_u8(uint8x8_t v1, uint8x8_t v2) {2277  return vtst_u8(v1, v2);2278}2279 2280// CHECK-LABEL: define dso_local <4 x i16> @test_vtst_u16(2281// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2282// CHECK-NEXT:  [[ENTRY:.*:]]2283// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>2284// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>2285// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>2286// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>2287// CHECK-NEXT:    [[TMP4:%.*]] = and <4 x i16> [[TMP2]], [[TMP3]]2288// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <4 x i16> [[TMP4]], zeroinitializer2289// CHECK-NEXT:    [[VTST_I:%.*]] = sext <4 x i1> [[TMP5]] to <4 x i16>2290// CHECK-NEXT:    ret <4 x i16> [[VTST_I]]2291//2292uint16x4_t test_vtst_u16(uint16x4_t v1, uint16x4_t v2) {2293  return vtst_u16(v1, v2);2294}2295 2296// CHECK-LABEL: define dso_local <2 x i32> @test_vtst_u32(2297// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2298// CHECK-NEXT:  [[ENTRY:.*:]]2299// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>2300// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>2301// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>2302// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>2303// CHECK-NEXT:    [[TMP4:%.*]] = and <2 x i32> [[TMP2]], [[TMP3]]2304// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <2 x i32> [[TMP4]], zeroinitializer2305// CHECK-NEXT:    [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i32>2306// CHECK-NEXT:    ret <2 x i32> [[VTST_I]]2307//2308uint32x2_t test_vtst_u32(uint32x2_t v1, uint32x2_t v2) {2309  return vtst_u32(v1, v2);2310}2311 2312// CHECK-LABEL: define dso_local <16 x i8> @test_vtstq_s8(2313// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2314// CHECK-NEXT:  [[ENTRY:.*:]]2315// CHECK-NEXT:    [[TMP0:%.*]] = and <16 x i8> [[V1]], [[V2]]2316// CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <16 x i8> [[TMP0]], zeroinitializer2317// CHECK-NEXT:    [[VTST_I:%.*]] = sext <16 x i1> [[TMP1]] to <16 x i8>2318// CHECK-NEXT:    ret <16 x i8> [[VTST_I]]2319//2320uint8x16_t test_vtstq_s8(int8x16_t v1, int8x16_t v2) {2321  return vtstq_s8(v1, v2);2322}2323 2324// CHECK-LABEL: define dso_local <8 x i16> @test_vtstq_s16(2325// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2326// CHECK-NEXT:  [[ENTRY:.*:]]2327// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>2328// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>2329// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>2330// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>2331// CHECK-NEXT:    [[TMP4:%.*]] = and <8 x i16> [[TMP2]], [[TMP3]]2332// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <8 x i16> [[TMP4]], zeroinitializer2333// CHECK-NEXT:    [[VTST_I:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i16>2334// CHECK-NEXT:    ret <8 x i16> [[VTST_I]]2335//2336uint16x8_t test_vtstq_s16(int16x8_t v1, int16x8_t v2) {2337  return vtstq_s16(v1, v2);2338}2339 2340// CHECK-LABEL: define dso_local <4 x i32> @test_vtstq_s32(2341// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2342// CHECK-NEXT:  [[ENTRY:.*:]]2343// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>2344// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>2345// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>2346// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>2347// CHECK-NEXT:    [[TMP4:%.*]] = and <4 x i32> [[TMP2]], [[TMP3]]2348// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <4 x i32> [[TMP4]], zeroinitializer2349// CHECK-NEXT:    [[VTST_I:%.*]] = sext <4 x i1> [[TMP5]] to <4 x i32>2350// CHECK-NEXT:    ret <4 x i32> [[VTST_I]]2351//2352uint32x4_t test_vtstq_s32(int32x4_t v1, int32x4_t v2) {2353  return vtstq_s32(v1, v2);2354}2355 2356// CHECK-LABEL: define dso_local <16 x i8> @test_vtstq_u8(2357// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2358// CHECK-NEXT:  [[ENTRY:.*:]]2359// CHECK-NEXT:    [[TMP0:%.*]] = and <16 x i8> [[V1]], [[V2]]2360// CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <16 x i8> [[TMP0]], zeroinitializer2361// CHECK-NEXT:    [[VTST_I:%.*]] = sext <16 x i1> [[TMP1]] to <16 x i8>2362// CHECK-NEXT:    ret <16 x i8> [[VTST_I]]2363//2364uint8x16_t test_vtstq_u8(uint8x16_t v1, uint8x16_t v2) {2365  return vtstq_u8(v1, v2);2366}2367 2368// CHECK-LABEL: define dso_local <8 x i16> @test_vtstq_u16(2369// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2370// CHECK-NEXT:  [[ENTRY:.*:]]2371// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>2372// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>2373// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>2374// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>2375// CHECK-NEXT:    [[TMP4:%.*]] = and <8 x i16> [[TMP2]], [[TMP3]]2376// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <8 x i16> [[TMP4]], zeroinitializer2377// CHECK-NEXT:    [[VTST_I:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i16>2378// CHECK-NEXT:    ret <8 x i16> [[VTST_I]]2379//2380uint16x8_t test_vtstq_u16(uint16x8_t v1, uint16x8_t v2) {2381  return vtstq_u16(v1, v2);2382}2383 2384// CHECK-LABEL: define dso_local <4 x i32> @test_vtstq_u32(2385// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2386// CHECK-NEXT:  [[ENTRY:.*:]]2387// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>2388// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>2389// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>2390// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>2391// CHECK-NEXT:    [[TMP4:%.*]] = and <4 x i32> [[TMP2]], [[TMP3]]2392// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <4 x i32> [[TMP4]], zeroinitializer2393// CHECK-NEXT:    [[VTST_I:%.*]] = sext <4 x i1> [[TMP5]] to <4 x i32>2394// CHECK-NEXT:    ret <4 x i32> [[VTST_I]]2395//2396uint32x4_t test_vtstq_u32(uint32x4_t v1, uint32x4_t v2) {2397  return vtstq_u32(v1, v2);2398}2399 2400// CHECK-LABEL: define dso_local <2 x i64> @test_vtstq_s64(2401// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {2402// CHECK-NEXT:  [[ENTRY:.*:]]2403// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[V1]] to <16 x i8>2404// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[V2]] to <16 x i8>2405// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>2406// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>2407// CHECK-NEXT:    [[TMP4:%.*]] = and <2 x i64> [[TMP2]], [[TMP3]]2408// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <2 x i64> [[TMP4]], zeroinitializer2409// CHECK-NEXT:    [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i64>2410// CHECK-NEXT:    ret <2 x i64> [[VTST_I]]2411//2412uint64x2_t test_vtstq_s64(int64x2_t v1, int64x2_t v2) {2413  return vtstq_s64(v1, v2);2414}2415 2416// CHECK-LABEL: define dso_local <2 x i64> @test_vtstq_u64(2417// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {2418// CHECK-NEXT:  [[ENTRY:.*:]]2419// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[V1]] to <16 x i8>2420// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[V2]] to <16 x i8>2421// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>2422// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>2423// CHECK-NEXT:    [[TMP4:%.*]] = and <2 x i64> [[TMP2]], [[TMP3]]2424// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <2 x i64> [[TMP4]], zeroinitializer2425// CHECK-NEXT:    [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i64>2426// CHECK-NEXT:    ret <2 x i64> [[VTST_I]]2427//2428uint64x2_t test_vtstq_u64(uint64x2_t v1, uint64x2_t v2) {2429  return vtstq_u64(v1, v2);2430}2431 2432// CHECK-LABEL: define dso_local <8 x i8> @test_vtst_p8(2433// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2434// CHECK-NEXT:  [[ENTRY:.*:]]2435// CHECK-NEXT:    [[TMP0:%.*]] = and <8 x i8> [[V1]], [[V2]]2436// CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <8 x i8> [[TMP0]], zeroinitializer2437// CHECK-NEXT:    [[VTST_I:%.*]] = sext <8 x i1> [[TMP1]] to <8 x i8>2438// CHECK-NEXT:    ret <8 x i8> [[VTST_I]]2439//2440uint8x8_t test_vtst_p8(poly8x8_t v1, poly8x8_t v2) {2441  return vtst_p8(v1, v2);2442}2443 2444// CHECK-LABEL: define dso_local <4 x i16> @test_vtst_p16(2445// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2446// CHECK-NEXT:  [[ENTRY:.*:]]2447// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>2448// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>2449// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>2450// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>2451// CHECK-NEXT:    [[TMP4:%.*]] = and <4 x i16> [[TMP2]], [[TMP3]]2452// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <4 x i16> [[TMP4]], zeroinitializer2453// CHECK-NEXT:    [[VTST_I:%.*]] = sext <4 x i1> [[TMP5]] to <4 x i16>2454// CHECK-NEXT:    ret <4 x i16> [[VTST_I]]2455//2456uint16x4_t test_vtst_p16(poly16x4_t v1, poly16x4_t v2) {2457  return vtst_p16(v1, v2);2458}2459 2460// CHECK-LABEL: define dso_local <16 x i8> @test_vtstq_p8(2461// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2462// CHECK-NEXT:  [[ENTRY:.*:]]2463// CHECK-NEXT:    [[TMP0:%.*]] = and <16 x i8> [[V1]], [[V2]]2464// CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <16 x i8> [[TMP0]], zeroinitializer2465// CHECK-NEXT:    [[VTST_I:%.*]] = sext <16 x i1> [[TMP1]] to <16 x i8>2466// CHECK-NEXT:    ret <16 x i8> [[VTST_I]]2467//2468uint8x16_t test_vtstq_p8(poly8x16_t v1, poly8x16_t v2) {2469  return vtstq_p8(v1, v2);2470}2471 2472// CHECK-LABEL: define dso_local <8 x i16> @test_vtstq_p16(2473// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2474// CHECK-NEXT:  [[ENTRY:.*:]]2475// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>2476// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>2477// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>2478// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>2479// CHECK-NEXT:    [[TMP4:%.*]] = and <8 x i16> [[TMP2]], [[TMP3]]2480// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <8 x i16> [[TMP4]], zeroinitializer2481// CHECK-NEXT:    [[VTST_I:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i16>2482// CHECK-NEXT:    ret <8 x i16> [[VTST_I]]2483//2484uint16x8_t test_vtstq_p16(poly16x8_t v1, poly16x8_t v2) {2485  return vtstq_p16(v1, v2);2486}2487 2488// CHECK-LABEL: define dso_local <1 x i64> @test_vtst_s64(2489// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {2490// CHECK-NEXT:  [[ENTRY:.*:]]2491// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>2492// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>2493// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>2494// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>2495// CHECK-NEXT:    [[TMP4:%.*]] = and <1 x i64> [[TMP2]], [[TMP3]]2496// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <1 x i64> [[TMP4]], zeroinitializer2497// CHECK-NEXT:    [[VTST_I:%.*]] = sext <1 x i1> [[TMP5]] to <1 x i64>2498// CHECK-NEXT:    ret <1 x i64> [[VTST_I]]2499//2500uint64x1_t test_vtst_s64(int64x1_t a, int64x1_t b) {2501  return vtst_s64(a, b);2502}2503 2504// CHECK-LABEL: define dso_local <1 x i64> @test_vtst_u64(2505// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {2506// CHECK-NEXT:  [[ENTRY:.*:]]2507// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>2508// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>2509// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>2510// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>2511// CHECK-NEXT:    [[TMP4:%.*]] = and <1 x i64> [[TMP2]], [[TMP3]]2512// CHECK-NEXT:    [[TMP5:%.*]] = icmp ne <1 x i64> [[TMP4]], zeroinitializer2513// CHECK-NEXT:    [[VTST_I:%.*]] = sext <1 x i1> [[TMP5]] to <1 x i64>2514// CHECK-NEXT:    ret <1 x i64> [[VTST_I]]2515//2516uint64x1_t test_vtst_u64(uint64x1_t a, uint64x1_t b) {2517  return vtst_u64(a, b);2518}2519 2520// CHECK-LABEL: define dso_local <8 x i8> @test_vceq_s8(2521// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2522// CHECK-NEXT:  [[ENTRY:.*:]]2523// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <8 x i8> [[V1]], [[V2]]2524// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>2525// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]2526//2527uint8x8_t test_vceq_s8(int8x8_t v1, int8x8_t v2) {2528  return vceq_s8(v1, v2);2529}2530 2531// CHECK-LABEL: define dso_local <4 x i16> @test_vceq_s16(2532// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2533// CHECK-NEXT:  [[ENTRY:.*:]]2534// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <4 x i16> [[V1]], [[V2]]2535// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>2536// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]2537//2538uint16x4_t test_vceq_s16(int16x4_t v1, int16x4_t v2) {2539  return vceq_s16(v1, v2);2540}2541 2542// CHECK-LABEL: define dso_local <2 x i32> @test_vceq_s32(2543// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2544// CHECK-NEXT:  [[ENTRY:.*:]]2545// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <2 x i32> [[V1]], [[V2]]2546// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>2547// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]2548//2549uint32x2_t test_vceq_s32(int32x2_t v1, int32x2_t v2) {2550  return vceq_s32(v1, v2);2551}2552 2553// CHECK-LABEL: define dso_local <1 x i64> @test_vceq_s64(2554// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {2555// CHECK-NEXT:  [[ENTRY:.*:]]2556// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <1 x i64> [[A]], [[B]]2557// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>2558// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]2559//2560uint64x1_t test_vceq_s64(int64x1_t a, int64x1_t b) {2561  return vceq_s64(a, b);2562}2563 2564// CHECK-LABEL: define dso_local <1 x i64> @test_vceq_u64(2565// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {2566// CHECK-NEXT:  [[ENTRY:.*:]]2567// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <1 x i64> [[A]], [[B]]2568// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>2569// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]2570//2571uint64x1_t test_vceq_u64(uint64x1_t a, uint64x1_t b) {2572  return vceq_u64(a, b);2573}2574 2575// CHECK-LABEL: define dso_local <2 x i32> @test_vceq_f32(2576// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2577// CHECK-NEXT:  [[ENTRY:.*:]]2578// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oeq <2 x float> [[V1]], [[V2]]2579// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>2580// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]2581//2582uint32x2_t test_vceq_f32(float32x2_t v1, float32x2_t v2) {2583  return vceq_f32(v1, v2);2584}2585 2586// CHECK-LABEL: define dso_local <1 x i64> @test_vceq_f64(2587// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {2588// CHECK-NEXT:  [[ENTRY:.*:]]2589// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oeq <1 x double> [[A]], [[B]]2590// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>2591// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]2592//2593uint64x1_t test_vceq_f64(float64x1_t a, float64x1_t b) {2594  return vceq_f64(a, b);2595}2596 2597// CHECK-LABEL: define dso_local <8 x i8> @test_vceq_u8(2598// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2599// CHECK-NEXT:  [[ENTRY:.*:]]2600// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <8 x i8> [[V1]], [[V2]]2601// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>2602// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]2603//2604uint8x8_t test_vceq_u8(uint8x8_t v1, uint8x8_t v2) {2605  return vceq_u8(v1, v2);2606}2607 2608// CHECK-LABEL: define dso_local <4 x i16> @test_vceq_u16(2609// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2610// CHECK-NEXT:  [[ENTRY:.*:]]2611// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <4 x i16> [[V1]], [[V2]]2612// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>2613// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]2614//2615uint16x4_t test_vceq_u16(uint16x4_t v1, uint16x4_t v2) {2616  return vceq_u16(v1, v2);2617}2618 2619// CHECK-LABEL: define dso_local <2 x i32> @test_vceq_u32(2620// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2621// CHECK-NEXT:  [[ENTRY:.*:]]2622// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <2 x i32> [[V1]], [[V2]]2623// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>2624// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]2625//2626uint32x2_t test_vceq_u32(uint32x2_t v1, uint32x2_t v2) {2627  return vceq_u32(v1, v2);2628}2629 2630// CHECK-LABEL: define dso_local <8 x i8> @test_vceq_p8(2631// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2632// CHECK-NEXT:  [[ENTRY:.*:]]2633// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <8 x i8> [[V1]], [[V2]]2634// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>2635// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]2636//2637uint8x8_t test_vceq_p8(poly8x8_t v1, poly8x8_t v2) {2638  return vceq_p8(v1, v2);2639}2640 2641// CHECK-LABEL: define dso_local <16 x i8> @test_vceqq_s8(2642// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2643// CHECK-NEXT:  [[ENTRY:.*:]]2644// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <16 x i8> [[V1]], [[V2]]2645// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>2646// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]2647//2648uint8x16_t test_vceqq_s8(int8x16_t v1, int8x16_t v2) {2649  return vceqq_s8(v1, v2);2650}2651 2652// CHECK-LABEL: define dso_local <8 x i16> @test_vceqq_s16(2653// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2654// CHECK-NEXT:  [[ENTRY:.*:]]2655// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <8 x i16> [[V1]], [[V2]]2656// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>2657// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]2658//2659uint16x8_t test_vceqq_s16(int16x8_t v1, int16x8_t v2) {2660  return vceqq_s16(v1, v2);2661}2662 2663// CHECK-LABEL: define dso_local <4 x i32> @test_vceqq_s32(2664// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2665// CHECK-NEXT:  [[ENTRY:.*:]]2666// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <4 x i32> [[V1]], [[V2]]2667// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>2668// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]2669//2670uint32x4_t test_vceqq_s32(int32x4_t v1, int32x4_t v2) {2671  return vceqq_s32(v1, v2);2672}2673 2674// CHECK-LABEL: define dso_local <4 x i32> @test_vceqq_f32(2675// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2676// CHECK-NEXT:  [[ENTRY:.*:]]2677// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oeq <4 x float> [[V1]], [[V2]]2678// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>2679// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]2680//2681uint32x4_t test_vceqq_f32(float32x4_t v1, float32x4_t v2) {2682  return vceqq_f32(v1, v2);2683}2684 2685// CHECK-LABEL: define dso_local <16 x i8> @test_vceqq_u8(2686// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2687// CHECK-NEXT:  [[ENTRY:.*:]]2688// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <16 x i8> [[V1]], [[V2]]2689// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>2690// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]2691//2692uint8x16_t test_vceqq_u8(uint8x16_t v1, uint8x16_t v2) {2693  return vceqq_u8(v1, v2);2694}2695 2696// CHECK-LABEL: define dso_local <8 x i16> @test_vceqq_u16(2697// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2698// CHECK-NEXT:  [[ENTRY:.*:]]2699// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <8 x i16> [[V1]], [[V2]]2700// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>2701// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]2702//2703uint16x8_t test_vceqq_u16(uint16x8_t v1, uint16x8_t v2) {2704  return vceqq_u16(v1, v2);2705}2706 2707// CHECK-LABEL: define dso_local <4 x i32> @test_vceqq_u32(2708// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2709// CHECK-NEXT:  [[ENTRY:.*:]]2710// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <4 x i32> [[V1]], [[V2]]2711// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>2712// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]2713//2714uint32x4_t test_vceqq_u32(uint32x4_t v1, uint32x4_t v2) {2715  return vceqq_u32(v1, v2);2716}2717 2718// CHECK-LABEL: define dso_local <16 x i8> @test_vceqq_p8(2719// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2720// CHECK-NEXT:  [[ENTRY:.*:]]2721// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <16 x i8> [[V1]], [[V2]]2722// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>2723// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]2724//2725uint8x16_t test_vceqq_p8(poly8x16_t v1, poly8x16_t v2) {2726  return vceqq_p8(v1, v2);2727}2728 2729// CHECK-LABEL: define dso_local <2 x i64> @test_vceqq_s64(2730// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {2731// CHECK-NEXT:  [[ENTRY:.*:]]2732// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <2 x i64> [[V1]], [[V2]]2733// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>2734// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]2735//2736uint64x2_t test_vceqq_s64(int64x2_t v1, int64x2_t v2) {2737  return vceqq_s64(v1, v2);2738}2739 2740// CHECK-LABEL: define dso_local <2 x i64> @test_vceqq_u64(2741// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {2742// CHECK-NEXT:  [[ENTRY:.*:]]2743// CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <2 x i64> [[V1]], [[V2]]2744// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>2745// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]2746//2747uint64x2_t test_vceqq_u64(uint64x2_t v1, uint64x2_t v2) {2748  return vceqq_u64(v1, v2);2749}2750 2751// CHECK-LABEL: define dso_local <2 x i64> @test_vceqq_f64(2752// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {2753// CHECK-NEXT:  [[ENTRY:.*:]]2754// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oeq <2 x double> [[V1]], [[V2]]2755// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>2756// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]2757//2758uint64x2_t test_vceqq_f64(float64x2_t v1, float64x2_t v2) {2759  return vceqq_f64(v1, v2);2760}2761 2762// CHECK-LABEL: define dso_local <8 x i8> @test_vcge_s8(2763// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2764// CHECK-NEXT:  [[ENTRY:.*:]]2765// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <8 x i8> [[V1]], [[V2]]2766// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>2767// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]2768//2769uint8x8_t test_vcge_s8(int8x8_t v1, int8x8_t v2) {2770  return vcge_s8(v1, v2);2771}2772 2773// CHECK-LABEL: define dso_local <4 x i16> @test_vcge_s16(2774// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2775// CHECK-NEXT:  [[ENTRY:.*:]]2776// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <4 x i16> [[V1]], [[V2]]2777// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>2778// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]2779//2780uint16x4_t test_vcge_s16(int16x4_t v1, int16x4_t v2) {2781  return vcge_s16(v1, v2);2782}2783 2784// CHECK-LABEL: define dso_local <2 x i32> @test_vcge_s32(2785// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2786// CHECK-NEXT:  [[ENTRY:.*:]]2787// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <2 x i32> [[V1]], [[V2]]2788// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>2789// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]2790//2791uint32x2_t test_vcge_s32(int32x2_t v1, int32x2_t v2) {2792  return vcge_s32(v1, v2);2793}2794 2795// CHECK-LABEL: define dso_local <1 x i64> @test_vcge_s64(2796// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {2797// CHECK-NEXT:  [[ENTRY:.*:]]2798// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <1 x i64> [[A]], [[B]]2799// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>2800// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]2801//2802uint64x1_t test_vcge_s64(int64x1_t a, int64x1_t b) {2803  return vcge_s64(a, b);2804}2805 2806// CHECK-LABEL: define dso_local <1 x i64> @test_vcge_u64(2807// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {2808// CHECK-NEXT:  [[ENTRY:.*:]]2809// CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <1 x i64> [[A]], [[B]]2810// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>2811// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]2812//2813uint64x1_t test_vcge_u64(uint64x1_t a, uint64x1_t b) {2814  return vcge_u64(a, b);2815}2816 2817// CHECK-LABEL: define dso_local <2 x i32> @test_vcge_f32(2818// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2819// CHECK-NEXT:  [[ENTRY:.*:]]2820// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oge <2 x float> [[V1]], [[V2]]2821// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>2822// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]2823//2824uint32x2_t test_vcge_f32(float32x2_t v1, float32x2_t v2) {2825  return vcge_f32(v1, v2);2826}2827 2828// CHECK-LABEL: define dso_local <1 x i64> @test_vcge_f64(2829// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {2830// CHECK-NEXT:  [[ENTRY:.*:]]2831// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oge <1 x double> [[A]], [[B]]2832// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>2833// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]2834//2835uint64x1_t test_vcge_f64(float64x1_t a, float64x1_t b) {2836  return vcge_f64(a, b);2837}2838 2839// CHECK-LABEL: define dso_local <8 x i8> @test_vcge_u8(2840// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2841// CHECK-NEXT:  [[ENTRY:.*:]]2842// CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <8 x i8> [[V1]], [[V2]]2843// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>2844// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]2845//2846uint8x8_t test_vcge_u8(uint8x8_t v1, uint8x8_t v2) {2847  return vcge_u8(v1, v2);2848}2849 2850// CHECK-LABEL: define dso_local <4 x i16> @test_vcge_u16(2851// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2852// CHECK-NEXT:  [[ENTRY:.*:]]2853// CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <4 x i16> [[V1]], [[V2]]2854// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>2855// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]2856//2857uint16x4_t test_vcge_u16(uint16x4_t v1, uint16x4_t v2) {2858  return vcge_u16(v1, v2);2859}2860 2861// CHECK-LABEL: define dso_local <2 x i32> @test_vcge_u32(2862// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2863// CHECK-NEXT:  [[ENTRY:.*:]]2864// CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <2 x i32> [[V1]], [[V2]]2865// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>2866// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]2867//2868uint32x2_t test_vcge_u32(uint32x2_t v1, uint32x2_t v2) {2869  return vcge_u32(v1, v2);2870}2871 2872// CHECK-LABEL: define dso_local <16 x i8> @test_vcgeq_s8(2873// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2874// CHECK-NEXT:  [[ENTRY:.*:]]2875// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <16 x i8> [[V1]], [[V2]]2876// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>2877// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]2878//2879uint8x16_t test_vcgeq_s8(int8x16_t v1, int8x16_t v2) {2880  return vcgeq_s8(v1, v2);2881}2882 2883// CHECK-LABEL: define dso_local <8 x i16> @test_vcgeq_s16(2884// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2885// CHECK-NEXT:  [[ENTRY:.*:]]2886// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <8 x i16> [[V1]], [[V2]]2887// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>2888// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]2889//2890uint16x8_t test_vcgeq_s16(int16x8_t v1, int16x8_t v2) {2891  return vcgeq_s16(v1, v2);2892}2893 2894// CHECK-LABEL: define dso_local <4 x i32> @test_vcgeq_s32(2895// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2896// CHECK-NEXT:  [[ENTRY:.*:]]2897// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <4 x i32> [[V1]], [[V2]]2898// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>2899// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]2900//2901uint32x4_t test_vcgeq_s32(int32x4_t v1, int32x4_t v2) {2902  return vcgeq_s32(v1, v2);2903}2904 2905// CHECK-LABEL: define dso_local <4 x i32> @test_vcgeq_f32(2906// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {2907// CHECK-NEXT:  [[ENTRY:.*:]]2908// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oge <4 x float> [[V1]], [[V2]]2909// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>2910// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]2911//2912uint32x4_t test_vcgeq_f32(float32x4_t v1, float32x4_t v2) {2913  return vcgeq_f32(v1, v2);2914}2915 2916// CHECK-LABEL: define dso_local <16 x i8> @test_vcgeq_u8(2917// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2918// CHECK-NEXT:  [[ENTRY:.*:]]2919// CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <16 x i8> [[V1]], [[V2]]2920// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>2921// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]2922//2923uint8x16_t test_vcgeq_u8(uint8x16_t v1, uint8x16_t v2) {2924  return vcgeq_u8(v1, v2);2925}2926 2927// CHECK-LABEL: define dso_local <8 x i16> @test_vcgeq_u16(2928// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2929// CHECK-NEXT:  [[ENTRY:.*:]]2930// CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <8 x i16> [[V1]], [[V2]]2931// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>2932// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]2933//2934uint16x8_t test_vcgeq_u16(uint16x8_t v1, uint16x8_t v2) {2935  return vcgeq_u16(v1, v2);2936}2937 2938// CHECK-LABEL: define dso_local <4 x i32> @test_vcgeq_u32(2939// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {2940// CHECK-NEXT:  [[ENTRY:.*:]]2941// CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <4 x i32> [[V1]], [[V2]]2942// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>2943// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]2944//2945uint32x4_t test_vcgeq_u32(uint32x4_t v1, uint32x4_t v2) {2946  return vcgeq_u32(v1, v2);2947}2948 2949// CHECK-LABEL: define dso_local <2 x i64> @test_vcgeq_s64(2950// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {2951// CHECK-NEXT:  [[ENTRY:.*:]]2952// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <2 x i64> [[V1]], [[V2]]2953// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>2954// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]2955//2956uint64x2_t test_vcgeq_s64(int64x2_t v1, int64x2_t v2) {2957  return vcgeq_s64(v1, v2);2958}2959 2960// CHECK-LABEL: define dso_local <2 x i64> @test_vcgeq_u64(2961// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {2962// CHECK-NEXT:  [[ENTRY:.*:]]2963// CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <2 x i64> [[V1]], [[V2]]2964// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>2965// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]2966//2967uint64x2_t test_vcgeq_u64(uint64x2_t v1, uint64x2_t v2) {2968  return vcgeq_u64(v1, v2);2969}2970 2971// CHECK-LABEL: define dso_local <2 x i64> @test_vcgeq_f64(2972// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {2973// CHECK-NEXT:  [[ENTRY:.*:]]2974// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oge <2 x double> [[V1]], [[V2]]2975// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>2976// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]2977//2978uint64x2_t test_vcgeq_f64(float64x2_t v1, float64x2_t v2) {2979  return vcgeq_f64(v1, v2);2980}2981 2982// Notes about vcle:2983// LE condition predicate implemented as GE, so check reversed operands.2984// Using registers other than v0, v1 are possible, but would be odd.2985// CHECK-LABEL: define dso_local <8 x i8> @test_vcle_s8(2986// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {2987// CHECK-NEXT:  [[ENTRY:.*:]]2988// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <8 x i8> [[V1]], [[V2]]2989// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>2990// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]2991//2992uint8x8_t test_vcle_s8(int8x8_t v1, int8x8_t v2) {2993  return vcle_s8(v1, v2);2994}2995 2996// CHECK-LABEL: define dso_local <4 x i16> @test_vcle_s16(2997// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {2998// CHECK-NEXT:  [[ENTRY:.*:]]2999// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <4 x i16> [[V1]], [[V2]]3000// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>3001// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]3002//3003uint16x4_t test_vcle_s16(int16x4_t v1, int16x4_t v2) {3004  return vcle_s16(v1, v2);3005}3006 3007// CHECK-LABEL: define dso_local <2 x i32> @test_vcle_s32(3008// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3009// CHECK-NEXT:  [[ENTRY:.*:]]3010// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <2 x i32> [[V1]], [[V2]]3011// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3012// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3013//3014uint32x2_t test_vcle_s32(int32x2_t v1, int32x2_t v2) {3015  return vcle_s32(v1, v2);3016}3017 3018// CHECK-LABEL: define dso_local <1 x i64> @test_vcle_s64(3019// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {3020// CHECK-NEXT:  [[ENTRY:.*:]]3021// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <1 x i64> [[A]], [[B]]3022// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3023// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3024//3025uint64x1_t test_vcle_s64(int64x1_t a, int64x1_t b) {3026  return vcle_s64(a, b);3027}3028 3029// CHECK-LABEL: define dso_local <1 x i64> @test_vcle_u64(3030// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {3031// CHECK-NEXT:  [[ENTRY:.*:]]3032// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <1 x i64> [[A]], [[B]]3033// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3034// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3035//3036uint64x1_t test_vcle_u64(uint64x1_t a, uint64x1_t b) {3037  return vcle_u64(a, b);3038}3039 3040// CHECK-LABEL: define dso_local <2 x i32> @test_vcle_f32(3041// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {3042// CHECK-NEXT:  [[ENTRY:.*:]]3043// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ole <2 x float> [[V1]], [[V2]]3044// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3045// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3046//3047uint32x2_t test_vcle_f32(float32x2_t v1, float32x2_t v2) {3048  return vcle_f32(v1, v2);3049}3050 3051// CHECK-LABEL: define dso_local <1 x i64> @test_vcle_f64(3052// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {3053// CHECK-NEXT:  [[ENTRY:.*:]]3054// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ole <1 x double> [[A]], [[B]]3055// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3056// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3057//3058uint64x1_t test_vcle_f64(float64x1_t a, float64x1_t b) {3059  return vcle_f64(a, b);3060}3061 3062// CHECK-LABEL: define dso_local <8 x i8> @test_vcle_u8(3063// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3064// CHECK-NEXT:  [[ENTRY:.*:]]3065// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <8 x i8> [[V1]], [[V2]]3066// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>3067// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]3068//3069uint8x8_t test_vcle_u8(uint8x8_t v1, uint8x8_t v2) {3070  return vcle_u8(v1, v2);3071}3072 3073// CHECK-LABEL: define dso_local <4 x i16> @test_vcle_u16(3074// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3075// CHECK-NEXT:  [[ENTRY:.*:]]3076// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <4 x i16> [[V1]], [[V2]]3077// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>3078// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]3079//3080uint16x4_t test_vcle_u16(uint16x4_t v1, uint16x4_t v2) {3081  return vcle_u16(v1, v2);3082}3083 3084// CHECK-LABEL: define dso_local <2 x i32> @test_vcle_u32(3085// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3086// CHECK-NEXT:  [[ENTRY:.*:]]3087// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <2 x i32> [[V1]], [[V2]]3088// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3089// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3090//3091uint32x2_t test_vcle_u32(uint32x2_t v1, uint32x2_t v2) {3092  return vcle_u32(v1, v2);3093}3094 3095// CHECK-LABEL: define dso_local <16 x i8> @test_vcleq_s8(3096// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3097// CHECK-NEXT:  [[ENTRY:.*:]]3098// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <16 x i8> [[V1]], [[V2]]3099// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>3100// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]3101//3102uint8x16_t test_vcleq_s8(int8x16_t v1, int8x16_t v2) {3103  return vcleq_s8(v1, v2);3104}3105 3106// CHECK-LABEL: define dso_local <8 x i16> @test_vcleq_s16(3107// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3108// CHECK-NEXT:  [[ENTRY:.*:]]3109// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <8 x i16> [[V1]], [[V2]]3110// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>3111// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]3112//3113uint16x8_t test_vcleq_s16(int16x8_t v1, int16x8_t v2) {3114  return vcleq_s16(v1, v2);3115}3116 3117// CHECK-LABEL: define dso_local <4 x i32> @test_vcleq_s32(3118// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3119// CHECK-NEXT:  [[ENTRY:.*:]]3120// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <4 x i32> [[V1]], [[V2]]3121// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3122// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3123//3124uint32x4_t test_vcleq_s32(int32x4_t v1, int32x4_t v2) {3125  return vcleq_s32(v1, v2);3126}3127 3128// CHECK-LABEL: define dso_local <4 x i32> @test_vcleq_f32(3129// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {3130// CHECK-NEXT:  [[ENTRY:.*:]]3131// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ole <4 x float> [[V1]], [[V2]]3132// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3133// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3134//3135uint32x4_t test_vcleq_f32(float32x4_t v1, float32x4_t v2) {3136  return vcleq_f32(v1, v2);3137}3138 3139// CHECK-LABEL: define dso_local <16 x i8> @test_vcleq_u8(3140// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3141// CHECK-NEXT:  [[ENTRY:.*:]]3142// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <16 x i8> [[V1]], [[V2]]3143// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>3144// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]3145//3146uint8x16_t test_vcleq_u8(uint8x16_t v1, uint8x16_t v2) {3147  return vcleq_u8(v1, v2);3148}3149 3150// CHECK-LABEL: define dso_local <8 x i16> @test_vcleq_u16(3151// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3152// CHECK-NEXT:  [[ENTRY:.*:]]3153// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <8 x i16> [[V1]], [[V2]]3154// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>3155// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]3156//3157uint16x8_t test_vcleq_u16(uint16x8_t v1, uint16x8_t v2) {3158  return vcleq_u16(v1, v2);3159}3160 3161// CHECK-LABEL: define dso_local <4 x i32> @test_vcleq_u32(3162// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3163// CHECK-NEXT:  [[ENTRY:.*:]]3164// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <4 x i32> [[V1]], [[V2]]3165// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3166// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3167//3168uint32x4_t test_vcleq_u32(uint32x4_t v1, uint32x4_t v2) {3169  return vcleq_u32(v1, v2);3170}3171 3172// CHECK-LABEL: define dso_local <2 x i64> @test_vcleq_s64(3173// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {3174// CHECK-NEXT:  [[ENTRY:.*:]]3175// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <2 x i64> [[V1]], [[V2]]3176// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3177// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3178//3179uint64x2_t test_vcleq_s64(int64x2_t v1, int64x2_t v2) {3180  return vcleq_s64(v1, v2);3181}3182 3183// CHECK-LABEL: define dso_local <2 x i64> @test_vcleq_u64(3184// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {3185// CHECK-NEXT:  [[ENTRY:.*:]]3186// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <2 x i64> [[V1]], [[V2]]3187// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3188// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3189//3190uint64x2_t test_vcleq_u64(uint64x2_t v1, uint64x2_t v2) {3191  return vcleq_u64(v1, v2);3192}3193 3194// CHECK-LABEL: define dso_local <2 x i64> @test_vcleq_f64(3195// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {3196// CHECK-NEXT:  [[ENTRY:.*:]]3197// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ole <2 x double> [[V1]], [[V2]]3198// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3199// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3200//3201uint64x2_t test_vcleq_f64(float64x2_t v1, float64x2_t v2) {3202  return vcleq_f64(v1, v2);3203}3204 3205// CHECK-LABEL: define dso_local <8 x i8> @test_vcgt_s8(3206// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3207// CHECK-NEXT:  [[ENTRY:.*:]]3208// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <8 x i8> [[V1]], [[V2]]3209// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>3210// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]3211//3212uint8x8_t test_vcgt_s8(int8x8_t v1, int8x8_t v2) {3213  return vcgt_s8(v1, v2);3214}3215 3216// CHECK-LABEL: define dso_local <4 x i16> @test_vcgt_s16(3217// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3218// CHECK-NEXT:  [[ENTRY:.*:]]3219// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <4 x i16> [[V1]], [[V2]]3220// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>3221// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]3222//3223uint16x4_t test_vcgt_s16(int16x4_t v1, int16x4_t v2) {3224  return vcgt_s16(v1, v2);3225}3226 3227// CHECK-LABEL: define dso_local <2 x i32> @test_vcgt_s32(3228// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3229// CHECK-NEXT:  [[ENTRY:.*:]]3230// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <2 x i32> [[V1]], [[V2]]3231// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3232// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3233//3234uint32x2_t test_vcgt_s32(int32x2_t v1, int32x2_t v2) {3235  return vcgt_s32(v1, v2);3236}3237 3238// CHECK-LABEL: define dso_local <1 x i64> @test_vcgt_s64(3239// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {3240// CHECK-NEXT:  [[ENTRY:.*:]]3241// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <1 x i64> [[A]], [[B]]3242// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3243// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3244//3245uint64x1_t test_vcgt_s64(int64x1_t a, int64x1_t b) {3246  return vcgt_s64(a, b);3247}3248 3249// CHECK-LABEL: define dso_local <1 x i64> @test_vcgt_u64(3250// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {3251// CHECK-NEXT:  [[ENTRY:.*:]]3252// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <1 x i64> [[A]], [[B]]3253// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3254// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3255//3256uint64x1_t test_vcgt_u64(uint64x1_t a, uint64x1_t b) {3257  return vcgt_u64(a, b);3258}3259 3260// CHECK-LABEL: define dso_local <2 x i32> @test_vcgt_f32(3261// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {3262// CHECK-NEXT:  [[ENTRY:.*:]]3263// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ogt <2 x float> [[V1]], [[V2]]3264// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3265// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3266//3267uint32x2_t test_vcgt_f32(float32x2_t v1, float32x2_t v2) {3268  return vcgt_f32(v1, v2);3269}3270 3271// CHECK-LABEL: define dso_local <1 x i64> @test_vcgt_f64(3272// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {3273// CHECK-NEXT:  [[ENTRY:.*:]]3274// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ogt <1 x double> [[A]], [[B]]3275// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3276// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3277//3278uint64x1_t test_vcgt_f64(float64x1_t a, float64x1_t b) {3279  return vcgt_f64(a, b);3280}3281 3282// CHECK-LABEL: define dso_local <8 x i8> @test_vcgt_u8(3283// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3284// CHECK-NEXT:  [[ENTRY:.*:]]3285// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <8 x i8> [[V1]], [[V2]]3286// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>3287// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]3288//3289uint8x8_t test_vcgt_u8(uint8x8_t v1, uint8x8_t v2) {3290  return vcgt_u8(v1, v2);3291}3292 3293// CHECK-LABEL: define dso_local <4 x i16> @test_vcgt_u16(3294// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3295// CHECK-NEXT:  [[ENTRY:.*:]]3296// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <4 x i16> [[V1]], [[V2]]3297// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>3298// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]3299//3300uint16x4_t test_vcgt_u16(uint16x4_t v1, uint16x4_t v2) {3301  return vcgt_u16(v1, v2);3302}3303 3304// CHECK-LABEL: define dso_local <2 x i32> @test_vcgt_u32(3305// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3306// CHECK-NEXT:  [[ENTRY:.*:]]3307// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <2 x i32> [[V1]], [[V2]]3308// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3309// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3310//3311uint32x2_t test_vcgt_u32(uint32x2_t v1, uint32x2_t v2) {3312  return vcgt_u32(v1, v2);3313}3314 3315// CHECK-LABEL: define dso_local <16 x i8> @test_vcgtq_s8(3316// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3317// CHECK-NEXT:  [[ENTRY:.*:]]3318// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <16 x i8> [[V1]], [[V2]]3319// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>3320// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]3321//3322uint8x16_t test_vcgtq_s8(int8x16_t v1, int8x16_t v2) {3323  return vcgtq_s8(v1, v2);3324}3325 3326// CHECK-LABEL: define dso_local <8 x i16> @test_vcgtq_s16(3327// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3328// CHECK-NEXT:  [[ENTRY:.*:]]3329// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <8 x i16> [[V1]], [[V2]]3330// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>3331// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]3332//3333uint16x8_t test_vcgtq_s16(int16x8_t v1, int16x8_t v2) {3334  return vcgtq_s16(v1, v2);3335}3336 3337// CHECK-LABEL: define dso_local <4 x i32> @test_vcgtq_s32(3338// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3339// CHECK-NEXT:  [[ENTRY:.*:]]3340// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <4 x i32> [[V1]], [[V2]]3341// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3342// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3343//3344uint32x4_t test_vcgtq_s32(int32x4_t v1, int32x4_t v2) {3345  return vcgtq_s32(v1, v2);3346}3347 3348// CHECK-LABEL: define dso_local <4 x i32> @test_vcgtq_f32(3349// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {3350// CHECK-NEXT:  [[ENTRY:.*:]]3351// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ogt <4 x float> [[V1]], [[V2]]3352// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3353// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3354//3355uint32x4_t test_vcgtq_f32(float32x4_t v1, float32x4_t v2) {3356  return vcgtq_f32(v1, v2);3357}3358 3359// CHECK-LABEL: define dso_local <16 x i8> @test_vcgtq_u8(3360// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3361// CHECK-NEXT:  [[ENTRY:.*:]]3362// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <16 x i8> [[V1]], [[V2]]3363// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>3364// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]3365//3366uint8x16_t test_vcgtq_u8(uint8x16_t v1, uint8x16_t v2) {3367  return vcgtq_u8(v1, v2);3368}3369 3370// CHECK-LABEL: define dso_local <8 x i16> @test_vcgtq_u16(3371// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3372// CHECK-NEXT:  [[ENTRY:.*:]]3373// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <8 x i16> [[V1]], [[V2]]3374// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>3375// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]3376//3377uint16x8_t test_vcgtq_u16(uint16x8_t v1, uint16x8_t v2) {3378  return vcgtq_u16(v1, v2);3379}3380 3381// CHECK-LABEL: define dso_local <4 x i32> @test_vcgtq_u32(3382// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3383// CHECK-NEXT:  [[ENTRY:.*:]]3384// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <4 x i32> [[V1]], [[V2]]3385// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3386// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3387//3388uint32x4_t test_vcgtq_u32(uint32x4_t v1, uint32x4_t v2) {3389  return vcgtq_u32(v1, v2);3390}3391 3392// CHECK-LABEL: define dso_local <2 x i64> @test_vcgtq_s64(3393// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {3394// CHECK-NEXT:  [[ENTRY:.*:]]3395// CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <2 x i64> [[V1]], [[V2]]3396// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3397// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3398//3399uint64x2_t test_vcgtq_s64(int64x2_t v1, int64x2_t v2) {3400  return vcgtq_s64(v1, v2);3401}3402 3403// CHECK-LABEL: define dso_local <2 x i64> @test_vcgtq_u64(3404// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {3405// CHECK-NEXT:  [[ENTRY:.*:]]3406// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <2 x i64> [[V1]], [[V2]]3407// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3408// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3409//3410uint64x2_t test_vcgtq_u64(uint64x2_t v1, uint64x2_t v2) {3411  return vcgtq_u64(v1, v2);3412}3413 3414// CHECK-LABEL: define dso_local <2 x i64> @test_vcgtq_f64(3415// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {3416// CHECK-NEXT:  [[ENTRY:.*:]]3417// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ogt <2 x double> [[V1]], [[V2]]3418// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3419// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3420//3421uint64x2_t test_vcgtq_f64(float64x2_t v1, float64x2_t v2) {3422  return vcgtq_f64(v1, v2);3423}3424 3425// Notes about vclt:3426// LT condition predicate implemented as GT, so check reversed operands.3427// Using registers other than v0, v1 are possible, but would be odd.3428// CHECK-LABEL: define dso_local <8 x i8> @test_vclt_s8(3429// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3430// CHECK-NEXT:  [[ENTRY:.*:]]3431// CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <8 x i8> [[V1]], [[V2]]3432// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>3433// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]3434//3435uint8x8_t test_vclt_s8(int8x8_t v1, int8x8_t v2) {3436  return vclt_s8(v1, v2);3437}3438 3439// CHECK-LABEL: define dso_local <4 x i16> @test_vclt_s16(3440// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3441// CHECK-NEXT:  [[ENTRY:.*:]]3442// CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <4 x i16> [[V1]], [[V2]]3443// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>3444// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]3445//3446uint16x4_t test_vclt_s16(int16x4_t v1, int16x4_t v2) {3447  return vclt_s16(v1, v2);3448}3449 3450// CHECK-LABEL: define dso_local <2 x i32> @test_vclt_s32(3451// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3452// CHECK-NEXT:  [[ENTRY:.*:]]3453// CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <2 x i32> [[V1]], [[V2]]3454// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3455// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3456//3457uint32x2_t test_vclt_s32(int32x2_t v1, int32x2_t v2) {3458  return vclt_s32(v1, v2);3459}3460 3461// CHECK-LABEL: define dso_local <1 x i64> @test_vclt_s64(3462// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {3463// CHECK-NEXT:  [[ENTRY:.*:]]3464// CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <1 x i64> [[A]], [[B]]3465// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3466// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3467//3468uint64x1_t test_vclt_s64(int64x1_t a, int64x1_t b) {3469  return vclt_s64(a, b);3470}3471 3472// CHECK-LABEL: define dso_local <1 x i64> @test_vclt_u64(3473// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {3474// CHECK-NEXT:  [[ENTRY:.*:]]3475// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <1 x i64> [[A]], [[B]]3476// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3477// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3478//3479uint64x1_t test_vclt_u64(uint64x1_t a, uint64x1_t b) {3480  return vclt_u64(a, b);3481}3482 3483// CHECK-LABEL: define dso_local <2 x i32> @test_vclt_f32(3484// CHECK-SAME: <2 x float> noundef [[V1:%.*]], <2 x float> noundef [[V2:%.*]]) #[[ATTR0]] {3485// CHECK-NEXT:  [[ENTRY:.*:]]3486// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp olt <2 x float> [[V1]], [[V2]]3487// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3488// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3489//3490uint32x2_t test_vclt_f32(float32x2_t v1, float32x2_t v2) {3491  return vclt_f32(v1, v2);3492}3493 3494// CHECK-LABEL: define dso_local <1 x i64> @test_vclt_f64(3495// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {3496// CHECK-NEXT:  [[ENTRY:.*:]]3497// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp olt <1 x double> [[A]], [[B]]3498// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>3499// CHECK-NEXT:    ret <1 x i64> [[SEXT_I]]3500//3501uint64x1_t test_vclt_f64(float64x1_t a, float64x1_t b) {3502  return vclt_f64(a, b);3503}3504 3505// CHECK-LABEL: define dso_local <8 x i8> @test_vclt_u8(3506// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3507// CHECK-NEXT:  [[ENTRY:.*:]]3508// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <8 x i8> [[V1]], [[V2]]3509// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i8>3510// CHECK-NEXT:    ret <8 x i8> [[SEXT_I]]3511//3512uint8x8_t test_vclt_u8(uint8x8_t v1, uint8x8_t v2) {3513  return vclt_u8(v1, v2);3514}3515 3516// CHECK-LABEL: define dso_local <4 x i16> @test_vclt_u16(3517// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3518// CHECK-NEXT:  [[ENTRY:.*:]]3519// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <4 x i16> [[V1]], [[V2]]3520// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>3521// CHECK-NEXT:    ret <4 x i16> [[SEXT_I]]3522//3523uint16x4_t test_vclt_u16(uint16x4_t v1, uint16x4_t v2) {3524  return vclt_u16(v1, v2);3525}3526 3527// CHECK-LABEL: define dso_local <2 x i32> @test_vclt_u32(3528// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3529// CHECK-NEXT:  [[ENTRY:.*:]]3530// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <2 x i32> [[V1]], [[V2]]3531// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>3532// CHECK-NEXT:    ret <2 x i32> [[SEXT_I]]3533//3534uint32x2_t test_vclt_u32(uint32x2_t v1, uint32x2_t v2) {3535  return vclt_u32(v1, v2);3536}3537 3538// CHECK-LABEL: define dso_local <16 x i8> @test_vcltq_s8(3539// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3540// CHECK-NEXT:  [[ENTRY:.*:]]3541// CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <16 x i8> [[V1]], [[V2]]3542// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>3543// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]3544//3545uint8x16_t test_vcltq_s8(int8x16_t v1, int8x16_t v2) {3546  return vcltq_s8(v1, v2);3547}3548 3549// CHECK-LABEL: define dso_local <8 x i16> @test_vcltq_s16(3550// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3551// CHECK-NEXT:  [[ENTRY:.*:]]3552// CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <8 x i16> [[V1]], [[V2]]3553// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>3554// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]3555//3556uint16x8_t test_vcltq_s16(int16x8_t v1, int16x8_t v2) {3557  return vcltq_s16(v1, v2);3558}3559 3560// CHECK-LABEL: define dso_local <4 x i32> @test_vcltq_s32(3561// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3562// CHECK-NEXT:  [[ENTRY:.*:]]3563// CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <4 x i32> [[V1]], [[V2]]3564// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3565// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3566//3567uint32x4_t test_vcltq_s32(int32x4_t v1, int32x4_t v2) {3568  return vcltq_s32(v1, v2);3569}3570 3571// CHECK-LABEL: define dso_local <4 x i32> @test_vcltq_f32(3572// CHECK-SAME: <4 x float> noundef [[V1:%.*]], <4 x float> noundef [[V2:%.*]]) #[[ATTR0]] {3573// CHECK-NEXT:  [[ENTRY:.*:]]3574// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp olt <4 x float> [[V1]], [[V2]]3575// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3576// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3577//3578uint32x4_t test_vcltq_f32(float32x4_t v1, float32x4_t v2) {3579  return vcltq_f32(v1, v2);3580}3581 3582// CHECK-LABEL: define dso_local <16 x i8> @test_vcltq_u8(3583// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3584// CHECK-NEXT:  [[ENTRY:.*:]]3585// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <16 x i8> [[V1]], [[V2]]3586// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>3587// CHECK-NEXT:    ret <16 x i8> [[SEXT_I]]3588//3589uint8x16_t test_vcltq_u8(uint8x16_t v1, uint8x16_t v2) {3590  return vcltq_u8(v1, v2);3591}3592 3593// CHECK-LABEL: define dso_local <8 x i16> @test_vcltq_u16(3594// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3595// CHECK-NEXT:  [[ENTRY:.*:]]3596// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <8 x i16> [[V1]], [[V2]]3597// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>3598// CHECK-NEXT:    ret <8 x i16> [[SEXT_I]]3599//3600uint16x8_t test_vcltq_u16(uint16x8_t v1, uint16x8_t v2) {3601  return vcltq_u16(v1, v2);3602}3603 3604// CHECK-LABEL: define dso_local <4 x i32> @test_vcltq_u32(3605// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3606// CHECK-NEXT:  [[ENTRY:.*:]]3607// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <4 x i32> [[V1]], [[V2]]3608// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>3609// CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]3610//3611uint32x4_t test_vcltq_u32(uint32x4_t v1, uint32x4_t v2) {3612  return vcltq_u32(v1, v2);3613}3614 3615// CHECK-LABEL: define dso_local <2 x i64> @test_vcltq_s64(3616// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {3617// CHECK-NEXT:  [[ENTRY:.*:]]3618// CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <2 x i64> [[V1]], [[V2]]3619// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3620// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3621//3622uint64x2_t test_vcltq_s64(int64x2_t v1, int64x2_t v2) {3623  return vcltq_s64(v1, v2);3624}3625 3626// CHECK-LABEL: define dso_local <2 x i64> @test_vcltq_u64(3627// CHECK-SAME: <2 x i64> noundef [[V1:%.*]], <2 x i64> noundef [[V2:%.*]]) #[[ATTR0]] {3628// CHECK-NEXT:  [[ENTRY:.*:]]3629// CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <2 x i64> [[V1]], [[V2]]3630// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3631// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3632//3633uint64x2_t test_vcltq_u64(uint64x2_t v1, uint64x2_t v2) {3634  return vcltq_u64(v1, v2);3635}3636 3637// CHECK-LABEL: define dso_local <2 x i64> @test_vcltq_f64(3638// CHECK-SAME: <2 x double> noundef [[V1:%.*]], <2 x double> noundef [[V2:%.*]]) #[[ATTR0]] {3639// CHECK-NEXT:  [[ENTRY:.*:]]3640// CHECK-NEXT:    [[CMP_I:%.*]] = fcmp olt <2 x double> [[V1]], [[V2]]3641// CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>3642// CHECK-NEXT:    ret <2 x i64> [[SEXT_I]]3643//3644uint64x2_t test_vcltq_f64(float64x2_t v1, float64x2_t v2) {3645  return vcltq_f64(v1, v2);3646}3647 3648// CHECK-LABEL: define dso_local <8 x i8> @test_vhadd_s8(3649// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3650// CHECK-NEXT:  [[ENTRY:.*:]]3651// CHECK-NEXT:    [[VHADD_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.shadd.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])3652// CHECK-NEXT:    ret <8 x i8> [[VHADD_V_I]]3653//3654int8x8_t test_vhadd_s8(int8x8_t v1, int8x8_t v2) {3655  return vhadd_s8(v1, v2);3656}3657 3658// CHECK-LABEL: define dso_local <4 x i16> @test_vhadd_s16(3659// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3660// CHECK-NEXT:  [[ENTRY:.*:]]3661// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>3662// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>3663// CHECK-NEXT:    [[VHADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>3664// CHECK-NEXT:    [[VHADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>3665// CHECK-NEXT:    [[VHADD_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.shadd.v4i16(<4 x i16> [[VHADD_V_I]], <4 x i16> [[VHADD_V1_I]])3666// CHECK-NEXT:    [[VHADD_V3_I:%.*]] = bitcast <4 x i16> [[VHADD_V2_I]] to <8 x i8>3667// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VHADD_V3_I]] to <4 x i16>3668// CHECK-NEXT:    ret <4 x i16> [[TMP2]]3669//3670int16x4_t test_vhadd_s16(int16x4_t v1, int16x4_t v2) {3671  return vhadd_s16(v1, v2);3672}3673 3674// CHECK-LABEL: define dso_local <2 x i32> @test_vhadd_s32(3675// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3676// CHECK-NEXT:  [[ENTRY:.*:]]3677// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>3678// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>3679// CHECK-NEXT:    [[VHADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>3680// CHECK-NEXT:    [[VHADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>3681// CHECK-NEXT:    [[VHADD_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.shadd.v2i32(<2 x i32> [[VHADD_V_I]], <2 x i32> [[VHADD_V1_I]])3682// CHECK-NEXT:    [[VHADD_V3_I:%.*]] = bitcast <2 x i32> [[VHADD_V2_I]] to <8 x i8>3683// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VHADD_V3_I]] to <2 x i32>3684// CHECK-NEXT:    ret <2 x i32> [[TMP2]]3685//3686int32x2_t test_vhadd_s32(int32x2_t v1, int32x2_t v2) {3687  return vhadd_s32(v1, v2);3688}3689 3690// CHECK-LABEL: define dso_local <8 x i8> @test_vhadd_u8(3691// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3692// CHECK-NEXT:  [[ENTRY:.*:]]3693// CHECK-NEXT:    [[VHADD_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uhadd.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])3694// CHECK-NEXT:    ret <8 x i8> [[VHADD_V_I]]3695//3696uint8x8_t test_vhadd_u8(uint8x8_t v1, uint8x8_t v2) {3697  return vhadd_u8(v1, v2);3698}3699 3700// CHECK-LABEL: define dso_local <4 x i16> @test_vhadd_u16(3701// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3702// CHECK-NEXT:  [[ENTRY:.*:]]3703// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>3704// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>3705// CHECK-NEXT:    [[VHADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>3706// CHECK-NEXT:    [[VHADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>3707// CHECK-NEXT:    [[VHADD_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uhadd.v4i16(<4 x i16> [[VHADD_V_I]], <4 x i16> [[VHADD_V1_I]])3708// CHECK-NEXT:    [[VHADD_V3_I:%.*]] = bitcast <4 x i16> [[VHADD_V2_I]] to <8 x i8>3709// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VHADD_V3_I]] to <4 x i16>3710// CHECK-NEXT:    ret <4 x i16> [[TMP2]]3711//3712uint16x4_t test_vhadd_u16(uint16x4_t v1, uint16x4_t v2) {3713  return vhadd_u16(v1, v2);3714}3715 3716// CHECK-LABEL: define dso_local <2 x i32> @test_vhadd_u32(3717// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3718// CHECK-NEXT:  [[ENTRY:.*:]]3719// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>3720// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>3721// CHECK-NEXT:    [[VHADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>3722// CHECK-NEXT:    [[VHADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>3723// CHECK-NEXT:    [[VHADD_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uhadd.v2i32(<2 x i32> [[VHADD_V_I]], <2 x i32> [[VHADD_V1_I]])3724// CHECK-NEXT:    [[VHADD_V3_I:%.*]] = bitcast <2 x i32> [[VHADD_V2_I]] to <8 x i8>3725// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VHADD_V3_I]] to <2 x i32>3726// CHECK-NEXT:    ret <2 x i32> [[TMP2]]3727//3728uint32x2_t test_vhadd_u32(uint32x2_t v1, uint32x2_t v2) {3729  return vhadd_u32(v1, v2);3730}3731 3732// CHECK-LABEL: define dso_local <16 x i8> @test_vhaddq_s8(3733// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3734// CHECK-NEXT:  [[ENTRY:.*:]]3735// CHECK-NEXT:    [[VHADDQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.shadd.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])3736// CHECK-NEXT:    ret <16 x i8> [[VHADDQ_V_I]]3737//3738int8x16_t test_vhaddq_s8(int8x16_t v1, int8x16_t v2) {3739  return vhaddq_s8(v1, v2);3740}3741 3742// CHECK-LABEL: define dso_local <8 x i16> @test_vhaddq_s16(3743// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3744// CHECK-NEXT:  [[ENTRY:.*:]]3745// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>3746// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>3747// CHECK-NEXT:    [[VHADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>3748// CHECK-NEXT:    [[VHADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>3749// CHECK-NEXT:    [[VHADDQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.shadd.v8i16(<8 x i16> [[VHADDQ_V_I]], <8 x i16> [[VHADDQ_V1_I]])3750// CHECK-NEXT:    [[VHADDQ_V3_I:%.*]] = bitcast <8 x i16> [[VHADDQ_V2_I]] to <16 x i8>3751// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VHADDQ_V3_I]] to <8 x i16>3752// CHECK-NEXT:    ret <8 x i16> [[TMP2]]3753//3754int16x8_t test_vhaddq_s16(int16x8_t v1, int16x8_t v2) {3755  return vhaddq_s16(v1, v2);3756}3757 3758// CHECK-LABEL: define dso_local <4 x i32> @test_vhaddq_s32(3759// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3760// CHECK-NEXT:  [[ENTRY:.*:]]3761// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>3762// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>3763// CHECK-NEXT:    [[VHADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>3764// CHECK-NEXT:    [[VHADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>3765// CHECK-NEXT:    [[VHADDQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.shadd.v4i32(<4 x i32> [[VHADDQ_V_I]], <4 x i32> [[VHADDQ_V1_I]])3766// CHECK-NEXT:    [[VHADDQ_V3_I:%.*]] = bitcast <4 x i32> [[VHADDQ_V2_I]] to <16 x i8>3767// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VHADDQ_V3_I]] to <4 x i32>3768// CHECK-NEXT:    ret <4 x i32> [[TMP2]]3769//3770int32x4_t test_vhaddq_s32(int32x4_t v1, int32x4_t v2) {3771  return vhaddq_s32(v1, v2);3772}3773 3774// CHECK-LABEL: define dso_local <16 x i8> @test_vhaddq_u8(3775// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3776// CHECK-NEXT:  [[ENTRY:.*:]]3777// CHECK-NEXT:    [[VHADDQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uhadd.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])3778// CHECK-NEXT:    ret <16 x i8> [[VHADDQ_V_I]]3779//3780uint8x16_t test_vhaddq_u8(uint8x16_t v1, uint8x16_t v2) {3781  return vhaddq_u8(v1, v2);3782}3783 3784// CHECK-LABEL: define dso_local <8 x i16> @test_vhaddq_u16(3785// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3786// CHECK-NEXT:  [[ENTRY:.*:]]3787// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>3788// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>3789// CHECK-NEXT:    [[VHADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>3790// CHECK-NEXT:    [[VHADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>3791// CHECK-NEXT:    [[VHADDQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uhadd.v8i16(<8 x i16> [[VHADDQ_V_I]], <8 x i16> [[VHADDQ_V1_I]])3792// CHECK-NEXT:    [[VHADDQ_V3_I:%.*]] = bitcast <8 x i16> [[VHADDQ_V2_I]] to <16 x i8>3793// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VHADDQ_V3_I]] to <8 x i16>3794// CHECK-NEXT:    ret <8 x i16> [[TMP2]]3795//3796uint16x8_t test_vhaddq_u16(uint16x8_t v1, uint16x8_t v2) {3797  return vhaddq_u16(v1, v2);3798}3799 3800// CHECK-LABEL: define dso_local <4 x i32> @test_vhaddq_u32(3801// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3802// CHECK-NEXT:  [[ENTRY:.*:]]3803// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>3804// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>3805// CHECK-NEXT:    [[VHADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>3806// CHECK-NEXT:    [[VHADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>3807// CHECK-NEXT:    [[VHADDQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uhadd.v4i32(<4 x i32> [[VHADDQ_V_I]], <4 x i32> [[VHADDQ_V1_I]])3808// CHECK-NEXT:    [[VHADDQ_V3_I:%.*]] = bitcast <4 x i32> [[VHADDQ_V2_I]] to <16 x i8>3809// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VHADDQ_V3_I]] to <4 x i32>3810// CHECK-NEXT:    ret <4 x i32> [[TMP2]]3811//3812uint32x4_t test_vhaddq_u32(uint32x4_t v1, uint32x4_t v2) {3813  return vhaddq_u32(v1, v2);3814}3815 3816// CHECK-LABEL: define dso_local <8 x i8> @test_vhsub_s8(3817// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3818// CHECK-NEXT:  [[ENTRY:.*:]]3819// CHECK-NEXT:    [[VHSUB_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.shsub.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])3820// CHECK-NEXT:    ret <8 x i8> [[VHSUB_V_I]]3821//3822int8x8_t test_vhsub_s8(int8x8_t v1, int8x8_t v2) {3823  return vhsub_s8(v1, v2);3824}3825 3826// CHECK-LABEL: define dso_local <4 x i16> @test_vhsub_s16(3827// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3828// CHECK-NEXT:  [[ENTRY:.*:]]3829// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>3830// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>3831// CHECK-NEXT:    [[VHSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>3832// CHECK-NEXT:    [[VHSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>3833// CHECK-NEXT:    [[VHSUB_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.shsub.v4i16(<4 x i16> [[VHSUB_V_I]], <4 x i16> [[VHSUB_V1_I]])3834// CHECK-NEXT:    [[VHSUB_V3_I:%.*]] = bitcast <4 x i16> [[VHSUB_V2_I]] to <8 x i8>3835// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VHSUB_V3_I]] to <4 x i16>3836// CHECK-NEXT:    ret <4 x i16> [[TMP2]]3837//3838int16x4_t test_vhsub_s16(int16x4_t v1, int16x4_t v2) {3839  return vhsub_s16(v1, v2);3840}3841 3842// CHECK-LABEL: define dso_local <2 x i32> @test_vhsub_s32(3843// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3844// CHECK-NEXT:  [[ENTRY:.*:]]3845// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>3846// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>3847// CHECK-NEXT:    [[VHSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>3848// CHECK-NEXT:    [[VHSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>3849// CHECK-NEXT:    [[VHSUB_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.shsub.v2i32(<2 x i32> [[VHSUB_V_I]], <2 x i32> [[VHSUB_V1_I]])3850// CHECK-NEXT:    [[VHSUB_V3_I:%.*]] = bitcast <2 x i32> [[VHSUB_V2_I]] to <8 x i8>3851// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VHSUB_V3_I]] to <2 x i32>3852// CHECK-NEXT:    ret <2 x i32> [[TMP2]]3853//3854int32x2_t test_vhsub_s32(int32x2_t v1, int32x2_t v2) {3855  return vhsub_s32(v1, v2);3856}3857 3858// CHECK-LABEL: define dso_local <8 x i8> @test_vhsub_u8(3859// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3860// CHECK-NEXT:  [[ENTRY:.*:]]3861// CHECK-NEXT:    [[VHSUB_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uhsub.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])3862// CHECK-NEXT:    ret <8 x i8> [[VHSUB_V_I]]3863//3864uint8x8_t test_vhsub_u8(uint8x8_t v1, uint8x8_t v2) {3865  return vhsub_u8(v1, v2);3866}3867 3868// CHECK-LABEL: define dso_local <4 x i16> @test_vhsub_u16(3869// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3870// CHECK-NEXT:  [[ENTRY:.*:]]3871// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>3872// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>3873// CHECK-NEXT:    [[VHSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>3874// CHECK-NEXT:    [[VHSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>3875// CHECK-NEXT:    [[VHSUB_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uhsub.v4i16(<4 x i16> [[VHSUB_V_I]], <4 x i16> [[VHSUB_V1_I]])3876// CHECK-NEXT:    [[VHSUB_V3_I:%.*]] = bitcast <4 x i16> [[VHSUB_V2_I]] to <8 x i8>3877// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VHSUB_V3_I]] to <4 x i16>3878// CHECK-NEXT:    ret <4 x i16> [[TMP2]]3879//3880uint16x4_t test_vhsub_u16(uint16x4_t v1, uint16x4_t v2) {3881  return vhsub_u16(v1, v2);3882}3883 3884// CHECK-LABEL: define dso_local <2 x i32> @test_vhsub_u32(3885// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3886// CHECK-NEXT:  [[ENTRY:.*:]]3887// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>3888// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>3889// CHECK-NEXT:    [[VHSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>3890// CHECK-NEXT:    [[VHSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>3891// CHECK-NEXT:    [[VHSUB_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uhsub.v2i32(<2 x i32> [[VHSUB_V_I]], <2 x i32> [[VHSUB_V1_I]])3892// CHECK-NEXT:    [[VHSUB_V3_I:%.*]] = bitcast <2 x i32> [[VHSUB_V2_I]] to <8 x i8>3893// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VHSUB_V3_I]] to <2 x i32>3894// CHECK-NEXT:    ret <2 x i32> [[TMP2]]3895//3896uint32x2_t test_vhsub_u32(uint32x2_t v1, uint32x2_t v2) {3897  return vhsub_u32(v1, v2);3898}3899 3900// CHECK-LABEL: define dso_local <16 x i8> @test_vhsubq_s8(3901// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3902// CHECK-NEXT:  [[ENTRY:.*:]]3903// CHECK-NEXT:    [[VHSUBQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.shsub.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])3904// CHECK-NEXT:    ret <16 x i8> [[VHSUBQ_V_I]]3905//3906int8x16_t test_vhsubq_s8(int8x16_t v1, int8x16_t v2) {3907  return vhsubq_s8(v1, v2);3908}3909 3910// CHECK-LABEL: define dso_local <8 x i16> @test_vhsubq_s16(3911// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3912// CHECK-NEXT:  [[ENTRY:.*:]]3913// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>3914// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>3915// CHECK-NEXT:    [[VHSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>3916// CHECK-NEXT:    [[VHSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>3917// CHECK-NEXT:    [[VHSUBQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.shsub.v8i16(<8 x i16> [[VHSUBQ_V_I]], <8 x i16> [[VHSUBQ_V1_I]])3918// CHECK-NEXT:    [[VHSUBQ_V3_I:%.*]] = bitcast <8 x i16> [[VHSUBQ_V2_I]] to <16 x i8>3919// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VHSUBQ_V3_I]] to <8 x i16>3920// CHECK-NEXT:    ret <8 x i16> [[TMP2]]3921//3922int16x8_t test_vhsubq_s16(int16x8_t v1, int16x8_t v2) {3923  return vhsubq_s16(v1, v2);3924}3925 3926// CHECK-LABEL: define dso_local <4 x i32> @test_vhsubq_s32(3927// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3928// CHECK-NEXT:  [[ENTRY:.*:]]3929// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>3930// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>3931// CHECK-NEXT:    [[VHSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>3932// CHECK-NEXT:    [[VHSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>3933// CHECK-NEXT:    [[VHSUBQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.shsub.v4i32(<4 x i32> [[VHSUBQ_V_I]], <4 x i32> [[VHSUBQ_V1_I]])3934// CHECK-NEXT:    [[VHSUBQ_V3_I:%.*]] = bitcast <4 x i32> [[VHSUBQ_V2_I]] to <16 x i8>3935// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VHSUBQ_V3_I]] to <4 x i32>3936// CHECK-NEXT:    ret <4 x i32> [[TMP2]]3937//3938int32x4_t test_vhsubq_s32(int32x4_t v1, int32x4_t v2) {3939  return vhsubq_s32(v1, v2);3940}3941 3942// CHECK-LABEL: define dso_local <16 x i8> @test_vhsubq_u8(3943// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3944// CHECK-NEXT:  [[ENTRY:.*:]]3945// CHECK-NEXT:    [[VHSUBQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uhsub.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])3946// CHECK-NEXT:    ret <16 x i8> [[VHSUBQ_V_I]]3947//3948uint8x16_t test_vhsubq_u8(uint8x16_t v1, uint8x16_t v2) {3949  return vhsubq_u8(v1, v2);3950}3951 3952// CHECK-LABEL: define dso_local <8 x i16> @test_vhsubq_u16(3953// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3954// CHECK-NEXT:  [[ENTRY:.*:]]3955// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>3956// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>3957// CHECK-NEXT:    [[VHSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>3958// CHECK-NEXT:    [[VHSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>3959// CHECK-NEXT:    [[VHSUBQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uhsub.v8i16(<8 x i16> [[VHSUBQ_V_I]], <8 x i16> [[VHSUBQ_V1_I]])3960// CHECK-NEXT:    [[VHSUBQ_V3_I:%.*]] = bitcast <8 x i16> [[VHSUBQ_V2_I]] to <16 x i8>3961// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VHSUBQ_V3_I]] to <8 x i16>3962// CHECK-NEXT:    ret <8 x i16> [[TMP2]]3963//3964uint16x8_t test_vhsubq_u16(uint16x8_t v1, uint16x8_t v2) {3965  return vhsubq_u16(v1, v2);3966}3967 3968// CHECK-LABEL: define dso_local <4 x i32> @test_vhsubq_u32(3969// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {3970// CHECK-NEXT:  [[ENTRY:.*:]]3971// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>3972// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>3973// CHECK-NEXT:    [[VHSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>3974// CHECK-NEXT:    [[VHSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>3975// CHECK-NEXT:    [[VHSUBQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uhsub.v4i32(<4 x i32> [[VHSUBQ_V_I]], <4 x i32> [[VHSUBQ_V1_I]])3976// CHECK-NEXT:    [[VHSUBQ_V3_I:%.*]] = bitcast <4 x i32> [[VHSUBQ_V2_I]] to <16 x i8>3977// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VHSUBQ_V3_I]] to <4 x i32>3978// CHECK-NEXT:    ret <4 x i32> [[TMP2]]3979//3980uint32x4_t test_vhsubq_u32(uint32x4_t v1, uint32x4_t v2) {3981  return vhsubq_u32(v1, v2);3982}3983 3984// CHECK-LABEL: define dso_local <8 x i8> @test_vrhadd_s8(3985// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {3986// CHECK-NEXT:  [[ENTRY:.*:]]3987// CHECK-NEXT:    [[VRHADD_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.srhadd.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])3988// CHECK-NEXT:    ret <8 x i8> [[VRHADD_V_I]]3989//3990int8x8_t test_vrhadd_s8(int8x8_t v1, int8x8_t v2) {3991  return vrhadd_s8(v1, v2);3992}3993 3994// CHECK-LABEL: define dso_local <4 x i16> @test_vrhadd_s16(3995// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {3996// CHECK-NEXT:  [[ENTRY:.*:]]3997// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>3998// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>3999// CHECK-NEXT:    [[VRHADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4000// CHECK-NEXT:    [[VRHADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4001// CHECK-NEXT:    [[VRHADD_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.srhadd.v4i16(<4 x i16> [[VRHADD_V_I]], <4 x i16> [[VRHADD_V1_I]])4002// CHECK-NEXT:    [[VRHADD_V3_I:%.*]] = bitcast <4 x i16> [[VRHADD_V2_I]] to <8 x i8>4003// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRHADD_V3_I]] to <4 x i16>4004// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4005//4006int16x4_t test_vrhadd_s16(int16x4_t v1, int16x4_t v2) {4007  return vrhadd_s16(v1, v2);4008}4009 4010// CHECK-LABEL: define dso_local <2 x i32> @test_vrhadd_s32(4011// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {4012// CHECK-NEXT:  [[ENTRY:.*:]]4013// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>4014// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>4015// CHECK-NEXT:    [[VRHADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4016// CHECK-NEXT:    [[VRHADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4017// CHECK-NEXT:    [[VRHADD_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.srhadd.v2i32(<2 x i32> [[VRHADD_V_I]], <2 x i32> [[VRHADD_V1_I]])4018// CHECK-NEXT:    [[VRHADD_V3_I:%.*]] = bitcast <2 x i32> [[VRHADD_V2_I]] to <8 x i8>4019// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRHADD_V3_I]] to <2 x i32>4020// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4021//4022int32x2_t test_vrhadd_s32(int32x2_t v1, int32x2_t v2) {4023  return vrhadd_s32(v1, v2);4024}4025 4026// CHECK-LABEL: define dso_local <8 x i8> @test_vrhadd_u8(4027// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {4028// CHECK-NEXT:  [[ENTRY:.*:]]4029// CHECK-NEXT:    [[VRHADD_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.urhadd.v8i8(<8 x i8> [[V1]], <8 x i8> [[V2]])4030// CHECK-NEXT:    ret <8 x i8> [[VRHADD_V_I]]4031//4032uint8x8_t test_vrhadd_u8(uint8x8_t v1, uint8x8_t v2) {4033  return vrhadd_u8(v1, v2);4034}4035 4036// CHECK-LABEL: define dso_local <4 x i16> @test_vrhadd_u16(4037// CHECK-SAME: <4 x i16> noundef [[V1:%.*]], <4 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {4038// CHECK-NEXT:  [[ENTRY:.*:]]4039// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[V1]] to <8 x i8>4040// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[V2]] to <8 x i8>4041// CHECK-NEXT:    [[VRHADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4042// CHECK-NEXT:    [[VRHADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4043// CHECK-NEXT:    [[VRHADD_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.urhadd.v4i16(<4 x i16> [[VRHADD_V_I]], <4 x i16> [[VRHADD_V1_I]])4044// CHECK-NEXT:    [[VRHADD_V3_I:%.*]] = bitcast <4 x i16> [[VRHADD_V2_I]] to <8 x i8>4045// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRHADD_V3_I]] to <4 x i16>4046// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4047//4048uint16x4_t test_vrhadd_u16(uint16x4_t v1, uint16x4_t v2) {4049  return vrhadd_u16(v1, v2);4050}4051 4052// CHECK-LABEL: define dso_local <2 x i32> @test_vrhadd_u32(4053// CHECK-SAME: <2 x i32> noundef [[V1:%.*]], <2 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {4054// CHECK-NEXT:  [[ENTRY:.*:]]4055// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[V1]] to <8 x i8>4056// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to <8 x i8>4057// CHECK-NEXT:    [[VRHADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4058// CHECK-NEXT:    [[VRHADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4059// CHECK-NEXT:    [[VRHADD_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.urhadd.v2i32(<2 x i32> [[VRHADD_V_I]], <2 x i32> [[VRHADD_V1_I]])4060// CHECK-NEXT:    [[VRHADD_V3_I:%.*]] = bitcast <2 x i32> [[VRHADD_V2_I]] to <8 x i8>4061// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRHADD_V3_I]] to <2 x i32>4062// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4063//4064uint32x2_t test_vrhadd_u32(uint32x2_t v1, uint32x2_t v2) {4065  return vrhadd_u32(v1, v2);4066}4067 4068// CHECK-LABEL: define dso_local <16 x i8> @test_vrhaddq_s8(4069// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {4070// CHECK-NEXT:  [[ENTRY:.*:]]4071// CHECK-NEXT:    [[VRHADDQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.srhadd.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])4072// CHECK-NEXT:    ret <16 x i8> [[VRHADDQ_V_I]]4073//4074int8x16_t test_vrhaddq_s8(int8x16_t v1, int8x16_t v2) {4075  return vrhaddq_s8(v1, v2);4076}4077 4078// CHECK-LABEL: define dso_local <8 x i16> @test_vrhaddq_s16(4079// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {4080// CHECK-NEXT:  [[ENTRY:.*:]]4081// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>4082// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>4083// CHECK-NEXT:    [[VRHADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4084// CHECK-NEXT:    [[VRHADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4085// CHECK-NEXT:    [[VRHADDQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.srhadd.v8i16(<8 x i16> [[VRHADDQ_V_I]], <8 x i16> [[VRHADDQ_V1_I]])4086// CHECK-NEXT:    [[VRHADDQ_V3_I:%.*]] = bitcast <8 x i16> [[VRHADDQ_V2_I]] to <16 x i8>4087// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRHADDQ_V3_I]] to <8 x i16>4088// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4089//4090int16x8_t test_vrhaddq_s16(int16x8_t v1, int16x8_t v2) {4091  return vrhaddq_s16(v1, v2);4092}4093 4094// CHECK-LABEL: define dso_local <4 x i32> @test_vrhaddq_s32(4095// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {4096// CHECK-NEXT:  [[ENTRY:.*:]]4097// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>4098// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>4099// CHECK-NEXT:    [[VRHADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>4100// CHECK-NEXT:    [[VRHADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>4101// CHECK-NEXT:    [[VRHADDQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.srhadd.v4i32(<4 x i32> [[VRHADDQ_V_I]], <4 x i32> [[VRHADDQ_V1_I]])4102// CHECK-NEXT:    [[VRHADDQ_V3_I:%.*]] = bitcast <4 x i32> [[VRHADDQ_V2_I]] to <16 x i8>4103// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRHADDQ_V3_I]] to <4 x i32>4104// CHECK-NEXT:    ret <4 x i32> [[TMP2]]4105//4106int32x4_t test_vrhaddq_s32(int32x4_t v1, int32x4_t v2) {4107  return vrhaddq_s32(v1, v2);4108}4109 4110// CHECK-LABEL: define dso_local <16 x i8> @test_vrhaddq_u8(4111// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> noundef [[V2:%.*]]) #[[ATTR0]] {4112// CHECK-NEXT:  [[ENTRY:.*:]]4113// CHECK-NEXT:    [[VRHADDQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.urhadd.v16i8(<16 x i8> [[V1]], <16 x i8> [[V2]])4114// CHECK-NEXT:    ret <16 x i8> [[VRHADDQ_V_I]]4115//4116uint8x16_t test_vrhaddq_u8(uint8x16_t v1, uint8x16_t v2) {4117  return vrhaddq_u8(v1, v2);4118}4119 4120// CHECK-LABEL: define dso_local <8 x i16> @test_vrhaddq_u16(4121// CHECK-SAME: <8 x i16> noundef [[V1:%.*]], <8 x i16> noundef [[V2:%.*]]) #[[ATTR0]] {4122// CHECK-NEXT:  [[ENTRY:.*:]]4123// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[V1]] to <16 x i8>4124// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[V2]] to <16 x i8>4125// CHECK-NEXT:    [[VRHADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4126// CHECK-NEXT:    [[VRHADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4127// CHECK-NEXT:    [[VRHADDQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.urhadd.v8i16(<8 x i16> [[VRHADDQ_V_I]], <8 x i16> [[VRHADDQ_V1_I]])4128// CHECK-NEXT:    [[VRHADDQ_V3_I:%.*]] = bitcast <8 x i16> [[VRHADDQ_V2_I]] to <16 x i8>4129// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRHADDQ_V3_I]] to <8 x i16>4130// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4131//4132uint16x8_t test_vrhaddq_u16(uint16x8_t v1, uint16x8_t v2) {4133  return vrhaddq_u16(v1, v2);4134}4135 4136// CHECK-LABEL: define dso_local <4 x i32> @test_vrhaddq_u32(4137// CHECK-SAME: <4 x i32> noundef [[V1:%.*]], <4 x i32> noundef [[V2:%.*]]) #[[ATTR0]] {4138// CHECK-NEXT:  [[ENTRY:.*:]]4139// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[V1]] to <16 x i8>4140// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[V2]] to <16 x i8>4141// CHECK-NEXT:    [[VRHADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>4142// CHECK-NEXT:    [[VRHADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>4143// CHECK-NEXT:    [[VRHADDQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.urhadd.v4i32(<4 x i32> [[VRHADDQ_V_I]], <4 x i32> [[VRHADDQ_V1_I]])4144// CHECK-NEXT:    [[VRHADDQ_V3_I:%.*]] = bitcast <4 x i32> [[VRHADDQ_V2_I]] to <16 x i8>4145// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRHADDQ_V3_I]] to <4 x i32>4146// CHECK-NEXT:    ret <4 x i32> [[TMP2]]4147//4148uint32x4_t test_vrhaddq_u32(uint32x4_t v1, uint32x4_t v2) {4149  return vrhaddq_u32(v1, v2);4150}4151 4152// CHECK-LABEL: define dso_local <8 x i8> @test_vqadd_s8(4153// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4154// CHECK-NEXT:  [[ENTRY:.*:]]4155// CHECK-NEXT:    [[VQADD_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqadd.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])4156// CHECK-NEXT:    ret <8 x i8> [[VQADD_V_I]]4157//4158int8x8_t test_vqadd_s8(int8x8_t a, int8x8_t b) {4159  return vqadd_s8(a, b);4160}4161 4162// CHECK-LABEL: define dso_local <4 x i16> @test_vqadd_s16(4163// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4164// CHECK-NEXT:  [[ENTRY:.*:]]4165// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>4166// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>4167// CHECK-NEXT:    [[VQADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4168// CHECK-NEXT:    [[VQADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4169// CHECK-NEXT:    [[VQADD_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[VQADD_V_I]], <4 x i16> [[VQADD_V1_I]])4170// CHECK-NEXT:    [[VQADD_V3_I:%.*]] = bitcast <4 x i16> [[VQADD_V2_I]] to <8 x i8>4171// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQADD_V3_I]] to <4 x i16>4172// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4173//4174int16x4_t test_vqadd_s16(int16x4_t a, int16x4_t b) {4175  return vqadd_s16(a, b);4176}4177 4178// CHECK-LABEL: define dso_local <2 x i32> @test_vqadd_s32(4179// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4180// CHECK-NEXT:  [[ENTRY:.*:]]4181// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>4182// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>4183// CHECK-NEXT:    [[VQADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4184// CHECK-NEXT:    [[VQADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4185// CHECK-NEXT:    [[VQADD_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqadd.v2i32(<2 x i32> [[VQADD_V_I]], <2 x i32> [[VQADD_V1_I]])4186// CHECK-NEXT:    [[VQADD_V3_I:%.*]] = bitcast <2 x i32> [[VQADD_V2_I]] to <8 x i8>4187// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQADD_V3_I]] to <2 x i32>4188// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4189//4190int32x2_t test_vqadd_s32(int32x2_t a, int32x2_t b) {4191  return vqadd_s32(a, b);4192}4193 4194// CHECK-LABEL: define dso_local <1 x i64> @test_vqadd_s64(4195// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4196// CHECK-NEXT:  [[ENTRY:.*:]]4197// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>4198// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>4199// CHECK-NEXT:    [[VQADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>4200// CHECK-NEXT:    [[VQADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>4201// CHECK-NEXT:    [[VQADD_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.sqadd.v1i64(<1 x i64> [[VQADD_V_I]], <1 x i64> [[VQADD_V1_I]])4202// CHECK-NEXT:    [[VQADD_V3_I:%.*]] = bitcast <1 x i64> [[VQADD_V2_I]] to <8 x i8>4203// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQADD_V3_I]] to i644204// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 04205// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]4206//4207int64x1_t test_vqadd_s64(int64x1_t a, int64x1_t b) {4208  return vqadd_s64(a, b);4209}4210 4211// CHECK-LABEL: define dso_local <8 x i8> @test_vqadd_u8(4212// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4213// CHECK-NEXT:  [[ENTRY:.*:]]4214// CHECK-NEXT:    [[VQADD_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqadd.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])4215// CHECK-NEXT:    ret <8 x i8> [[VQADD_V_I]]4216//4217uint8x8_t test_vqadd_u8(uint8x8_t a, uint8x8_t b) {4218  return vqadd_u8(a, b);4219}4220 4221// CHECK-LABEL: define dso_local <4 x i16> @test_vqadd_u16(4222// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4223// CHECK-NEXT:  [[ENTRY:.*:]]4224// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>4225// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>4226// CHECK-NEXT:    [[VQADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4227// CHECK-NEXT:    [[VQADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4228// CHECK-NEXT:    [[VQADD_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqadd.v4i16(<4 x i16> [[VQADD_V_I]], <4 x i16> [[VQADD_V1_I]])4229// CHECK-NEXT:    [[VQADD_V3_I:%.*]] = bitcast <4 x i16> [[VQADD_V2_I]] to <8 x i8>4230// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQADD_V3_I]] to <4 x i16>4231// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4232//4233uint16x4_t test_vqadd_u16(uint16x4_t a, uint16x4_t b) {4234  return vqadd_u16(a, b);4235}4236 4237// CHECK-LABEL: define dso_local <2 x i32> @test_vqadd_u32(4238// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4239// CHECK-NEXT:  [[ENTRY:.*:]]4240// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>4241// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>4242// CHECK-NEXT:    [[VQADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4243// CHECK-NEXT:    [[VQADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4244// CHECK-NEXT:    [[VQADD_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqadd.v2i32(<2 x i32> [[VQADD_V_I]], <2 x i32> [[VQADD_V1_I]])4245// CHECK-NEXT:    [[VQADD_V3_I:%.*]] = bitcast <2 x i32> [[VQADD_V2_I]] to <8 x i8>4246// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQADD_V3_I]] to <2 x i32>4247// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4248//4249uint32x2_t test_vqadd_u32(uint32x2_t a, uint32x2_t b) {4250  return vqadd_u32(a, b);4251}4252 4253// CHECK-LABEL: define dso_local <1 x i64> @test_vqadd_u64(4254// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4255// CHECK-NEXT:  [[ENTRY:.*:]]4256// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>4257// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>4258// CHECK-NEXT:    [[VQADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>4259// CHECK-NEXT:    [[VQADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>4260// CHECK-NEXT:    [[VQADD_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.uqadd.v1i64(<1 x i64> [[VQADD_V_I]], <1 x i64> [[VQADD_V1_I]])4261// CHECK-NEXT:    [[VQADD_V3_I:%.*]] = bitcast <1 x i64> [[VQADD_V2_I]] to <8 x i8>4262// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQADD_V3_I]] to i644263// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 04264// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]4265//4266uint64x1_t test_vqadd_u64(uint64x1_t a, uint64x1_t b) {4267  return vqadd_u64(a, b);4268}4269 4270// CHECK-LABEL: define dso_local <16 x i8> @test_vqaddq_s8(4271// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4272// CHECK-NEXT:  [[ENTRY:.*:]]4273// CHECK-NEXT:    [[VQADDQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.sqadd.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])4274// CHECK-NEXT:    ret <16 x i8> [[VQADDQ_V_I]]4275//4276int8x16_t test_vqaddq_s8(int8x16_t a, int8x16_t b) {4277  return vqaddq_s8(a, b);4278}4279 4280// CHECK-LABEL: define dso_local <8 x i16> @test_vqaddq_s16(4281// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4282// CHECK-NEXT:  [[ENTRY:.*:]]4283// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>4284// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>4285// CHECK-NEXT:    [[VQADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4286// CHECK-NEXT:    [[VQADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4287// CHECK-NEXT:    [[VQADDQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sqadd.v8i16(<8 x i16> [[VQADDQ_V_I]], <8 x i16> [[VQADDQ_V1_I]])4288// CHECK-NEXT:    [[VQADDQ_V3_I:%.*]] = bitcast <8 x i16> [[VQADDQ_V2_I]] to <16 x i8>4289// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQADDQ_V3_I]] to <8 x i16>4290// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4291//4292int16x8_t test_vqaddq_s16(int16x8_t a, int16x8_t b) {4293  return vqaddq_s16(a, b);4294}4295 4296// CHECK-LABEL: define dso_local <4 x i32> @test_vqaddq_s32(4297// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4298// CHECK-NEXT:  [[ENTRY:.*:]]4299// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>4300// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>4301// CHECK-NEXT:    [[VQADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>4302// CHECK-NEXT:    [[VQADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>4303// CHECK-NEXT:    [[VQADDQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqadd.v4i32(<4 x i32> [[VQADDQ_V_I]], <4 x i32> [[VQADDQ_V1_I]])4304// CHECK-NEXT:    [[VQADDQ_V3_I:%.*]] = bitcast <4 x i32> [[VQADDQ_V2_I]] to <16 x i8>4305// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQADDQ_V3_I]] to <4 x i32>4306// CHECK-NEXT:    ret <4 x i32> [[TMP2]]4307//4308int32x4_t test_vqaddq_s32(int32x4_t a, int32x4_t b) {4309  return vqaddq_s32(a, b);4310}4311 4312// CHECK-LABEL: define dso_local <2 x i64> @test_vqaddq_s64(4313// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4314// CHECK-NEXT:  [[ENTRY:.*:]]4315// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>4316// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>4317// CHECK-NEXT:    [[VQADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>4318// CHECK-NEXT:    [[VQADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>4319// CHECK-NEXT:    [[VQADDQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqadd.v2i64(<2 x i64> [[VQADDQ_V_I]], <2 x i64> [[VQADDQ_V1_I]])4320// CHECK-NEXT:    [[VQADDQ_V3_I:%.*]] = bitcast <2 x i64> [[VQADDQ_V2_I]] to <16 x i8>4321// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQADDQ_V3_I]] to <2 x i64>4322// CHECK-NEXT:    ret <2 x i64> [[TMP2]]4323//4324int64x2_t test_vqaddq_s64(int64x2_t a, int64x2_t b) {4325  return vqaddq_s64(a, b);4326}4327 4328// CHECK-LABEL: define dso_local <16 x i8> @test_vqaddq_u8(4329// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4330// CHECK-NEXT:  [[ENTRY:.*:]]4331// CHECK-NEXT:    [[VQADDQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uqadd.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])4332// CHECK-NEXT:    ret <16 x i8> [[VQADDQ_V_I]]4333//4334uint8x16_t test_vqaddq_u8(uint8x16_t a, uint8x16_t b) {4335  return vqaddq_u8(a, b);4336}4337 4338// CHECK-LABEL: define dso_local <8 x i16> @test_vqaddq_u16(4339// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4340// CHECK-NEXT:  [[ENTRY:.*:]]4341// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>4342// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>4343// CHECK-NEXT:    [[VQADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4344// CHECK-NEXT:    [[VQADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4345// CHECK-NEXT:    [[VQADDQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uqadd.v8i16(<8 x i16> [[VQADDQ_V_I]], <8 x i16> [[VQADDQ_V1_I]])4346// CHECK-NEXT:    [[VQADDQ_V3_I:%.*]] = bitcast <8 x i16> [[VQADDQ_V2_I]] to <16 x i8>4347// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQADDQ_V3_I]] to <8 x i16>4348// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4349//4350uint16x8_t test_vqaddq_u16(uint16x8_t a, uint16x8_t b) {4351  return vqaddq_u16(a, b);4352}4353 4354// CHECK-LABEL: define dso_local <4 x i32> @test_vqaddq_u32(4355// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4356// CHECK-NEXT:  [[ENTRY:.*:]]4357// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>4358// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>4359// CHECK-NEXT:    [[VQADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>4360// CHECK-NEXT:    [[VQADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>4361// CHECK-NEXT:    [[VQADDQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uqadd.v4i32(<4 x i32> [[VQADDQ_V_I]], <4 x i32> [[VQADDQ_V1_I]])4362// CHECK-NEXT:    [[VQADDQ_V3_I:%.*]] = bitcast <4 x i32> [[VQADDQ_V2_I]] to <16 x i8>4363// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQADDQ_V3_I]] to <4 x i32>4364// CHECK-NEXT:    ret <4 x i32> [[TMP2]]4365//4366uint32x4_t test_vqaddq_u32(uint32x4_t a, uint32x4_t b) {4367  return vqaddq_u32(a, b);4368}4369 4370// CHECK-LABEL: define dso_local <2 x i64> @test_vqaddq_u64(4371// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4372// CHECK-NEXT:  [[ENTRY:.*:]]4373// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>4374// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>4375// CHECK-NEXT:    [[VQADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>4376// CHECK-NEXT:    [[VQADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>4377// CHECK-NEXT:    [[VQADDQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.uqadd.v2i64(<2 x i64> [[VQADDQ_V_I]], <2 x i64> [[VQADDQ_V1_I]])4378// CHECK-NEXT:    [[VQADDQ_V3_I:%.*]] = bitcast <2 x i64> [[VQADDQ_V2_I]] to <16 x i8>4379// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQADDQ_V3_I]] to <2 x i64>4380// CHECK-NEXT:    ret <2 x i64> [[TMP2]]4381//4382uint64x2_t test_vqaddq_u64(uint64x2_t a, uint64x2_t b) {4383  return vqaddq_u64(a, b);4384}4385 4386// CHECK-LABEL: define dso_local <8 x i8> @test_vqsub_s8(4387// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4388// CHECK-NEXT:  [[ENTRY:.*:]]4389// CHECK-NEXT:    [[VQSUB_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqsub.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])4390// CHECK-NEXT:    ret <8 x i8> [[VQSUB_V_I]]4391//4392int8x8_t test_vqsub_s8(int8x8_t a, int8x8_t b) {4393  return vqsub_s8(a, b);4394}4395 4396// CHECK-LABEL: define dso_local <4 x i16> @test_vqsub_s16(4397// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4398// CHECK-NEXT:  [[ENTRY:.*:]]4399// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>4400// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>4401// CHECK-NEXT:    [[VQSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4402// CHECK-NEXT:    [[VQSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4403// CHECK-NEXT:    [[VQSUB_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqsub.v4i16(<4 x i16> [[VQSUB_V_I]], <4 x i16> [[VQSUB_V1_I]])4404// CHECK-NEXT:    [[VQSUB_V3_I:%.*]] = bitcast <4 x i16> [[VQSUB_V2_I]] to <8 x i8>4405// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSUB_V3_I]] to <4 x i16>4406// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4407//4408int16x4_t test_vqsub_s16(int16x4_t a, int16x4_t b) {4409  return vqsub_s16(a, b);4410}4411 4412// CHECK-LABEL: define dso_local <2 x i32> @test_vqsub_s32(4413// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4414// CHECK-NEXT:  [[ENTRY:.*:]]4415// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>4416// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>4417// CHECK-NEXT:    [[VQSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4418// CHECK-NEXT:    [[VQSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4419// CHECK-NEXT:    [[VQSUB_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqsub.v2i32(<2 x i32> [[VQSUB_V_I]], <2 x i32> [[VQSUB_V1_I]])4420// CHECK-NEXT:    [[VQSUB_V3_I:%.*]] = bitcast <2 x i32> [[VQSUB_V2_I]] to <8 x i8>4421// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSUB_V3_I]] to <2 x i32>4422// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4423//4424int32x2_t test_vqsub_s32(int32x2_t a, int32x2_t b) {4425  return vqsub_s32(a, b);4426}4427 4428// CHECK-LABEL: define dso_local <1 x i64> @test_vqsub_s64(4429// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4430// CHECK-NEXT:  [[ENTRY:.*:]]4431// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>4432// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>4433// CHECK-NEXT:    [[VQSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>4434// CHECK-NEXT:    [[VQSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>4435// CHECK-NEXT:    [[VQSUB_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.sqsub.v1i64(<1 x i64> [[VQSUB_V_I]], <1 x i64> [[VQSUB_V1_I]])4436// CHECK-NEXT:    [[VQSUB_V3_I:%.*]] = bitcast <1 x i64> [[VQSUB_V2_I]] to <8 x i8>4437// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSUB_V3_I]] to i644438// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 04439// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]4440//4441int64x1_t test_vqsub_s64(int64x1_t a, int64x1_t b) {4442  return vqsub_s64(a, b);4443}4444 4445// CHECK-LABEL: define dso_local <8 x i8> @test_vqsub_u8(4446// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4447// CHECK-NEXT:  [[ENTRY:.*:]]4448// CHECK-NEXT:    [[VQSUB_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqsub.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])4449// CHECK-NEXT:    ret <8 x i8> [[VQSUB_V_I]]4450//4451uint8x8_t test_vqsub_u8(uint8x8_t a, uint8x8_t b) {4452  return vqsub_u8(a, b);4453}4454 4455// CHECK-LABEL: define dso_local <4 x i16> @test_vqsub_u16(4456// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4457// CHECK-NEXT:  [[ENTRY:.*:]]4458// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>4459// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>4460// CHECK-NEXT:    [[VQSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4461// CHECK-NEXT:    [[VQSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4462// CHECK-NEXT:    [[VQSUB_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqsub.v4i16(<4 x i16> [[VQSUB_V_I]], <4 x i16> [[VQSUB_V1_I]])4463// CHECK-NEXT:    [[VQSUB_V3_I:%.*]] = bitcast <4 x i16> [[VQSUB_V2_I]] to <8 x i8>4464// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSUB_V3_I]] to <4 x i16>4465// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4466//4467uint16x4_t test_vqsub_u16(uint16x4_t a, uint16x4_t b) {4468  return vqsub_u16(a, b);4469}4470 4471// CHECK-LABEL: define dso_local <2 x i32> @test_vqsub_u32(4472// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4473// CHECK-NEXT:  [[ENTRY:.*:]]4474// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>4475// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>4476// CHECK-NEXT:    [[VQSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4477// CHECK-NEXT:    [[VQSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4478// CHECK-NEXT:    [[VQSUB_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqsub.v2i32(<2 x i32> [[VQSUB_V_I]], <2 x i32> [[VQSUB_V1_I]])4479// CHECK-NEXT:    [[VQSUB_V3_I:%.*]] = bitcast <2 x i32> [[VQSUB_V2_I]] to <8 x i8>4480// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSUB_V3_I]] to <2 x i32>4481// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4482//4483uint32x2_t test_vqsub_u32(uint32x2_t a, uint32x2_t b) {4484  return vqsub_u32(a, b);4485}4486 4487// CHECK-LABEL: define dso_local <1 x i64> @test_vqsub_u64(4488// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4489// CHECK-NEXT:  [[ENTRY:.*:]]4490// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>4491// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>4492// CHECK-NEXT:    [[VQSUB_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>4493// CHECK-NEXT:    [[VQSUB_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>4494// CHECK-NEXT:    [[VQSUB_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.uqsub.v1i64(<1 x i64> [[VQSUB_V_I]], <1 x i64> [[VQSUB_V1_I]])4495// CHECK-NEXT:    [[VQSUB_V3_I:%.*]] = bitcast <1 x i64> [[VQSUB_V2_I]] to <8 x i8>4496// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSUB_V3_I]] to i644497// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 04498// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]4499//4500uint64x1_t test_vqsub_u64(uint64x1_t a, uint64x1_t b) {4501  return vqsub_u64(a, b);4502}4503 4504// CHECK-LABEL: define dso_local <16 x i8> @test_vqsubq_s8(4505// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4506// CHECK-NEXT:  [[ENTRY:.*:]]4507// CHECK-NEXT:    [[VQSUBQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.sqsub.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])4508// CHECK-NEXT:    ret <16 x i8> [[VQSUBQ_V_I]]4509//4510int8x16_t test_vqsubq_s8(int8x16_t a, int8x16_t b) {4511  return vqsubq_s8(a, b);4512}4513 4514// CHECK-LABEL: define dso_local <8 x i16> @test_vqsubq_s16(4515// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4516// CHECK-NEXT:  [[ENTRY:.*:]]4517// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>4518// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>4519// CHECK-NEXT:    [[VQSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4520// CHECK-NEXT:    [[VQSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4521// CHECK-NEXT:    [[VQSUBQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sqsub.v8i16(<8 x i16> [[VQSUBQ_V_I]], <8 x i16> [[VQSUBQ_V1_I]])4522// CHECK-NEXT:    [[VQSUBQ_V3_I:%.*]] = bitcast <8 x i16> [[VQSUBQ_V2_I]] to <16 x i8>4523// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSUBQ_V3_I]] to <8 x i16>4524// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4525//4526int16x8_t test_vqsubq_s16(int16x8_t a, int16x8_t b) {4527  return vqsubq_s16(a, b);4528}4529 4530// CHECK-LABEL: define dso_local <4 x i32> @test_vqsubq_s32(4531// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4532// CHECK-NEXT:  [[ENTRY:.*:]]4533// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>4534// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>4535// CHECK-NEXT:    [[VQSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>4536// CHECK-NEXT:    [[VQSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>4537// CHECK-NEXT:    [[VQSUBQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqsub.v4i32(<4 x i32> [[VQSUBQ_V_I]], <4 x i32> [[VQSUBQ_V1_I]])4538// CHECK-NEXT:    [[VQSUBQ_V3_I:%.*]] = bitcast <4 x i32> [[VQSUBQ_V2_I]] to <16 x i8>4539// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSUBQ_V3_I]] to <4 x i32>4540// CHECK-NEXT:    ret <4 x i32> [[TMP2]]4541//4542int32x4_t test_vqsubq_s32(int32x4_t a, int32x4_t b) {4543  return vqsubq_s32(a, b);4544}4545 4546// CHECK-LABEL: define dso_local <2 x i64> @test_vqsubq_s64(4547// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4548// CHECK-NEXT:  [[ENTRY:.*:]]4549// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>4550// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>4551// CHECK-NEXT:    [[VQSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>4552// CHECK-NEXT:    [[VQSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>4553// CHECK-NEXT:    [[VQSUBQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqsub.v2i64(<2 x i64> [[VQSUBQ_V_I]], <2 x i64> [[VQSUBQ_V1_I]])4554// CHECK-NEXT:    [[VQSUBQ_V3_I:%.*]] = bitcast <2 x i64> [[VQSUBQ_V2_I]] to <16 x i8>4555// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSUBQ_V3_I]] to <2 x i64>4556// CHECK-NEXT:    ret <2 x i64> [[TMP2]]4557//4558int64x2_t test_vqsubq_s64(int64x2_t a, int64x2_t b) {4559  return vqsubq_s64(a, b);4560}4561 4562// CHECK-LABEL: define dso_local <16 x i8> @test_vqsubq_u8(4563// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4564// CHECK-NEXT:  [[ENTRY:.*:]]4565// CHECK-NEXT:    [[VQSUBQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uqsub.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])4566// CHECK-NEXT:    ret <16 x i8> [[VQSUBQ_V_I]]4567//4568uint8x16_t test_vqsubq_u8(uint8x16_t a, uint8x16_t b) {4569  return vqsubq_u8(a, b);4570}4571 4572// CHECK-LABEL: define dso_local <8 x i16> @test_vqsubq_u16(4573// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4574// CHECK-NEXT:  [[ENTRY:.*:]]4575// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>4576// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>4577// CHECK-NEXT:    [[VQSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4578// CHECK-NEXT:    [[VQSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4579// CHECK-NEXT:    [[VQSUBQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uqsub.v8i16(<8 x i16> [[VQSUBQ_V_I]], <8 x i16> [[VQSUBQ_V1_I]])4580// CHECK-NEXT:    [[VQSUBQ_V3_I:%.*]] = bitcast <8 x i16> [[VQSUBQ_V2_I]] to <16 x i8>4581// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSUBQ_V3_I]] to <8 x i16>4582// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4583//4584uint16x8_t test_vqsubq_u16(uint16x8_t a, uint16x8_t b) {4585  return vqsubq_u16(a, b);4586}4587 4588// CHECK-LABEL: define dso_local <4 x i32> @test_vqsubq_u32(4589// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4590// CHECK-NEXT:  [[ENTRY:.*:]]4591// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>4592// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>4593// CHECK-NEXT:    [[VQSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>4594// CHECK-NEXT:    [[VQSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>4595// CHECK-NEXT:    [[VQSUBQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uqsub.v4i32(<4 x i32> [[VQSUBQ_V_I]], <4 x i32> [[VQSUBQ_V1_I]])4596// CHECK-NEXT:    [[VQSUBQ_V3_I:%.*]] = bitcast <4 x i32> [[VQSUBQ_V2_I]] to <16 x i8>4597// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSUBQ_V3_I]] to <4 x i32>4598// CHECK-NEXT:    ret <4 x i32> [[TMP2]]4599//4600uint32x4_t test_vqsubq_u32(uint32x4_t a, uint32x4_t b) {4601  return vqsubq_u32(a, b);4602}4603 4604// CHECK-LABEL: define dso_local <2 x i64> @test_vqsubq_u64(4605// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4606// CHECK-NEXT:  [[ENTRY:.*:]]4607// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>4608// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>4609// CHECK-NEXT:    [[VQSUBQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>4610// CHECK-NEXT:    [[VQSUBQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>4611// CHECK-NEXT:    [[VQSUBQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.uqsub.v2i64(<2 x i64> [[VQSUBQ_V_I]], <2 x i64> [[VQSUBQ_V1_I]])4612// CHECK-NEXT:    [[VQSUBQ_V3_I:%.*]] = bitcast <2 x i64> [[VQSUBQ_V2_I]] to <16 x i8>4613// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSUBQ_V3_I]] to <2 x i64>4614// CHECK-NEXT:    ret <2 x i64> [[TMP2]]4615//4616uint64x2_t test_vqsubq_u64(uint64x2_t a, uint64x2_t b) {4617  return vqsubq_u64(a, b);4618}4619 4620// CHECK-LABEL: define dso_local <8 x i8> @test_vshl_s8(4621// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4622// CHECK-NEXT:  [[ENTRY:.*:]]4623// CHECK-NEXT:    [[VSHL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sshl.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])4624// CHECK-NEXT:    ret <8 x i8> [[VSHL_V_I]]4625//4626int8x8_t test_vshl_s8(int8x8_t a, int8x8_t b) {4627  return vshl_s8(a, b);4628}4629 4630// CHECK-LABEL: define dso_local <4 x i16> @test_vshl_s16(4631// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4632// CHECK-NEXT:  [[ENTRY:.*:]]4633// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>4634// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>4635// CHECK-NEXT:    [[VSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4636// CHECK-NEXT:    [[VSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4637// CHECK-NEXT:    [[VSHL_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sshl.v4i16(<4 x i16> [[VSHL_V_I]], <4 x i16> [[VSHL_V1_I]])4638// CHECK-NEXT:    [[VSHL_V3_I:%.*]] = bitcast <4 x i16> [[VSHL_V2_I]] to <8 x i8>4639// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VSHL_V3_I]] to <4 x i16>4640// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4641//4642int16x4_t test_vshl_s16(int16x4_t a, int16x4_t b) {4643  return vshl_s16(a, b);4644}4645 4646// CHECK-LABEL: define dso_local <2 x i32> @test_vshl_s32(4647// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4648// CHECK-NEXT:  [[ENTRY:.*:]]4649// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>4650// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>4651// CHECK-NEXT:    [[VSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4652// CHECK-NEXT:    [[VSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4653// CHECK-NEXT:    [[VSHL_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sshl.v2i32(<2 x i32> [[VSHL_V_I]], <2 x i32> [[VSHL_V1_I]])4654// CHECK-NEXT:    [[VSHL_V3_I:%.*]] = bitcast <2 x i32> [[VSHL_V2_I]] to <8 x i8>4655// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VSHL_V3_I]] to <2 x i32>4656// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4657//4658int32x2_t test_vshl_s32(int32x2_t a, int32x2_t b) {4659  return vshl_s32(a, b);4660}4661 4662// CHECK-LABEL: define dso_local <1 x i64> @test_vshl_s64(4663// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4664// CHECK-NEXT:  [[ENTRY:.*:]]4665// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>4666// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>4667// CHECK-NEXT:    [[VSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>4668// CHECK-NEXT:    [[VSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>4669// CHECK-NEXT:    [[VSHL_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.sshl.v1i64(<1 x i64> [[VSHL_V_I]], <1 x i64> [[VSHL_V1_I]])4670// CHECK-NEXT:    [[VSHL_V3_I:%.*]] = bitcast <1 x i64> [[VSHL_V2_I]] to <8 x i8>4671// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VSHL_V3_I]] to i644672// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 04673// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]4674//4675int64x1_t test_vshl_s64(int64x1_t a, int64x1_t b) {4676  return vshl_s64(a, b);4677}4678 4679// CHECK-LABEL: define dso_local <8 x i8> @test_vshl_u8(4680// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4681// CHECK-NEXT:  [[ENTRY:.*:]]4682// CHECK-NEXT:    [[VSHL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.ushl.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])4683// CHECK-NEXT:    ret <8 x i8> [[VSHL_V_I]]4684//4685uint8x8_t test_vshl_u8(uint8x8_t a, int8x8_t b) {4686  return vshl_u8(a, b);4687}4688 4689// CHECK-LABEL: define dso_local <4 x i16> @test_vshl_u16(4690// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4691// CHECK-NEXT:  [[ENTRY:.*:]]4692// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>4693// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>4694// CHECK-NEXT:    [[VSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4695// CHECK-NEXT:    [[VSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4696// CHECK-NEXT:    [[VSHL_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.ushl.v4i16(<4 x i16> [[VSHL_V_I]], <4 x i16> [[VSHL_V1_I]])4697// CHECK-NEXT:    [[VSHL_V3_I:%.*]] = bitcast <4 x i16> [[VSHL_V2_I]] to <8 x i8>4698// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VSHL_V3_I]] to <4 x i16>4699// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4700//4701uint16x4_t test_vshl_u16(uint16x4_t a, int16x4_t b) {4702  return vshl_u16(a, b);4703}4704 4705// CHECK-LABEL: define dso_local <2 x i32> @test_vshl_u32(4706// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4707// CHECK-NEXT:  [[ENTRY:.*:]]4708// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>4709// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>4710// CHECK-NEXT:    [[VSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4711// CHECK-NEXT:    [[VSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4712// CHECK-NEXT:    [[VSHL_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.ushl.v2i32(<2 x i32> [[VSHL_V_I]], <2 x i32> [[VSHL_V1_I]])4713// CHECK-NEXT:    [[VSHL_V3_I:%.*]] = bitcast <2 x i32> [[VSHL_V2_I]] to <8 x i8>4714// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VSHL_V3_I]] to <2 x i32>4715// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4716//4717uint32x2_t test_vshl_u32(uint32x2_t a, int32x2_t b) {4718  return vshl_u32(a, b);4719}4720 4721// CHECK-LABEL: define dso_local <1 x i64> @test_vshl_u64(4722// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4723// CHECK-NEXT:  [[ENTRY:.*:]]4724// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>4725// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>4726// CHECK-NEXT:    [[VSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>4727// CHECK-NEXT:    [[VSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>4728// CHECK-NEXT:    [[VSHL_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.ushl.v1i64(<1 x i64> [[VSHL_V_I]], <1 x i64> [[VSHL_V1_I]])4729// CHECK-NEXT:    [[VSHL_V3_I:%.*]] = bitcast <1 x i64> [[VSHL_V2_I]] to <8 x i8>4730// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VSHL_V3_I]] to i644731// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 04732// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]4733//4734uint64x1_t test_vshl_u64(uint64x1_t a, int64x1_t b) {4735  return vshl_u64(a, b);4736}4737 4738// CHECK-LABEL: define dso_local <16 x i8> @test_vshlq_s8(4739// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4740// CHECK-NEXT:  [[ENTRY:.*:]]4741// CHECK-NEXT:    [[VSHLQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.sshl.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])4742// CHECK-NEXT:    ret <16 x i8> [[VSHLQ_V_I]]4743//4744int8x16_t test_vshlq_s8(int8x16_t a, int8x16_t b) {4745  return vshlq_s8(a, b);4746}4747 4748// CHECK-LABEL: define dso_local <8 x i16> @test_vshlq_s16(4749// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4750// CHECK-NEXT:  [[ENTRY:.*:]]4751// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>4752// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>4753// CHECK-NEXT:    [[VSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4754// CHECK-NEXT:    [[VSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4755// CHECK-NEXT:    [[VSHLQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sshl.v8i16(<8 x i16> [[VSHLQ_V_I]], <8 x i16> [[VSHLQ_V1_I]])4756// CHECK-NEXT:    [[VSHLQ_V3_I:%.*]] = bitcast <8 x i16> [[VSHLQ_V2_I]] to <16 x i8>4757// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VSHLQ_V3_I]] to <8 x i16>4758// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4759//4760int16x8_t test_vshlq_s16(int16x8_t a, int16x8_t b) {4761  return vshlq_s16(a, b);4762}4763 4764// CHECK-LABEL: define dso_local <4 x i32> @test_vshlq_s32(4765// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4766// CHECK-NEXT:  [[ENTRY:.*:]]4767// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>4768// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>4769// CHECK-NEXT:    [[VSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>4770// CHECK-NEXT:    [[VSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>4771// CHECK-NEXT:    [[VSHLQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sshl.v4i32(<4 x i32> [[VSHLQ_V_I]], <4 x i32> [[VSHLQ_V1_I]])4772// CHECK-NEXT:    [[VSHLQ_V3_I:%.*]] = bitcast <4 x i32> [[VSHLQ_V2_I]] to <16 x i8>4773// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VSHLQ_V3_I]] to <4 x i32>4774// CHECK-NEXT:    ret <4 x i32> [[TMP2]]4775//4776int32x4_t test_vshlq_s32(int32x4_t a, int32x4_t b) {4777  return vshlq_s32(a, b);4778}4779 4780// CHECK-LABEL: define dso_local <2 x i64> @test_vshlq_s64(4781// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4782// CHECK-NEXT:  [[ENTRY:.*:]]4783// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>4784// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>4785// CHECK-NEXT:    [[VSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>4786// CHECK-NEXT:    [[VSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>4787// CHECK-NEXT:    [[VSHLQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sshl.v2i64(<2 x i64> [[VSHLQ_V_I]], <2 x i64> [[VSHLQ_V1_I]])4788// CHECK-NEXT:    [[VSHLQ_V3_I:%.*]] = bitcast <2 x i64> [[VSHLQ_V2_I]] to <16 x i8>4789// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VSHLQ_V3_I]] to <2 x i64>4790// CHECK-NEXT:    ret <2 x i64> [[TMP2]]4791//4792int64x2_t test_vshlq_s64(int64x2_t a, int64x2_t b) {4793  return vshlq_s64(a, b);4794}4795 4796// CHECK-LABEL: define dso_local <16 x i8> @test_vshlq_u8(4797// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4798// CHECK-NEXT:  [[ENTRY:.*:]]4799// CHECK-NEXT:    [[VSHLQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.ushl.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])4800// CHECK-NEXT:    ret <16 x i8> [[VSHLQ_V_I]]4801//4802uint8x16_t test_vshlq_u8(uint8x16_t a, int8x16_t b) {4803  return vshlq_u8(a, b);4804}4805 4806// CHECK-LABEL: define dso_local <8 x i16> @test_vshlq_u16(4807// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4808// CHECK-NEXT:  [[ENTRY:.*:]]4809// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>4810// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>4811// CHECK-NEXT:    [[VSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4812// CHECK-NEXT:    [[VSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4813// CHECK-NEXT:    [[VSHLQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.ushl.v8i16(<8 x i16> [[VSHLQ_V_I]], <8 x i16> [[VSHLQ_V1_I]])4814// CHECK-NEXT:    [[VSHLQ_V3_I:%.*]] = bitcast <8 x i16> [[VSHLQ_V2_I]] to <16 x i8>4815// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VSHLQ_V3_I]] to <8 x i16>4816// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4817//4818uint16x8_t test_vshlq_u16(uint16x8_t a, int16x8_t b) {4819  return vshlq_u16(a, b);4820}4821 4822// CHECK-LABEL: define dso_local <4 x i32> @test_vshlq_u32(4823// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4824// CHECK-NEXT:  [[ENTRY:.*:]]4825// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>4826// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>4827// CHECK-NEXT:    [[VSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>4828// CHECK-NEXT:    [[VSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>4829// CHECK-NEXT:    [[VSHLQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.ushl.v4i32(<4 x i32> [[VSHLQ_V_I]], <4 x i32> [[VSHLQ_V1_I]])4830// CHECK-NEXT:    [[VSHLQ_V3_I:%.*]] = bitcast <4 x i32> [[VSHLQ_V2_I]] to <16 x i8>4831// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VSHLQ_V3_I]] to <4 x i32>4832// CHECK-NEXT:    ret <4 x i32> [[TMP2]]4833//4834uint32x4_t test_vshlq_u32(uint32x4_t a, int32x4_t b) {4835  return vshlq_u32(a, b);4836}4837 4838// CHECK-LABEL: define dso_local <2 x i64> @test_vshlq_u64(4839// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4840// CHECK-NEXT:  [[ENTRY:.*:]]4841// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>4842// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>4843// CHECK-NEXT:    [[VSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>4844// CHECK-NEXT:    [[VSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>4845// CHECK-NEXT:    [[VSHLQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.ushl.v2i64(<2 x i64> [[VSHLQ_V_I]], <2 x i64> [[VSHLQ_V1_I]])4846// CHECK-NEXT:    [[VSHLQ_V3_I:%.*]] = bitcast <2 x i64> [[VSHLQ_V2_I]] to <16 x i8>4847// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VSHLQ_V3_I]] to <2 x i64>4848// CHECK-NEXT:    ret <2 x i64> [[TMP2]]4849//4850uint64x2_t test_vshlq_u64(uint64x2_t a, int64x2_t b) {4851  return vshlq_u64(a, b);4852}4853 4854// CHECK-LABEL: define dso_local <8 x i8> @test_vqshl_s8(4855// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4856// CHECK-NEXT:  [[ENTRY:.*:]]4857// CHECK-NEXT:    [[VQSHL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])4858// CHECK-NEXT:    ret <8 x i8> [[VQSHL_V_I]]4859//4860int8x8_t test_vqshl_s8(int8x8_t a, int8x8_t b) {4861  return vqshl_s8(a, b);4862}4863 4864// CHECK-LABEL: define dso_local <4 x i16> @test_vqshl_s16(4865// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4866// CHECK-NEXT:  [[ENTRY:.*:]]4867// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>4868// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>4869// CHECK-NEXT:    [[VQSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4870// CHECK-NEXT:    [[VQSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4871// CHECK-NEXT:    [[VQSHL_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[VQSHL_V_I]], <4 x i16> [[VQSHL_V1_I]])4872// CHECK-NEXT:    [[VQSHL_V3_I:%.*]] = bitcast <4 x i16> [[VQSHL_V2_I]] to <8 x i8>4873// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSHL_V3_I]] to <4 x i16>4874// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4875//4876int16x4_t test_vqshl_s16(int16x4_t a, int16x4_t b) {4877  return vqshl_s16(a, b);4878}4879 4880// CHECK-LABEL: define dso_local <2 x i32> @test_vqshl_s32(4881// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4882// CHECK-NEXT:  [[ENTRY:.*:]]4883// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>4884// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>4885// CHECK-NEXT:    [[VQSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4886// CHECK-NEXT:    [[VQSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4887// CHECK-NEXT:    [[VQSHL_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqshl.v2i32(<2 x i32> [[VQSHL_V_I]], <2 x i32> [[VQSHL_V1_I]])4888// CHECK-NEXT:    [[VQSHL_V3_I:%.*]] = bitcast <2 x i32> [[VQSHL_V2_I]] to <8 x i8>4889// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSHL_V3_I]] to <2 x i32>4890// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4891//4892int32x2_t test_vqshl_s32(int32x2_t a, int32x2_t b) {4893  return vqshl_s32(a, b);4894}4895 4896// CHECK-LABEL: define dso_local <1 x i64> @test_vqshl_s64(4897// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4898// CHECK-NEXT:  [[ENTRY:.*:]]4899// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>4900// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>4901// CHECK-NEXT:    [[VQSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>4902// CHECK-NEXT:    [[VQSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>4903// CHECK-NEXT:    [[VQSHL_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.sqshl.v1i64(<1 x i64> [[VQSHL_V_I]], <1 x i64> [[VQSHL_V1_I]])4904// CHECK-NEXT:    [[VQSHL_V3_I:%.*]] = bitcast <1 x i64> [[VQSHL_V2_I]] to <8 x i8>4905// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSHL_V3_I]] to i644906// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 04907// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]4908//4909int64x1_t test_vqshl_s64(int64x1_t a, int64x1_t b) {4910  return vqshl_s64(a, b);4911}4912 4913// CHECK-LABEL: define dso_local <8 x i8> @test_vqshl_u8(4914// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4915// CHECK-NEXT:  [[ENTRY:.*:]]4916// CHECK-NEXT:    [[VQSHL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])4917// CHECK-NEXT:    ret <8 x i8> [[VQSHL_V_I]]4918//4919uint8x8_t test_vqshl_u8(uint8x8_t a, int8x8_t b) {4920  return vqshl_u8(a, b);4921}4922 4923// CHECK-LABEL: define dso_local <4 x i16> @test_vqshl_u16(4924// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4925// CHECK-NEXT:  [[ENTRY:.*:]]4926// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>4927// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>4928// CHECK-NEXT:    [[VQSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>4929// CHECK-NEXT:    [[VQSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>4930// CHECK-NEXT:    [[VQSHL_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> [[VQSHL_V_I]], <4 x i16> [[VQSHL_V1_I]])4931// CHECK-NEXT:    [[VQSHL_V3_I:%.*]] = bitcast <4 x i16> [[VQSHL_V2_I]] to <8 x i8>4932// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSHL_V3_I]] to <4 x i16>4933// CHECK-NEXT:    ret <4 x i16> [[TMP2]]4934//4935uint16x4_t test_vqshl_u16(uint16x4_t a, int16x4_t b) {4936  return vqshl_u16(a, b);4937}4938 4939// CHECK-LABEL: define dso_local <2 x i32> @test_vqshl_u32(4940// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {4941// CHECK-NEXT:  [[ENTRY:.*:]]4942// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>4943// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>4944// CHECK-NEXT:    [[VQSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>4945// CHECK-NEXT:    [[VQSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>4946// CHECK-NEXT:    [[VQSHL_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqshl.v2i32(<2 x i32> [[VQSHL_V_I]], <2 x i32> [[VQSHL_V1_I]])4947// CHECK-NEXT:    [[VQSHL_V3_I:%.*]] = bitcast <2 x i32> [[VQSHL_V2_I]] to <8 x i8>4948// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSHL_V3_I]] to <2 x i32>4949// CHECK-NEXT:    ret <2 x i32> [[TMP2]]4950//4951uint32x2_t test_vqshl_u32(uint32x2_t a, int32x2_t b) {4952  return vqshl_u32(a, b);4953}4954 4955// CHECK-LABEL: define dso_local <1 x i64> @test_vqshl_u64(4956// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {4957// CHECK-NEXT:  [[ENTRY:.*:]]4958// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>4959// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>4960// CHECK-NEXT:    [[VQSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>4961// CHECK-NEXT:    [[VQSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>4962// CHECK-NEXT:    [[VQSHL_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.uqshl.v1i64(<1 x i64> [[VQSHL_V_I]], <1 x i64> [[VQSHL_V1_I]])4963// CHECK-NEXT:    [[VQSHL_V3_I:%.*]] = bitcast <1 x i64> [[VQSHL_V2_I]] to <8 x i8>4964// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQSHL_V3_I]] to i644965// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 04966// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]4967//4968uint64x1_t test_vqshl_u64(uint64x1_t a, int64x1_t b) {4969  return vqshl_u64(a, b);4970}4971 4972// CHECK-LABEL: define dso_local <16 x i8> @test_vqshlq_s8(4973// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {4974// CHECK-NEXT:  [[ENTRY:.*:]]4975// CHECK-NEXT:    [[VQSHLQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.sqshl.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])4976// CHECK-NEXT:    ret <16 x i8> [[VQSHLQ_V_I]]4977//4978int8x16_t test_vqshlq_s8(int8x16_t a, int8x16_t b) {4979  return vqshlq_s8(a, b);4980}4981 4982// CHECK-LABEL: define dso_local <8 x i16> @test_vqshlq_s16(4983// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {4984// CHECK-NEXT:  [[ENTRY:.*:]]4985// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>4986// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>4987// CHECK-NEXT:    [[VQSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>4988// CHECK-NEXT:    [[VQSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>4989// CHECK-NEXT:    [[VQSHLQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sqshl.v8i16(<8 x i16> [[VQSHLQ_V_I]], <8 x i16> [[VQSHLQ_V1_I]])4990// CHECK-NEXT:    [[VQSHLQ_V3_I:%.*]] = bitcast <8 x i16> [[VQSHLQ_V2_I]] to <16 x i8>4991// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSHLQ_V3_I]] to <8 x i16>4992// CHECK-NEXT:    ret <8 x i16> [[TMP2]]4993//4994int16x8_t test_vqshlq_s16(int16x8_t a, int16x8_t b) {4995  return vqshlq_s16(a, b);4996}4997 4998// CHECK-LABEL: define dso_local <4 x i32> @test_vqshlq_s32(4999// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5000// CHECK-NEXT:  [[ENTRY:.*:]]5001// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5002// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5003// CHECK-NEXT:    [[VQSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5004// CHECK-NEXT:    [[VQSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5005// CHECK-NEXT:    [[VQSHLQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqshl.v4i32(<4 x i32> [[VQSHLQ_V_I]], <4 x i32> [[VQSHLQ_V1_I]])5006// CHECK-NEXT:    [[VQSHLQ_V3_I:%.*]] = bitcast <4 x i32> [[VQSHLQ_V2_I]] to <16 x i8>5007// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSHLQ_V3_I]] to <4 x i32>5008// CHECK-NEXT:    ret <4 x i32> [[TMP2]]5009//5010int32x4_t test_vqshlq_s32(int32x4_t a, int32x4_t b) {5011  return vqshlq_s32(a, b);5012}5013 5014// CHECK-LABEL: define dso_local <2 x i64> @test_vqshlq_s64(5015// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5016// CHECK-NEXT:  [[ENTRY:.*:]]5017// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>5018// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>5019// CHECK-NEXT:    [[VQSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>5020// CHECK-NEXT:    [[VQSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>5021// CHECK-NEXT:    [[VQSHLQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqshl.v2i64(<2 x i64> [[VQSHLQ_V_I]], <2 x i64> [[VQSHLQ_V1_I]])5022// CHECK-NEXT:    [[VQSHLQ_V3_I:%.*]] = bitcast <2 x i64> [[VQSHLQ_V2_I]] to <16 x i8>5023// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSHLQ_V3_I]] to <2 x i64>5024// CHECK-NEXT:    ret <2 x i64> [[TMP2]]5025//5026int64x2_t test_vqshlq_s64(int64x2_t a, int64x2_t b) {5027  return vqshlq_s64(a, b);5028}5029 5030// CHECK-LABEL: define dso_local <16 x i8> @test_vqshlq_u8(5031// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5032// CHECK-NEXT:  [[ENTRY:.*:]]5033// CHECK-NEXT:    [[VQSHLQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uqshl.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5034// CHECK-NEXT:    ret <16 x i8> [[VQSHLQ_V_I]]5035//5036uint8x16_t test_vqshlq_u8(uint8x16_t a, int8x16_t b) {5037  return vqshlq_u8(a, b);5038}5039 5040// CHECK-LABEL: define dso_local <8 x i16> @test_vqshlq_u16(5041// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5042// CHECK-NEXT:  [[ENTRY:.*:]]5043// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5044// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5045// CHECK-NEXT:    [[VQSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5046// CHECK-NEXT:    [[VQSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5047// CHECK-NEXT:    [[VQSHLQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uqshl.v8i16(<8 x i16> [[VQSHLQ_V_I]], <8 x i16> [[VQSHLQ_V1_I]])5048// CHECK-NEXT:    [[VQSHLQ_V3_I:%.*]] = bitcast <8 x i16> [[VQSHLQ_V2_I]] to <16 x i8>5049// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSHLQ_V3_I]] to <8 x i16>5050// CHECK-NEXT:    ret <8 x i16> [[TMP2]]5051//5052uint16x8_t test_vqshlq_u16(uint16x8_t a, int16x8_t b) {5053  return vqshlq_u16(a, b);5054}5055 5056// CHECK-LABEL: define dso_local <4 x i32> @test_vqshlq_u32(5057// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5058// CHECK-NEXT:  [[ENTRY:.*:]]5059// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5060// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5061// CHECK-NEXT:    [[VQSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5062// CHECK-NEXT:    [[VQSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5063// CHECK-NEXT:    [[VQSHLQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uqshl.v4i32(<4 x i32> [[VQSHLQ_V_I]], <4 x i32> [[VQSHLQ_V1_I]])5064// CHECK-NEXT:    [[VQSHLQ_V3_I:%.*]] = bitcast <4 x i32> [[VQSHLQ_V2_I]] to <16 x i8>5065// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSHLQ_V3_I]] to <4 x i32>5066// CHECK-NEXT:    ret <4 x i32> [[TMP2]]5067//5068uint32x4_t test_vqshlq_u32(uint32x4_t a, int32x4_t b) {5069  return vqshlq_u32(a, b);5070}5071 5072// CHECK-LABEL: define dso_local <2 x i64> @test_vqshlq_u64(5073// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5074// CHECK-NEXT:  [[ENTRY:.*:]]5075// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>5076// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>5077// CHECK-NEXT:    [[VQSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>5078// CHECK-NEXT:    [[VQSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>5079// CHECK-NEXT:    [[VQSHLQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.uqshl.v2i64(<2 x i64> [[VQSHLQ_V_I]], <2 x i64> [[VQSHLQ_V1_I]])5080// CHECK-NEXT:    [[VQSHLQ_V3_I:%.*]] = bitcast <2 x i64> [[VQSHLQ_V2_I]] to <16 x i8>5081// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQSHLQ_V3_I]] to <2 x i64>5082// CHECK-NEXT:    ret <2 x i64> [[TMP2]]5083//5084uint64x2_t test_vqshlq_u64(uint64x2_t a, int64x2_t b) {5085  return vqshlq_u64(a, b);5086}5087 5088// CHECK-LABEL: define dso_local <8 x i8> @test_vrshl_s8(5089// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5090// CHECK-NEXT:  [[ENTRY:.*:]]5091// CHECK-NEXT:    [[VRSHL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.srshl.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])5092// CHECK-NEXT:    ret <8 x i8> [[VRSHL_V_I]]5093//5094int8x8_t test_vrshl_s8(int8x8_t a, int8x8_t b) {5095  return vrshl_s8(a, b);5096}5097 5098// CHECK-LABEL: define dso_local <4 x i16> @test_vrshl_s16(5099// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5100// CHECK-NEXT:  [[ENTRY:.*:]]5101// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>5102// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>5103// CHECK-NEXT:    [[VRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>5104// CHECK-NEXT:    [[VRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>5105// CHECK-NEXT:    [[VRSHL_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.srshl.v4i16(<4 x i16> [[VRSHL_V_I]], <4 x i16> [[VRSHL_V1_I]])5106// CHECK-NEXT:    [[VRSHL_V3_I:%.*]] = bitcast <4 x i16> [[VRSHL_V2_I]] to <8 x i8>5107// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSHL_V3_I]] to <4 x i16>5108// CHECK-NEXT:    ret <4 x i16> [[TMP2]]5109//5110int16x4_t test_vrshl_s16(int16x4_t a, int16x4_t b) {5111  return vrshl_s16(a, b);5112}5113 5114// CHECK-LABEL: define dso_local <2 x i32> @test_vrshl_s32(5115// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5116// CHECK-NEXT:  [[ENTRY:.*:]]5117// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>5118// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>5119// CHECK-NEXT:    [[VRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>5120// CHECK-NEXT:    [[VRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>5121// CHECK-NEXT:    [[VRSHL_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.srshl.v2i32(<2 x i32> [[VRSHL_V_I]], <2 x i32> [[VRSHL_V1_I]])5122// CHECK-NEXT:    [[VRSHL_V3_I:%.*]] = bitcast <2 x i32> [[VRSHL_V2_I]] to <8 x i8>5123// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSHL_V3_I]] to <2 x i32>5124// CHECK-NEXT:    ret <2 x i32> [[TMP2]]5125//5126int32x2_t test_vrshl_s32(int32x2_t a, int32x2_t b) {5127  return vrshl_s32(a, b);5128}5129 5130// CHECK-LABEL: define dso_local <1 x i64> @test_vrshl_s64(5131// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5132// CHECK-NEXT:  [[ENTRY:.*:]]5133// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>5134// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>5135// CHECK-NEXT:    [[VRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>5136// CHECK-NEXT:    [[VRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>5137// CHECK-NEXT:    [[VRSHL_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.srshl.v1i64(<1 x i64> [[VRSHL_V_I]], <1 x i64> [[VRSHL_V1_I]])5138// CHECK-NEXT:    [[VRSHL_V3_I:%.*]] = bitcast <1 x i64> [[VRSHL_V2_I]] to <8 x i8>5139// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSHL_V3_I]] to i645140// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 05141// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]5142//5143int64x1_t test_vrshl_s64(int64x1_t a, int64x1_t b) {5144  return vrshl_s64(a, b);5145}5146 5147// CHECK-LABEL: define dso_local <8 x i8> @test_vrshl_u8(5148// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5149// CHECK-NEXT:  [[ENTRY:.*:]]5150// CHECK-NEXT:    [[VRSHL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.urshl.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])5151// CHECK-NEXT:    ret <8 x i8> [[VRSHL_V_I]]5152//5153uint8x8_t test_vrshl_u8(uint8x8_t a, int8x8_t b) {5154  return vrshl_u8(a, b);5155}5156 5157// CHECK-LABEL: define dso_local <4 x i16> @test_vrshl_u16(5158// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5159// CHECK-NEXT:  [[ENTRY:.*:]]5160// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>5161// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>5162// CHECK-NEXT:    [[VRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>5163// CHECK-NEXT:    [[VRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>5164// CHECK-NEXT:    [[VRSHL_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.urshl.v4i16(<4 x i16> [[VRSHL_V_I]], <4 x i16> [[VRSHL_V1_I]])5165// CHECK-NEXT:    [[VRSHL_V3_I:%.*]] = bitcast <4 x i16> [[VRSHL_V2_I]] to <8 x i8>5166// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSHL_V3_I]] to <4 x i16>5167// CHECK-NEXT:    ret <4 x i16> [[TMP2]]5168//5169uint16x4_t test_vrshl_u16(uint16x4_t a, int16x4_t b) {5170  return vrshl_u16(a, b);5171}5172 5173// CHECK-LABEL: define dso_local <2 x i32> @test_vrshl_u32(5174// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5175// CHECK-NEXT:  [[ENTRY:.*:]]5176// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>5177// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>5178// CHECK-NEXT:    [[VRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>5179// CHECK-NEXT:    [[VRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>5180// CHECK-NEXT:    [[VRSHL_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.urshl.v2i32(<2 x i32> [[VRSHL_V_I]], <2 x i32> [[VRSHL_V1_I]])5181// CHECK-NEXT:    [[VRSHL_V3_I:%.*]] = bitcast <2 x i32> [[VRSHL_V2_I]] to <8 x i8>5182// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSHL_V3_I]] to <2 x i32>5183// CHECK-NEXT:    ret <2 x i32> [[TMP2]]5184//5185uint32x2_t test_vrshl_u32(uint32x2_t a, int32x2_t b) {5186  return vrshl_u32(a, b);5187}5188 5189// CHECK-LABEL: define dso_local <1 x i64> @test_vrshl_u64(5190// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5191// CHECK-NEXT:  [[ENTRY:.*:]]5192// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>5193// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>5194// CHECK-NEXT:    [[VRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>5195// CHECK-NEXT:    [[VRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>5196// CHECK-NEXT:    [[VRSHL_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.urshl.v1i64(<1 x i64> [[VRSHL_V_I]], <1 x i64> [[VRSHL_V1_I]])5197// CHECK-NEXT:    [[VRSHL_V3_I:%.*]] = bitcast <1 x i64> [[VRSHL_V2_I]] to <8 x i8>5198// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSHL_V3_I]] to i645199// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 05200// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]5201//5202uint64x1_t test_vrshl_u64(uint64x1_t a, int64x1_t b) {5203  return vrshl_u64(a, b);5204}5205 5206// CHECK-LABEL: define dso_local <16 x i8> @test_vrshlq_s8(5207// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5208// CHECK-NEXT:  [[ENTRY:.*:]]5209// CHECK-NEXT:    [[VRSHLQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.srshl.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5210// CHECK-NEXT:    ret <16 x i8> [[VRSHLQ_V_I]]5211//5212int8x16_t test_vrshlq_s8(int8x16_t a, int8x16_t b) {5213  return vrshlq_s8(a, b);5214}5215 5216// CHECK-LABEL: define dso_local <8 x i16> @test_vrshlq_s16(5217// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5218// CHECK-NEXT:  [[ENTRY:.*:]]5219// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5220// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5221// CHECK-NEXT:    [[VRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5222// CHECK-NEXT:    [[VRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5223// CHECK-NEXT:    [[VRSHLQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.srshl.v8i16(<8 x i16> [[VRSHLQ_V_I]], <8 x i16> [[VRSHLQ_V1_I]])5224// CHECK-NEXT:    [[VRSHLQ_V3_I:%.*]] = bitcast <8 x i16> [[VRSHLQ_V2_I]] to <16 x i8>5225// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRSHLQ_V3_I]] to <8 x i16>5226// CHECK-NEXT:    ret <8 x i16> [[TMP2]]5227//5228int16x8_t test_vrshlq_s16(int16x8_t a, int16x8_t b) {5229  return vrshlq_s16(a, b);5230}5231 5232// CHECK-LABEL: define dso_local <4 x i32> @test_vrshlq_s32(5233// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5234// CHECK-NEXT:  [[ENTRY:.*:]]5235// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5236// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5237// CHECK-NEXT:    [[VRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5238// CHECK-NEXT:    [[VRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5239// CHECK-NEXT:    [[VRSHLQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.srshl.v4i32(<4 x i32> [[VRSHLQ_V_I]], <4 x i32> [[VRSHLQ_V1_I]])5240// CHECK-NEXT:    [[VRSHLQ_V3_I:%.*]] = bitcast <4 x i32> [[VRSHLQ_V2_I]] to <16 x i8>5241// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRSHLQ_V3_I]] to <4 x i32>5242// CHECK-NEXT:    ret <4 x i32> [[TMP2]]5243//5244int32x4_t test_vrshlq_s32(int32x4_t a, int32x4_t b) {5245  return vrshlq_s32(a, b);5246}5247 5248// CHECK-LABEL: define dso_local <2 x i64> @test_vrshlq_s64(5249// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5250// CHECK-NEXT:  [[ENTRY:.*:]]5251// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>5252// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>5253// CHECK-NEXT:    [[VRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>5254// CHECK-NEXT:    [[VRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>5255// CHECK-NEXT:    [[VRSHLQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.srshl.v2i64(<2 x i64> [[VRSHLQ_V_I]], <2 x i64> [[VRSHLQ_V1_I]])5256// CHECK-NEXT:    [[VRSHLQ_V3_I:%.*]] = bitcast <2 x i64> [[VRSHLQ_V2_I]] to <16 x i8>5257// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRSHLQ_V3_I]] to <2 x i64>5258// CHECK-NEXT:    ret <2 x i64> [[TMP2]]5259//5260int64x2_t test_vrshlq_s64(int64x2_t a, int64x2_t b) {5261  return vrshlq_s64(a, b);5262}5263 5264// CHECK-LABEL: define dso_local <16 x i8> @test_vrshlq_u8(5265// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5266// CHECK-NEXT:  [[ENTRY:.*:]]5267// CHECK-NEXT:    [[VRSHLQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.urshl.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5268// CHECK-NEXT:    ret <16 x i8> [[VRSHLQ_V_I]]5269//5270uint8x16_t test_vrshlq_u8(uint8x16_t a, int8x16_t b) {5271  return vrshlq_u8(a, b);5272}5273 5274// CHECK-LABEL: define dso_local <8 x i16> @test_vrshlq_u16(5275// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5276// CHECK-NEXT:  [[ENTRY:.*:]]5277// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5278// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5279// CHECK-NEXT:    [[VRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5280// CHECK-NEXT:    [[VRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5281// CHECK-NEXT:    [[VRSHLQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.urshl.v8i16(<8 x i16> [[VRSHLQ_V_I]], <8 x i16> [[VRSHLQ_V1_I]])5282// CHECK-NEXT:    [[VRSHLQ_V3_I:%.*]] = bitcast <8 x i16> [[VRSHLQ_V2_I]] to <16 x i8>5283// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRSHLQ_V3_I]] to <8 x i16>5284// CHECK-NEXT:    ret <8 x i16> [[TMP2]]5285//5286uint16x8_t test_vrshlq_u16(uint16x8_t a, int16x8_t b) {5287  return vrshlq_u16(a, b);5288}5289 5290// CHECK-LABEL: define dso_local <4 x i32> @test_vrshlq_u32(5291// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5292// CHECK-NEXT:  [[ENTRY:.*:]]5293// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5294// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5295// CHECK-NEXT:    [[VRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5296// CHECK-NEXT:    [[VRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5297// CHECK-NEXT:    [[VRSHLQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.urshl.v4i32(<4 x i32> [[VRSHLQ_V_I]], <4 x i32> [[VRSHLQ_V1_I]])5298// CHECK-NEXT:    [[VRSHLQ_V3_I:%.*]] = bitcast <4 x i32> [[VRSHLQ_V2_I]] to <16 x i8>5299// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRSHLQ_V3_I]] to <4 x i32>5300// CHECK-NEXT:    ret <4 x i32> [[TMP2]]5301//5302uint32x4_t test_vrshlq_u32(uint32x4_t a, int32x4_t b) {5303  return vrshlq_u32(a, b);5304}5305 5306// CHECK-LABEL: define dso_local <2 x i64> @test_vrshlq_u64(5307// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5308// CHECK-NEXT:  [[ENTRY:.*:]]5309// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>5310// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>5311// CHECK-NEXT:    [[VRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>5312// CHECK-NEXT:    [[VRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>5313// CHECK-NEXT:    [[VRSHLQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.urshl.v2i64(<2 x i64> [[VRSHLQ_V_I]], <2 x i64> [[VRSHLQ_V1_I]])5314// CHECK-NEXT:    [[VRSHLQ_V3_I:%.*]] = bitcast <2 x i64> [[VRSHLQ_V2_I]] to <16 x i8>5315// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VRSHLQ_V3_I]] to <2 x i64>5316// CHECK-NEXT:    ret <2 x i64> [[TMP2]]5317//5318uint64x2_t test_vrshlq_u64(uint64x2_t a, int64x2_t b) {5319  return vrshlq_u64(a, b);5320}5321 5322// CHECK-LABEL: define dso_local <8 x i8> @test_vqrshl_s8(5323// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5324// CHECK-NEXT:  [[ENTRY:.*:]]5325// CHECK-NEXT:    [[VQRSHL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshl.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])5326// CHECK-NEXT:    ret <8 x i8> [[VQRSHL_V_I]]5327//5328int8x8_t test_vqrshl_s8(int8x8_t a, int8x8_t b) {5329  return vqrshl_s8(a, b);5330}5331 5332// CHECK-LABEL: define dso_local <4 x i16> @test_vqrshl_s16(5333// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5334// CHECK-NEXT:  [[ENTRY:.*:]]5335// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>5336// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>5337// CHECK-NEXT:    [[VQRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>5338// CHECK-NEXT:    [[VQRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>5339// CHECK-NEXT:    [[VQRSHL_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshl.v4i16(<4 x i16> [[VQRSHL_V_I]], <4 x i16> [[VQRSHL_V1_I]])5340// CHECK-NEXT:    [[VQRSHL_V3_I:%.*]] = bitcast <4 x i16> [[VQRSHL_V2_I]] to <8 x i8>5341// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQRSHL_V3_I]] to <4 x i16>5342// CHECK-NEXT:    ret <4 x i16> [[TMP2]]5343//5344int16x4_t test_vqrshl_s16(int16x4_t a, int16x4_t b) {5345  return vqrshl_s16(a, b);5346}5347 5348// CHECK-LABEL: define dso_local <2 x i32> @test_vqrshl_s32(5349// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5350// CHECK-NEXT:  [[ENTRY:.*:]]5351// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>5352// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>5353// CHECK-NEXT:    [[VQRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>5354// CHECK-NEXT:    [[VQRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>5355// CHECK-NEXT:    [[VQRSHL_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqrshl.v2i32(<2 x i32> [[VQRSHL_V_I]], <2 x i32> [[VQRSHL_V1_I]])5356// CHECK-NEXT:    [[VQRSHL_V3_I:%.*]] = bitcast <2 x i32> [[VQRSHL_V2_I]] to <8 x i8>5357// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQRSHL_V3_I]] to <2 x i32>5358// CHECK-NEXT:    ret <2 x i32> [[TMP2]]5359//5360int32x2_t test_vqrshl_s32(int32x2_t a, int32x2_t b) {5361  return vqrshl_s32(a, b);5362}5363 5364// CHECK-LABEL: define dso_local <1 x i64> @test_vqrshl_s64(5365// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5366// CHECK-NEXT:  [[ENTRY:.*:]]5367// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>5368// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>5369// CHECK-NEXT:    [[VQRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>5370// CHECK-NEXT:    [[VQRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>5371// CHECK-NEXT:    [[VQRSHL_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.sqrshl.v1i64(<1 x i64> [[VQRSHL_V_I]], <1 x i64> [[VQRSHL_V1_I]])5372// CHECK-NEXT:    [[VQRSHL_V3_I:%.*]] = bitcast <1 x i64> [[VQRSHL_V2_I]] to <8 x i8>5373// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQRSHL_V3_I]] to i645374// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 05375// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]5376//5377int64x1_t test_vqrshl_s64(int64x1_t a, int64x1_t b) {5378  return vqrshl_s64(a, b);5379}5380 5381// CHECK-LABEL: define dso_local <8 x i8> @test_vqrshl_u8(5382// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5383// CHECK-NEXT:  [[ENTRY:.*:]]5384// CHECK-NEXT:    [[VQRSHL_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqrshl.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])5385// CHECK-NEXT:    ret <8 x i8> [[VQRSHL_V_I]]5386//5387uint8x8_t test_vqrshl_u8(uint8x8_t a, int8x8_t b) {5388  return vqrshl_u8(a, b);5389}5390 5391// CHECK-LABEL: define dso_local <4 x i16> @test_vqrshl_u16(5392// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5393// CHECK-NEXT:  [[ENTRY:.*:]]5394// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>5395// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>5396// CHECK-NEXT:    [[VQRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>5397// CHECK-NEXT:    [[VQRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>5398// CHECK-NEXT:    [[VQRSHL_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqrshl.v4i16(<4 x i16> [[VQRSHL_V_I]], <4 x i16> [[VQRSHL_V1_I]])5399// CHECK-NEXT:    [[VQRSHL_V3_I:%.*]] = bitcast <4 x i16> [[VQRSHL_V2_I]] to <8 x i8>5400// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQRSHL_V3_I]] to <4 x i16>5401// CHECK-NEXT:    ret <4 x i16> [[TMP2]]5402//5403uint16x4_t test_vqrshl_u16(uint16x4_t a, int16x4_t b) {5404  return vqrshl_u16(a, b);5405}5406 5407// CHECK-LABEL: define dso_local <2 x i32> @test_vqrshl_u32(5408// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5409// CHECK-NEXT:  [[ENTRY:.*:]]5410// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>5411// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>5412// CHECK-NEXT:    [[VQRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>5413// CHECK-NEXT:    [[VQRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>5414// CHECK-NEXT:    [[VQRSHL_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqrshl.v2i32(<2 x i32> [[VQRSHL_V_I]], <2 x i32> [[VQRSHL_V1_I]])5415// CHECK-NEXT:    [[VQRSHL_V3_I:%.*]] = bitcast <2 x i32> [[VQRSHL_V2_I]] to <8 x i8>5416// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQRSHL_V3_I]] to <2 x i32>5417// CHECK-NEXT:    ret <2 x i32> [[TMP2]]5418//5419uint32x2_t test_vqrshl_u32(uint32x2_t a, int32x2_t b) {5420  return vqrshl_u32(a, b);5421}5422 5423// CHECK-LABEL: define dso_local <1 x i64> @test_vqrshl_u64(5424// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5425// CHECK-NEXT:  [[ENTRY:.*:]]5426// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>5427// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>5428// CHECK-NEXT:    [[VQRSHL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>5429// CHECK-NEXT:    [[VQRSHL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>5430// CHECK-NEXT:    [[VQRSHL_V2_I:%.*]] = call <1 x i64> @llvm.aarch64.neon.uqrshl.v1i64(<1 x i64> [[VQRSHL_V_I]], <1 x i64> [[VQRSHL_V1_I]])5431// CHECK-NEXT:    [[VQRSHL_V3_I:%.*]] = bitcast <1 x i64> [[VQRSHL_V2_I]] to <8 x i8>5432// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQRSHL_V3_I]] to i645433// CHECK-NEXT:    [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 05434// CHECK-NEXT:    ret <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]]5435//5436uint64x1_t test_vqrshl_u64(uint64x1_t a, int64x1_t b) {5437  return vqrshl_u64(a, b);5438}5439 5440// CHECK-LABEL: define dso_local <16 x i8> @test_vqrshlq_s8(5441// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5442// CHECK-NEXT:  [[ENTRY:.*:]]5443// CHECK-NEXT:    [[VQRSHLQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.sqrshl.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5444// CHECK-NEXT:    ret <16 x i8> [[VQRSHLQ_V_I]]5445//5446int8x16_t test_vqrshlq_s8(int8x16_t a, int8x16_t b) {5447  return vqrshlq_s8(a, b);5448}5449 5450// CHECK-LABEL: define dso_local <8 x i16> @test_vqrshlq_s16(5451// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5452// CHECK-NEXT:  [[ENTRY:.*:]]5453// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5454// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5455// CHECK-NEXT:    [[VQRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5456// CHECK-NEXT:    [[VQRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5457// CHECK-NEXT:    [[VQRSHLQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sqrshl.v8i16(<8 x i16> [[VQRSHLQ_V_I]], <8 x i16> [[VQRSHLQ_V1_I]])5458// CHECK-NEXT:    [[VQRSHLQ_V3_I:%.*]] = bitcast <8 x i16> [[VQRSHLQ_V2_I]] to <16 x i8>5459// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQRSHLQ_V3_I]] to <8 x i16>5460// CHECK-NEXT:    ret <8 x i16> [[TMP2]]5461//5462int16x8_t test_vqrshlq_s16(int16x8_t a, int16x8_t b) {5463  return vqrshlq_s16(a, b);5464}5465 5466// CHECK-LABEL: define dso_local <4 x i32> @test_vqrshlq_s32(5467// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5468// CHECK-NEXT:  [[ENTRY:.*:]]5469// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5470// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5471// CHECK-NEXT:    [[VQRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5472// CHECK-NEXT:    [[VQRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5473// CHECK-NEXT:    [[VQRSHLQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqrshl.v4i32(<4 x i32> [[VQRSHLQ_V_I]], <4 x i32> [[VQRSHLQ_V1_I]])5474// CHECK-NEXT:    [[VQRSHLQ_V3_I:%.*]] = bitcast <4 x i32> [[VQRSHLQ_V2_I]] to <16 x i8>5475// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQRSHLQ_V3_I]] to <4 x i32>5476// CHECK-NEXT:    ret <4 x i32> [[TMP2]]5477//5478int32x4_t test_vqrshlq_s32(int32x4_t a, int32x4_t b) {5479  return vqrshlq_s32(a, b);5480}5481 5482// CHECK-LABEL: define dso_local <2 x i64> @test_vqrshlq_s64(5483// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5484// CHECK-NEXT:  [[ENTRY:.*:]]5485// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>5486// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>5487// CHECK-NEXT:    [[VQRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>5488// CHECK-NEXT:    [[VQRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>5489// CHECK-NEXT:    [[VQRSHLQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqrshl.v2i64(<2 x i64> [[VQRSHLQ_V_I]], <2 x i64> [[VQRSHLQ_V1_I]])5490// CHECK-NEXT:    [[VQRSHLQ_V3_I:%.*]] = bitcast <2 x i64> [[VQRSHLQ_V2_I]] to <16 x i8>5491// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQRSHLQ_V3_I]] to <2 x i64>5492// CHECK-NEXT:    ret <2 x i64> [[TMP2]]5493//5494int64x2_t test_vqrshlq_s64(int64x2_t a, int64x2_t b) {5495  return vqrshlq_s64(a, b);5496}5497 5498// CHECK-LABEL: define dso_local <16 x i8> @test_vqrshlq_u8(5499// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5500// CHECK-NEXT:  [[ENTRY:.*:]]5501// CHECK-NEXT:    [[VQRSHLQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uqrshl.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5502// CHECK-NEXT:    ret <16 x i8> [[VQRSHLQ_V_I]]5503//5504uint8x16_t test_vqrshlq_u8(uint8x16_t a, int8x16_t b) {5505  return vqrshlq_u8(a, b);5506}5507 5508// CHECK-LABEL: define dso_local <8 x i16> @test_vqrshlq_u16(5509// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5510// CHECK-NEXT:  [[ENTRY:.*:]]5511// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5512// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5513// CHECK-NEXT:    [[VQRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5514// CHECK-NEXT:    [[VQRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5515// CHECK-NEXT:    [[VQRSHLQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uqrshl.v8i16(<8 x i16> [[VQRSHLQ_V_I]], <8 x i16> [[VQRSHLQ_V1_I]])5516// CHECK-NEXT:    [[VQRSHLQ_V3_I:%.*]] = bitcast <8 x i16> [[VQRSHLQ_V2_I]] to <16 x i8>5517// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQRSHLQ_V3_I]] to <8 x i16>5518// CHECK-NEXT:    ret <8 x i16> [[TMP2]]5519//5520uint16x8_t test_vqrshlq_u16(uint16x8_t a, int16x8_t b) {5521  return vqrshlq_u16(a, b);5522}5523 5524// CHECK-LABEL: define dso_local <4 x i32> @test_vqrshlq_u32(5525// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5526// CHECK-NEXT:  [[ENTRY:.*:]]5527// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5528// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5529// CHECK-NEXT:    [[VQRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5530// CHECK-NEXT:    [[VQRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5531// CHECK-NEXT:    [[VQRSHLQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uqrshl.v4i32(<4 x i32> [[VQRSHLQ_V_I]], <4 x i32> [[VQRSHLQ_V1_I]])5532// CHECK-NEXT:    [[VQRSHLQ_V3_I:%.*]] = bitcast <4 x i32> [[VQRSHLQ_V2_I]] to <16 x i8>5533// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQRSHLQ_V3_I]] to <4 x i32>5534// CHECK-NEXT:    ret <4 x i32> [[TMP2]]5535//5536uint32x4_t test_vqrshlq_u32(uint32x4_t a, int32x4_t b) {5537  return vqrshlq_u32(a, b);5538}5539 5540// CHECK-LABEL: define dso_local <2 x i64> @test_vqrshlq_u64(5541// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5542// CHECK-NEXT:  [[ENTRY:.*:]]5543// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>5544// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>5545// CHECK-NEXT:    [[VQRSHLQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>5546// CHECK-NEXT:    [[VQRSHLQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>5547// CHECK-NEXT:    [[VQRSHLQ_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.uqrshl.v2i64(<2 x i64> [[VQRSHLQ_V_I]], <2 x i64> [[VQRSHLQ_V1_I]])5548// CHECK-NEXT:    [[VQRSHLQ_V3_I:%.*]] = bitcast <2 x i64> [[VQRSHLQ_V2_I]] to <16 x i8>5549// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQRSHLQ_V3_I]] to <2 x i64>5550// CHECK-NEXT:    ret <2 x i64> [[TMP2]]5551//5552uint64x2_t test_vqrshlq_u64(uint64x2_t a, int64x2_t b) {5553  return vqrshlq_u64(a, b);5554}5555 5556// CHECK-LABEL: define dso_local <1 x i64> @test_vsli_n_p64(5557// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5558// CHECK-NEXT:  [[ENTRY:.*:]]5559// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>5560// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>5561// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>5562// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>5563// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsli.v1i64(<1 x i64> [[VSLI_N]], <1 x i64> [[VSLI_N1]], i32 0)5564// CHECK-NEXT:    ret <1 x i64> [[VSLI_N2]]5565//5566poly64x1_t test_vsli_n_p64(poly64x1_t a, poly64x1_t b) {5567  return vsli_n_p64(a, b, 0);5568}5569 5570// CHECK-LABEL: define dso_local <2 x i64> @test_vsliq_n_p64(5571// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {5572// CHECK-NEXT:  [[ENTRY:.*:]]5573// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>5574// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>5575// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>5576// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>5577// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <2 x i64> @llvm.aarch64.neon.vsli.v2i64(<2 x i64> [[VSLI_N]], <2 x i64> [[VSLI_N1]], i32 0)5578// CHECK-NEXT:    ret <2 x i64> [[VSLI_N2]]5579//5580poly64x2_t test_vsliq_n_p64(poly64x2_t a, poly64x2_t b) {5581  return vsliq_n_p64(a, b, 0);5582}5583 5584// CHECK-LABEL: define dso_local <8 x i8> @test_vmax_s8(5585// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5586// CHECK-NEXT:  [[ENTRY:.*:]]5587// CHECK-NEXT:    [[VMAX_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.smax.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])5588// CHECK-NEXT:    ret <8 x i8> [[VMAX_I]]5589//5590int8x8_t test_vmax_s8(int8x8_t a, int8x8_t b) {5591  return vmax_s8(a, b);5592}5593 5594// CHECK-LABEL: define dso_local <4 x i16> @test_vmax_s16(5595// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5596// CHECK-NEXT:  [[ENTRY:.*:]]5597// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>5598// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>5599// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>5600// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>5601// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.smax.v4i16(<4 x i16> [[VMAX_I]], <4 x i16> [[VMAX1_I]])5602// CHECK-NEXT:    ret <4 x i16> [[VMAX2_I]]5603//5604int16x4_t test_vmax_s16(int16x4_t a, int16x4_t b) {5605  return vmax_s16(a, b);5606}5607 5608// CHECK-LABEL: define dso_local <2 x i32> @test_vmax_s32(5609// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5610// CHECK-NEXT:  [[ENTRY:.*:]]5611// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>5612// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>5613// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>5614// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>5615// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.smax.v2i32(<2 x i32> [[VMAX_I]], <2 x i32> [[VMAX1_I]])5616// CHECK-NEXT:    ret <2 x i32> [[VMAX2_I]]5617//5618int32x2_t test_vmax_s32(int32x2_t a, int32x2_t b) {5619  return vmax_s32(a, b);5620}5621 5622// CHECK-LABEL: define dso_local <8 x i8> @test_vmax_u8(5623// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5624// CHECK-NEXT:  [[ENTRY:.*:]]5625// CHECK-NEXT:    [[VMAX_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.umax.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])5626// CHECK-NEXT:    ret <8 x i8> [[VMAX_I]]5627//5628uint8x8_t test_vmax_u8(uint8x8_t a, uint8x8_t b) {5629  return vmax_u8(a, b);5630}5631 5632// CHECK-LABEL: define dso_local <4 x i16> @test_vmax_u16(5633// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5634// CHECK-NEXT:  [[ENTRY:.*:]]5635// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>5636// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>5637// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>5638// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>5639// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.umax.v4i16(<4 x i16> [[VMAX_I]], <4 x i16> [[VMAX1_I]])5640// CHECK-NEXT:    ret <4 x i16> [[VMAX2_I]]5641//5642uint16x4_t test_vmax_u16(uint16x4_t a, uint16x4_t b) {5643  return vmax_u16(a, b);5644}5645 5646// CHECK-LABEL: define dso_local <2 x i32> @test_vmax_u32(5647// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5648// CHECK-NEXT:  [[ENTRY:.*:]]5649// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>5650// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>5651// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>5652// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>5653// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.umax.v2i32(<2 x i32> [[VMAX_I]], <2 x i32> [[VMAX1_I]])5654// CHECK-NEXT:    ret <2 x i32> [[VMAX2_I]]5655//5656uint32x2_t test_vmax_u32(uint32x2_t a, uint32x2_t b) {5657  return vmax_u32(a, b);5658}5659 5660// CHECK-LABEL: define dso_local <2 x float> @test_vmax_f32(5661// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {5662// CHECK-NEXT:  [[ENTRY:.*:]]5663// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>5664// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>5665// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>5666// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>5667// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>5668// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>5669// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fmax.v2f32(<2 x float> [[VMAX_I]], <2 x float> [[VMAX1_I]])5670// CHECK-NEXT:    ret <2 x float> [[VMAX2_I]]5671//5672float32x2_t test_vmax_f32(float32x2_t a, float32x2_t b) {5673  return vmax_f32(a, b);5674}5675 5676// CHECK-LABEL: define dso_local <16 x i8> @test_vmaxq_s8(5677// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5678// CHECK-NEXT:  [[ENTRY:.*:]]5679// CHECK-NEXT:    [[VMAX_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.smax.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5680// CHECK-NEXT:    ret <16 x i8> [[VMAX_I]]5681//5682int8x16_t test_vmaxq_s8(int8x16_t a, int8x16_t b) {5683  return vmaxq_s8(a, b);5684}5685 5686// CHECK-LABEL: define dso_local <8 x i16> @test_vmaxq_s16(5687// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5688// CHECK-NEXT:  [[ENTRY:.*:]]5689// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5690// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5691// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5692// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5693// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smax.v8i16(<8 x i16> [[VMAX_I]], <8 x i16> [[VMAX1_I]])5694// CHECK-NEXT:    ret <8 x i16> [[VMAX2_I]]5695//5696int16x8_t test_vmaxq_s16(int16x8_t a, int16x8_t b) {5697  return vmaxq_s16(a, b);5698}5699 5700// CHECK-LABEL: define dso_local <4 x i32> @test_vmaxq_s32(5701// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5702// CHECK-NEXT:  [[ENTRY:.*:]]5703// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5704// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5705// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5706// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5707// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smax.v4i32(<4 x i32> [[VMAX_I]], <4 x i32> [[VMAX1_I]])5708// CHECK-NEXT:    ret <4 x i32> [[VMAX2_I]]5709//5710int32x4_t test_vmaxq_s32(int32x4_t a, int32x4_t b) {5711  return vmaxq_s32(a, b);5712}5713 5714// CHECK-LABEL: define dso_local <16 x i8> @test_vmaxq_u8(5715// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5716// CHECK-NEXT:  [[ENTRY:.*:]]5717// CHECK-NEXT:    [[VMAX_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.umax.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5718// CHECK-NEXT:    ret <16 x i8> [[VMAX_I]]5719//5720uint8x16_t test_vmaxq_u8(uint8x16_t a, uint8x16_t b) {5721  return vmaxq_u8(a, b);5722}5723 5724// CHECK-LABEL: define dso_local <8 x i16> @test_vmaxq_u16(5725// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5726// CHECK-NEXT:  [[ENTRY:.*:]]5727// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5728// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5729// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5730// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5731// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umax.v8i16(<8 x i16> [[VMAX_I]], <8 x i16> [[VMAX1_I]])5732// CHECK-NEXT:    ret <8 x i16> [[VMAX2_I]]5733//5734uint16x8_t test_vmaxq_u16(uint16x8_t a, uint16x8_t b) {5735  return vmaxq_u16(a, b);5736}5737 5738// CHECK-LABEL: define dso_local <4 x i32> @test_vmaxq_u32(5739// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5740// CHECK-NEXT:  [[ENTRY:.*:]]5741// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5742// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5743// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5744// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5745// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umax.v4i32(<4 x i32> [[VMAX_I]], <4 x i32> [[VMAX1_I]])5746// CHECK-NEXT:    ret <4 x i32> [[VMAX2_I]]5747//5748uint32x4_t test_vmaxq_u32(uint32x4_t a, uint32x4_t b) {5749  return vmaxq_u32(a, b);5750}5751 5752// CHECK-LABEL: define dso_local <4 x float> @test_vmaxq_f32(5753// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {5754// CHECK-NEXT:  [[ENTRY:.*:]]5755// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>5756// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>5757// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>5758// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>5759// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>5760// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>5761// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> [[VMAX_I]], <4 x float> [[VMAX1_I]])5762// CHECK-NEXT:    ret <4 x float> [[VMAX2_I]]5763//5764float32x4_t test_vmaxq_f32(float32x4_t a, float32x4_t b) {5765  return vmaxq_f32(a, b);5766}5767 5768// CHECK-LABEL: define dso_local <2 x double> @test_vmaxq_f64(5769// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {5770// CHECK-NEXT:  [[ENTRY:.*:]]5771// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>5772// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>5773// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>5774// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>5775// CHECK-NEXT:    [[VMAX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>5776// CHECK-NEXT:    [[VMAX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>5777// CHECK-NEXT:    [[VMAX2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fmax.v2f64(<2 x double> [[VMAX_I]], <2 x double> [[VMAX1_I]])5778// CHECK-NEXT:    ret <2 x double> [[VMAX2_I]]5779//5780float64x2_t test_vmaxq_f64(float64x2_t a, float64x2_t b) {5781  return vmaxq_f64(a, b);5782}5783 5784// CHECK-LABEL: define dso_local <8 x i8> @test_vmin_s8(5785// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5786// CHECK-NEXT:  [[ENTRY:.*:]]5787// CHECK-NEXT:    [[VMIN_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.smin.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])5788// CHECK-NEXT:    ret <8 x i8> [[VMIN_I]]5789//5790int8x8_t test_vmin_s8(int8x8_t a, int8x8_t b) {5791  return vmin_s8(a, b);5792}5793 5794// CHECK-LABEL: define dso_local <4 x i16> @test_vmin_s16(5795// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5796// CHECK-NEXT:  [[ENTRY:.*:]]5797// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>5798// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>5799// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>5800// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>5801// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.smin.v4i16(<4 x i16> [[VMIN_I]], <4 x i16> [[VMIN1_I]])5802// CHECK-NEXT:    ret <4 x i16> [[VMIN2_I]]5803//5804int16x4_t test_vmin_s16(int16x4_t a, int16x4_t b) {5805  return vmin_s16(a, b);5806}5807 5808// CHECK-LABEL: define dso_local <2 x i32> @test_vmin_s32(5809// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5810// CHECK-NEXT:  [[ENTRY:.*:]]5811// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>5812// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>5813// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>5814// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>5815// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.smin.v2i32(<2 x i32> [[VMIN_I]], <2 x i32> [[VMIN1_I]])5816// CHECK-NEXT:    ret <2 x i32> [[VMIN2_I]]5817//5818int32x2_t test_vmin_s32(int32x2_t a, int32x2_t b) {5819  return vmin_s32(a, b);5820}5821 5822// CHECK-LABEL: define dso_local <8 x i8> @test_vmin_u8(5823// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5824// CHECK-NEXT:  [[ENTRY:.*:]]5825// CHECK-NEXT:    [[VMIN_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.umin.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])5826// CHECK-NEXT:    ret <8 x i8> [[VMIN_I]]5827//5828uint8x8_t test_vmin_u8(uint8x8_t a, uint8x8_t b) {5829  return vmin_u8(a, b);5830}5831 5832// CHECK-LABEL: define dso_local <4 x i16> @test_vmin_u16(5833// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5834// CHECK-NEXT:  [[ENTRY:.*:]]5835// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>5836// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>5837// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>5838// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>5839// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.umin.v4i16(<4 x i16> [[VMIN_I]], <4 x i16> [[VMIN1_I]])5840// CHECK-NEXT:    ret <4 x i16> [[VMIN2_I]]5841//5842uint16x4_t test_vmin_u16(uint16x4_t a, uint16x4_t b) {5843  return vmin_u16(a, b);5844}5845 5846// CHECK-LABEL: define dso_local <2 x i32> @test_vmin_u32(5847// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5848// CHECK-NEXT:  [[ENTRY:.*:]]5849// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>5850// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>5851// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>5852// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>5853// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.umin.v2i32(<2 x i32> [[VMIN_I]], <2 x i32> [[VMIN1_I]])5854// CHECK-NEXT:    ret <2 x i32> [[VMIN2_I]]5855//5856uint32x2_t test_vmin_u32(uint32x2_t a, uint32x2_t b) {5857  return vmin_u32(a, b);5858}5859 5860// CHECK-LABEL: define dso_local <2 x float> @test_vmin_f32(5861// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {5862// CHECK-NEXT:  [[ENTRY:.*:]]5863// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>5864// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>5865// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>5866// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>5867// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>5868// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>5869// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fmin.v2f32(<2 x float> [[VMIN_I]], <2 x float> [[VMIN1_I]])5870// CHECK-NEXT:    ret <2 x float> [[VMIN2_I]]5871//5872float32x2_t test_vmin_f32(float32x2_t a, float32x2_t b) {5873  return vmin_f32(a, b);5874}5875 5876// CHECK-LABEL: define dso_local <16 x i8> @test_vminq_s8(5877// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5878// CHECK-NEXT:  [[ENTRY:.*:]]5879// CHECK-NEXT:    [[VMIN_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.smin.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5880// CHECK-NEXT:    ret <16 x i8> [[VMIN_I]]5881//5882int8x16_t test_vminq_s8(int8x16_t a, int8x16_t b) {5883  return vminq_s8(a, b);5884}5885 5886// CHECK-LABEL: define dso_local <8 x i16> @test_vminq_s16(5887// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5888// CHECK-NEXT:  [[ENTRY:.*:]]5889// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5890// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5891// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5892// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5893// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smin.v8i16(<8 x i16> [[VMIN_I]], <8 x i16> [[VMIN1_I]])5894// CHECK-NEXT:    ret <8 x i16> [[VMIN2_I]]5895//5896int16x8_t test_vminq_s16(int16x8_t a, int16x8_t b) {5897  return vminq_s16(a, b);5898}5899 5900// CHECK-LABEL: define dso_local <4 x i32> @test_vminq_s32(5901// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5902// CHECK-NEXT:  [[ENTRY:.*:]]5903// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5904// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5905// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5906// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5907// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smin.v4i32(<4 x i32> [[VMIN_I]], <4 x i32> [[VMIN1_I]])5908// CHECK-NEXT:    ret <4 x i32> [[VMIN2_I]]5909//5910int32x4_t test_vminq_s32(int32x4_t a, int32x4_t b) {5911  return vminq_s32(a, b);5912}5913 5914// CHECK-LABEL: define dso_local <16 x i8> @test_vminq_u8(5915// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {5916// CHECK-NEXT:  [[ENTRY:.*:]]5917// CHECK-NEXT:    [[VMIN_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.umin.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])5918// CHECK-NEXT:    ret <16 x i8> [[VMIN_I]]5919//5920uint8x16_t test_vminq_u8(uint8x16_t a, uint8x16_t b) {5921  return vminq_u8(a, b);5922}5923 5924// CHECK-LABEL: define dso_local <8 x i16> @test_vminq_u16(5925// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {5926// CHECK-NEXT:  [[ENTRY:.*:]]5927// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>5928// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>5929// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>5930// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>5931// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umin.v8i16(<8 x i16> [[VMIN_I]], <8 x i16> [[VMIN1_I]])5932// CHECK-NEXT:    ret <8 x i16> [[VMIN2_I]]5933//5934uint16x8_t test_vminq_u16(uint16x8_t a, uint16x8_t b) {5935  return vminq_u16(a, b);5936}5937 5938// CHECK-LABEL: define dso_local <4 x i32> @test_vminq_u32(5939// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {5940// CHECK-NEXT:  [[ENTRY:.*:]]5941// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>5942// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>5943// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>5944// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>5945// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umin.v4i32(<4 x i32> [[VMIN_I]], <4 x i32> [[VMIN1_I]])5946// CHECK-NEXT:    ret <4 x i32> [[VMIN2_I]]5947//5948uint32x4_t test_vminq_u32(uint32x4_t a, uint32x4_t b) {5949  return vminq_u32(a, b);5950}5951 5952// CHECK-LABEL: define dso_local <4 x float> @test_vminq_f32(5953// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {5954// CHECK-NEXT:  [[ENTRY:.*:]]5955// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>5956// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>5957// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>5958// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>5959// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>5960// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>5961// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> [[VMIN_I]], <4 x float> [[VMIN1_I]])5962// CHECK-NEXT:    ret <4 x float> [[VMIN2_I]]5963//5964float32x4_t test_vminq_f32(float32x4_t a, float32x4_t b) {5965  return vminq_f32(a, b);5966}5967 5968// CHECK-LABEL: define dso_local <2 x double> @test_vminq_f64(5969// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {5970// CHECK-NEXT:  [[ENTRY:.*:]]5971// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>5972// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>5973// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>5974// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>5975// CHECK-NEXT:    [[VMIN_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>5976// CHECK-NEXT:    [[VMIN1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>5977// CHECK-NEXT:    [[VMIN2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fmin.v2f64(<2 x double> [[VMIN_I]], <2 x double> [[VMIN1_I]])5978// CHECK-NEXT:    ret <2 x double> [[VMIN2_I]]5979//5980float64x2_t test_vminq_f64(float64x2_t a, float64x2_t b) {5981  return vminq_f64(a, b);5982}5983 5984// CHECK-LABEL: define dso_local <2 x float> @test_vmaxnm_f32(5985// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {5986// CHECK-NEXT:  [[ENTRY:.*:]]5987// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>5988// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>5989// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>5990// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>5991// CHECK-NEXT:    [[VMAXNM_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>5992// CHECK-NEXT:    [[VMAXNM1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>5993// CHECK-NEXT:    [[VMAXNM2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float> [[VMAXNM_I]], <2 x float> [[VMAXNM1_I]])5994// CHECK-NEXT:    ret <2 x float> [[VMAXNM2_I]]5995//5996float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) {5997  return vmaxnm_f32(a, b);5998}5999 6000// CHECK-LABEL: define dso_local <4 x float> @test_vmaxnmq_f32(6001// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {6002// CHECK-NEXT:  [[ENTRY:.*:]]6003// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>6004// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>6005// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>6006// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>6007// CHECK-NEXT:    [[VMAXNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>6008// CHECK-NEXT:    [[VMAXNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>6009// CHECK-NEXT:    [[VMAXNM2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float> [[VMAXNM_I]], <4 x float> [[VMAXNM1_I]])6010// CHECK-NEXT:    ret <4 x float> [[VMAXNM2_I]]6011//6012float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) {6013  return vmaxnmq_f32(a, b);6014}6015 6016// CHECK-LABEL: define dso_local <2 x double> @test_vmaxnmq_f64(6017// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {6018// CHECK-NEXT:  [[ENTRY:.*:]]6019// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>6020// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>6021// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>6022// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>6023// CHECK-NEXT:    [[VMAXNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>6024// CHECK-NEXT:    [[VMAXNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>6025// CHECK-NEXT:    [[VMAXNM2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double> [[VMAXNM_I]], <2 x double> [[VMAXNM1_I]])6026// CHECK-NEXT:    ret <2 x double> [[VMAXNM2_I]]6027//6028float64x2_t test_vmaxnmq_f64(float64x2_t a, float64x2_t b) {6029  return vmaxnmq_f64(a, b);6030}6031 6032// CHECK-LABEL: define dso_local <2 x float> @test_vminnm_f32(6033// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {6034// CHECK-NEXT:  [[ENTRY:.*:]]6035// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>6036// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>6037// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>6038// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>6039// CHECK-NEXT:    [[VMINNM_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>6040// CHECK-NEXT:    [[VMINNM1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>6041// CHECK-NEXT:    [[VMINNM2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float> [[VMINNM_I]], <2 x float> [[VMINNM1_I]])6042// CHECK-NEXT:    ret <2 x float> [[VMINNM2_I]]6043//6044float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) {6045  return vminnm_f32(a, b);6046}6047 6048// CHECK-LABEL: define dso_local <4 x float> @test_vminnmq_f32(6049// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {6050// CHECK-NEXT:  [[ENTRY:.*:]]6051// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>6052// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>6053// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>6054// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>6055// CHECK-NEXT:    [[VMINNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>6056// CHECK-NEXT:    [[VMINNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>6057// CHECK-NEXT:    [[VMINNM2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float> [[VMINNM_I]], <4 x float> [[VMINNM1_I]])6058// CHECK-NEXT:    ret <4 x float> [[VMINNM2_I]]6059//6060float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) {6061  return vminnmq_f32(a, b);6062}6063 6064// CHECK-LABEL: define dso_local <2 x double> @test_vminnmq_f64(6065// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {6066// CHECK-NEXT:  [[ENTRY:.*:]]6067// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>6068// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>6069// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>6070// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>6071// CHECK-NEXT:    [[VMINNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>6072// CHECK-NEXT:    [[VMINNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>6073// CHECK-NEXT:    [[VMINNM2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double> [[VMINNM_I]], <2 x double> [[VMINNM1_I]])6074// CHECK-NEXT:    ret <2 x double> [[VMINNM2_I]]6075//6076float64x2_t test_vminnmq_f64(float64x2_t a, float64x2_t b) {6077  return vminnmq_f64(a, b);6078}6079 6080// CHECK-LABEL: define dso_local <8 x i8> @test_vpmax_s8(6081// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6082// CHECK-NEXT:  [[ENTRY:.*:]]6083// CHECK-NEXT:    [[VPMAX_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.smaxp.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])6084// CHECK-NEXT:    ret <8 x i8> [[VPMAX_I]]6085//6086int8x8_t test_vpmax_s8(int8x8_t a, int8x8_t b) {6087  return vpmax_s8(a, b);6088}6089 6090// CHECK-LABEL: define dso_local <4 x i16> @test_vpmax_s16(6091// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6092// CHECK-NEXT:  [[ENTRY:.*:]]6093// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6094// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>6095// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6096// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>6097// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.smaxp.v4i16(<4 x i16> [[VPMAX_I]], <4 x i16> [[VPMAX1_I]])6098// CHECK-NEXT:    ret <4 x i16> [[VPMAX2_I]]6099//6100int16x4_t test_vpmax_s16(int16x4_t a, int16x4_t b) {6101  return vpmax_s16(a, b);6102}6103 6104// CHECK-LABEL: define dso_local <2 x i32> @test_vpmax_s32(6105// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6106// CHECK-NEXT:  [[ENTRY:.*:]]6107// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>6108// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>6109// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>6110// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>6111// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.smaxp.v2i32(<2 x i32> [[VPMAX_I]], <2 x i32> [[VPMAX1_I]])6112// CHECK-NEXT:    ret <2 x i32> [[VPMAX2_I]]6113//6114int32x2_t test_vpmax_s32(int32x2_t a, int32x2_t b) {6115  return vpmax_s32(a, b);6116}6117 6118// CHECK-LABEL: define dso_local <8 x i8> @test_vpmax_u8(6119// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6120// CHECK-NEXT:  [[ENTRY:.*:]]6121// CHECK-NEXT:    [[VPMAX_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.umaxp.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])6122// CHECK-NEXT:    ret <8 x i8> [[VPMAX_I]]6123//6124uint8x8_t test_vpmax_u8(uint8x8_t a, uint8x8_t b) {6125  return vpmax_u8(a, b);6126}6127 6128// CHECK-LABEL: define dso_local <4 x i16> @test_vpmax_u16(6129// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6130// CHECK-NEXT:  [[ENTRY:.*:]]6131// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6132// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>6133// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6134// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>6135// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.umaxp.v4i16(<4 x i16> [[VPMAX_I]], <4 x i16> [[VPMAX1_I]])6136// CHECK-NEXT:    ret <4 x i16> [[VPMAX2_I]]6137//6138uint16x4_t test_vpmax_u16(uint16x4_t a, uint16x4_t b) {6139  return vpmax_u16(a, b);6140}6141 6142// CHECK-LABEL: define dso_local <2 x i32> @test_vpmax_u32(6143// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6144// CHECK-NEXT:  [[ENTRY:.*:]]6145// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>6146// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>6147// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>6148// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>6149// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.umaxp.v2i32(<2 x i32> [[VPMAX_I]], <2 x i32> [[VPMAX1_I]])6150// CHECK-NEXT:    ret <2 x i32> [[VPMAX2_I]]6151//6152uint32x2_t test_vpmax_u32(uint32x2_t a, uint32x2_t b) {6153  return vpmax_u32(a, b);6154}6155 6156// CHECK-LABEL: define dso_local <2 x float> @test_vpmax_f32(6157// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {6158// CHECK-NEXT:  [[ENTRY:.*:]]6159// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>6160// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>6161// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>6162// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>6163// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>6164// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>6165// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fmaxp.v2f32(<2 x float> [[VPMAX_I]], <2 x float> [[VPMAX1_I]])6166// CHECK-NEXT:    ret <2 x float> [[VPMAX2_I]]6167//6168float32x2_t test_vpmax_f32(float32x2_t a, float32x2_t b) {6169  return vpmax_f32(a, b);6170}6171 6172// CHECK-LABEL: define dso_local <16 x i8> @test_vpmaxq_s8(6173// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6174// CHECK-NEXT:  [[ENTRY:.*:]]6175// CHECK-NEXT:    [[VPMAX_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.smaxp.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])6176// CHECK-NEXT:    ret <16 x i8> [[VPMAX_I]]6177//6178int8x16_t test_vpmaxq_s8(int8x16_t a, int8x16_t b) {6179  return vpmaxq_s8(a, b);6180}6181 6182// CHECK-LABEL: define dso_local <8 x i16> @test_vpmaxq_s16(6183// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6184// CHECK-NEXT:  [[ENTRY:.*:]]6185// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>6186// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>6187// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>6188// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>6189// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smaxp.v8i16(<8 x i16> [[VPMAX_I]], <8 x i16> [[VPMAX1_I]])6190// CHECK-NEXT:    ret <8 x i16> [[VPMAX2_I]]6191//6192int16x8_t test_vpmaxq_s16(int16x8_t a, int16x8_t b) {6193  return vpmaxq_s16(a, b);6194}6195 6196// CHECK-LABEL: define dso_local <4 x i32> @test_vpmaxq_s32(6197// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6198// CHECK-NEXT:  [[ENTRY:.*:]]6199// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>6200// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>6201// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>6202// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>6203// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smaxp.v4i32(<4 x i32> [[VPMAX_I]], <4 x i32> [[VPMAX1_I]])6204// CHECK-NEXT:    ret <4 x i32> [[VPMAX2_I]]6205//6206int32x4_t test_vpmaxq_s32(int32x4_t a, int32x4_t b) {6207  return vpmaxq_s32(a, b);6208}6209 6210// CHECK-LABEL: define dso_local <16 x i8> @test_vpmaxq_u8(6211// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6212// CHECK-NEXT:  [[ENTRY:.*:]]6213// CHECK-NEXT:    [[VPMAX_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.umaxp.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])6214// CHECK-NEXT:    ret <16 x i8> [[VPMAX_I]]6215//6216uint8x16_t test_vpmaxq_u8(uint8x16_t a, uint8x16_t b) {6217  return vpmaxq_u8(a, b);6218}6219 6220// CHECK-LABEL: define dso_local <8 x i16> @test_vpmaxq_u16(6221// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6222// CHECK-NEXT:  [[ENTRY:.*:]]6223// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>6224// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>6225// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>6226// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>6227// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umaxp.v8i16(<8 x i16> [[VPMAX_I]], <8 x i16> [[VPMAX1_I]])6228// CHECK-NEXT:    ret <8 x i16> [[VPMAX2_I]]6229//6230uint16x8_t test_vpmaxq_u16(uint16x8_t a, uint16x8_t b) {6231  return vpmaxq_u16(a, b);6232}6233 6234// CHECK-LABEL: define dso_local <4 x i32> @test_vpmaxq_u32(6235// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6236// CHECK-NEXT:  [[ENTRY:.*:]]6237// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>6238// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>6239// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>6240// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>6241// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umaxp.v4i32(<4 x i32> [[VPMAX_I]], <4 x i32> [[VPMAX1_I]])6242// CHECK-NEXT:    ret <4 x i32> [[VPMAX2_I]]6243//6244uint32x4_t test_vpmaxq_u32(uint32x4_t a, uint32x4_t b) {6245  return vpmaxq_u32(a, b);6246}6247 6248// CHECK-LABEL: define dso_local <4 x float> @test_vpmaxq_f32(6249// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {6250// CHECK-NEXT:  [[ENTRY:.*:]]6251// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>6252// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>6253// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>6254// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>6255// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>6256// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>6257// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fmaxp.v4f32(<4 x float> [[VPMAX_I]], <4 x float> [[VPMAX1_I]])6258// CHECK-NEXT:    ret <4 x float> [[VPMAX2_I]]6259//6260float32x4_t test_vpmaxq_f32(float32x4_t a, float32x4_t b) {6261  return vpmaxq_f32(a, b);6262}6263 6264// CHECK-LABEL: define dso_local <2 x double> @test_vpmaxq_f64(6265// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {6266// CHECK-NEXT:  [[ENTRY:.*:]]6267// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>6268// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>6269// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>6270// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>6271// CHECK-NEXT:    [[VPMAX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>6272// CHECK-NEXT:    [[VPMAX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>6273// CHECK-NEXT:    [[VPMAX2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fmaxp.v2f64(<2 x double> [[VPMAX_I]], <2 x double> [[VPMAX1_I]])6274// CHECK-NEXT:    ret <2 x double> [[VPMAX2_I]]6275//6276float64x2_t test_vpmaxq_f64(float64x2_t a, float64x2_t b) {6277  return vpmaxq_f64(a, b);6278}6279 6280// CHECK-LABEL: define dso_local <8 x i8> @test_vpmin_s8(6281// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6282// CHECK-NEXT:  [[ENTRY:.*:]]6283// CHECK-NEXT:    [[VPMIN_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sminp.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])6284// CHECK-NEXT:    ret <8 x i8> [[VPMIN_I]]6285//6286int8x8_t test_vpmin_s8(int8x8_t a, int8x8_t b) {6287  return vpmin_s8(a, b);6288}6289 6290// CHECK-LABEL: define dso_local <4 x i16> @test_vpmin_s16(6291// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6292// CHECK-NEXT:  [[ENTRY:.*:]]6293// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6294// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>6295// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6296// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>6297// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sminp.v4i16(<4 x i16> [[VPMIN_I]], <4 x i16> [[VPMIN1_I]])6298// CHECK-NEXT:    ret <4 x i16> [[VPMIN2_I]]6299//6300int16x4_t test_vpmin_s16(int16x4_t a, int16x4_t b) {6301  return vpmin_s16(a, b);6302}6303 6304// CHECK-LABEL: define dso_local <2 x i32> @test_vpmin_s32(6305// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6306// CHECK-NEXT:  [[ENTRY:.*:]]6307// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>6308// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>6309// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>6310// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>6311// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sminp.v2i32(<2 x i32> [[VPMIN_I]], <2 x i32> [[VPMIN1_I]])6312// CHECK-NEXT:    ret <2 x i32> [[VPMIN2_I]]6313//6314int32x2_t test_vpmin_s32(int32x2_t a, int32x2_t b) {6315  return vpmin_s32(a, b);6316}6317 6318// CHECK-LABEL: define dso_local <8 x i8> @test_vpmin_u8(6319// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6320// CHECK-NEXT:  [[ENTRY:.*:]]6321// CHECK-NEXT:    [[VPMIN_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uminp.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])6322// CHECK-NEXT:    ret <8 x i8> [[VPMIN_I]]6323//6324uint8x8_t test_vpmin_u8(uint8x8_t a, uint8x8_t b) {6325  return vpmin_u8(a, b);6326}6327 6328// CHECK-LABEL: define dso_local <4 x i16> @test_vpmin_u16(6329// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6330// CHECK-NEXT:  [[ENTRY:.*:]]6331// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6332// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>6333// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6334// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>6335// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uminp.v4i16(<4 x i16> [[VPMIN_I]], <4 x i16> [[VPMIN1_I]])6336// CHECK-NEXT:    ret <4 x i16> [[VPMIN2_I]]6337//6338uint16x4_t test_vpmin_u16(uint16x4_t a, uint16x4_t b) {6339  return vpmin_u16(a, b);6340}6341 6342// CHECK-LABEL: define dso_local <2 x i32> @test_vpmin_u32(6343// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6344// CHECK-NEXT:  [[ENTRY:.*:]]6345// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>6346// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>6347// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>6348// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>6349// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uminp.v2i32(<2 x i32> [[VPMIN_I]], <2 x i32> [[VPMIN1_I]])6350// CHECK-NEXT:    ret <2 x i32> [[VPMIN2_I]]6351//6352uint32x2_t test_vpmin_u32(uint32x2_t a, uint32x2_t b) {6353  return vpmin_u32(a, b);6354}6355 6356// CHECK-LABEL: define dso_local <2 x float> @test_vpmin_f32(6357// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {6358// CHECK-NEXT:  [[ENTRY:.*:]]6359// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>6360// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>6361// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>6362// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>6363// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>6364// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>6365// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fminp.v2f32(<2 x float> [[VPMIN_I]], <2 x float> [[VPMIN1_I]])6366// CHECK-NEXT:    ret <2 x float> [[VPMIN2_I]]6367//6368float32x2_t test_vpmin_f32(float32x2_t a, float32x2_t b) {6369  return vpmin_f32(a, b);6370}6371 6372// CHECK-LABEL: define dso_local <16 x i8> @test_vpminq_s8(6373// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6374// CHECK-NEXT:  [[ENTRY:.*:]]6375// CHECK-NEXT:    [[VPMIN_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.sminp.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])6376// CHECK-NEXT:    ret <16 x i8> [[VPMIN_I]]6377//6378int8x16_t test_vpminq_s8(int8x16_t a, int8x16_t b) {6379  return vpminq_s8(a, b);6380}6381 6382// CHECK-LABEL: define dso_local <8 x i16> @test_vpminq_s16(6383// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6384// CHECK-NEXT:  [[ENTRY:.*:]]6385// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>6386// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>6387// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>6388// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>6389// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sminp.v8i16(<8 x i16> [[VPMIN_I]], <8 x i16> [[VPMIN1_I]])6390// CHECK-NEXT:    ret <8 x i16> [[VPMIN2_I]]6391//6392int16x8_t test_vpminq_s16(int16x8_t a, int16x8_t b) {6393  return vpminq_s16(a, b);6394}6395 6396// CHECK-LABEL: define dso_local <4 x i32> @test_vpminq_s32(6397// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6398// CHECK-NEXT:  [[ENTRY:.*:]]6399// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>6400// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>6401// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>6402// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>6403// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sminp.v4i32(<4 x i32> [[VPMIN_I]], <4 x i32> [[VPMIN1_I]])6404// CHECK-NEXT:    ret <4 x i32> [[VPMIN2_I]]6405//6406int32x4_t test_vpminq_s32(int32x4_t a, int32x4_t b) {6407  return vpminq_s32(a, b);6408}6409 6410// CHECK-LABEL: define dso_local <16 x i8> @test_vpminq_u8(6411// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6412// CHECK-NEXT:  [[ENTRY:.*:]]6413// CHECK-NEXT:    [[VPMIN_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.uminp.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])6414// CHECK-NEXT:    ret <16 x i8> [[VPMIN_I]]6415//6416uint8x16_t test_vpminq_u8(uint8x16_t a, uint8x16_t b) {6417  return vpminq_u8(a, b);6418}6419 6420// CHECK-LABEL: define dso_local <8 x i16> @test_vpminq_u16(6421// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6422// CHECK-NEXT:  [[ENTRY:.*:]]6423// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>6424// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>6425// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>6426// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>6427// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.uminp.v8i16(<8 x i16> [[VPMIN_I]], <8 x i16> [[VPMIN1_I]])6428// CHECK-NEXT:    ret <8 x i16> [[VPMIN2_I]]6429//6430uint16x8_t test_vpminq_u16(uint16x8_t a, uint16x8_t b) {6431  return vpminq_u16(a, b);6432}6433 6434// CHECK-LABEL: define dso_local <4 x i32> @test_vpminq_u32(6435// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6436// CHECK-NEXT:  [[ENTRY:.*:]]6437// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>6438// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>6439// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>6440// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>6441// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.uminp.v4i32(<4 x i32> [[VPMIN_I]], <4 x i32> [[VPMIN1_I]])6442// CHECK-NEXT:    ret <4 x i32> [[VPMIN2_I]]6443//6444uint32x4_t test_vpminq_u32(uint32x4_t a, uint32x4_t b) {6445  return vpminq_u32(a, b);6446}6447 6448// CHECK-LABEL: define dso_local <4 x float> @test_vpminq_f32(6449// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {6450// CHECK-NEXT:  [[ENTRY:.*:]]6451// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>6452// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>6453// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>6454// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>6455// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>6456// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>6457// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fminp.v4f32(<4 x float> [[VPMIN_I]], <4 x float> [[VPMIN1_I]])6458// CHECK-NEXT:    ret <4 x float> [[VPMIN2_I]]6459//6460float32x4_t test_vpminq_f32(float32x4_t a, float32x4_t b) {6461  return vpminq_f32(a, b);6462}6463 6464// CHECK-LABEL: define dso_local <2 x double> @test_vpminq_f64(6465// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {6466// CHECK-NEXT:  [[ENTRY:.*:]]6467// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>6468// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>6469// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>6470// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>6471// CHECK-NEXT:    [[VPMIN_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>6472// CHECK-NEXT:    [[VPMIN1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>6473// CHECK-NEXT:    [[VPMIN2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fminp.v2f64(<2 x double> [[VPMIN_I]], <2 x double> [[VPMIN1_I]])6474// CHECK-NEXT:    ret <2 x double> [[VPMIN2_I]]6475//6476float64x2_t test_vpminq_f64(float64x2_t a, float64x2_t b) {6477  return vpminq_f64(a, b);6478}6479 6480// CHECK-LABEL: define dso_local <2 x float> @test_vpmaxnm_f32(6481// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {6482// CHECK-NEXT:  [[ENTRY:.*:]]6483// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>6484// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>6485// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>6486// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>6487// CHECK-NEXT:    [[VPMAXNM_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>6488// CHECK-NEXT:    [[VPMAXNM1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>6489// CHECK-NEXT:    [[VPMAXNM2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fmaxnmp.v2f32(<2 x float> [[VPMAXNM_I]], <2 x float> [[VPMAXNM1_I]])6490// CHECK-NEXT:    ret <2 x float> [[VPMAXNM2_I]]6491//6492float32x2_t test_vpmaxnm_f32(float32x2_t a, float32x2_t b) {6493  return vpmaxnm_f32(a, b);6494}6495 6496// CHECK-LABEL: define dso_local <4 x float> @test_vpmaxnmq_f32(6497// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {6498// CHECK-NEXT:  [[ENTRY:.*:]]6499// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>6500// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>6501// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>6502// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>6503// CHECK-NEXT:    [[VPMAXNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>6504// CHECK-NEXT:    [[VPMAXNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>6505// CHECK-NEXT:    [[VPMAXNM2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fmaxnmp.v4f32(<4 x float> [[VPMAXNM_I]], <4 x float> [[VPMAXNM1_I]])6506// CHECK-NEXT:    ret <4 x float> [[VPMAXNM2_I]]6507//6508float32x4_t test_vpmaxnmq_f32(float32x4_t a, float32x4_t b) {6509  return vpmaxnmq_f32(a, b);6510}6511 6512// CHECK-LABEL: define dso_local <2 x double> @test_vpmaxnmq_f64(6513// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {6514// CHECK-NEXT:  [[ENTRY:.*:]]6515// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>6516// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>6517// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>6518// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>6519// CHECK-NEXT:    [[VPMAXNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>6520// CHECK-NEXT:    [[VPMAXNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>6521// CHECK-NEXT:    [[VPMAXNM2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fmaxnmp.v2f64(<2 x double> [[VPMAXNM_I]], <2 x double> [[VPMAXNM1_I]])6522// CHECK-NEXT:    ret <2 x double> [[VPMAXNM2_I]]6523//6524float64x2_t test_vpmaxnmq_f64(float64x2_t a, float64x2_t b) {6525  return vpmaxnmq_f64(a, b);6526}6527 6528// CHECK-LABEL: define dso_local <2 x float> @test_vpminnm_f32(6529// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {6530// CHECK-NEXT:  [[ENTRY:.*:]]6531// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>6532// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>6533// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>6534// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>6535// CHECK-NEXT:    [[VPMINNM_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>6536// CHECK-NEXT:    [[VPMINNM1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>6537// CHECK-NEXT:    [[VPMINNM2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fminnmp.v2f32(<2 x float> [[VPMINNM_I]], <2 x float> [[VPMINNM1_I]])6538// CHECK-NEXT:    ret <2 x float> [[VPMINNM2_I]]6539//6540float32x2_t test_vpminnm_f32(float32x2_t a, float32x2_t b) {6541  return vpminnm_f32(a, b);6542}6543 6544// CHECK-LABEL: define dso_local <4 x float> @test_vpminnmq_f32(6545// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {6546// CHECK-NEXT:  [[ENTRY:.*:]]6547// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>6548// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>6549// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>6550// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>6551// CHECK-NEXT:    [[VPMINNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>6552// CHECK-NEXT:    [[VPMINNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>6553// CHECK-NEXT:    [[VPMINNM2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fminnmp.v4f32(<4 x float> [[VPMINNM_I]], <4 x float> [[VPMINNM1_I]])6554// CHECK-NEXT:    ret <4 x float> [[VPMINNM2_I]]6555//6556float32x4_t test_vpminnmq_f32(float32x4_t a, float32x4_t b) {6557  return vpminnmq_f32(a, b);6558}6559 6560// CHECK-LABEL: define dso_local <2 x double> @test_vpminnmq_f64(6561// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {6562// CHECK-NEXT:  [[ENTRY:.*:]]6563// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>6564// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>6565// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>6566// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>6567// CHECK-NEXT:    [[VPMINNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>6568// CHECK-NEXT:    [[VPMINNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>6569// CHECK-NEXT:    [[VPMINNM2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fminnmp.v2f64(<2 x double> [[VPMINNM_I]], <2 x double> [[VPMINNM1_I]])6570// CHECK-NEXT:    ret <2 x double> [[VPMINNM2_I]]6571//6572float64x2_t test_vpminnmq_f64(float64x2_t a, float64x2_t b) {6573  return vpminnmq_f64(a, b);6574}6575 6576// CHECK-LABEL: define dso_local <8 x i8> @test_vpadd_s8(6577// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6578// CHECK-NEXT:  [[ENTRY:.*:]]6579// CHECK-NEXT:    [[VPADD_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])6580// CHECK-NEXT:    ret <8 x i8> [[VPADD_V_I]]6581//6582int8x8_t test_vpadd_s8(int8x8_t a, int8x8_t b) {6583  return vpadd_s8(a, b);6584}6585 6586// CHECK-LABEL: define dso_local <4 x i16> @test_vpadd_s16(6587// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6588// CHECK-NEXT:  [[ENTRY:.*:]]6589// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6590// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>6591// CHECK-NEXT:    [[VPADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6592// CHECK-NEXT:    [[VPADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>6593// CHECK-NEXT:    [[VPADD_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16> [[VPADD_V_I]], <4 x i16> [[VPADD_V1_I]])6594// CHECK-NEXT:    [[VPADD_V3_I:%.*]] = bitcast <4 x i16> [[VPADD_V2_I]] to <8 x i8>6595// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VPADD_V3_I]] to <4 x i16>6596// CHECK-NEXT:    ret <4 x i16> [[TMP2]]6597//6598int16x4_t test_vpadd_s16(int16x4_t a, int16x4_t b) {6599  return vpadd_s16(a, b);6600}6601 6602// CHECK-LABEL: define dso_local <2 x i32> @test_vpadd_s32(6603// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6604// CHECK-NEXT:  [[ENTRY:.*:]]6605// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>6606// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>6607// CHECK-NEXT:    [[VPADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>6608// CHECK-NEXT:    [[VPADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>6609// CHECK-NEXT:    [[VPADD_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.addp.v2i32(<2 x i32> [[VPADD_V_I]], <2 x i32> [[VPADD_V1_I]])6610// CHECK-NEXT:    [[VPADD_V3_I:%.*]] = bitcast <2 x i32> [[VPADD_V2_I]] to <8 x i8>6611// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VPADD_V3_I]] to <2 x i32>6612// CHECK-NEXT:    ret <2 x i32> [[TMP2]]6613//6614int32x2_t test_vpadd_s32(int32x2_t a, int32x2_t b) {6615  return vpadd_s32(a, b);6616}6617 6618// CHECK-LABEL: define dso_local <8 x i8> @test_vpadd_u8(6619// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6620// CHECK-NEXT:  [[ENTRY:.*:]]6621// CHECK-NEXT:    [[VPADD_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])6622// CHECK-NEXT:    ret <8 x i8> [[VPADD_V_I]]6623//6624uint8x8_t test_vpadd_u8(uint8x8_t a, uint8x8_t b) {6625  return vpadd_u8(a, b);6626}6627 6628// CHECK-LABEL: define dso_local <4 x i16> @test_vpadd_u16(6629// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6630// CHECK-NEXT:  [[ENTRY:.*:]]6631// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6632// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>6633// CHECK-NEXT:    [[VPADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6634// CHECK-NEXT:    [[VPADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>6635// CHECK-NEXT:    [[VPADD_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16> [[VPADD_V_I]], <4 x i16> [[VPADD_V1_I]])6636// CHECK-NEXT:    [[VPADD_V3_I:%.*]] = bitcast <4 x i16> [[VPADD_V2_I]] to <8 x i8>6637// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VPADD_V3_I]] to <4 x i16>6638// CHECK-NEXT:    ret <4 x i16> [[TMP2]]6639//6640uint16x4_t test_vpadd_u16(uint16x4_t a, uint16x4_t b) {6641  return vpadd_u16(a, b);6642}6643 6644// CHECK-LABEL: define dso_local <2 x i32> @test_vpadd_u32(6645// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6646// CHECK-NEXT:  [[ENTRY:.*:]]6647// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>6648// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>6649// CHECK-NEXT:    [[VPADD_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>6650// CHECK-NEXT:    [[VPADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>6651// CHECK-NEXT:    [[VPADD_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.addp.v2i32(<2 x i32> [[VPADD_V_I]], <2 x i32> [[VPADD_V1_I]])6652// CHECK-NEXT:    [[VPADD_V3_I:%.*]] = bitcast <2 x i32> [[VPADD_V2_I]] to <8 x i8>6653// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VPADD_V3_I]] to <2 x i32>6654// CHECK-NEXT:    ret <2 x i32> [[TMP2]]6655//6656uint32x2_t test_vpadd_u32(uint32x2_t a, uint32x2_t b) {6657  return vpadd_u32(a, b);6658}6659 6660// CHECK-LABEL: define dso_local <2 x float> @test_vpadd_f32(6661// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {6662// CHECK-NEXT:  [[ENTRY:.*:]]6663// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>6664// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>6665// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>6666// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>6667// CHECK-NEXT:    [[VPADD_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>6668// CHECK-NEXT:    [[VPADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>6669// CHECK-NEXT:    [[VPADD_V2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> [[VPADD_V_I]], <2 x float> [[VPADD_V1_I]])6670// CHECK-NEXT:    [[VPADD_V3_I:%.*]] = bitcast <2 x float> [[VPADD_V2_I]] to <8 x i8>6671// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[VPADD_V3_I]] to <2 x i32>6672// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <2 x float>6673// CHECK-NEXT:    ret <2 x float> [[TMP5]]6674//6675float32x2_t test_vpadd_f32(float32x2_t a, float32x2_t b) {6676  return vpadd_f32(a, b);6677}6678 6679// CHECK-LABEL: define dso_local <16 x i8> @test_vpaddq_s8(6680// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6681// CHECK-NEXT:  [[ENTRY:.*:]]6682// CHECK-NEXT:    [[VPADDQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])6683// CHECK-NEXT:    ret <16 x i8> [[VPADDQ_V_I]]6684//6685int8x16_t test_vpaddq_s8(int8x16_t a, int8x16_t b) {6686  return vpaddq_s8(a, b);6687}6688 6689// CHECK-LABEL: define dso_local <8 x i16> @test_vpaddq_s16(6690// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6691// CHECK-NEXT:  [[ENTRY:.*:]]6692// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>6693// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>6694// CHECK-NEXT:    [[VPADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>6695// CHECK-NEXT:    [[VPADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>6696// CHECK-NEXT:    [[VPADDQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.addp.v8i16(<8 x i16> [[VPADDQ_V_I]], <8 x i16> [[VPADDQ_V1_I]])6697// CHECK-NEXT:    [[VPADDQ_V3_I:%.*]] = bitcast <8 x i16> [[VPADDQ_V2_I]] to <16 x i8>6698// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VPADDQ_V3_I]] to <8 x i16>6699// CHECK-NEXT:    ret <8 x i16> [[TMP2]]6700//6701int16x8_t test_vpaddq_s16(int16x8_t a, int16x8_t b) {6702  return vpaddq_s16(a, b);6703}6704 6705// CHECK-LABEL: define dso_local <4 x i32> @test_vpaddq_s32(6706// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6707// CHECK-NEXT:  [[ENTRY:.*:]]6708// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>6709// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>6710// CHECK-NEXT:    [[VPADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>6711// CHECK-NEXT:    [[VPADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>6712// CHECK-NEXT:    [[VPADDQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.addp.v4i32(<4 x i32> [[VPADDQ_V_I]], <4 x i32> [[VPADDQ_V1_I]])6713// CHECK-NEXT:    [[VPADDQ_V3_I:%.*]] = bitcast <4 x i32> [[VPADDQ_V2_I]] to <16 x i8>6714// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VPADDQ_V3_I]] to <4 x i32>6715// CHECK-NEXT:    ret <4 x i32> [[TMP2]]6716//6717int32x4_t test_vpaddq_s32(int32x4_t a, int32x4_t b) {6718  return vpaddq_s32(a, b);6719}6720 6721// CHECK-LABEL: define dso_local <16 x i8> @test_vpaddq_u8(6722// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {6723// CHECK-NEXT:  [[ENTRY:.*:]]6724// CHECK-NEXT:    [[VPADDQ_V_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])6725// CHECK-NEXT:    ret <16 x i8> [[VPADDQ_V_I]]6726//6727uint8x16_t test_vpaddq_u8(uint8x16_t a, uint8x16_t b) {6728  return vpaddq_u8(a, b);6729}6730 6731// CHECK-LABEL: define dso_local <8 x i16> @test_vpaddq_u16(6732// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6733// CHECK-NEXT:  [[ENTRY:.*:]]6734// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>6735// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>6736// CHECK-NEXT:    [[VPADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>6737// CHECK-NEXT:    [[VPADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>6738// CHECK-NEXT:    [[VPADDQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.addp.v8i16(<8 x i16> [[VPADDQ_V_I]], <8 x i16> [[VPADDQ_V1_I]])6739// CHECK-NEXT:    [[VPADDQ_V3_I:%.*]] = bitcast <8 x i16> [[VPADDQ_V2_I]] to <16 x i8>6740// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VPADDQ_V3_I]] to <8 x i16>6741// CHECK-NEXT:    ret <8 x i16> [[TMP2]]6742//6743uint16x8_t test_vpaddq_u16(uint16x8_t a, uint16x8_t b) {6744  return vpaddq_u16(a, b);6745}6746 6747// CHECK-LABEL: define dso_local <4 x i32> @test_vpaddq_u32(6748// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6749// CHECK-NEXT:  [[ENTRY:.*:]]6750// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>6751// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>6752// CHECK-NEXT:    [[VPADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>6753// CHECK-NEXT:    [[VPADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>6754// CHECK-NEXT:    [[VPADDQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.addp.v4i32(<4 x i32> [[VPADDQ_V_I]], <4 x i32> [[VPADDQ_V1_I]])6755// CHECK-NEXT:    [[VPADDQ_V3_I:%.*]] = bitcast <4 x i32> [[VPADDQ_V2_I]] to <16 x i8>6756// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VPADDQ_V3_I]] to <4 x i32>6757// CHECK-NEXT:    ret <4 x i32> [[TMP2]]6758//6759uint32x4_t test_vpaddq_u32(uint32x4_t a, uint32x4_t b) {6760  return vpaddq_u32(a, b);6761}6762 6763// CHECK-LABEL: define dso_local <4 x float> @test_vpaddq_f32(6764// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {6765// CHECK-NEXT:  [[ENTRY:.*:]]6766// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>6767// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>6768// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>6769// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>6770// CHECK-NEXT:    [[VPADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>6771// CHECK-NEXT:    [[VPADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>6772// CHECK-NEXT:    [[VPADDQ_V2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float> [[VPADDQ_V_I]], <4 x float> [[VPADDQ_V1_I]])6773// CHECK-NEXT:    [[VPADDQ_V3_I:%.*]] = bitcast <4 x float> [[VPADDQ_V2_I]] to <16 x i8>6774// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[VPADDQ_V3_I]] to <4 x i32>6775// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <4 x float>6776// CHECK-NEXT:    ret <4 x float> [[TMP5]]6777//6778float32x4_t test_vpaddq_f32(float32x4_t a, float32x4_t b) {6779  return vpaddq_f32(a, b);6780}6781 6782// CHECK-LABEL: define dso_local <2 x double> @test_vpaddq_f64(6783// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {6784// CHECK-NEXT:  [[ENTRY:.*:]]6785// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>6786// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>6787// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>6788// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>6789// CHECK-NEXT:    [[VPADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>6790// CHECK-NEXT:    [[VPADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>6791// CHECK-NEXT:    [[VPADDQ_V2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double> [[VPADDQ_V_I]], <2 x double> [[VPADDQ_V1_I]])6792// CHECK-NEXT:    [[VPADDQ_V3_I:%.*]] = bitcast <2 x double> [[VPADDQ_V2_I]] to <16 x i8>6793// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[VPADDQ_V3_I]] to <2 x i64>6794// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <2 x double>6795// CHECK-NEXT:    ret <2 x double> [[TMP5]]6796//6797float64x2_t test_vpaddq_f64(float64x2_t a, float64x2_t b) {6798  return vpaddq_f64(a, b);6799}6800 6801// CHECK-LABEL: define dso_local <4 x i16> @test_vqdmulh_s16(6802// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6803// CHECK-NEXT:  [[ENTRY:.*:]]6804// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6805// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>6806// CHECK-NEXT:    [[VQDMULH_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6807// CHECK-NEXT:    [[VQDMULH_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>6808// CHECK-NEXT:    [[VQDMULH_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqdmulh.v4i16(<4 x i16> [[VQDMULH_V_I]], <4 x i16> [[VQDMULH_V1_I]])6809// CHECK-NEXT:    [[VQDMULH_V3_I:%.*]] = bitcast <4 x i16> [[VQDMULH_V2_I]] to <8 x i8>6810// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQDMULH_V3_I]] to <4 x i16>6811// CHECK-NEXT:    ret <4 x i16> [[TMP2]]6812//6813int16x4_t test_vqdmulh_s16(int16x4_t a, int16x4_t b) {6814  return vqdmulh_s16(a, b);6815}6816 6817// CHECK-LABEL: define dso_local <2 x i32> @test_vqdmulh_s32(6818// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6819// CHECK-NEXT:  [[ENTRY:.*:]]6820// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>6821// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>6822// CHECK-NEXT:    [[VQDMULH_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>6823// CHECK-NEXT:    [[VQDMULH_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>6824// CHECK-NEXT:    [[VQDMULH_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqdmulh.v2i32(<2 x i32> [[VQDMULH_V_I]], <2 x i32> [[VQDMULH_V1_I]])6825// CHECK-NEXT:    [[VQDMULH_V3_I:%.*]] = bitcast <2 x i32> [[VQDMULH_V2_I]] to <8 x i8>6826// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQDMULH_V3_I]] to <2 x i32>6827// CHECK-NEXT:    ret <2 x i32> [[TMP2]]6828//6829int32x2_t test_vqdmulh_s32(int32x2_t a, int32x2_t b) {6830  return vqdmulh_s32(a, b);6831}6832 6833// CHECK-LABEL: define dso_local <8 x i16> @test_vqdmulhq_s16(6834// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6835// CHECK-NEXT:  [[ENTRY:.*:]]6836// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>6837// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>6838// CHECK-NEXT:    [[VQDMULHQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>6839// CHECK-NEXT:    [[VQDMULHQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>6840// CHECK-NEXT:    [[VQDMULHQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sqdmulh.v8i16(<8 x i16> [[VQDMULHQ_V_I]], <8 x i16> [[VQDMULHQ_V1_I]])6841// CHECK-NEXT:    [[VQDMULHQ_V3_I:%.*]] = bitcast <8 x i16> [[VQDMULHQ_V2_I]] to <16 x i8>6842// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQDMULHQ_V3_I]] to <8 x i16>6843// CHECK-NEXT:    ret <8 x i16> [[TMP2]]6844//6845int16x8_t test_vqdmulhq_s16(int16x8_t a, int16x8_t b) {6846  return vqdmulhq_s16(a, b);6847}6848 6849// CHECK-LABEL: define dso_local <4 x i32> @test_vqdmulhq_s32(6850// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6851// CHECK-NEXT:  [[ENTRY:.*:]]6852// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>6853// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>6854// CHECK-NEXT:    [[VQDMULHQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>6855// CHECK-NEXT:    [[VQDMULHQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>6856// CHECK-NEXT:    [[VQDMULHQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmulh.v4i32(<4 x i32> [[VQDMULHQ_V_I]], <4 x i32> [[VQDMULHQ_V1_I]])6857// CHECK-NEXT:    [[VQDMULHQ_V3_I:%.*]] = bitcast <4 x i32> [[VQDMULHQ_V2_I]] to <16 x i8>6858// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQDMULHQ_V3_I]] to <4 x i32>6859// CHECK-NEXT:    ret <4 x i32> [[TMP2]]6860//6861int32x4_t test_vqdmulhq_s32(int32x4_t a, int32x4_t b) {6862  return vqdmulhq_s32(a, b);6863}6864 6865// CHECK-LABEL: define dso_local <4 x i16> @test_vqrdmulh_s16(6866// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6867// CHECK-NEXT:  [[ENTRY:.*:]]6868// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6869// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>6870// CHECK-NEXT:    [[VQRDMULH_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6871// CHECK-NEXT:    [[VQRDMULH_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>6872// CHECK-NEXT:    [[VQRDMULH_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[VQRDMULH_V_I]], <4 x i16> [[VQRDMULH_V1_I]])6873// CHECK-NEXT:    [[VQRDMULH_V3_I:%.*]] = bitcast <4 x i16> [[VQRDMULH_V2_I]] to <8 x i8>6874// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQRDMULH_V3_I]] to <4 x i16>6875// CHECK-NEXT:    ret <4 x i16> [[TMP2]]6876//6877int16x4_t test_vqrdmulh_s16(int16x4_t a, int16x4_t b) {6878  return vqrdmulh_s16(a, b);6879}6880 6881// CHECK-LABEL: define dso_local <2 x i32> @test_vqrdmulh_s32(6882// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6883// CHECK-NEXT:  [[ENTRY:.*:]]6884// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>6885// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>6886// CHECK-NEXT:    [[VQRDMULH_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>6887// CHECK-NEXT:    [[VQRDMULH_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>6888// CHECK-NEXT:    [[VQRDMULH_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqrdmulh.v2i32(<2 x i32> [[VQRDMULH_V_I]], <2 x i32> [[VQRDMULH_V1_I]])6889// CHECK-NEXT:    [[VQRDMULH_V3_I:%.*]] = bitcast <2 x i32> [[VQRDMULH_V2_I]] to <8 x i8>6890// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VQRDMULH_V3_I]] to <2 x i32>6891// CHECK-NEXT:    ret <2 x i32> [[TMP2]]6892//6893int32x2_t test_vqrdmulh_s32(int32x2_t a, int32x2_t b) {6894  return vqrdmulh_s32(a, b);6895}6896 6897// CHECK-LABEL: define dso_local <8 x i16> @test_vqrdmulhq_s16(6898// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {6899// CHECK-NEXT:  [[ENTRY:.*:]]6900// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>6901// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>6902// CHECK-NEXT:    [[VQRDMULHQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>6903// CHECK-NEXT:    [[VQRDMULHQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>6904// CHECK-NEXT:    [[VQRDMULHQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.sqrdmulh.v8i16(<8 x i16> [[VQRDMULHQ_V_I]], <8 x i16> [[VQRDMULHQ_V1_I]])6905// CHECK-NEXT:    [[VQRDMULHQ_V3_I:%.*]] = bitcast <8 x i16> [[VQRDMULHQ_V2_I]] to <16 x i8>6906// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQRDMULHQ_V3_I]] to <8 x i16>6907// CHECK-NEXT:    ret <8 x i16> [[TMP2]]6908//6909int16x8_t test_vqrdmulhq_s16(int16x8_t a, int16x8_t b) {6910  return vqrdmulhq_s16(a, b);6911}6912 6913// CHECK-LABEL: define dso_local <4 x i32> @test_vqrdmulhq_s32(6914// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {6915// CHECK-NEXT:  [[ENTRY:.*:]]6916// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>6917// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>6918// CHECK-NEXT:    [[VQRDMULHQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>6919// CHECK-NEXT:    [[VQRDMULHQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>6920// CHECK-NEXT:    [[VQRDMULHQ_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqrdmulh.v4i32(<4 x i32> [[VQRDMULHQ_V_I]], <4 x i32> [[VQRDMULHQ_V1_I]])6921// CHECK-NEXT:    [[VQRDMULHQ_V3_I:%.*]] = bitcast <4 x i32> [[VQRDMULHQ_V2_I]] to <16 x i8>6922// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQRDMULHQ_V3_I]] to <4 x i32>6923// CHECK-NEXT:    ret <4 x i32> [[TMP2]]6924//6925int32x4_t test_vqrdmulhq_s32(int32x4_t a, int32x4_t b) {6926  return vqrdmulhq_s32(a, b);6927}6928 6929// CHECK-LABEL: define dso_local <2 x float> @test_vmulx_f32(6930// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {6931// CHECK-NEXT:  [[ENTRY:.*:]]6932// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>6933// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>6934// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>6935// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>6936// CHECK-NEXT:    [[VMULX_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>6937// CHECK-NEXT:    [[VMULX1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>6938// CHECK-NEXT:    [[VMULX2_I:%.*]] = call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> [[VMULX_I]], <2 x float> [[VMULX1_I]])6939// CHECK-NEXT:    ret <2 x float> [[VMULX2_I]]6940//6941float32x2_t test_vmulx_f32(float32x2_t a, float32x2_t b) {6942  return vmulx_f32(a, b);6943}6944 6945// CHECK-LABEL: define dso_local <4 x float> @test_vmulxq_f32(6946// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {6947// CHECK-NEXT:  [[ENTRY:.*:]]6948// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>6949// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>6950// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>6951// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>6952// CHECK-NEXT:    [[VMULX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>6953// CHECK-NEXT:    [[VMULX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>6954// CHECK-NEXT:    [[VMULX2_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> [[VMULX_I]], <4 x float> [[VMULX1_I]])6955// CHECK-NEXT:    ret <4 x float> [[VMULX2_I]]6956//6957float32x4_t test_vmulxq_f32(float32x4_t a, float32x4_t b) {6958  return vmulxq_f32(a, b);6959}6960 6961// CHECK-LABEL: define dso_local <2 x double> @test_vmulxq_f64(6962// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {6963// CHECK-NEXT:  [[ENTRY:.*:]]6964// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>6965// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>6966// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>6967// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>6968// CHECK-NEXT:    [[VMULX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>6969// CHECK-NEXT:    [[VMULX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>6970// CHECK-NEXT:    [[VMULX2_I:%.*]] = call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> [[VMULX_I]], <2 x double> [[VMULX1_I]])6971// CHECK-NEXT:    ret <2 x double> [[VMULX2_I]]6972//6973float64x2_t test_vmulxq_f64(float64x2_t a, float64x2_t b) {6974  return vmulxq_f64(a, b);6975}6976 6977// CHECK-LABEL: define dso_local <8 x i8> @test_vshl_n_s8(6978// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {6979// CHECK-NEXT:  [[ENTRY:.*:]]6980// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <8 x i8> [[A]], splat (i8 3)6981// CHECK-NEXT:    ret <8 x i8> [[VSHL_N]]6982//6983int8x8_t test_vshl_n_s8(int8x8_t a) {6984  return vshl_n_s8(a, 3);6985}6986 6987// CHECK-LABEL: define dso_local <4 x i16> @test_vshl_n_s16(6988// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {6989// CHECK-NEXT:  [[ENTRY:.*:]]6990// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>6991// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>6992// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <4 x i16> [[TMP1]], splat (i16 3)6993// CHECK-NEXT:    ret <4 x i16> [[VSHL_N]]6994//6995int16x4_t test_vshl_n_s16(int16x4_t a) {6996  return vshl_n_s16(a, 3);6997}6998 6999// CHECK-LABEL: define dso_local <2 x i32> @test_vshl_n_s32(7000// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7001// CHECK-NEXT:  [[ENTRY:.*:]]7002// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7003// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7004// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <2 x i32> [[TMP1]], splat (i32 3)7005// CHECK-NEXT:    ret <2 x i32> [[VSHL_N]]7006//7007int32x2_t test_vshl_n_s32(int32x2_t a) {7008  return vshl_n_s32(a, 3);7009}7010 7011// CHECK-LABEL: define dso_local <16 x i8> @test_vshlq_n_s8(7012// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7013// CHECK-NEXT:  [[ENTRY:.*:]]7014// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <16 x i8> [[A]], splat (i8 3)7015// CHECK-NEXT:    ret <16 x i8> [[VSHL_N]]7016//7017int8x16_t test_vshlq_n_s8(int8x16_t a) {7018  return vshlq_n_s8(a, 3);7019}7020 7021// CHECK-LABEL: define dso_local <8 x i16> @test_vshlq_n_s16(7022// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7023// CHECK-NEXT:  [[ENTRY:.*:]]7024// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7025// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7026// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <8 x i16> [[TMP1]], splat (i16 3)7027// CHECK-NEXT:    ret <8 x i16> [[VSHL_N]]7028//7029int16x8_t test_vshlq_n_s16(int16x8_t a) {7030  return vshlq_n_s16(a, 3);7031}7032 7033// CHECK-LABEL: define dso_local <4 x i32> @test_vshlq_n_s32(7034// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7035// CHECK-NEXT:  [[ENTRY:.*:]]7036// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7037// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7038// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <4 x i32> [[TMP1]], splat (i32 3)7039// CHECK-NEXT:    ret <4 x i32> [[VSHL_N]]7040//7041int32x4_t test_vshlq_n_s32(int32x4_t a) {7042  return vshlq_n_s32(a, 3);7043}7044 7045// CHECK-LABEL: define dso_local <2 x i64> @test_vshlq_n_s64(7046// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {7047// CHECK-NEXT:  [[ENTRY:.*:]]7048// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7049// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7050// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <2 x i64> [[TMP1]], splat (i64 3)7051// CHECK-NEXT:    ret <2 x i64> [[VSHL_N]]7052//7053int64x2_t test_vshlq_n_s64(int64x2_t a) {7054  return vshlq_n_s64(a, 3);7055}7056 7057// CHECK-LABEL: define dso_local <8 x i8> @test_vshl_n_u8(7058// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7059// CHECK-NEXT:  [[ENTRY:.*:]]7060// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <8 x i8> [[A]], splat (i8 3)7061// CHECK-NEXT:    ret <8 x i8> [[VSHL_N]]7062//7063uint8x8_t test_vshl_n_u8(uint8x8_t a) {7064  return vshl_n_u8(a, 3);7065}7066 7067// CHECK-LABEL: define dso_local <4 x i16> @test_vshl_n_u16(7068// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7069// CHECK-NEXT:  [[ENTRY:.*:]]7070// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7071// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7072// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <4 x i16> [[TMP1]], splat (i16 3)7073// CHECK-NEXT:    ret <4 x i16> [[VSHL_N]]7074//7075uint16x4_t test_vshl_n_u16(uint16x4_t a) {7076  return vshl_n_u16(a, 3);7077}7078 7079// CHECK-LABEL: define dso_local <2 x i32> @test_vshl_n_u32(7080// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7081// CHECK-NEXT:  [[ENTRY:.*:]]7082// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7083// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7084// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <2 x i32> [[TMP1]], splat (i32 3)7085// CHECK-NEXT:    ret <2 x i32> [[VSHL_N]]7086//7087uint32x2_t test_vshl_n_u32(uint32x2_t a) {7088  return vshl_n_u32(a, 3);7089}7090 7091// CHECK-LABEL: define dso_local <16 x i8> @test_vshlq_n_u8(7092// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7093// CHECK-NEXT:  [[ENTRY:.*:]]7094// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <16 x i8> [[A]], splat (i8 3)7095// CHECK-NEXT:    ret <16 x i8> [[VSHL_N]]7096//7097uint8x16_t test_vshlq_n_u8(uint8x16_t a) {7098  return vshlq_n_u8(a, 3);7099}7100 7101// CHECK-LABEL: define dso_local <8 x i16> @test_vshlq_n_u16(7102// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7103// CHECK-NEXT:  [[ENTRY:.*:]]7104// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7105// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7106// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <8 x i16> [[TMP1]], splat (i16 3)7107// CHECK-NEXT:    ret <8 x i16> [[VSHL_N]]7108//7109uint16x8_t test_vshlq_n_u16(uint16x8_t a) {7110  return vshlq_n_u16(a, 3);7111}7112 7113// CHECK-LABEL: define dso_local <4 x i32> @test_vshlq_n_u32(7114// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7115// CHECK-NEXT:  [[ENTRY:.*:]]7116// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7117// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7118// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <4 x i32> [[TMP1]], splat (i32 3)7119// CHECK-NEXT:    ret <4 x i32> [[VSHL_N]]7120//7121uint32x4_t test_vshlq_n_u32(uint32x4_t a) {7122  return vshlq_n_u32(a, 3);7123}7124 7125// CHECK-LABEL: define dso_local <2 x i64> @test_vshlq_n_u64(7126// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {7127// CHECK-NEXT:  [[ENTRY:.*:]]7128// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7129// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7130// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <2 x i64> [[TMP1]], splat (i64 3)7131// CHECK-NEXT:    ret <2 x i64> [[VSHL_N]]7132//7133uint64x2_t test_vshlq_n_u64(uint64x2_t a) {7134  return vshlq_n_u64(a, 3);7135}7136 7137// CHECK-LABEL: define dso_local <8 x i8> @test_vshr_n_s8(7138// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7139// CHECK-NEXT:  [[ENTRY:.*:]]7140// CHECK-NEXT:    [[VSHR_N:%.*]] = ashr <8 x i8> [[A]], splat (i8 3)7141// CHECK-NEXT:    ret <8 x i8> [[VSHR_N]]7142//7143int8x8_t test_vshr_n_s8(int8x8_t a) {7144  return vshr_n_s8(a, 3);7145}7146 7147// CHECK-LABEL: define dso_local <4 x i16> @test_vshr_n_s16(7148// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7149// CHECK-NEXT:  [[ENTRY:.*:]]7150// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7151// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7152// CHECK-NEXT:    [[VSHR_N:%.*]] = ashr <4 x i16> [[TMP1]], splat (i16 3)7153// CHECK-NEXT:    ret <4 x i16> [[VSHR_N]]7154//7155int16x4_t test_vshr_n_s16(int16x4_t a) {7156  return vshr_n_s16(a, 3);7157}7158 7159// CHECK-LABEL: define dso_local <2 x i32> @test_vshr_n_s32(7160// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7161// CHECK-NEXT:  [[ENTRY:.*:]]7162// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7163// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7164// CHECK-NEXT:    [[VSHR_N:%.*]] = ashr <2 x i32> [[TMP1]], splat (i32 3)7165// CHECK-NEXT:    ret <2 x i32> [[VSHR_N]]7166//7167int32x2_t test_vshr_n_s32(int32x2_t a) {7168  return vshr_n_s32(a, 3);7169}7170 7171// CHECK-LABEL: define dso_local <16 x i8> @test_vshrq_n_s8(7172// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7173// CHECK-NEXT:  [[ENTRY:.*:]]7174// CHECK-NEXT:    [[VSHR_N:%.*]] = ashr <16 x i8> [[A]], splat (i8 3)7175// CHECK-NEXT:    ret <16 x i8> [[VSHR_N]]7176//7177int8x16_t test_vshrq_n_s8(int8x16_t a) {7178  return vshrq_n_s8(a, 3);7179}7180 7181// CHECK-LABEL: define dso_local <8 x i16> @test_vshrq_n_s16(7182// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7183// CHECK-NEXT:  [[ENTRY:.*:]]7184// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7185// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7186// CHECK-NEXT:    [[VSHR_N:%.*]] = ashr <8 x i16> [[TMP1]], splat (i16 3)7187// CHECK-NEXT:    ret <8 x i16> [[VSHR_N]]7188//7189int16x8_t test_vshrq_n_s16(int16x8_t a) {7190  return vshrq_n_s16(a, 3);7191}7192 7193// CHECK-LABEL: define dso_local <4 x i32> @test_vshrq_n_s32(7194// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7195// CHECK-NEXT:  [[ENTRY:.*:]]7196// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7197// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7198// CHECK-NEXT:    [[VSHR_N:%.*]] = ashr <4 x i32> [[TMP1]], splat (i32 3)7199// CHECK-NEXT:    ret <4 x i32> [[VSHR_N]]7200//7201int32x4_t test_vshrq_n_s32(int32x4_t a) {7202  return vshrq_n_s32(a, 3);7203}7204 7205// CHECK-LABEL: define dso_local <2 x i64> @test_vshrq_n_s64(7206// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {7207// CHECK-NEXT:  [[ENTRY:.*:]]7208// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7209// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7210// CHECK-NEXT:    [[VSHR_N:%.*]] = ashr <2 x i64> [[TMP1]], splat (i64 3)7211// CHECK-NEXT:    ret <2 x i64> [[VSHR_N]]7212//7213int64x2_t test_vshrq_n_s64(int64x2_t a) {7214  return vshrq_n_s64(a, 3);7215}7216 7217// CHECK-LABEL: define dso_local <8 x i8> @test_vshr_n_u8(7218// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7219// CHECK-NEXT:  [[ENTRY:.*:]]7220// CHECK-NEXT:    [[VSHR_N:%.*]] = lshr <8 x i8> [[A]], splat (i8 3)7221// CHECK-NEXT:    ret <8 x i8> [[VSHR_N]]7222//7223uint8x8_t test_vshr_n_u8(uint8x8_t a) {7224  return vshr_n_u8(a, 3);7225}7226 7227// CHECK-LABEL: define dso_local <4 x i16> @test_vshr_n_u16(7228// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7229// CHECK-NEXT:  [[ENTRY:.*:]]7230// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7231// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7232// CHECK-NEXT:    [[VSHR_N:%.*]] = lshr <4 x i16> [[TMP1]], splat (i16 3)7233// CHECK-NEXT:    ret <4 x i16> [[VSHR_N]]7234//7235uint16x4_t test_vshr_n_u16(uint16x4_t a) {7236  return vshr_n_u16(a, 3);7237}7238 7239// CHECK-LABEL: define dso_local <2 x i32> @test_vshr_n_u32(7240// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7241// CHECK-NEXT:  [[ENTRY:.*:]]7242// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7243// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7244// CHECK-NEXT:    [[VSHR_N:%.*]] = lshr <2 x i32> [[TMP1]], splat (i32 3)7245// CHECK-NEXT:    ret <2 x i32> [[VSHR_N]]7246//7247uint32x2_t test_vshr_n_u32(uint32x2_t a) {7248  return vshr_n_u32(a, 3);7249}7250 7251// CHECK-LABEL: define dso_local <16 x i8> @test_vshrq_n_u8(7252// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7253// CHECK-NEXT:  [[ENTRY:.*:]]7254// CHECK-NEXT:    [[VSHR_N:%.*]] = lshr <16 x i8> [[A]], splat (i8 3)7255// CHECK-NEXT:    ret <16 x i8> [[VSHR_N]]7256//7257uint8x16_t test_vshrq_n_u8(uint8x16_t a) {7258  return vshrq_n_u8(a, 3);7259}7260 7261// CHECK-LABEL: define dso_local <8 x i16> @test_vshrq_n_u16(7262// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7263// CHECK-NEXT:  [[ENTRY:.*:]]7264// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7265// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7266// CHECK-NEXT:    [[VSHR_N:%.*]] = lshr <8 x i16> [[TMP1]], splat (i16 3)7267// CHECK-NEXT:    ret <8 x i16> [[VSHR_N]]7268//7269uint16x8_t test_vshrq_n_u16(uint16x8_t a) {7270  return vshrq_n_u16(a, 3);7271}7272 7273// CHECK-LABEL: define dso_local <4 x i32> @test_vshrq_n_u32(7274// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7275// CHECK-NEXT:  [[ENTRY:.*:]]7276// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7277// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7278// CHECK-NEXT:    [[VSHR_N:%.*]] = lshr <4 x i32> [[TMP1]], splat (i32 3)7279// CHECK-NEXT:    ret <4 x i32> [[VSHR_N]]7280//7281uint32x4_t test_vshrq_n_u32(uint32x4_t a) {7282  return vshrq_n_u32(a, 3);7283}7284 7285// CHECK-LABEL: define dso_local <2 x i64> @test_vshrq_n_u64(7286// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {7287// CHECK-NEXT:  [[ENTRY:.*:]]7288// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7289// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7290// CHECK-NEXT:    [[VSHR_N:%.*]] = lshr <2 x i64> [[TMP1]], splat (i64 3)7291// CHECK-NEXT:    ret <2 x i64> [[VSHR_N]]7292//7293uint64x2_t test_vshrq_n_u64(uint64x2_t a) {7294  return vshrq_n_u64(a, 3);7295}7296 7297// CHECK-LABEL: define dso_local <8 x i8> @test_vsra_n_s8(7298// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7299// CHECK-NEXT:  [[ENTRY:.*:]]7300// CHECK-NEXT:    [[VSRA_N:%.*]] = ashr <8 x i8> [[B]], splat (i8 3)7301// CHECK-NEXT:    [[TMP0:%.*]] = add <8 x i8> [[A]], [[VSRA_N]]7302// CHECK-NEXT:    ret <8 x i8> [[TMP0]]7303//7304int8x8_t test_vsra_n_s8(int8x8_t a, int8x8_t b) {7305  return vsra_n_s8(a, b, 3);7306}7307 7308// CHECK-LABEL: define dso_local <4 x i16> @test_vsra_n_s16(7309// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7310// CHECK-NEXT:  [[ENTRY:.*:]]7311// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7312// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>7313// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7314// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>7315// CHECK-NEXT:    [[VSRA_N:%.*]] = ashr <4 x i16> [[TMP3]], splat (i16 3)7316// CHECK-NEXT:    [[TMP4:%.*]] = add <4 x i16> [[TMP2]], [[VSRA_N]]7317// CHECK-NEXT:    ret <4 x i16> [[TMP4]]7318//7319int16x4_t test_vsra_n_s16(int16x4_t a, int16x4_t b) {7320  return vsra_n_s16(a, b, 3);7321}7322 7323// CHECK-LABEL: define dso_local <2 x i32> @test_vsra_n_s32(7324// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7325// CHECK-NEXT:  [[ENTRY:.*:]]7326// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7327// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>7328// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7329// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>7330// CHECK-NEXT:    [[VSRA_N:%.*]] = ashr <2 x i32> [[TMP3]], splat (i32 3)7331// CHECK-NEXT:    [[TMP4:%.*]] = add <2 x i32> [[TMP2]], [[VSRA_N]]7332// CHECK-NEXT:    ret <2 x i32> [[TMP4]]7333//7334int32x2_t test_vsra_n_s32(int32x2_t a, int32x2_t b) {7335  return vsra_n_s32(a, b, 3);7336}7337 7338// CHECK-LABEL: define dso_local <16 x i8> @test_vsraq_n_s8(7339// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7340// CHECK-NEXT:  [[ENTRY:.*:]]7341// CHECK-NEXT:    [[VSRA_N:%.*]] = ashr <16 x i8> [[B]], splat (i8 3)7342// CHECK-NEXT:    [[TMP0:%.*]] = add <16 x i8> [[A]], [[VSRA_N]]7343// CHECK-NEXT:    ret <16 x i8> [[TMP0]]7344//7345int8x16_t test_vsraq_n_s8(int8x16_t a, int8x16_t b) {7346  return vsraq_n_s8(a, b, 3);7347}7348 7349// CHECK-LABEL: define dso_local <8 x i16> @test_vsraq_n_s16(7350// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7351// CHECK-NEXT:  [[ENTRY:.*:]]7352// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7353// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>7354// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7355// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>7356// CHECK-NEXT:    [[VSRA_N:%.*]] = ashr <8 x i16> [[TMP3]], splat (i16 3)7357// CHECK-NEXT:    [[TMP4:%.*]] = add <8 x i16> [[TMP2]], [[VSRA_N]]7358// CHECK-NEXT:    ret <8 x i16> [[TMP4]]7359//7360int16x8_t test_vsraq_n_s16(int16x8_t a, int16x8_t b) {7361  return vsraq_n_s16(a, b, 3);7362}7363 7364// CHECK-LABEL: define dso_local <4 x i32> @test_vsraq_n_s32(7365// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7366// CHECK-NEXT:  [[ENTRY:.*:]]7367// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7368// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>7369// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7370// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>7371// CHECK-NEXT:    [[VSRA_N:%.*]] = ashr <4 x i32> [[TMP3]], splat (i32 3)7372// CHECK-NEXT:    [[TMP4:%.*]] = add <4 x i32> [[TMP2]], [[VSRA_N]]7373// CHECK-NEXT:    ret <4 x i32> [[TMP4]]7374//7375int32x4_t test_vsraq_n_s32(int32x4_t a, int32x4_t b) {7376  return vsraq_n_s32(a, b, 3);7377}7378 7379// CHECK-LABEL: define dso_local <2 x i64> @test_vsraq_n_s64(7380// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {7381// CHECK-NEXT:  [[ENTRY:.*:]]7382// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7383// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>7384// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7385// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>7386// CHECK-NEXT:    [[VSRA_N:%.*]] = ashr <2 x i64> [[TMP3]], splat (i64 3)7387// CHECK-NEXT:    [[TMP4:%.*]] = add <2 x i64> [[TMP2]], [[VSRA_N]]7388// CHECK-NEXT:    ret <2 x i64> [[TMP4]]7389//7390int64x2_t test_vsraq_n_s64(int64x2_t a, int64x2_t b) {7391  return vsraq_n_s64(a, b, 3);7392}7393 7394// CHECK-LABEL: define dso_local <8 x i8> @test_vsra_n_u8(7395// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7396// CHECK-NEXT:  [[ENTRY:.*:]]7397// CHECK-NEXT:    [[VSRA_N:%.*]] = lshr <8 x i8> [[B]], splat (i8 3)7398// CHECK-NEXT:    [[TMP0:%.*]] = add <8 x i8> [[A]], [[VSRA_N]]7399// CHECK-NEXT:    ret <8 x i8> [[TMP0]]7400//7401uint8x8_t test_vsra_n_u8(uint8x8_t a, uint8x8_t b) {7402  return vsra_n_u8(a, b, 3);7403}7404 7405// CHECK-LABEL: define dso_local <4 x i16> @test_vsra_n_u16(7406// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7407// CHECK-NEXT:  [[ENTRY:.*:]]7408// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7409// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>7410// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7411// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>7412// CHECK-NEXT:    [[VSRA_N:%.*]] = lshr <4 x i16> [[TMP3]], splat (i16 3)7413// CHECK-NEXT:    [[TMP4:%.*]] = add <4 x i16> [[TMP2]], [[VSRA_N]]7414// CHECK-NEXT:    ret <4 x i16> [[TMP4]]7415//7416uint16x4_t test_vsra_n_u16(uint16x4_t a, uint16x4_t b) {7417  return vsra_n_u16(a, b, 3);7418}7419 7420// CHECK-LABEL: define dso_local <2 x i32> @test_vsra_n_u32(7421// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7422// CHECK-NEXT:  [[ENTRY:.*:]]7423// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7424// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>7425// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7426// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>7427// CHECK-NEXT:    [[VSRA_N:%.*]] = lshr <2 x i32> [[TMP3]], splat (i32 3)7428// CHECK-NEXT:    [[TMP4:%.*]] = add <2 x i32> [[TMP2]], [[VSRA_N]]7429// CHECK-NEXT:    ret <2 x i32> [[TMP4]]7430//7431uint32x2_t test_vsra_n_u32(uint32x2_t a, uint32x2_t b) {7432  return vsra_n_u32(a, b, 3);7433}7434 7435// CHECK-LABEL: define dso_local <16 x i8> @test_vsraq_n_u8(7436// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7437// CHECK-NEXT:  [[ENTRY:.*:]]7438// CHECK-NEXT:    [[VSRA_N:%.*]] = lshr <16 x i8> [[B]], splat (i8 3)7439// CHECK-NEXT:    [[TMP0:%.*]] = add <16 x i8> [[A]], [[VSRA_N]]7440// CHECK-NEXT:    ret <16 x i8> [[TMP0]]7441//7442uint8x16_t test_vsraq_n_u8(uint8x16_t a, uint8x16_t b) {7443  return vsraq_n_u8(a, b, 3);7444}7445 7446// CHECK-LABEL: define dso_local <8 x i16> @test_vsraq_n_u16(7447// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7448// CHECK-NEXT:  [[ENTRY:.*:]]7449// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7450// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>7451// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7452// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>7453// CHECK-NEXT:    [[VSRA_N:%.*]] = lshr <8 x i16> [[TMP3]], splat (i16 3)7454// CHECK-NEXT:    [[TMP4:%.*]] = add <8 x i16> [[TMP2]], [[VSRA_N]]7455// CHECK-NEXT:    ret <8 x i16> [[TMP4]]7456//7457uint16x8_t test_vsraq_n_u16(uint16x8_t a, uint16x8_t b) {7458  return vsraq_n_u16(a, b, 3);7459}7460 7461// CHECK-LABEL: define dso_local <4 x i32> @test_vsraq_n_u32(7462// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7463// CHECK-NEXT:  [[ENTRY:.*:]]7464// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7465// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>7466// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7467// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>7468// CHECK-NEXT:    [[VSRA_N:%.*]] = lshr <4 x i32> [[TMP3]], splat (i32 3)7469// CHECK-NEXT:    [[TMP4:%.*]] = add <4 x i32> [[TMP2]], [[VSRA_N]]7470// CHECK-NEXT:    ret <4 x i32> [[TMP4]]7471//7472uint32x4_t test_vsraq_n_u32(uint32x4_t a, uint32x4_t b) {7473  return vsraq_n_u32(a, b, 3);7474}7475 7476// CHECK-LABEL: define dso_local <2 x i64> @test_vsraq_n_u64(7477// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {7478// CHECK-NEXT:  [[ENTRY:.*:]]7479// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7480// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>7481// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7482// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>7483// CHECK-NEXT:    [[VSRA_N:%.*]] = lshr <2 x i64> [[TMP3]], splat (i64 3)7484// CHECK-NEXT:    [[TMP4:%.*]] = add <2 x i64> [[TMP2]], [[VSRA_N]]7485// CHECK-NEXT:    ret <2 x i64> [[TMP4]]7486//7487uint64x2_t test_vsraq_n_u64(uint64x2_t a, uint64x2_t b) {7488  return vsraq_n_u64(a, b, 3);7489}7490 7491// CHECK-LABEL: define dso_local <8 x i8> @test_vrshr_n_s8(7492// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7493// CHECK-NEXT:  [[ENTRY:.*:]]7494// CHECK-NEXT:    [[VRSHR_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.srshl.v8i8(<8 x i8> [[A]], <8 x i8> splat (i8 -3))7495// CHECK-NEXT:    ret <8 x i8> [[VRSHR_N]]7496//7497int8x8_t test_vrshr_n_s8(int8x8_t a) {7498  return vrshr_n_s8(a, 3);7499}7500 7501// CHECK-LABEL: define dso_local <4 x i16> @test_vrshr_n_s16(7502// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7503// CHECK-NEXT:  [[ENTRY:.*:]]7504// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7505// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7506// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.srshl.v4i16(<4 x i16> [[VRSHR_N]], <4 x i16> splat (i16 -3))7507// CHECK-NEXT:    ret <4 x i16> [[VRSHR_N1]]7508//7509int16x4_t test_vrshr_n_s16(int16x4_t a) {7510  return vrshr_n_s16(a, 3);7511}7512 7513// CHECK-LABEL: define dso_local <2 x i32> @test_vrshr_n_s32(7514// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7515// CHECK-NEXT:  [[ENTRY:.*:]]7516// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7517// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7518// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.srshl.v2i32(<2 x i32> [[VRSHR_N]], <2 x i32> splat (i32 -3))7519// CHECK-NEXT:    ret <2 x i32> [[VRSHR_N1]]7520//7521int32x2_t test_vrshr_n_s32(int32x2_t a) {7522  return vrshr_n_s32(a, 3);7523}7524 7525// CHECK-LABEL: define dso_local <16 x i8> @test_vrshrq_n_s8(7526// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7527// CHECK-NEXT:  [[ENTRY:.*:]]7528// CHECK-NEXT:    [[VRSHR_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.srshl.v16i8(<16 x i8> [[A]], <16 x i8> splat (i8 -3))7529// CHECK-NEXT:    ret <16 x i8> [[VRSHR_N]]7530//7531int8x16_t test_vrshrq_n_s8(int8x16_t a) {7532  return vrshrq_n_s8(a, 3);7533}7534 7535// CHECK-LABEL: define dso_local <8 x i16> @test_vrshrq_n_s16(7536// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7537// CHECK-NEXT:  [[ENTRY:.*:]]7538// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7539// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7540// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.srshl.v8i16(<8 x i16> [[VRSHR_N]], <8 x i16> splat (i16 -3))7541// CHECK-NEXT:    ret <8 x i16> [[VRSHR_N1]]7542//7543int16x8_t test_vrshrq_n_s16(int16x8_t a) {7544  return vrshrq_n_s16(a, 3);7545}7546 7547// CHECK-LABEL: define dso_local <4 x i32> @test_vrshrq_n_s32(7548// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7549// CHECK-NEXT:  [[ENTRY:.*:]]7550// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7551// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7552// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.srshl.v4i32(<4 x i32> [[VRSHR_N]], <4 x i32> splat (i32 -3))7553// CHECK-NEXT:    ret <4 x i32> [[VRSHR_N1]]7554//7555int32x4_t test_vrshrq_n_s32(int32x4_t a) {7556  return vrshrq_n_s32(a, 3);7557}7558 7559// CHECK-LABEL: define dso_local <2 x i64> @test_vrshrq_n_s64(7560// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {7561// CHECK-NEXT:  [[ENTRY:.*:]]7562// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7563// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7564// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.srshl.v2i64(<2 x i64> [[VRSHR_N]], <2 x i64> splat (i64 -3))7565// CHECK-NEXT:    ret <2 x i64> [[VRSHR_N1]]7566//7567int64x2_t test_vrshrq_n_s64(int64x2_t a) {7568  return vrshrq_n_s64(a, 3);7569}7570 7571// CHECK-LABEL: define dso_local <8 x i8> @test_vrshr_n_u8(7572// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7573// CHECK-NEXT:  [[ENTRY:.*:]]7574// CHECK-NEXT:    [[VRSHR_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.urshl.v8i8(<8 x i8> [[A]], <8 x i8> splat (i8 -3))7575// CHECK-NEXT:    ret <8 x i8> [[VRSHR_N]]7576//7577uint8x8_t test_vrshr_n_u8(uint8x8_t a) {7578  return vrshr_n_u8(a, 3);7579}7580 7581// CHECK-LABEL: define dso_local <4 x i16> @test_vrshr_n_u16(7582// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7583// CHECK-NEXT:  [[ENTRY:.*:]]7584// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7585// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7586// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.urshl.v4i16(<4 x i16> [[VRSHR_N]], <4 x i16> splat (i16 -3))7587// CHECK-NEXT:    ret <4 x i16> [[VRSHR_N1]]7588//7589uint16x4_t test_vrshr_n_u16(uint16x4_t a) {7590  return vrshr_n_u16(a, 3);7591}7592 7593// CHECK-LABEL: define dso_local <2 x i32> @test_vrshr_n_u32(7594// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7595// CHECK-NEXT:  [[ENTRY:.*:]]7596// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7597// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7598// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.urshl.v2i32(<2 x i32> [[VRSHR_N]], <2 x i32> splat (i32 -3))7599// CHECK-NEXT:    ret <2 x i32> [[VRSHR_N1]]7600//7601uint32x2_t test_vrshr_n_u32(uint32x2_t a) {7602  return vrshr_n_u32(a, 3);7603}7604 7605// CHECK-LABEL: define dso_local <16 x i8> @test_vrshrq_n_u8(7606// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {7607// CHECK-NEXT:  [[ENTRY:.*:]]7608// CHECK-NEXT:    [[VRSHR_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.urshl.v16i8(<16 x i8> [[A]], <16 x i8> splat (i8 -3))7609// CHECK-NEXT:    ret <16 x i8> [[VRSHR_N]]7610//7611uint8x16_t test_vrshrq_n_u8(uint8x16_t a) {7612  return vrshrq_n_u8(a, 3);7613}7614 7615// CHECK-LABEL: define dso_local <8 x i16> @test_vrshrq_n_u16(7616// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {7617// CHECK-NEXT:  [[ENTRY:.*:]]7618// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7619// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7620// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.urshl.v8i16(<8 x i16> [[VRSHR_N]], <8 x i16> splat (i16 -3))7621// CHECK-NEXT:    ret <8 x i16> [[VRSHR_N1]]7622//7623uint16x8_t test_vrshrq_n_u16(uint16x8_t a) {7624  return vrshrq_n_u16(a, 3);7625}7626 7627// CHECK-LABEL: define dso_local <4 x i32> @test_vrshrq_n_u32(7628// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {7629// CHECK-NEXT:  [[ENTRY:.*:]]7630// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7631// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7632// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.urshl.v4i32(<4 x i32> [[VRSHR_N]], <4 x i32> splat (i32 -3))7633// CHECK-NEXT:    ret <4 x i32> [[VRSHR_N1]]7634//7635uint32x4_t test_vrshrq_n_u32(uint32x4_t a) {7636  return vrshrq_n_u32(a, 3);7637}7638 7639// CHECK-LABEL: define dso_local <2 x i64> @test_vrshrq_n_u64(7640// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {7641// CHECK-NEXT:  [[ENTRY:.*:]]7642// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7643// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7644// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.urshl.v2i64(<2 x i64> [[VRSHR_N]], <2 x i64> splat (i64 -3))7645// CHECK-NEXT:    ret <2 x i64> [[VRSHR_N1]]7646//7647uint64x2_t test_vrshrq_n_u64(uint64x2_t a) {7648  return vrshrq_n_u64(a, 3);7649}7650 7651// CHECK-LABEL: define dso_local <8 x i8> @test_vrsra_n_s8(7652// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7653// CHECK-NEXT:  [[ENTRY:.*:]]7654// CHECK-NEXT:    [[VRSHR_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.srshl.v8i8(<8 x i8> [[B]], <8 x i8> splat (i8 -3))7655// CHECK-NEXT:    [[TMP0:%.*]] = add <8 x i8> [[A]], [[VRSHR_N]]7656// CHECK-NEXT:    ret <8 x i8> [[TMP0]]7657//7658int8x8_t test_vrsra_n_s8(int8x8_t a, int8x8_t b) {7659  return vrsra_n_s8(a, b, 3);7660}7661 7662// CHECK-LABEL: define dso_local <4 x i16> @test_vrsra_n_s16(7663// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7664// CHECK-NEXT:  [[ENTRY:.*:]]7665// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7666// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>7667// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>7668// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.srshl.v4i16(<4 x i16> [[VRSHR_N]], <4 x i16> splat (i16 -3))7669// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7670// CHECK-NEXT:    [[TMP3:%.*]] = add <4 x i16> [[TMP2]], [[VRSHR_N1]]7671// CHECK-NEXT:    ret <4 x i16> [[TMP3]]7672//7673int16x4_t test_vrsra_n_s16(int16x4_t a, int16x4_t b) {7674  return vrsra_n_s16(a, b, 3);7675}7676 7677// CHECK-LABEL: define dso_local <2 x i32> @test_vrsra_n_s32(7678// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7679// CHECK-NEXT:  [[ENTRY:.*:]]7680// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7681// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>7682// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>7683// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.srshl.v2i32(<2 x i32> [[VRSHR_N]], <2 x i32> splat (i32 -3))7684// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7685// CHECK-NEXT:    [[TMP3:%.*]] = add <2 x i32> [[TMP2]], [[VRSHR_N1]]7686// CHECK-NEXT:    ret <2 x i32> [[TMP3]]7687//7688int32x2_t test_vrsra_n_s32(int32x2_t a, int32x2_t b) {7689  return vrsra_n_s32(a, b, 3);7690}7691 7692// CHECK-LABEL: define dso_local <16 x i8> @test_vrsraq_n_s8(7693// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7694// CHECK-NEXT:  [[ENTRY:.*:]]7695// CHECK-NEXT:    [[VRSHR_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.srshl.v16i8(<16 x i8> [[B]], <16 x i8> splat (i8 -3))7696// CHECK-NEXT:    [[TMP0:%.*]] = add <16 x i8> [[A]], [[VRSHR_N]]7697// CHECK-NEXT:    ret <16 x i8> [[TMP0]]7698//7699int8x16_t test_vrsraq_n_s8(int8x16_t a, int8x16_t b) {7700  return vrsraq_n_s8(a, b, 3);7701}7702 7703// CHECK-LABEL: define dso_local <8 x i16> @test_vrsraq_n_s16(7704// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7705// CHECK-NEXT:  [[ENTRY:.*:]]7706// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7707// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>7708// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>7709// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.srshl.v8i16(<8 x i16> [[VRSHR_N]], <8 x i16> splat (i16 -3))7710// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7711// CHECK-NEXT:    [[TMP3:%.*]] = add <8 x i16> [[TMP2]], [[VRSHR_N1]]7712// CHECK-NEXT:    ret <8 x i16> [[TMP3]]7713//7714int16x8_t test_vrsraq_n_s16(int16x8_t a, int16x8_t b) {7715  return vrsraq_n_s16(a, b, 3);7716}7717 7718// CHECK-LABEL: define dso_local <4 x i32> @test_vrsraq_n_s32(7719// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7720// CHECK-NEXT:  [[ENTRY:.*:]]7721// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7722// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>7723// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>7724// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.srshl.v4i32(<4 x i32> [[VRSHR_N]], <4 x i32> splat (i32 -3))7725// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7726// CHECK-NEXT:    [[TMP3:%.*]] = add <4 x i32> [[TMP2]], [[VRSHR_N1]]7727// CHECK-NEXT:    ret <4 x i32> [[TMP3]]7728//7729int32x4_t test_vrsraq_n_s32(int32x4_t a, int32x4_t b) {7730  return vrsraq_n_s32(a, b, 3);7731}7732 7733// CHECK-LABEL: define dso_local <2 x i64> @test_vrsraq_n_s64(7734// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {7735// CHECK-NEXT:  [[ENTRY:.*:]]7736// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7737// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>7738// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>7739// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.srshl.v2i64(<2 x i64> [[VRSHR_N]], <2 x i64> splat (i64 -3))7740// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7741// CHECK-NEXT:    [[TMP3:%.*]] = add <2 x i64> [[TMP2]], [[VRSHR_N1]]7742// CHECK-NEXT:    ret <2 x i64> [[TMP3]]7743//7744int64x2_t test_vrsraq_n_s64(int64x2_t a, int64x2_t b) {7745  return vrsraq_n_s64(a, b, 3);7746}7747 7748// CHECK-LABEL: define dso_local <8 x i8> @test_vrsra_n_u8(7749// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7750// CHECK-NEXT:  [[ENTRY:.*:]]7751// CHECK-NEXT:    [[VRSHR_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.urshl.v8i8(<8 x i8> [[B]], <8 x i8> splat (i8 -3))7752// CHECK-NEXT:    [[TMP0:%.*]] = add <8 x i8> [[A]], [[VRSHR_N]]7753// CHECK-NEXT:    ret <8 x i8> [[TMP0]]7754//7755uint8x8_t test_vrsra_n_u8(uint8x8_t a, uint8x8_t b) {7756  return vrsra_n_u8(a, b, 3);7757}7758 7759// CHECK-LABEL: define dso_local <4 x i16> @test_vrsra_n_u16(7760// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7761// CHECK-NEXT:  [[ENTRY:.*:]]7762// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7763// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>7764// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>7765// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.urshl.v4i16(<4 x i16> [[VRSHR_N]], <4 x i16> splat (i16 -3))7766// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7767// CHECK-NEXT:    [[TMP3:%.*]] = add <4 x i16> [[TMP2]], [[VRSHR_N1]]7768// CHECK-NEXT:    ret <4 x i16> [[TMP3]]7769//7770uint16x4_t test_vrsra_n_u16(uint16x4_t a, uint16x4_t b) {7771  return vrsra_n_u16(a, b, 3);7772}7773 7774// CHECK-LABEL: define dso_local <2 x i32> @test_vrsra_n_u32(7775// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7776// CHECK-NEXT:  [[ENTRY:.*:]]7777// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7778// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>7779// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>7780// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.urshl.v2i32(<2 x i32> [[VRSHR_N]], <2 x i32> splat (i32 -3))7781// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7782// CHECK-NEXT:    [[TMP3:%.*]] = add <2 x i32> [[TMP2]], [[VRSHR_N1]]7783// CHECK-NEXT:    ret <2 x i32> [[TMP3]]7784//7785uint32x2_t test_vrsra_n_u32(uint32x2_t a, uint32x2_t b) {7786  return vrsra_n_u32(a, b, 3);7787}7788 7789// CHECK-LABEL: define dso_local <16 x i8> @test_vrsraq_n_u8(7790// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7791// CHECK-NEXT:  [[ENTRY:.*:]]7792// CHECK-NEXT:    [[VRSHR_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.urshl.v16i8(<16 x i8> [[B]], <16 x i8> splat (i8 -3))7793// CHECK-NEXT:    [[TMP0:%.*]] = add <16 x i8> [[A]], [[VRSHR_N]]7794// CHECK-NEXT:    ret <16 x i8> [[TMP0]]7795//7796uint8x16_t test_vrsraq_n_u8(uint8x16_t a, uint8x16_t b) {7797  return vrsraq_n_u8(a, b, 3);7798}7799 7800// CHECK-LABEL: define dso_local <8 x i16> @test_vrsraq_n_u16(7801// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7802// CHECK-NEXT:  [[ENTRY:.*:]]7803// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7804// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>7805// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>7806// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.urshl.v8i16(<8 x i16> [[VRSHR_N]], <8 x i16> splat (i16 -3))7807// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7808// CHECK-NEXT:    [[TMP3:%.*]] = add <8 x i16> [[TMP2]], [[VRSHR_N1]]7809// CHECK-NEXT:    ret <8 x i16> [[TMP3]]7810//7811uint16x8_t test_vrsraq_n_u16(uint16x8_t a, uint16x8_t b) {7812  return vrsraq_n_u16(a, b, 3);7813}7814 7815// CHECK-LABEL: define dso_local <4 x i32> @test_vrsraq_n_u32(7816// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7817// CHECK-NEXT:  [[ENTRY:.*:]]7818// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7819// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>7820// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>7821// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.urshl.v4i32(<4 x i32> [[VRSHR_N]], <4 x i32> splat (i32 -3))7822// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7823// CHECK-NEXT:    [[TMP3:%.*]] = add <4 x i32> [[TMP2]], [[VRSHR_N1]]7824// CHECK-NEXT:    ret <4 x i32> [[TMP3]]7825//7826uint32x4_t test_vrsraq_n_u32(uint32x4_t a, uint32x4_t b) {7827  return vrsraq_n_u32(a, b, 3);7828}7829 7830// CHECK-LABEL: define dso_local <2 x i64> @test_vrsraq_n_u64(7831// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {7832// CHECK-NEXT:  [[ENTRY:.*:]]7833// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7834// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>7835// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>7836// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.urshl.v2i64(<2 x i64> [[VRSHR_N]], <2 x i64> splat (i64 -3))7837// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7838// CHECK-NEXT:    [[TMP3:%.*]] = add <2 x i64> [[TMP2]], [[VRSHR_N1]]7839// CHECK-NEXT:    ret <2 x i64> [[TMP3]]7840//7841uint64x2_t test_vrsraq_n_u64(uint64x2_t a, uint64x2_t b) {7842  return vrsraq_n_u64(a, b, 3);7843}7844 7845// CHECK-LABEL: define dso_local <8 x i8> @test_vsri_n_s8(7846// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7847// CHECK-NEXT:  [[ENTRY:.*:]]7848// CHECK-NEXT:    [[VSRI_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.vsri.v8i8(<8 x i8> [[A]], <8 x i8> [[B]], i32 3)7849// CHECK-NEXT:    ret <8 x i8> [[VSRI_N]]7850//7851int8x8_t test_vsri_n_s8(int8x8_t a, int8x8_t b) {7852  return vsri_n_s8(a, b, 3);7853}7854 7855// CHECK-LABEL: define dso_local <4 x i16> @test_vsri_n_s16(7856// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7857// CHECK-NEXT:  [[ENTRY:.*:]]7858// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7859// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>7860// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7861// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>7862// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <4 x i16> @llvm.aarch64.neon.vsri.v4i16(<4 x i16> [[VSRI_N]], <4 x i16> [[VSRI_N1]], i32 3)7863// CHECK-NEXT:    ret <4 x i16> [[VSRI_N2]]7864//7865int16x4_t test_vsri_n_s16(int16x4_t a, int16x4_t b) {7866  return vsri_n_s16(a, b, 3);7867}7868 7869// CHECK-LABEL: define dso_local <2 x i32> @test_vsri_n_s32(7870// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7871// CHECK-NEXT:  [[ENTRY:.*:]]7872// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7873// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>7874// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7875// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>7876// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <2 x i32> @llvm.aarch64.neon.vsri.v2i32(<2 x i32> [[VSRI_N]], <2 x i32> [[VSRI_N1]], i32 3)7877// CHECK-NEXT:    ret <2 x i32> [[VSRI_N2]]7878//7879int32x2_t test_vsri_n_s32(int32x2_t a, int32x2_t b) {7880  return vsri_n_s32(a, b, 3);7881}7882 7883// CHECK-LABEL: define dso_local <16 x i8> @test_vsriq_n_s8(7884// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7885// CHECK-NEXT:  [[ENTRY:.*:]]7886// CHECK-NEXT:    [[VSRI_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.vsri.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], i32 3)7887// CHECK-NEXT:    ret <16 x i8> [[VSRI_N]]7888//7889int8x16_t test_vsriq_n_s8(int8x16_t a, int8x16_t b) {7890  return vsriq_n_s8(a, b, 3);7891}7892 7893// CHECK-LABEL: define dso_local <8 x i16> @test_vsriq_n_s16(7894// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7895// CHECK-NEXT:  [[ENTRY:.*:]]7896// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7897// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>7898// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7899// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>7900// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <8 x i16> @llvm.aarch64.neon.vsri.v8i16(<8 x i16> [[VSRI_N]], <8 x i16> [[VSRI_N1]], i32 3)7901// CHECK-NEXT:    ret <8 x i16> [[VSRI_N2]]7902//7903int16x8_t test_vsriq_n_s16(int16x8_t a, int16x8_t b) {7904  return vsriq_n_s16(a, b, 3);7905}7906 7907// CHECK-LABEL: define dso_local <4 x i32> @test_vsriq_n_s32(7908// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7909// CHECK-NEXT:  [[ENTRY:.*:]]7910// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>7911// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>7912// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>7913// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>7914// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <4 x i32> @llvm.aarch64.neon.vsri.v4i32(<4 x i32> [[VSRI_N]], <4 x i32> [[VSRI_N1]], i32 3)7915// CHECK-NEXT:    ret <4 x i32> [[VSRI_N2]]7916//7917int32x4_t test_vsriq_n_s32(int32x4_t a, int32x4_t b) {7918  return vsriq_n_s32(a, b, 3);7919}7920 7921// CHECK-LABEL: define dso_local <2 x i64> @test_vsriq_n_s64(7922// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {7923// CHECK-NEXT:  [[ENTRY:.*:]]7924// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>7925// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>7926// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>7927// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>7928// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <2 x i64> @llvm.aarch64.neon.vsri.v2i64(<2 x i64> [[VSRI_N]], <2 x i64> [[VSRI_N1]], i32 3)7929// CHECK-NEXT:    ret <2 x i64> [[VSRI_N2]]7930//7931int64x2_t test_vsriq_n_s64(int64x2_t a, int64x2_t b) {7932  return vsriq_n_s64(a, b, 3);7933}7934 7935// CHECK-LABEL: define dso_local <8 x i8> @test_vsri_n_u8(7936// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7937// CHECK-NEXT:  [[ENTRY:.*:]]7938// CHECK-NEXT:    [[VSRI_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.vsri.v8i8(<8 x i8> [[A]], <8 x i8> [[B]], i32 3)7939// CHECK-NEXT:    ret <8 x i8> [[VSRI_N]]7940//7941uint8x8_t test_vsri_n_u8(uint8x8_t a, uint8x8_t b) {7942  return vsri_n_u8(a, b, 3);7943}7944 7945// CHECK-LABEL: define dso_local <4 x i16> @test_vsri_n_u16(7946// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7947// CHECK-NEXT:  [[ENTRY:.*:]]7948// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>7949// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>7950// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>7951// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>7952// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <4 x i16> @llvm.aarch64.neon.vsri.v4i16(<4 x i16> [[VSRI_N]], <4 x i16> [[VSRI_N1]], i32 3)7953// CHECK-NEXT:    ret <4 x i16> [[VSRI_N2]]7954//7955uint16x4_t test_vsri_n_u16(uint16x4_t a, uint16x4_t b) {7956  return vsri_n_u16(a, b, 3);7957}7958 7959// CHECK-LABEL: define dso_local <2 x i32> @test_vsri_n_u32(7960// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7961// CHECK-NEXT:  [[ENTRY:.*:]]7962// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>7963// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>7964// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>7965// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>7966// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <2 x i32> @llvm.aarch64.neon.vsri.v2i32(<2 x i32> [[VSRI_N]], <2 x i32> [[VSRI_N1]], i32 3)7967// CHECK-NEXT:    ret <2 x i32> [[VSRI_N2]]7968//7969uint32x2_t test_vsri_n_u32(uint32x2_t a, uint32x2_t b) {7970  return vsri_n_u32(a, b, 3);7971}7972 7973// CHECK-LABEL: define dso_local <16 x i8> @test_vsriq_n_u8(7974// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {7975// CHECK-NEXT:  [[ENTRY:.*:]]7976// CHECK-NEXT:    [[VSRI_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.vsri.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], i32 3)7977// CHECK-NEXT:    ret <16 x i8> [[VSRI_N]]7978//7979uint8x16_t test_vsriq_n_u8(uint8x16_t a, uint8x16_t b) {7980  return vsriq_n_u8(a, b, 3);7981}7982 7983// CHECK-LABEL: define dso_local <8 x i16> @test_vsriq_n_u16(7984// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {7985// CHECK-NEXT:  [[ENTRY:.*:]]7986// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>7987// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>7988// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>7989// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>7990// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <8 x i16> @llvm.aarch64.neon.vsri.v8i16(<8 x i16> [[VSRI_N]], <8 x i16> [[VSRI_N1]], i32 3)7991// CHECK-NEXT:    ret <8 x i16> [[VSRI_N2]]7992//7993uint16x8_t test_vsriq_n_u16(uint16x8_t a, uint16x8_t b) {7994  return vsriq_n_u16(a, b, 3);7995}7996 7997// CHECK-LABEL: define dso_local <4 x i32> @test_vsriq_n_u32(7998// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {7999// CHECK-NEXT:  [[ENTRY:.*:]]8000// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8001// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8002// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8003// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>8004// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <4 x i32> @llvm.aarch64.neon.vsri.v4i32(<4 x i32> [[VSRI_N]], <4 x i32> [[VSRI_N1]], i32 3)8005// CHECK-NEXT:    ret <4 x i32> [[VSRI_N2]]8006//8007uint32x4_t test_vsriq_n_u32(uint32x4_t a, uint32x4_t b) {8008  return vsriq_n_u32(a, b, 3);8009}8010 8011// CHECK-LABEL: define dso_local <2 x i64> @test_vsriq_n_u64(8012// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8013// CHECK-NEXT:  [[ENTRY:.*:]]8014// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8015// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8016// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8017// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>8018// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <2 x i64> @llvm.aarch64.neon.vsri.v2i64(<2 x i64> [[VSRI_N]], <2 x i64> [[VSRI_N1]], i32 3)8019// CHECK-NEXT:    ret <2 x i64> [[VSRI_N2]]8020//8021uint64x2_t test_vsriq_n_u64(uint64x2_t a, uint64x2_t b) {8022  return vsriq_n_u64(a, b, 3);8023}8024 8025// CHECK-LABEL: define dso_local <8 x i8> @test_vsri_n_p8(8026// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {8027// CHECK-NEXT:  [[ENTRY:.*:]]8028// CHECK-NEXT:    [[VSRI_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.vsri.v8i8(<8 x i8> [[A]], <8 x i8> [[B]], i32 3)8029// CHECK-NEXT:    ret <8 x i8> [[VSRI_N]]8030//8031poly8x8_t test_vsri_n_p8(poly8x8_t a, poly8x8_t b) {8032  return vsri_n_p8(a, b, 3);8033}8034 8035// CHECK-LABEL: define dso_local <4 x i16> @test_vsri_n_p16(8036// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8037// CHECK-NEXT:  [[ENTRY:.*:]]8038// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>8039// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>8040// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>8041// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>8042// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <4 x i16> @llvm.aarch64.neon.vsri.v4i16(<4 x i16> [[VSRI_N]], <4 x i16> [[VSRI_N1]], i32 15)8043// CHECK-NEXT:    ret <4 x i16> [[VSRI_N2]]8044//8045poly16x4_t test_vsri_n_p16(poly16x4_t a, poly16x4_t b) {8046  return vsri_n_p16(a, b, 15);8047}8048 8049// CHECK-LABEL: define dso_local <16 x i8> @test_vsriq_n_p8(8050// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {8051// CHECK-NEXT:  [[ENTRY:.*:]]8052// CHECK-NEXT:    [[VSRI_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.vsri.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], i32 3)8053// CHECK-NEXT:    ret <16 x i8> [[VSRI_N]]8054//8055poly8x16_t test_vsriq_n_p8(poly8x16_t a, poly8x16_t b) {8056  return vsriq_n_p8(a, b, 3);8057}8058 8059// CHECK-LABEL: define dso_local <8 x i16> @test_vsriq_n_p16(8060// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8061// CHECK-NEXT:  [[ENTRY:.*:]]8062// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8063// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8064// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8065// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>8066// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <8 x i16> @llvm.aarch64.neon.vsri.v8i16(<8 x i16> [[VSRI_N]], <8 x i16> [[VSRI_N1]], i32 15)8067// CHECK-NEXT:    ret <8 x i16> [[VSRI_N2]]8068//8069poly16x8_t test_vsriq_n_p16(poly16x8_t a, poly16x8_t b) {8070  return vsriq_n_p16(a, b, 15);8071}8072 8073// CHECK-LABEL: define dso_local <8 x i8> @test_vsli_n_s8(8074// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {8075// CHECK-NEXT:  [[ENTRY:.*:]]8076// CHECK-NEXT:    [[VSLI_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.vsli.v8i8(<8 x i8> [[A]], <8 x i8> [[B]], i32 3)8077// CHECK-NEXT:    ret <8 x i8> [[VSLI_N]]8078//8079int8x8_t test_vsli_n_s8(int8x8_t a, int8x8_t b) {8080  return vsli_n_s8(a, b, 3);8081}8082 8083// CHECK-LABEL: define dso_local <4 x i16> @test_vsli_n_s16(8084// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8085// CHECK-NEXT:  [[ENTRY:.*:]]8086// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>8087// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>8088// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>8089// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>8090// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <4 x i16> @llvm.aarch64.neon.vsli.v4i16(<4 x i16> [[VSLI_N]], <4 x i16> [[VSLI_N1]], i32 3)8091// CHECK-NEXT:    ret <4 x i16> [[VSLI_N2]]8092//8093int16x4_t test_vsli_n_s16(int16x4_t a, int16x4_t b) {8094  return vsli_n_s16(a, b, 3);8095}8096 8097// CHECK-LABEL: define dso_local <2 x i32> @test_vsli_n_s32(8098// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8099// CHECK-NEXT:  [[ENTRY:.*:]]8100// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>8101// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>8102// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>8103// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>8104// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <2 x i32> @llvm.aarch64.neon.vsli.v2i32(<2 x i32> [[VSLI_N]], <2 x i32> [[VSLI_N1]], i32 3)8105// CHECK-NEXT:    ret <2 x i32> [[VSLI_N2]]8106//8107int32x2_t test_vsli_n_s32(int32x2_t a, int32x2_t b) {8108  return vsli_n_s32(a, b, 3);8109}8110 8111// CHECK-LABEL: define dso_local <16 x i8> @test_vsliq_n_s8(8112// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {8113// CHECK-NEXT:  [[ENTRY:.*:]]8114// CHECK-NEXT:    [[VSLI_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.vsli.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], i32 3)8115// CHECK-NEXT:    ret <16 x i8> [[VSLI_N]]8116//8117int8x16_t test_vsliq_n_s8(int8x16_t a, int8x16_t b) {8118  return vsliq_n_s8(a, b, 3);8119}8120 8121// CHECK-LABEL: define dso_local <8 x i16> @test_vsliq_n_s16(8122// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8123// CHECK-NEXT:  [[ENTRY:.*:]]8124// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8125// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8126// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8127// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>8128// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <8 x i16> @llvm.aarch64.neon.vsli.v8i16(<8 x i16> [[VSLI_N]], <8 x i16> [[VSLI_N1]], i32 3)8129// CHECK-NEXT:    ret <8 x i16> [[VSLI_N2]]8130//8131int16x8_t test_vsliq_n_s16(int16x8_t a, int16x8_t b) {8132  return vsliq_n_s16(a, b, 3);8133}8134 8135// CHECK-LABEL: define dso_local <4 x i32> @test_vsliq_n_s32(8136// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8137// CHECK-NEXT:  [[ENTRY:.*:]]8138// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8139// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8140// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8141// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>8142// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <4 x i32> @llvm.aarch64.neon.vsli.v4i32(<4 x i32> [[VSLI_N]], <4 x i32> [[VSLI_N1]], i32 3)8143// CHECK-NEXT:    ret <4 x i32> [[VSLI_N2]]8144//8145int32x4_t test_vsliq_n_s32(int32x4_t a, int32x4_t b) {8146  return vsliq_n_s32(a, b, 3);8147}8148 8149// CHECK-LABEL: define dso_local <2 x i64> @test_vsliq_n_s64(8150// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8151// CHECK-NEXT:  [[ENTRY:.*:]]8152// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8153// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8154// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8155// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>8156// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <2 x i64> @llvm.aarch64.neon.vsli.v2i64(<2 x i64> [[VSLI_N]], <2 x i64> [[VSLI_N1]], i32 3)8157// CHECK-NEXT:    ret <2 x i64> [[VSLI_N2]]8158//8159int64x2_t test_vsliq_n_s64(int64x2_t a, int64x2_t b) {8160  return vsliq_n_s64(a, b, 3);8161}8162 8163// CHECK-LABEL: define dso_local <8 x i8> @test_vsli_n_u8(8164// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {8165// CHECK-NEXT:  [[ENTRY:.*:]]8166// CHECK-NEXT:    [[VSLI_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.vsli.v8i8(<8 x i8> [[A]], <8 x i8> [[B]], i32 3)8167// CHECK-NEXT:    ret <8 x i8> [[VSLI_N]]8168//8169uint8x8_t test_vsli_n_u8(uint8x8_t a, uint8x8_t b) {8170  return vsli_n_u8(a, b, 3);8171}8172 8173// CHECK-LABEL: define dso_local <4 x i16> @test_vsli_n_u16(8174// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8175// CHECK-NEXT:  [[ENTRY:.*:]]8176// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>8177// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>8178// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>8179// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>8180// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <4 x i16> @llvm.aarch64.neon.vsli.v4i16(<4 x i16> [[VSLI_N]], <4 x i16> [[VSLI_N1]], i32 3)8181// CHECK-NEXT:    ret <4 x i16> [[VSLI_N2]]8182//8183uint16x4_t test_vsli_n_u16(uint16x4_t a, uint16x4_t b) {8184  return vsli_n_u16(a, b, 3);8185}8186 8187// CHECK-LABEL: define dso_local <2 x i32> @test_vsli_n_u32(8188// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8189// CHECK-NEXT:  [[ENTRY:.*:]]8190// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>8191// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>8192// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>8193// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>8194// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <2 x i32> @llvm.aarch64.neon.vsli.v2i32(<2 x i32> [[VSLI_N]], <2 x i32> [[VSLI_N1]], i32 3)8195// CHECK-NEXT:    ret <2 x i32> [[VSLI_N2]]8196//8197uint32x2_t test_vsli_n_u32(uint32x2_t a, uint32x2_t b) {8198  return vsli_n_u32(a, b, 3);8199}8200 8201// CHECK-LABEL: define dso_local <16 x i8> @test_vsliq_n_u8(8202// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {8203// CHECK-NEXT:  [[ENTRY:.*:]]8204// CHECK-NEXT:    [[VSLI_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.vsli.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], i32 3)8205// CHECK-NEXT:    ret <16 x i8> [[VSLI_N]]8206//8207uint8x16_t test_vsliq_n_u8(uint8x16_t a, uint8x16_t b) {8208  return vsliq_n_u8(a, b, 3);8209}8210 8211// CHECK-LABEL: define dso_local <8 x i16> @test_vsliq_n_u16(8212// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8213// CHECK-NEXT:  [[ENTRY:.*:]]8214// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8215// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8216// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8217// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>8218// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <8 x i16> @llvm.aarch64.neon.vsli.v8i16(<8 x i16> [[VSLI_N]], <8 x i16> [[VSLI_N1]], i32 3)8219// CHECK-NEXT:    ret <8 x i16> [[VSLI_N2]]8220//8221uint16x8_t test_vsliq_n_u16(uint16x8_t a, uint16x8_t b) {8222  return vsliq_n_u16(a, b, 3);8223}8224 8225// CHECK-LABEL: define dso_local <4 x i32> @test_vsliq_n_u32(8226// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8227// CHECK-NEXT:  [[ENTRY:.*:]]8228// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8229// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8230// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8231// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>8232// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <4 x i32> @llvm.aarch64.neon.vsli.v4i32(<4 x i32> [[VSLI_N]], <4 x i32> [[VSLI_N1]], i32 3)8233// CHECK-NEXT:    ret <4 x i32> [[VSLI_N2]]8234//8235uint32x4_t test_vsliq_n_u32(uint32x4_t a, uint32x4_t b) {8236  return vsliq_n_u32(a, b, 3);8237}8238 8239// CHECK-LABEL: define dso_local <2 x i64> @test_vsliq_n_u64(8240// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8241// CHECK-NEXT:  [[ENTRY:.*:]]8242// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8243// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8244// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8245// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>8246// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <2 x i64> @llvm.aarch64.neon.vsli.v2i64(<2 x i64> [[VSLI_N]], <2 x i64> [[VSLI_N1]], i32 3)8247// CHECK-NEXT:    ret <2 x i64> [[VSLI_N2]]8248//8249uint64x2_t test_vsliq_n_u64(uint64x2_t a, uint64x2_t b) {8250  return vsliq_n_u64(a, b, 3);8251}8252 8253// CHECK-LABEL: define dso_local <8 x i8> @test_vsli_n_p8(8254// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {8255// CHECK-NEXT:  [[ENTRY:.*:]]8256// CHECK-NEXT:    [[VSLI_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.vsli.v8i8(<8 x i8> [[A]], <8 x i8> [[B]], i32 3)8257// CHECK-NEXT:    ret <8 x i8> [[VSLI_N]]8258//8259poly8x8_t test_vsli_n_p8(poly8x8_t a, poly8x8_t b) {8260  return vsli_n_p8(a, b, 3);8261}8262 8263// CHECK-LABEL: define dso_local <4 x i16> @test_vsli_n_p16(8264// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8265// CHECK-NEXT:  [[ENTRY:.*:]]8266// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>8267// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>8268// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>8269// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>8270// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <4 x i16> @llvm.aarch64.neon.vsli.v4i16(<4 x i16> [[VSLI_N]], <4 x i16> [[VSLI_N1]], i32 15)8271// CHECK-NEXT:    ret <4 x i16> [[VSLI_N2]]8272//8273poly16x4_t test_vsli_n_p16(poly16x4_t a, poly16x4_t b) {8274  return vsli_n_p16(a, b, 15);8275}8276 8277// CHECK-LABEL: define dso_local <16 x i8> @test_vsliq_n_p8(8278// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {8279// CHECK-NEXT:  [[ENTRY:.*:]]8280// CHECK-NEXT:    [[VSLI_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.vsli.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], i32 3)8281// CHECK-NEXT:    ret <16 x i8> [[VSLI_N]]8282//8283poly8x16_t test_vsliq_n_p8(poly8x16_t a, poly8x16_t b) {8284  return vsliq_n_p8(a, b, 3);8285}8286 8287// CHECK-LABEL: define dso_local <8 x i16> @test_vsliq_n_p16(8288// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8289// CHECK-NEXT:  [[ENTRY:.*:]]8290// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8291// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8292// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8293// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>8294// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <8 x i16> @llvm.aarch64.neon.vsli.v8i16(<8 x i16> [[VSLI_N]], <8 x i16> [[VSLI_N1]], i32 15)8295// CHECK-NEXT:    ret <8 x i16> [[VSLI_N2]]8296//8297poly16x8_t test_vsliq_n_p16(poly16x8_t a, poly16x8_t b) {8298  return vsliq_n_p16(a, b, 15);8299}8300 8301// CHECK-LABEL: define dso_local <8 x i8> @test_vqshlu_n_s8(8302// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {8303// CHECK-NEXT:  [[ENTRY:.*:]]8304// CHECK-NEXT:    [[VQSHLU_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshlu.v8i8(<8 x i8> [[A]], <8 x i8> splat (i8 3))8305// CHECK-NEXT:    ret <8 x i8> [[VQSHLU_N]]8306//8307uint8x8_t test_vqshlu_n_s8(int8x8_t a) {8308  return vqshlu_n_s8(a, 3);8309}8310 8311// CHECK-LABEL: define dso_local <4 x i16> @test_vqshlu_n_s16(8312// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8313// CHECK-NEXT:  [[ENTRY:.*:]]8314// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>8315// CHECK-NEXT:    [[VQSHLU_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>8316// CHECK-NEXT:    [[VQSHLU_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshlu.v4i16(<4 x i16> [[VQSHLU_N]], <4 x i16> splat (i16 3))8317// CHECK-NEXT:    ret <4 x i16> [[VQSHLU_N1]]8318//8319uint16x4_t test_vqshlu_n_s16(int16x4_t a) {8320  return vqshlu_n_s16(a, 3);8321}8322 8323// CHECK-LABEL: define dso_local <2 x i32> @test_vqshlu_n_s32(8324// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8325// CHECK-NEXT:  [[ENTRY:.*:]]8326// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>8327// CHECK-NEXT:    [[VQSHLU_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>8328// CHECK-NEXT:    [[VQSHLU_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqshlu.v2i32(<2 x i32> [[VQSHLU_N]], <2 x i32> splat (i32 3))8329// CHECK-NEXT:    ret <2 x i32> [[VQSHLU_N1]]8330//8331uint32x2_t test_vqshlu_n_s32(int32x2_t a) {8332  return vqshlu_n_s32(a, 3);8333}8334 8335// CHECK-LABEL: define dso_local <16 x i8> @test_vqshluq_n_s8(8336// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {8337// CHECK-NEXT:  [[ENTRY:.*:]]8338// CHECK-NEXT:    [[VQSHLU_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.sqshlu.v16i8(<16 x i8> [[A]], <16 x i8> splat (i8 3))8339// CHECK-NEXT:    ret <16 x i8> [[VQSHLU_N]]8340//8341uint8x16_t test_vqshluq_n_s8(int8x16_t a) {8342  return vqshluq_n_s8(a, 3);8343}8344 8345// CHECK-LABEL: define dso_local <8 x i16> @test_vqshluq_n_s16(8346// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8347// CHECK-NEXT:  [[ENTRY:.*:]]8348// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8349// CHECK-NEXT:    [[VQSHLU_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8350// CHECK-NEXT:    [[VQSHLU_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.sqshlu.v8i16(<8 x i16> [[VQSHLU_N]], <8 x i16> splat (i16 3))8351// CHECK-NEXT:    ret <8 x i16> [[VQSHLU_N1]]8352//8353uint16x8_t test_vqshluq_n_s16(int16x8_t a) {8354  return vqshluq_n_s16(a, 3);8355}8356 8357// CHECK-LABEL: define dso_local <4 x i32> @test_vqshluq_n_s32(8358// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8359// CHECK-NEXT:  [[ENTRY:.*:]]8360// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8361// CHECK-NEXT:    [[VQSHLU_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8362// CHECK-NEXT:    [[VQSHLU_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqshlu.v4i32(<4 x i32> [[VQSHLU_N]], <4 x i32> splat (i32 3))8363// CHECK-NEXT:    ret <4 x i32> [[VQSHLU_N1]]8364//8365uint32x4_t test_vqshluq_n_s32(int32x4_t a) {8366  return vqshluq_n_s32(a, 3);8367}8368 8369// CHECK-LABEL: define dso_local <2 x i64> @test_vqshluq_n_s64(8370// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8371// CHECK-NEXT:  [[ENTRY:.*:]]8372// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8373// CHECK-NEXT:    [[VQSHLU_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8374// CHECK-NEXT:    [[VQSHLU_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqshlu.v2i64(<2 x i64> [[VQSHLU_N]], <2 x i64> splat (i64 3))8375// CHECK-NEXT:    ret <2 x i64> [[VQSHLU_N1]]8376//8377uint64x2_t test_vqshluq_n_s64(int64x2_t a) {8378  return vqshluq_n_s64(a, 3);8379}8380 8381// CHECK-LABEL: define dso_local <8 x i8> @test_vshrn_n_s16(8382// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8383// CHECK-NEXT:  [[ENTRY:.*:]]8384// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8385// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8386// CHECK-NEXT:    [[TMP2:%.*]] = ashr <8 x i16> [[TMP1]], splat (i16 3)8387// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <8 x i16> [[TMP2]] to <8 x i8>8388// CHECK-NEXT:    ret <8 x i8> [[VSHRN_N]]8389//8390int8x8_t test_vshrn_n_s16(int16x8_t a) {8391  return vshrn_n_s16(a, 3);8392}8393 8394// CHECK-LABEL: define dso_local <4 x i16> @test_vshrn_n_s32(8395// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8396// CHECK-NEXT:  [[ENTRY:.*:]]8397// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8398// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8399// CHECK-NEXT:    [[TMP2:%.*]] = ashr <4 x i32> [[TMP1]], splat (i32 9)8400// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <4 x i32> [[TMP2]] to <4 x i16>8401// CHECK-NEXT:    ret <4 x i16> [[VSHRN_N]]8402//8403int16x4_t test_vshrn_n_s32(int32x4_t a) {8404  return vshrn_n_s32(a, 9);8405}8406 8407// CHECK-LABEL: define dso_local <2 x i32> @test_vshrn_n_s64(8408// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8409// CHECK-NEXT:  [[ENTRY:.*:]]8410// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8411// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8412// CHECK-NEXT:    [[TMP2:%.*]] = ashr <2 x i64> [[TMP1]], splat (i64 19)8413// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <2 x i64> [[TMP2]] to <2 x i32>8414// CHECK-NEXT:    ret <2 x i32> [[VSHRN_N]]8415//8416int32x2_t test_vshrn_n_s64(int64x2_t a) {8417  return vshrn_n_s64(a, 19);8418}8419 8420// CHECK-LABEL: define dso_local <8 x i8> @test_vshrn_n_u16(8421// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8422// CHECK-NEXT:  [[ENTRY:.*:]]8423// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8424// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8425// CHECK-NEXT:    [[TMP2:%.*]] = lshr <8 x i16> [[TMP1]], splat (i16 3)8426// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <8 x i16> [[TMP2]] to <8 x i8>8427// CHECK-NEXT:    ret <8 x i8> [[VSHRN_N]]8428//8429uint8x8_t test_vshrn_n_u16(uint16x8_t a) {8430  return vshrn_n_u16(a, 3);8431}8432 8433// CHECK-LABEL: define dso_local <4 x i16> @test_vshrn_n_u32(8434// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8435// CHECK-NEXT:  [[ENTRY:.*:]]8436// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8437// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8438// CHECK-NEXT:    [[TMP2:%.*]] = lshr <4 x i32> [[TMP1]], splat (i32 9)8439// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <4 x i32> [[TMP2]] to <4 x i16>8440// CHECK-NEXT:    ret <4 x i16> [[VSHRN_N]]8441//8442uint16x4_t test_vshrn_n_u32(uint32x4_t a) {8443  return vshrn_n_u32(a, 9);8444}8445 8446// CHECK-LABEL: define dso_local <2 x i32> @test_vshrn_n_u64(8447// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8448// CHECK-NEXT:  [[ENTRY:.*:]]8449// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8450// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8451// CHECK-NEXT:    [[TMP2:%.*]] = lshr <2 x i64> [[TMP1]], splat (i64 19)8452// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <2 x i64> [[TMP2]] to <2 x i32>8453// CHECK-NEXT:    ret <2 x i32> [[VSHRN_N]]8454//8455uint32x2_t test_vshrn_n_u64(uint64x2_t a) {8456  return vshrn_n_u64(a, 19);8457}8458 8459// CHECK-LABEL: define dso_local <16 x i8> @test_vshrn_high_n_s16(8460// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8461// CHECK-NEXT:  [[ENTRY:.*:]]8462// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8463// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8464// CHECK-NEXT:    [[TMP2:%.*]] = ashr <8 x i16> [[TMP1]], splat (i16 3)8465// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <8 x i16> [[TMP2]] to <8 x i8>8466// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VSHRN_N]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>8467// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]8468//8469int8x16_t test_vshrn_high_n_s16(int8x8_t a, int16x8_t b) {8470  return vshrn_high_n_s16(a, b, 3);8471}8472 8473// CHECK-LABEL: define dso_local <8 x i16> @test_vshrn_high_n_s32(8474// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8475// CHECK-NEXT:  [[ENTRY:.*:]]8476// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8477// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8478// CHECK-NEXT:    [[TMP2:%.*]] = ashr <4 x i32> [[TMP1]], splat (i32 9)8479// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <4 x i32> [[TMP2]] to <4 x i16>8480// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VSHRN_N]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>8481// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]8482//8483int16x8_t test_vshrn_high_n_s32(int16x4_t a, int32x4_t b) {8484  return vshrn_high_n_s32(a, b, 9);8485}8486 8487// CHECK-LABEL: define dso_local <4 x i32> @test_vshrn_high_n_s64(8488// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8489// CHECK-NEXT:  [[ENTRY:.*:]]8490// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8491// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8492// CHECK-NEXT:    [[TMP2:%.*]] = ashr <2 x i64> [[TMP1]], splat (i64 19)8493// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <2 x i64> [[TMP2]] to <2 x i32>8494// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VSHRN_N]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>8495// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]8496//8497int32x4_t test_vshrn_high_n_s64(int32x2_t a, int64x2_t b) {8498  return vshrn_high_n_s64(a, b, 19);8499}8500 8501// CHECK-LABEL: define dso_local <16 x i8> @test_vshrn_high_n_u16(8502// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8503// CHECK-NEXT:  [[ENTRY:.*:]]8504// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8505// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8506// CHECK-NEXT:    [[TMP2:%.*]] = lshr <8 x i16> [[TMP1]], splat (i16 3)8507// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <8 x i16> [[TMP2]] to <8 x i8>8508// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VSHRN_N]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>8509// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]8510//8511uint8x16_t test_vshrn_high_n_u16(uint8x8_t a, uint16x8_t b) {8512  return vshrn_high_n_u16(a, b, 3);8513}8514 8515// CHECK-LABEL: define dso_local <8 x i16> @test_vshrn_high_n_u32(8516// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8517// CHECK-NEXT:  [[ENTRY:.*:]]8518// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8519// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8520// CHECK-NEXT:    [[TMP2:%.*]] = lshr <4 x i32> [[TMP1]], splat (i32 9)8521// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <4 x i32> [[TMP2]] to <4 x i16>8522// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VSHRN_N]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>8523// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]8524//8525uint16x8_t test_vshrn_high_n_u32(uint16x4_t a, uint32x4_t b) {8526  return vshrn_high_n_u32(a, b, 9);8527}8528 8529// CHECK-LABEL: define dso_local <4 x i32> @test_vshrn_high_n_u64(8530// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8531// CHECK-NEXT:  [[ENTRY:.*:]]8532// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8533// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8534// CHECK-NEXT:    [[TMP2:%.*]] = lshr <2 x i64> [[TMP1]], splat (i64 19)8535// CHECK-NEXT:    [[VSHRN_N:%.*]] = trunc <2 x i64> [[TMP2]] to <2 x i32>8536// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VSHRN_N]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>8537// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]8538//8539uint32x4_t test_vshrn_high_n_u64(uint32x2_t a, uint64x2_t b) {8540  return vshrn_high_n_u64(a, b, 19);8541}8542 8543// CHECK-LABEL: define dso_local <8 x i8> @test_vqshrun_n_s16(8544// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8545// CHECK-NEXT:  [[ENTRY:.*:]]8546// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8547// CHECK-NEXT:    [[VQSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8548// CHECK-NEXT:    [[VQSHRUN_N1:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshrun.v8i8(<8 x i16> [[VQSHRUN_N]], i32 3)8549// CHECK-NEXT:    ret <8 x i8> [[VQSHRUN_N1]]8550//8551uint8x8_t test_vqshrun_n_s16(int16x8_t a) {8552  return vqshrun_n_s16(a, 3);8553}8554 8555// CHECK-LABEL: define dso_local <4 x i16> @test_vqshrun_n_s32(8556// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8557// CHECK-NEXT:  [[ENTRY:.*:]]8558// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8559// CHECK-NEXT:    [[VQSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8560// CHECK-NEXT:    [[VQSHRUN_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32> [[VQSHRUN_N]], i32 9)8561// CHECK-NEXT:    ret <4 x i16> [[VQSHRUN_N1]]8562//8563uint16x4_t test_vqshrun_n_s32(int32x4_t a) {8564  return vqshrun_n_s32(a, 9);8565}8566 8567// CHECK-LABEL: define dso_local <2 x i32> @test_vqshrun_n_s64(8568// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8569// CHECK-NEXT:  [[ENTRY:.*:]]8570// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8571// CHECK-NEXT:    [[VQSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8572// CHECK-NEXT:    [[VQSHRUN_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqshrun.v2i32(<2 x i64> [[VQSHRUN_N]], i32 19)8573// CHECK-NEXT:    ret <2 x i32> [[VQSHRUN_N1]]8574//8575uint32x2_t test_vqshrun_n_s64(int64x2_t a) {8576  return vqshrun_n_s64(a, 19);8577}8578 8579// CHECK-LABEL: define dso_local <16 x i8> @test_vqshrun_high_n_s16(8580// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8581// CHECK-NEXT:  [[ENTRY:.*:]]8582// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8583// CHECK-NEXT:    [[VQSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8584// CHECK-NEXT:    [[VQSHRUN_N3:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshrun.v8i8(<8 x i16> [[VQSHRUN_N]], i32 3)8585// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VQSHRUN_N3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>8586// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]8587//8588uint8x16_t test_vqshrun_high_n_s16(uint8x8_t a, int16x8_t b) {8589  return vqshrun_high_n_s16(a, b, 3);8590}8591 8592// CHECK-LABEL: define dso_local <8 x i16> @test_vqshrun_high_n_s32(8593// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8594// CHECK-NEXT:  [[ENTRY:.*:]]8595// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8596// CHECK-NEXT:    [[VQSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8597// CHECK-NEXT:    [[VQSHRUN_N3:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32> [[VQSHRUN_N]], i32 9)8598// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VQSHRUN_N3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>8599// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]8600//8601uint16x8_t test_vqshrun_high_n_s32(uint16x4_t a, int32x4_t b) {8602  return vqshrun_high_n_s32(a, b, 9);8603}8604 8605// CHECK-LABEL: define dso_local <4 x i32> @test_vqshrun_high_n_s64(8606// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8607// CHECK-NEXT:  [[ENTRY:.*:]]8608// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8609// CHECK-NEXT:    [[VQSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8610// CHECK-NEXT:    [[VQSHRUN_N3:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqshrun.v2i32(<2 x i64> [[VQSHRUN_N]], i32 19)8611// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VQSHRUN_N3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>8612// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]8613//8614uint32x4_t test_vqshrun_high_n_s64(uint32x2_t a, int64x2_t b) {8615  return vqshrun_high_n_s64(a, b, 19);8616}8617 8618// CHECK-LABEL: define dso_local <8 x i8> @test_vrshrn_n_s16(8619// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8620// CHECK-NEXT:  [[ENTRY:.*:]]8621// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8622// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8623// CHECK-NEXT:    [[VRSHRN_N1:%.*]] = call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> [[VRSHRN_N]], i32 3)8624// CHECK-NEXT:    ret <8 x i8> [[VRSHRN_N1]]8625//8626int8x8_t test_vrshrn_n_s16(int16x8_t a) {8627  return vrshrn_n_s16(a, 3);8628}8629 8630// CHECK-LABEL: define dso_local <4 x i16> @test_vrshrn_n_s32(8631// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8632// CHECK-NEXT:  [[ENTRY:.*:]]8633// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8634// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8635// CHECK-NEXT:    [[VRSHRN_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32> [[VRSHRN_N]], i32 9)8636// CHECK-NEXT:    ret <4 x i16> [[VRSHRN_N1]]8637//8638int16x4_t test_vrshrn_n_s32(int32x4_t a) {8639  return vrshrn_n_s32(a, 9);8640}8641 8642// CHECK-LABEL: define dso_local <2 x i32> @test_vrshrn_n_s64(8643// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8644// CHECK-NEXT:  [[ENTRY:.*:]]8645// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8646// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8647// CHECK-NEXT:    [[VRSHRN_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.rshrn.v2i32(<2 x i64> [[VRSHRN_N]], i32 19)8648// CHECK-NEXT:    ret <2 x i32> [[VRSHRN_N1]]8649//8650int32x2_t test_vrshrn_n_s64(int64x2_t a) {8651  return vrshrn_n_s64(a, 19);8652}8653 8654// CHECK-LABEL: define dso_local <8 x i8> @test_vrshrn_n_u16(8655// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8656// CHECK-NEXT:  [[ENTRY:.*:]]8657// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8658// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8659// CHECK-NEXT:    [[VRSHRN_N1:%.*]] = call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> [[VRSHRN_N]], i32 3)8660// CHECK-NEXT:    ret <8 x i8> [[VRSHRN_N1]]8661//8662uint8x8_t test_vrshrn_n_u16(uint16x8_t a) {8663  return vrshrn_n_u16(a, 3);8664}8665 8666// CHECK-LABEL: define dso_local <4 x i16> @test_vrshrn_n_u32(8667// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8668// CHECK-NEXT:  [[ENTRY:.*:]]8669// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8670// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8671// CHECK-NEXT:    [[VRSHRN_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32> [[VRSHRN_N]], i32 9)8672// CHECK-NEXT:    ret <4 x i16> [[VRSHRN_N1]]8673//8674uint16x4_t test_vrshrn_n_u32(uint32x4_t a) {8675  return vrshrn_n_u32(a, 9);8676}8677 8678// CHECK-LABEL: define dso_local <2 x i32> @test_vrshrn_n_u64(8679// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8680// CHECK-NEXT:  [[ENTRY:.*:]]8681// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8682// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8683// CHECK-NEXT:    [[VRSHRN_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.rshrn.v2i32(<2 x i64> [[VRSHRN_N]], i32 19)8684// CHECK-NEXT:    ret <2 x i32> [[VRSHRN_N1]]8685//8686uint32x2_t test_vrshrn_n_u64(uint64x2_t a) {8687  return vrshrn_n_u64(a, 19);8688}8689 8690// CHECK-LABEL: define dso_local <16 x i8> @test_vrshrn_high_n_s16(8691// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8692// CHECK-NEXT:  [[ENTRY:.*:]]8693// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8694// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8695// CHECK-NEXT:    [[VRSHRN_N3:%.*]] = call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> [[VRSHRN_N]], i32 3)8696// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VRSHRN_N3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>8697// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]8698//8699int8x16_t test_vrshrn_high_n_s16(int8x8_t a, int16x8_t b) {8700  return vrshrn_high_n_s16(a, b, 3);8701}8702 8703// CHECK-LABEL: define dso_local <8 x i16> @test_vrshrn_high_n_s32(8704// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8705// CHECK-NEXT:  [[ENTRY:.*:]]8706// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8707// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8708// CHECK-NEXT:    [[VRSHRN_N3:%.*]] = call <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32> [[VRSHRN_N]], i32 9)8709// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VRSHRN_N3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>8710// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]8711//8712int16x8_t test_vrshrn_high_n_s32(int16x4_t a, int32x4_t b) {8713  return vrshrn_high_n_s32(a, b, 9);8714}8715 8716// CHECK-LABEL: define dso_local <4 x i32> @test_vrshrn_high_n_s64(8717// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8718// CHECK-NEXT:  [[ENTRY:.*:]]8719// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8720// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8721// CHECK-NEXT:    [[VRSHRN_N3:%.*]] = call <2 x i32> @llvm.aarch64.neon.rshrn.v2i32(<2 x i64> [[VRSHRN_N]], i32 19)8722// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VRSHRN_N3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>8723// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]8724//8725int32x4_t test_vrshrn_high_n_s64(int32x2_t a, int64x2_t b) {8726  return vrshrn_high_n_s64(a, b, 19);8727}8728 8729// CHECK-LABEL: define dso_local <16 x i8> @test_vrshrn_high_n_u16(8730// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8731// CHECK-NEXT:  [[ENTRY:.*:]]8732// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8733// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8734// CHECK-NEXT:    [[VRSHRN_N3:%.*]] = call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> [[VRSHRN_N]], i32 3)8735// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VRSHRN_N3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>8736// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]8737//8738uint8x16_t test_vrshrn_high_n_u16(uint8x8_t a, uint16x8_t b) {8739  return vrshrn_high_n_u16(a, b, 3);8740}8741 8742// CHECK-LABEL: define dso_local <8 x i16> @test_vrshrn_high_n_u32(8743// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8744// CHECK-NEXT:  [[ENTRY:.*:]]8745// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8746// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8747// CHECK-NEXT:    [[VRSHRN_N3:%.*]] = call <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32> [[VRSHRN_N]], i32 9)8748// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VRSHRN_N3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>8749// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]8750//8751uint16x8_t test_vrshrn_high_n_u32(uint16x4_t a, uint32x4_t b) {8752  return vrshrn_high_n_u32(a, b, 9);8753}8754 8755// CHECK-LABEL: define dso_local <4 x i32> @test_vrshrn_high_n_u64(8756// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8757// CHECK-NEXT:  [[ENTRY:.*:]]8758// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8759// CHECK-NEXT:    [[VRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8760// CHECK-NEXT:    [[VRSHRN_N3:%.*]] = call <2 x i32> @llvm.aarch64.neon.rshrn.v2i32(<2 x i64> [[VRSHRN_N]], i32 19)8761// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VRSHRN_N3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>8762// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]8763//8764uint32x4_t test_vrshrn_high_n_u64(uint32x2_t a, uint64x2_t b) {8765  return vrshrn_high_n_u64(a, b, 19);8766}8767 8768// CHECK-LABEL: define dso_local <8 x i8> @test_vqrshrun_n_s16(8769// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8770// CHECK-NEXT:  [[ENTRY:.*:]]8771// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8772// CHECK-NEXT:    [[VQRSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8773// CHECK-NEXT:    [[VQRSHRUN_N1:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshrun.v8i8(<8 x i16> [[VQRSHRUN_N]], i32 3)8774// CHECK-NEXT:    ret <8 x i8> [[VQRSHRUN_N1]]8775//8776uint8x8_t test_vqrshrun_n_s16(int16x8_t a) {8777  return vqrshrun_n_s16(a, 3);8778}8779 8780// CHECK-LABEL: define dso_local <4 x i16> @test_vqrshrun_n_s32(8781// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8782// CHECK-NEXT:  [[ENTRY:.*:]]8783// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8784// CHECK-NEXT:    [[VQRSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8785// CHECK-NEXT:    [[VQRSHRUN_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrun.v4i16(<4 x i32> [[VQRSHRUN_N]], i32 9)8786// CHECK-NEXT:    ret <4 x i16> [[VQRSHRUN_N1]]8787//8788uint16x4_t test_vqrshrun_n_s32(int32x4_t a) {8789  return vqrshrun_n_s32(a, 9);8790}8791 8792// CHECK-LABEL: define dso_local <2 x i32> @test_vqrshrun_n_s64(8793// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8794// CHECK-NEXT:  [[ENTRY:.*:]]8795// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8796// CHECK-NEXT:    [[VQRSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8797// CHECK-NEXT:    [[VQRSHRUN_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqrshrun.v2i32(<2 x i64> [[VQRSHRUN_N]], i32 19)8798// CHECK-NEXT:    ret <2 x i32> [[VQRSHRUN_N1]]8799//8800uint32x2_t test_vqrshrun_n_s64(int64x2_t a) {8801  return vqrshrun_n_s64(a, 19);8802}8803 8804// CHECK-LABEL: define dso_local <16 x i8> @test_vqrshrun_high_n_s16(8805// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8806// CHECK-NEXT:  [[ENTRY:.*:]]8807// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8808// CHECK-NEXT:    [[VQRSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8809// CHECK-NEXT:    [[VQRSHRUN_N3:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshrun.v8i8(<8 x i16> [[VQRSHRUN_N]], i32 3)8810// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VQRSHRUN_N3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>8811// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]8812//8813uint8x16_t test_vqrshrun_high_n_s16(uint8x8_t a, int16x8_t b) {8814  return vqrshrun_high_n_s16(a, b, 3);8815}8816 8817// CHECK-LABEL: define dso_local <8 x i16> @test_vqrshrun_high_n_s32(8818// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8819// CHECK-NEXT:  [[ENTRY:.*:]]8820// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8821// CHECK-NEXT:    [[VQRSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8822// CHECK-NEXT:    [[VQRSHRUN_N3:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrun.v4i16(<4 x i32> [[VQRSHRUN_N]], i32 9)8823// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VQRSHRUN_N3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>8824// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]8825//8826uint16x8_t test_vqrshrun_high_n_s32(uint16x4_t a, int32x4_t b) {8827  return vqrshrun_high_n_s32(a, b, 9);8828}8829 8830// CHECK-LABEL: define dso_local <4 x i32> @test_vqrshrun_high_n_s64(8831// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8832// CHECK-NEXT:  [[ENTRY:.*:]]8833// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8834// CHECK-NEXT:    [[VQRSHRUN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8835// CHECK-NEXT:    [[VQRSHRUN_N3:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqrshrun.v2i32(<2 x i64> [[VQRSHRUN_N]], i32 19)8836// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VQRSHRUN_N3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>8837// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]8838//8839uint32x4_t test_vqrshrun_high_n_s64(uint32x2_t a, int64x2_t b) {8840  return vqrshrun_high_n_s64(a, b, 19);8841}8842 8843// CHECK-LABEL: define dso_local <8 x i8> @test_vqshrn_n_s16(8844// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8845// CHECK-NEXT:  [[ENTRY:.*:]]8846// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8847// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8848// CHECK-NEXT:    [[VQSHRN_N1:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> [[VQSHRN_N]], i32 3)8849// CHECK-NEXT:    ret <8 x i8> [[VQSHRN_N1]]8850//8851int8x8_t test_vqshrn_n_s16(int16x8_t a) {8852  return vqshrn_n_s16(a, 3);8853}8854 8855// CHECK-LABEL: define dso_local <4 x i16> @test_vqshrn_n_s32(8856// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8857// CHECK-NEXT:  [[ENTRY:.*:]]8858// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8859// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8860// CHECK-NEXT:    [[VQSHRN_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> [[VQSHRN_N]], i32 9)8861// CHECK-NEXT:    ret <4 x i16> [[VQSHRN_N1]]8862//8863int16x4_t test_vqshrn_n_s32(int32x4_t a) {8864  return vqshrn_n_s32(a, 9);8865}8866 8867// CHECK-LABEL: define dso_local <2 x i32> @test_vqshrn_n_s64(8868// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8869// CHECK-NEXT:  [[ENTRY:.*:]]8870// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8871// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8872// CHECK-NEXT:    [[VQSHRN_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64> [[VQSHRN_N]], i32 19)8873// CHECK-NEXT:    ret <2 x i32> [[VQSHRN_N1]]8874//8875int32x2_t test_vqshrn_n_s64(int64x2_t a) {8876  return vqshrn_n_s64(a, 19);8877}8878 8879// CHECK-LABEL: define dso_local <8 x i8> @test_vqshrn_n_u16(8880// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8881// CHECK-NEXT:  [[ENTRY:.*:]]8882// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8883// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8884// CHECK-NEXT:    [[VQSHRN_N1:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshrn.v8i8(<8 x i16> [[VQSHRN_N]], i32 3)8885// CHECK-NEXT:    ret <8 x i8> [[VQSHRN_N1]]8886//8887uint8x8_t test_vqshrn_n_u16(uint16x8_t a) {8888  return vqshrn_n_u16(a, 3);8889}8890 8891// CHECK-LABEL: define dso_local <4 x i16> @test_vqshrn_n_u32(8892// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {8893// CHECK-NEXT:  [[ENTRY:.*:]]8894// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>8895// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8896// CHECK-NEXT:    [[VQSHRN_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> [[VQSHRN_N]], i32 9)8897// CHECK-NEXT:    ret <4 x i16> [[VQSHRN_N1]]8898//8899uint16x4_t test_vqshrn_n_u32(uint32x4_t a) {8900  return vqshrn_n_u32(a, 9);8901}8902 8903// CHECK-LABEL: define dso_local <2 x i32> @test_vqshrn_n_u64(8904// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {8905// CHECK-NEXT:  [[ENTRY:.*:]]8906// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>8907// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8908// CHECK-NEXT:    [[VQSHRN_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqshrn.v2i32(<2 x i64> [[VQSHRN_N]], i32 19)8909// CHECK-NEXT:    ret <2 x i32> [[VQSHRN_N1]]8910//8911uint32x2_t test_vqshrn_n_u64(uint64x2_t a) {8912  return vqshrn_n_u64(a, 19);8913}8914 8915// CHECK-LABEL: define dso_local <16 x i8> @test_vqshrn_high_n_s16(8916// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8917// CHECK-NEXT:  [[ENTRY:.*:]]8918// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8919// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8920// CHECK-NEXT:    [[VQSHRN_N3:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> [[VQSHRN_N]], i32 3)8921// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VQSHRN_N3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>8922// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]8923//8924int8x16_t test_vqshrn_high_n_s16(int8x8_t a, int16x8_t b) {8925  return vqshrn_high_n_s16(a, b, 3);8926}8927 8928// CHECK-LABEL: define dso_local <8 x i16> @test_vqshrn_high_n_s32(8929// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8930// CHECK-NEXT:  [[ENTRY:.*:]]8931// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8932// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8933// CHECK-NEXT:    [[VQSHRN_N3:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> [[VQSHRN_N]], i32 9)8934// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VQSHRN_N3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>8935// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]8936//8937int16x8_t test_vqshrn_high_n_s32(int16x4_t a, int32x4_t b) {8938  return vqshrn_high_n_s32(a, b, 9);8939}8940 8941// CHECK-LABEL: define dso_local <4 x i32> @test_vqshrn_high_n_s64(8942// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8943// CHECK-NEXT:  [[ENTRY:.*:]]8944// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8945// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8946// CHECK-NEXT:    [[VQSHRN_N3:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64> [[VQSHRN_N]], i32 19)8947// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VQSHRN_N3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>8948// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]8949//8950int32x4_t test_vqshrn_high_n_s64(int32x2_t a, int64x2_t b) {8951  return vqshrn_high_n_s64(a, b, 19);8952}8953 8954// CHECK-LABEL: define dso_local <16 x i8> @test_vqshrn_high_n_u16(8955// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {8956// CHECK-NEXT:  [[ENTRY:.*:]]8957// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>8958// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8959// CHECK-NEXT:    [[VQSHRN_N3:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshrn.v8i8(<8 x i16> [[VQSHRN_N]], i32 3)8960// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VQSHRN_N3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>8961// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]8962//8963uint8x16_t test_vqshrn_high_n_u16(uint8x8_t a, uint16x8_t b) {8964  return vqshrn_high_n_u16(a, b, 3);8965}8966 8967// CHECK-LABEL: define dso_local <8 x i16> @test_vqshrn_high_n_u32(8968// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {8969// CHECK-NEXT:  [[ENTRY:.*:]]8970// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>8971// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>8972// CHECK-NEXT:    [[VQSHRN_N3:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> [[VQSHRN_N]], i32 9)8973// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VQSHRN_N3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>8974// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]8975//8976uint16x8_t test_vqshrn_high_n_u32(uint16x4_t a, uint32x4_t b) {8977  return vqshrn_high_n_u32(a, b, 9);8978}8979 8980// CHECK-LABEL: define dso_local <4 x i32> @test_vqshrn_high_n_u64(8981// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {8982// CHECK-NEXT:  [[ENTRY:.*:]]8983// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>8984// CHECK-NEXT:    [[VQSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>8985// CHECK-NEXT:    [[VQSHRN_N3:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqshrn.v2i32(<2 x i64> [[VQSHRN_N]], i32 19)8986// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VQSHRN_N3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>8987// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]8988//8989uint32x4_t test_vqshrn_high_n_u64(uint32x2_t a, uint64x2_t b) {8990  return vqshrn_high_n_u64(a, b, 19);8991}8992 8993// CHECK-LABEL: define dso_local <8 x i8> @test_vqrshrn_n_s16(8994// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {8995// CHECK-NEXT:  [[ENTRY:.*:]]8996// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>8997// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>8998// CHECK-NEXT:    [[VQRSHRN_N1:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshrn.v8i8(<8 x i16> [[VQRSHRN_N]], i32 3)8999// CHECK-NEXT:    ret <8 x i8> [[VQRSHRN_N1]]9000//9001int8x8_t test_vqrshrn_n_s16(int16x8_t a) {9002  return vqrshrn_n_s16(a, 3);9003}9004 9005// CHECK-LABEL: define dso_local <4 x i16> @test_vqrshrn_n_s32(9006// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9007// CHECK-NEXT:  [[ENTRY:.*:]]9008// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>9009// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>9010// CHECK-NEXT:    [[VQRSHRN_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrn.v4i16(<4 x i32> [[VQRSHRN_N]], i32 9)9011// CHECK-NEXT:    ret <4 x i16> [[VQRSHRN_N1]]9012//9013int16x4_t test_vqrshrn_n_s32(int32x4_t a) {9014  return vqrshrn_n_s32(a, 9);9015}9016 9017// CHECK-LABEL: define dso_local <2 x i32> @test_vqrshrn_n_s64(9018// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {9019// CHECK-NEXT:  [[ENTRY:.*:]]9020// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>9021// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>9022// CHECK-NEXT:    [[VQRSHRN_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqrshrn.v2i32(<2 x i64> [[VQRSHRN_N]], i32 19)9023// CHECK-NEXT:    ret <2 x i32> [[VQRSHRN_N1]]9024//9025int32x2_t test_vqrshrn_n_s64(int64x2_t a) {9026  return vqrshrn_n_s64(a, 19);9027}9028 9029// CHECK-LABEL: define dso_local <8 x i8> @test_vqrshrn_n_u16(9030// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9031// CHECK-NEXT:  [[ENTRY:.*:]]9032// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>9033// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>9034// CHECK-NEXT:    [[VQRSHRN_N1:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqrshrn.v8i8(<8 x i16> [[VQRSHRN_N]], i32 3)9035// CHECK-NEXT:    ret <8 x i8> [[VQRSHRN_N1]]9036//9037uint8x8_t test_vqrshrn_n_u16(uint16x8_t a) {9038  return vqrshrn_n_u16(a, 3);9039}9040 9041// CHECK-LABEL: define dso_local <4 x i16> @test_vqrshrn_n_u32(9042// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9043// CHECK-NEXT:  [[ENTRY:.*:]]9044// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>9045// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>9046// CHECK-NEXT:    [[VQRSHRN_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqrshrn.v4i16(<4 x i32> [[VQRSHRN_N]], i32 9)9047// CHECK-NEXT:    ret <4 x i16> [[VQRSHRN_N1]]9048//9049uint16x4_t test_vqrshrn_n_u32(uint32x4_t a) {9050  return vqrshrn_n_u32(a, 9);9051}9052 9053// CHECK-LABEL: define dso_local <2 x i32> @test_vqrshrn_n_u64(9054// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {9055// CHECK-NEXT:  [[ENTRY:.*:]]9056// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>9057// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>9058// CHECK-NEXT:    [[VQRSHRN_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqrshrn.v2i32(<2 x i64> [[VQRSHRN_N]], i32 19)9059// CHECK-NEXT:    ret <2 x i32> [[VQRSHRN_N1]]9060//9061uint32x2_t test_vqrshrn_n_u64(uint64x2_t a) {9062  return vqrshrn_n_u64(a, 19);9063}9064 9065// CHECK-LABEL: define dso_local <16 x i8> @test_vqrshrn_high_n_s16(9066// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9067// CHECK-NEXT:  [[ENTRY:.*:]]9068// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>9069// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>9070// CHECK-NEXT:    [[VQRSHRN_N3:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshrn.v8i8(<8 x i16> [[VQRSHRN_N]], i32 3)9071// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VQRSHRN_N3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9072// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]9073//9074int8x16_t test_vqrshrn_high_n_s16(int8x8_t a, int16x8_t b) {9075  return vqrshrn_high_n_s16(a, b, 3);9076}9077 9078// CHECK-LABEL: define dso_local <8 x i16> @test_vqrshrn_high_n_s32(9079// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9080// CHECK-NEXT:  [[ENTRY:.*:]]9081// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>9082// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>9083// CHECK-NEXT:    [[VQRSHRN_N3:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrn.v4i16(<4 x i32> [[VQRSHRN_N]], i32 9)9084// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VQRSHRN_N3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>9085// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]9086//9087int16x8_t test_vqrshrn_high_n_s32(int16x4_t a, int32x4_t b) {9088  return vqrshrn_high_n_s32(a, b, 9);9089}9090 9091// CHECK-LABEL: define dso_local <4 x i32> @test_vqrshrn_high_n_s64(9092// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {9093// CHECK-NEXT:  [[ENTRY:.*:]]9094// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>9095// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>9096// CHECK-NEXT:    [[VQRSHRN_N3:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqrshrn.v2i32(<2 x i64> [[VQRSHRN_N]], i32 19)9097// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VQRSHRN_N3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>9098// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]9099//9100int32x4_t test_vqrshrn_high_n_s64(int32x2_t a, int64x2_t b) {9101  return vqrshrn_high_n_s64(a, b, 19);9102}9103 9104// CHECK-LABEL: define dso_local <16 x i8> @test_vqrshrn_high_n_u16(9105// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9106// CHECK-NEXT:  [[ENTRY:.*:]]9107// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>9108// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>9109// CHECK-NEXT:    [[VQRSHRN_N3:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqrshrn.v8i8(<8 x i16> [[VQRSHRN_N]], i32 3)9110// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[VQRSHRN_N3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9111// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]9112//9113uint8x16_t test_vqrshrn_high_n_u16(uint8x8_t a, uint16x8_t b) {9114  return vqrshrn_high_n_u16(a, b, 3);9115}9116 9117// CHECK-LABEL: define dso_local <8 x i16> @test_vqrshrn_high_n_u32(9118// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9119// CHECK-NEXT:  [[ENTRY:.*:]]9120// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>9121// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>9122// CHECK-NEXT:    [[VQRSHRN_N3:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqrshrn.v4i16(<4 x i32> [[VQRSHRN_N]], i32 9)9123// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[VQRSHRN_N3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>9124// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I]]9125//9126uint16x8_t test_vqrshrn_high_n_u32(uint16x4_t a, uint32x4_t b) {9127  return vqrshrn_high_n_u32(a, b, 9);9128}9129 9130// CHECK-LABEL: define dso_local <4 x i32> @test_vqrshrn_high_n_u64(9131// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {9132// CHECK-NEXT:  [[ENTRY:.*:]]9133// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>9134// CHECK-NEXT:    [[VQRSHRN_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>9135// CHECK-NEXT:    [[VQRSHRN_N3:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqrshrn.v2i32(<2 x i64> [[VQRSHRN_N]], i32 19)9136// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[VQRSHRN_N3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>9137// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I]]9138//9139uint32x4_t test_vqrshrn_high_n_u64(uint32x2_t a, uint64x2_t b) {9140  return vqrshrn_high_n_u64(a, b, 19);9141}9142 9143// CHECK-LABEL: define dso_local <8 x i16> @test_vshll_n_s8(9144// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {9145// CHECK-NEXT:  [[ENTRY:.*:]]9146// CHECK-NEXT:    [[TMP0:%.*]] = sext <8 x i8> [[A]] to <8 x i16>9147// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <8 x i16> [[TMP0]], splat (i16 3)9148// CHECK-NEXT:    ret <8 x i16> [[VSHLL_N]]9149//9150int16x8_t test_vshll_n_s8(int8x8_t a) {9151  return vshll_n_s8(a, 3);9152}9153 9154// CHECK-LABEL: define dso_local <4 x i32> @test_vshll_n_s16(9155// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9156// CHECK-NEXT:  [[ENTRY:.*:]]9157// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>9158// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9159// CHECK-NEXT:    [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9160// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <4 x i32> [[TMP2]], splat (i32 9)9161// CHECK-NEXT:    ret <4 x i32> [[VSHLL_N]]9162//9163int32x4_t test_vshll_n_s16(int16x4_t a) {9164  return vshll_n_s16(a, 9);9165}9166 9167// CHECK-LABEL: define dso_local <2 x i64> @test_vshll_n_s32(9168// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9169// CHECK-NEXT:  [[ENTRY:.*:]]9170// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9171// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9172// CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9173// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <2 x i64> [[TMP2]], splat (i64 19)9174// CHECK-NEXT:    ret <2 x i64> [[VSHLL_N]]9175//9176int64x2_t test_vshll_n_s32(int32x2_t a) {9177  return vshll_n_s32(a, 19);9178}9179 9180// CHECK-LABEL: define dso_local <8 x i16> @test_vshll_n_u8(9181// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {9182// CHECK-NEXT:  [[ENTRY:.*:]]9183// CHECK-NEXT:    [[TMP0:%.*]] = zext <8 x i8> [[A]] to <8 x i16>9184// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <8 x i16> [[TMP0]], splat (i16 3)9185// CHECK-NEXT:    ret <8 x i16> [[VSHLL_N]]9186//9187uint16x8_t test_vshll_n_u8(uint8x8_t a) {9188  return vshll_n_u8(a, 3);9189}9190 9191// CHECK-LABEL: define dso_local <4 x i32> @test_vshll_n_u16(9192// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9193// CHECK-NEXT:  [[ENTRY:.*:]]9194// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>9195// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9196// CHECK-NEXT:    [[TMP2:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9197// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <4 x i32> [[TMP2]], splat (i32 9)9198// CHECK-NEXT:    ret <4 x i32> [[VSHLL_N]]9199//9200uint32x4_t test_vshll_n_u16(uint16x4_t a) {9201  return vshll_n_u16(a, 9);9202}9203 9204// CHECK-LABEL: define dso_local <2 x i64> @test_vshll_n_u32(9205// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9206// CHECK-NEXT:  [[ENTRY:.*:]]9207// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9208// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9209// CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>9210// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <2 x i64> [[TMP2]], splat (i64 19)9211// CHECK-NEXT:    ret <2 x i64> [[VSHLL_N]]9212//9213uint64x2_t test_vshll_n_u32(uint32x2_t a) {9214  return vshll_n_u32(a, 19);9215}9216 9217// CHECK-LABEL: define dso_local <8 x i16> @test_vshll_high_n_s8(9218// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {9219// CHECK-NEXT:  [[ENTRY:.*:]]9220// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9221// CHECK-NEXT:    [[TMP0:%.*]] = sext <8 x i8> [[SHUFFLE_I]] to <8 x i16>9222// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <8 x i16> [[TMP0]], splat (i16 3)9223// CHECK-NEXT:    ret <8 x i16> [[VSHLL_N]]9224//9225int16x8_t test_vshll_high_n_s8(int8x16_t a) {9226  return vshll_high_n_s8(a, 3);9227}9228 9229// CHECK-LABEL: define dso_local <4 x i32> @test_vshll_high_n_s16(9230// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9231// CHECK-NEXT:  [[ENTRY:.*:]]9232// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9233// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I]] to <8 x i8>9234// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9235// CHECK-NEXT:    [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9236// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <4 x i32> [[TMP2]], splat (i32 9)9237// CHECK-NEXT:    ret <4 x i32> [[VSHLL_N]]9238//9239int32x4_t test_vshll_high_n_s16(int16x8_t a) {9240  return vshll_high_n_s16(a, 9);9241}9242 9243// CHECK-LABEL: define dso_local <2 x i64> @test_vshll_high_n_s32(9244// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9245// CHECK-NEXT:  [[ENTRY:.*:]]9246// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>9247// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I]] to <8 x i8>9248// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9249// CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9250// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <2 x i64> [[TMP2]], splat (i64 19)9251// CHECK-NEXT:    ret <2 x i64> [[VSHLL_N]]9252//9253int64x2_t test_vshll_high_n_s32(int32x4_t a) {9254  return vshll_high_n_s32(a, 19);9255}9256 9257// CHECK-LABEL: define dso_local <8 x i16> @test_vshll_high_n_u8(9258// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {9259// CHECK-NEXT:  [[ENTRY:.*:]]9260// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9261// CHECK-NEXT:    [[TMP0:%.*]] = zext <8 x i8> [[SHUFFLE_I]] to <8 x i16>9262// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <8 x i16> [[TMP0]], splat (i16 3)9263// CHECK-NEXT:    ret <8 x i16> [[VSHLL_N]]9264//9265uint16x8_t test_vshll_high_n_u8(uint8x16_t a) {9266  return vshll_high_n_u8(a, 3);9267}9268 9269// CHECK-LABEL: define dso_local <4 x i32> @test_vshll_high_n_u16(9270// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9271// CHECK-NEXT:  [[ENTRY:.*:]]9272// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9273// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I]] to <8 x i8>9274// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9275// CHECK-NEXT:    [[TMP2:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9276// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <4 x i32> [[TMP2]], splat (i32 9)9277// CHECK-NEXT:    ret <4 x i32> [[VSHLL_N]]9278//9279uint32x4_t test_vshll_high_n_u16(uint16x8_t a) {9280  return vshll_high_n_u16(a, 9);9281}9282 9283// CHECK-LABEL: define dso_local <2 x i64> @test_vshll_high_n_u32(9284// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9285// CHECK-NEXT:  [[ENTRY:.*:]]9286// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>9287// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I]] to <8 x i8>9288// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9289// CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>9290// CHECK-NEXT:    [[VSHLL_N:%.*]] = shl <2 x i64> [[TMP2]], splat (i64 19)9291// CHECK-NEXT:    ret <2 x i64> [[VSHLL_N]]9292//9293uint64x2_t test_vshll_high_n_u32(uint32x4_t a) {9294  return vshll_high_n_u32(a, 19);9295}9296 9297// CHECK-LABEL: define dso_local <8 x i16> @test_vmovl_s8(9298// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {9299// CHECK-NEXT:  [[ENTRY:.*:]]9300// CHECK-NEXT:    [[VMOVL_I:%.*]] = sext <8 x i8> [[A]] to <8 x i16>9301// CHECK-NEXT:    ret <8 x i16> [[VMOVL_I]]9302//9303int16x8_t test_vmovl_s8(int8x8_t a) {9304  return vmovl_s8(a);9305}9306 9307// CHECK-LABEL: define dso_local <4 x i32> @test_vmovl_s16(9308// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9309// CHECK-NEXT:  [[ENTRY:.*:]]9310// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>9311// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9312// CHECK-NEXT:    [[VMOVL_I:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9313// CHECK-NEXT:    ret <4 x i32> [[VMOVL_I]]9314//9315int32x4_t test_vmovl_s16(int16x4_t a) {9316  return vmovl_s16(a);9317}9318 9319// CHECK-LABEL: define dso_local <2 x i64> @test_vmovl_s32(9320// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9321// CHECK-NEXT:  [[ENTRY:.*:]]9322// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9323// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9324// CHECK-NEXT:    [[VMOVL_I:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9325// CHECK-NEXT:    ret <2 x i64> [[VMOVL_I]]9326//9327int64x2_t test_vmovl_s32(int32x2_t a) {9328  return vmovl_s32(a);9329}9330 9331// CHECK-LABEL: define dso_local <8 x i16> @test_vmovl_u8(9332// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {9333// CHECK-NEXT:  [[ENTRY:.*:]]9334// CHECK-NEXT:    [[VMOVL_I:%.*]] = zext <8 x i8> [[A]] to <8 x i16>9335// CHECK-NEXT:    ret <8 x i16> [[VMOVL_I]]9336//9337uint16x8_t test_vmovl_u8(uint8x8_t a) {9338  return vmovl_u8(a);9339}9340 9341// CHECK-LABEL: define dso_local <4 x i32> @test_vmovl_u16(9342// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9343// CHECK-NEXT:  [[ENTRY:.*:]]9344// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>9345// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9346// CHECK-NEXT:    [[VMOVL_I:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9347// CHECK-NEXT:    ret <4 x i32> [[VMOVL_I]]9348//9349uint32x4_t test_vmovl_u16(uint16x4_t a) {9350  return vmovl_u16(a);9351}9352 9353// CHECK-LABEL: define dso_local <2 x i64> @test_vmovl_u32(9354// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9355// CHECK-NEXT:  [[ENTRY:.*:]]9356// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9357// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9358// CHECK-NEXT:    [[VMOVL_I:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>9359// CHECK-NEXT:    ret <2 x i64> [[VMOVL_I]]9360//9361uint64x2_t test_vmovl_u32(uint32x2_t a) {9362  return vmovl_u32(a);9363}9364 9365// CHECK-LABEL: define dso_local <8 x i16> @test_vmovl_high_s8(9366// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {9367// CHECK-NEXT:  [[ENTRY:.*:]]9368// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9369// CHECK-NEXT:    [[TMP0:%.*]] = sext <8 x i8> [[SHUFFLE_I_I]] to <8 x i16>9370// CHECK-NEXT:    ret <8 x i16> [[TMP0]]9371//9372int16x8_t test_vmovl_high_s8(int8x16_t a) {9373  return vmovl_high_s8(a);9374}9375 9376// CHECK-LABEL: define dso_local <4 x i32> @test_vmovl_high_s16(9377// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9378// CHECK-NEXT:  [[ENTRY:.*:]]9379// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9380// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>9381// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9382// CHECK-NEXT:    [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9383// CHECK-NEXT:    ret <4 x i32> [[TMP2]]9384//9385int32x4_t test_vmovl_high_s16(int16x8_t a) {9386  return vmovl_high_s16(a);9387}9388 9389// CHECK-LABEL: define dso_local <2 x i64> @test_vmovl_high_s32(9390// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9391// CHECK-NEXT:  [[ENTRY:.*:]]9392// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>9393// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>9394// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9395// CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9396// CHECK-NEXT:    ret <2 x i64> [[TMP2]]9397//9398int64x2_t test_vmovl_high_s32(int32x4_t a) {9399  return vmovl_high_s32(a);9400}9401 9402// CHECK-LABEL: define dso_local <8 x i16> @test_vmovl_high_u8(9403// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {9404// CHECK-NEXT:  [[ENTRY:.*:]]9405// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9406// CHECK-NEXT:    [[TMP0:%.*]] = zext <8 x i8> [[SHUFFLE_I_I]] to <8 x i16>9407// CHECK-NEXT:    ret <8 x i16> [[TMP0]]9408//9409uint16x8_t test_vmovl_high_u8(uint8x16_t a) {9410  return vmovl_high_u8(a);9411}9412 9413// CHECK-LABEL: define dso_local <4 x i32> @test_vmovl_high_u16(9414// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {9415// CHECK-NEXT:  [[ENTRY:.*:]]9416// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9417// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>9418// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9419// CHECK-NEXT:    [[TMP2:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9420// CHECK-NEXT:    ret <4 x i32> [[TMP2]]9421//9422uint32x4_t test_vmovl_high_u16(uint16x8_t a) {9423  return vmovl_high_u16(a);9424}9425 9426// CHECK-LABEL: define dso_local <2 x i64> @test_vmovl_high_u32(9427// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9428// CHECK-NEXT:  [[ENTRY:.*:]]9429// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>9430// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>9431// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9432// CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>9433// CHECK-NEXT:    ret <2 x i64> [[TMP2]]9434//9435uint64x2_t test_vmovl_high_u32(uint32x4_t a) {9436  return vmovl_high_u32(a);9437}9438 9439// CHECK-LABEL: define dso_local <2 x float> @test_vcvt_n_f32_s32(9440// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9441// CHECK-NEXT:  [[ENTRY:.*:]]9442// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9443// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9444// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <2 x float> @llvm.aarch64.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> [[VCVT_N]], i32 31)9445// CHECK-NEXT:    ret <2 x float> [[VCVT_N1]]9446//9447float32x2_t test_vcvt_n_f32_s32(int32x2_t a) {9448  return vcvt_n_f32_s32(a, 31);9449}9450 9451// CHECK-LABEL: define dso_local <4 x float> @test_vcvtq_n_f32_s32(9452// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9453// CHECK-NEXT:  [[ENTRY:.*:]]9454// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>9455// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>9456// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <4 x float> @llvm.aarch64.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32> [[VCVT_N]], i32 31)9457// CHECK-NEXT:    ret <4 x float> [[VCVT_N1]]9458//9459float32x4_t test_vcvtq_n_f32_s32(int32x4_t a) {9460  return vcvtq_n_f32_s32(a, 31);9461}9462 9463// CHECK-LABEL: define dso_local <2 x double> @test_vcvtq_n_f64_s64(9464// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {9465// CHECK-NEXT:  [[ENTRY:.*:]]9466// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>9467// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>9468// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <2 x double> @llvm.aarch64.neon.vcvtfxs2fp.v2f64.v2i64(<2 x i64> [[VCVT_N]], i32 50)9469// CHECK-NEXT:    ret <2 x double> [[VCVT_N1]]9470//9471float64x2_t test_vcvtq_n_f64_s64(int64x2_t a) {9472  return vcvtq_n_f64_s64(a, 50);9473}9474 9475// CHECK-LABEL: define dso_local <2 x float> @test_vcvt_n_f32_u32(9476// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9477// CHECK-NEXT:  [[ENTRY:.*:]]9478// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9479// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9480// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <2 x float> @llvm.aarch64.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> [[VCVT_N]], i32 31)9481// CHECK-NEXT:    ret <2 x float> [[VCVT_N1]]9482//9483float32x2_t test_vcvt_n_f32_u32(uint32x2_t a) {9484  return vcvt_n_f32_u32(a, 31);9485}9486 9487// CHECK-LABEL: define dso_local <4 x float> @test_vcvtq_n_f32_u32(9488// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {9489// CHECK-NEXT:  [[ENTRY:.*:]]9490// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>9491// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>9492// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <4 x float> @llvm.aarch64.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32> [[VCVT_N]], i32 31)9493// CHECK-NEXT:    ret <4 x float> [[VCVT_N1]]9494//9495float32x4_t test_vcvtq_n_f32_u32(uint32x4_t a) {9496  return vcvtq_n_f32_u32(a, 31);9497}9498 9499// CHECK-LABEL: define dso_local <2 x double> @test_vcvtq_n_f64_u64(9500// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {9501// CHECK-NEXT:  [[ENTRY:.*:]]9502// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>9503// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>9504// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <2 x double> @llvm.aarch64.neon.vcvtfxu2fp.v2f64.v2i64(<2 x i64> [[VCVT_N]], i32 50)9505// CHECK-NEXT:    ret <2 x double> [[VCVT_N1]]9506//9507float64x2_t test_vcvtq_n_f64_u64(uint64x2_t a) {9508  return vcvtq_n_f64_u64(a, 50);9509}9510 9511// CHECK-LABEL: define dso_local <2 x i32> @test_vcvt_n_s32_f32(9512// CHECK-SAME: <2 x float> noundef [[A:%.*]]) #[[ATTR0]] {9513// CHECK-NEXT:  [[ENTRY:.*:]]9514// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>9515// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>9516// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>9517// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> [[VCVT_N]], i32 31)9518// CHECK-NEXT:    ret <2 x i32> [[VCVT_N1]]9519//9520int32x2_t test_vcvt_n_s32_f32(float32x2_t a) {9521  return vcvt_n_s32_f32(a, 31);9522}9523 9524// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtq_n_s32_f32(9525// CHECK-SAME: <4 x float> noundef [[A:%.*]]) #[[ATTR0]] {9526// CHECK-NEXT:  [[ENTRY:.*:]]9527// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>9528// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>9529// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>9530// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float> [[VCVT_N]], i32 31)9531// CHECK-NEXT:    ret <4 x i32> [[VCVT_N1]]9532//9533int32x4_t test_vcvtq_n_s32_f32(float32x4_t a) {9534  return vcvtq_n_s32_f32(a, 31);9535}9536 9537// CHECK-LABEL: define dso_local <2 x i64> @test_vcvtq_n_s64_f64(9538// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] {9539// CHECK-NEXT:  [[ENTRY:.*:]]9540// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>9541// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>9542// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>9543// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.vcvtfp2fxs.v2i64.v2f64(<2 x double> [[VCVT_N]], i32 50)9544// CHECK-NEXT:    ret <2 x i64> [[VCVT_N1]]9545//9546int64x2_t test_vcvtq_n_s64_f64(float64x2_t a) {9547  return vcvtq_n_s64_f64(a, 50);9548}9549 9550// CHECK-LABEL: define dso_local <2 x i32> @test_vcvt_n_u32_f32(9551// CHECK-SAME: <2 x float> noundef [[A:%.*]]) #[[ATTR0]] {9552// CHECK-NEXT:  [[ENTRY:.*:]]9553// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>9554// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>9555// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>9556// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> [[VCVT_N]], i32 31)9557// CHECK-NEXT:    ret <2 x i32> [[VCVT_N1]]9558//9559uint32x2_t test_vcvt_n_u32_f32(float32x2_t a) {9560  return vcvt_n_u32_f32(a, 31);9561}9562 9563// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtq_n_u32_f32(9564// CHECK-SAME: <4 x float> noundef [[A:%.*]]) #[[ATTR0]] {9565// CHECK-NEXT:  [[ENTRY:.*:]]9566// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>9567// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>9568// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>9569// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float> [[VCVT_N]], i32 31)9570// CHECK-NEXT:    ret <4 x i32> [[VCVT_N1]]9571//9572uint32x4_t test_vcvtq_n_u32_f32(float32x4_t a) {9573  return vcvtq_n_u32_f32(a, 31);9574}9575 9576// CHECK-LABEL: define dso_local <2 x i64> @test_vcvtq_n_u64_f64(9577// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] {9578// CHECK-NEXT:  [[ENTRY:.*:]]9579// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64>9580// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>9581// CHECK-NEXT:    [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>9582// CHECK-NEXT:    [[VCVT_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.vcvtfp2fxu.v2i64.v2f64(<2 x double> [[VCVT_N]], i32 50)9583// CHECK-NEXT:    ret <2 x i64> [[VCVT_N1]]9584//9585uint64x2_t test_vcvtq_n_u64_f64(float64x2_t a) {9586  return vcvtq_n_u64_f64(a, 50);9587}9588 9589// CHECK-LABEL: define dso_local <8 x i16> @test_vaddl_s8(9590// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9591// CHECK-NEXT:  [[ENTRY:.*:]]9592// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = sext <8 x i8> [[A]] to <8 x i16>9593// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <8 x i8> [[B]] to <8 x i16>9594// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[VMOVL_I5_I]], [[VMOVL_I_I]]9595// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]9596//9597int16x8_t test_vaddl_s8(int8x8_t a, int8x8_t b) {9598  return vaddl_s8(a, b);9599}9600 9601// CHECK-LABEL: define dso_local <4 x i32> @test_vaddl_s16(9602// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9603// CHECK-NEXT:  [[ENTRY:.*:]]9604// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>9605// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9606// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9607// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>9608// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>9609// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <4 x i16> [[TMP3]] to <4 x i32>9610// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[VMOVL_I5_I]], [[VMOVL_I_I]]9611// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]9612//9613int32x4_t test_vaddl_s16(int16x4_t a, int16x4_t b) {9614  return vaddl_s16(a, b);9615}9616 9617// CHECK-LABEL: define dso_local <2 x i64> @test_vaddl_s32(9618// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9619// CHECK-NEXT:  [[ENTRY:.*:]]9620// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9621// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9622// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9623// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>9624// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>9625// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <2 x i32> [[TMP3]] to <2 x i64>9626// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[VMOVL_I5_I]], [[VMOVL_I_I]]9627// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]9628//9629int64x2_t test_vaddl_s32(int32x2_t a, int32x2_t b) {9630  return vaddl_s32(a, b);9631}9632 9633// CHECK-LABEL: define dso_local <8 x i16> @test_vaddl_u8(9634// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9635// CHECK-NEXT:  [[ENTRY:.*:]]9636// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = zext <8 x i8> [[A]] to <8 x i16>9637// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <8 x i8> [[B]] to <8 x i16>9638// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[VMOVL_I5_I]], [[VMOVL_I_I]]9639// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]9640//9641uint16x8_t test_vaddl_u8(uint8x8_t a, uint8x8_t b) {9642  return vaddl_u8(a, b);9643}9644 9645// CHECK-LABEL: define dso_local <4 x i32> @test_vaddl_u16(9646// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9647// CHECK-NEXT:  [[ENTRY:.*:]]9648// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>9649// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9650// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9651// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>9652// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>9653// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>9654// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[VMOVL_I5_I]], [[VMOVL_I_I]]9655// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]9656//9657uint32x4_t test_vaddl_u16(uint16x4_t a, uint16x4_t b) {9658  return vaddl_u16(a, b);9659}9660 9661// CHECK-LABEL: define dso_local <2 x i64> @test_vaddl_u32(9662// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9663// CHECK-NEXT:  [[ENTRY:.*:]]9664// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9665// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9666// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>9667// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>9668// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>9669// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>9670// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[VMOVL_I5_I]], [[VMOVL_I_I]]9671// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]9672//9673uint64x2_t test_vaddl_u32(uint32x2_t a, uint32x2_t b) {9674  return vaddl_u32(a, b);9675}9676 9677// CHECK-LABEL: define dso_local <8 x i16> @test_vaddl_high_s8(9678// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9679// CHECK-NEXT:  [[ENTRY:.*:]]9680// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9681// CHECK-NEXT:    [[TMP0:%.*]] = sext <8 x i8> [[SHUFFLE_I_I12_I]] to <8 x i16>9682// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9683// CHECK-NEXT:    [[TMP1:%.*]] = sext <8 x i8> [[SHUFFLE_I_I_I]] to <8 x i16>9684// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[TMP0]], [[TMP1]]9685// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]9686//9687int16x8_t test_vaddl_high_s8(int8x16_t a, int8x16_t b) {9688  return vaddl_high_s8(a, b);9689}9690 9691// CHECK-LABEL: define dso_local <4 x i32> @test_vaddl_high_s16(9692// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9693// CHECK-NEXT:  [[ENTRY:.*:]]9694// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9695// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I12_I]] to <8 x i8>9696// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9697// CHECK-NEXT:    [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9698// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9699// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I_I]] to <8 x i8>9700// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>9701// CHECK-NEXT:    [[TMP5:%.*]] = sext <4 x i16> [[TMP4]] to <4 x i32>9702// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[TMP2]], [[TMP5]]9703// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]9704//9705int32x4_t test_vaddl_high_s16(int16x8_t a, int16x8_t b) {9706  return vaddl_high_s16(a, b);9707}9708 9709// CHECK-LABEL: define dso_local <2 x i64> @test_vaddl_high_s32(9710// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9711// CHECK-NEXT:  [[ENTRY:.*:]]9712// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>9713// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I12_I]] to <8 x i8>9714// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9715// CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9716// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>9717// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I_I]] to <8 x i8>9718// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>9719// CHECK-NEXT:    [[TMP5:%.*]] = sext <2 x i32> [[TMP4]] to <2 x i64>9720// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[TMP2]], [[TMP5]]9721// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]9722//9723int64x2_t test_vaddl_high_s32(int32x4_t a, int32x4_t b) {9724  return vaddl_high_s32(a, b);9725}9726 9727// CHECK-LABEL: define dso_local <8 x i16> @test_vaddl_high_u8(9728// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9729// CHECK-NEXT:  [[ENTRY:.*:]]9730// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9731// CHECK-NEXT:    [[TMP0:%.*]] = zext <8 x i8> [[SHUFFLE_I_I12_I]] to <8 x i16>9732// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9733// CHECK-NEXT:    [[TMP1:%.*]] = zext <8 x i8> [[SHUFFLE_I_I_I]] to <8 x i16>9734// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[TMP0]], [[TMP1]]9735// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]9736//9737uint16x8_t test_vaddl_high_u8(uint8x16_t a, uint8x16_t b) {9738  return vaddl_high_u8(a, b);9739}9740 9741// CHECK-LABEL: define dso_local <4 x i32> @test_vaddl_high_u16(9742// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9743// CHECK-NEXT:  [[ENTRY:.*:]]9744// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9745// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I12_I]] to <8 x i8>9746// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9747// CHECK-NEXT:    [[TMP2:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9748// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9749// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I_I]] to <8 x i8>9750// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>9751// CHECK-NEXT:    [[TMP5:%.*]] = zext <4 x i16> [[TMP4]] to <4 x i32>9752// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[TMP2]], [[TMP5]]9753// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]9754//9755uint32x4_t test_vaddl_high_u16(uint16x8_t a, uint16x8_t b) {9756  return vaddl_high_u16(a, b);9757}9758 9759// CHECK-LABEL: define dso_local <2 x i64> @test_vaddl_high_u32(9760// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9761// CHECK-NEXT:  [[ENTRY:.*:]]9762// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>9763// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I12_I]] to <8 x i8>9764// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9765// CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>9766// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>9767// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I_I]] to <8 x i8>9768// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>9769// CHECK-NEXT:    [[TMP5:%.*]] = zext <2 x i32> [[TMP4]] to <2 x i64>9770// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[TMP2]], [[TMP5]]9771// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]9772//9773uint64x2_t test_vaddl_high_u32(uint32x4_t a, uint32x4_t b) {9774  return vaddl_high_u32(a, b);9775}9776 9777// CHECK-LABEL: define dso_local <8 x i16> @test_vaddw_s8(9778// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9779// CHECK-NEXT:  [[ENTRY:.*:]]9780// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <8 x i8> [[B]] to <8 x i16>9781// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[A]], [[VMOVL_I_I]]9782// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]9783//9784int16x8_t test_vaddw_s8(int16x8_t a, int8x8_t b) {9785  return vaddw_s8(a, b);9786}9787 9788// CHECK-LABEL: define dso_local <4 x i32> @test_vaddw_s16(9789// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9790// CHECK-NEXT:  [[ENTRY:.*:]]9791// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>9792// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9793// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9794// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[A]], [[VMOVL_I_I]]9795// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]9796//9797int32x4_t test_vaddw_s16(int32x4_t a, int16x4_t b) {9798  return vaddw_s16(a, b);9799}9800 9801// CHECK-LABEL: define dso_local <2 x i64> @test_vaddw_s32(9802// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9803// CHECK-NEXT:  [[ENTRY:.*:]]9804// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>9805// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9806// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9807// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[A]], [[VMOVL_I_I]]9808// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]9809//9810int64x2_t test_vaddw_s32(int64x2_t a, int32x2_t b) {9811  return vaddw_s32(a, b);9812}9813 9814// CHECK-LABEL: define dso_local <8 x i16> @test_vaddw_u8(9815// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9816// CHECK-NEXT:  [[ENTRY:.*:]]9817// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <8 x i8> [[B]] to <8 x i16>9818// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[A]], [[VMOVL_I_I]]9819// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]9820//9821uint16x8_t test_vaddw_u8(uint16x8_t a, uint8x8_t b) {9822  return vaddw_u8(a, b);9823}9824 9825// CHECK-LABEL: define dso_local <4 x i32> @test_vaddw_u16(9826// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9827// CHECK-NEXT:  [[ENTRY:.*:]]9828// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>9829// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9830// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9831// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[A]], [[VMOVL_I_I]]9832// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]9833//9834uint32x4_t test_vaddw_u16(uint32x4_t a, uint16x4_t b) {9835  return vaddw_u16(a, b);9836}9837 9838// CHECK-LABEL: define dso_local <2 x i64> @test_vaddw_u32(9839// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9840// CHECK-NEXT:  [[ENTRY:.*:]]9841// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>9842// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9843// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>9844// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[A]], [[VMOVL_I_I]]9845// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]9846//9847uint64x2_t test_vaddw_u32(uint64x2_t a, uint32x2_t b) {9848  return vaddw_u32(a, b);9849}9850 9851// CHECK-LABEL: define dso_local <8 x i16> @test_vaddw_high_s8(9852// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9853// CHECK-NEXT:  [[ENTRY:.*:]]9854// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9855// CHECK-NEXT:    [[TMP0:%.*]] = sext <8 x i8> [[SHUFFLE_I_I_I]] to <8 x i16>9856// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[A]], [[TMP0]]9857// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]9858//9859int16x8_t test_vaddw_high_s8(int16x8_t a, int8x16_t b) {9860  return vaddw_high_s8(a, b);9861}9862 9863// CHECK-LABEL: define dso_local <4 x i32> @test_vaddw_high_s16(9864// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9865// CHECK-NEXT:  [[ENTRY:.*:]]9866// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9867// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I_I]] to <8 x i8>9868// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9869// CHECK-NEXT:    [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9870// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[A]], [[TMP2]]9871// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]9872//9873int32x4_t test_vaddw_high_s16(int32x4_t a, int16x8_t b) {9874  return vaddw_high_s16(a, b);9875}9876 9877// CHECK-LABEL: define dso_local <2 x i64> @test_vaddw_high_s32(9878// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9879// CHECK-NEXT:  [[ENTRY:.*:]]9880// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>9881// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I_I]] to <8 x i8>9882// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9883// CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9884// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[A]], [[TMP2]]9885// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]9886//9887int64x2_t test_vaddw_high_s32(int64x2_t a, int32x4_t b) {9888  return vaddw_high_s32(a, b);9889}9890 9891// CHECK-LABEL: define dso_local <8 x i16> @test_vaddw_high_u8(9892// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9893// CHECK-NEXT:  [[ENTRY:.*:]]9894// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9895// CHECK-NEXT:    [[TMP0:%.*]] = zext <8 x i8> [[SHUFFLE_I_I_I]] to <8 x i16>9896// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[A]], [[TMP0]]9897// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]9898//9899uint16x8_t test_vaddw_high_u8(uint16x8_t a, uint8x16_t b) {9900  return vaddw_high_u8(a, b);9901}9902 9903// CHECK-LABEL: define dso_local <4 x i32> @test_vaddw_high_u16(9904// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9905// CHECK-NEXT:  [[ENTRY:.*:]]9906// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9907// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I_I]] to <8 x i8>9908// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9909// CHECK-NEXT:    [[TMP2:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9910// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[A]], [[TMP2]]9911// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]9912//9913uint32x4_t test_vaddw_high_u16(uint32x4_t a, uint16x8_t b) {9914  return vaddw_high_u16(a, b);9915}9916 9917// CHECK-LABEL: define dso_local <2 x i64> @test_vaddw_high_u32(9918// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9919// CHECK-NEXT:  [[ENTRY:.*:]]9920// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>9921// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I_I]] to <8 x i8>9922// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9923// CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>9924// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[A]], [[TMP2]]9925// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]9926//9927uint64x2_t test_vaddw_high_u32(uint64x2_t a, uint32x4_t b) {9928  return vaddw_high_u32(a, b);9929}9930 9931// CHECK-LABEL: define dso_local <8 x i16> @test_vsubl_s8(9932// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9933// CHECK-NEXT:  [[ENTRY:.*:]]9934// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = sext <8 x i8> [[A]] to <8 x i16>9935// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <8 x i8> [[B]] to <8 x i16>9936// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[VMOVL_I5_I]], [[VMOVL_I_I]]9937// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]9938//9939int16x8_t test_vsubl_s8(int8x8_t a, int8x8_t b) {9940  return vsubl_s8(a, b);9941}9942 9943// CHECK-LABEL: define dso_local <4 x i32> @test_vsubl_s16(9944// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9945// CHECK-NEXT:  [[ENTRY:.*:]]9946// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>9947// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9948// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>9949// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>9950// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>9951// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <4 x i16> [[TMP3]] to <4 x i32>9952// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[VMOVL_I5_I]], [[VMOVL_I_I]]9953// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]9954//9955int32x4_t test_vsubl_s16(int16x4_t a, int16x4_t b) {9956  return vsubl_s16(a, b);9957}9958 9959// CHECK-LABEL: define dso_local <2 x i64> @test_vsubl_s32(9960// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {9961// CHECK-NEXT:  [[ENTRY:.*:]]9962// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>9963// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>9964// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>9965// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>9966// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>9967// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <2 x i32> [[TMP3]] to <2 x i64>9968// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[VMOVL_I5_I]], [[VMOVL_I_I]]9969// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]9970//9971int64x2_t test_vsubl_s32(int32x2_t a, int32x2_t b) {9972  return vsubl_s32(a, b);9973}9974 9975// CHECK-LABEL: define dso_local <8 x i16> @test_vsubl_u8(9976// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {9977// CHECK-NEXT:  [[ENTRY:.*:]]9978// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = zext <8 x i8> [[A]] to <8 x i16>9979// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <8 x i8> [[B]] to <8 x i16>9980// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[VMOVL_I5_I]], [[VMOVL_I_I]]9981// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]9982//9983uint16x8_t test_vsubl_u8(uint8x8_t a, uint8x8_t b) {9984  return vsubl_u8(a, b);9985}9986 9987// CHECK-LABEL: define dso_local <4 x i32> @test_vsubl_u16(9988// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {9989// CHECK-NEXT:  [[ENTRY:.*:]]9990// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>9991// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>9992// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>9993// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>9994// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>9995// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>9996// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[VMOVL_I5_I]], [[VMOVL_I_I]]9997// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]9998//9999uint32x4_t test_vsubl_u16(uint16x4_t a, uint16x4_t b) {10000  return vsubl_u16(a, b);10001}10002 10003// CHECK-LABEL: define dso_local <2 x i64> @test_vsubl_u32(10004// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10005// CHECK-NEXT:  [[ENTRY:.*:]]10006// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>10007// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>10008// CHECK-NEXT:    [[VMOVL_I5_I:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>10009// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>10010// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>10011// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>10012// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[VMOVL_I5_I]], [[VMOVL_I_I]]10013// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]10014//10015uint64x2_t test_vsubl_u32(uint32x2_t a, uint32x2_t b) {10016  return vsubl_u32(a, b);10017}10018 10019// CHECK-LABEL: define dso_local <8 x i16> @test_vsubl_high_s8(10020// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {10021// CHECK-NEXT:  [[ENTRY:.*:]]10022// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10023// CHECK-NEXT:    [[TMP0:%.*]] = sext <8 x i8> [[SHUFFLE_I_I12_I]] to <8 x i16>10024// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10025// CHECK-NEXT:    [[TMP1:%.*]] = sext <8 x i8> [[SHUFFLE_I_I_I]] to <8 x i16>10026// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[TMP0]], [[TMP1]]10027// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]10028//10029int16x8_t test_vsubl_high_s8(int8x16_t a, int8x16_t b) {10030  return vsubl_high_s8(a, b);10031}10032 10033// CHECK-LABEL: define dso_local <4 x i32> @test_vsubl_high_s16(10034// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10035// CHECK-NEXT:  [[ENTRY:.*:]]10036// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>10037// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I12_I]] to <8 x i8>10038// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>10039// CHECK-NEXT:    [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>10040// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>10041// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I_I]] to <8 x i8>10042// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>10043// CHECK-NEXT:    [[TMP5:%.*]] = sext <4 x i16> [[TMP4]] to <4 x i32>10044// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[TMP2]], [[TMP5]]10045// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]10046//10047int32x4_t test_vsubl_high_s16(int16x8_t a, int16x8_t b) {10048  return vsubl_high_s16(a, b);10049}10050 10051// CHECK-LABEL: define dso_local <2 x i64> @test_vsubl_high_s32(10052// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10053// CHECK-NEXT:  [[ENTRY:.*:]]10054// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>10055// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I12_I]] to <8 x i8>10056// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>10057// CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>10058// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>10059// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I_I]] to <8 x i8>10060// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>10061// CHECK-NEXT:    [[TMP5:%.*]] = sext <2 x i32> [[TMP4]] to <2 x i64>10062// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[TMP2]], [[TMP5]]10063// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]10064//10065int64x2_t test_vsubl_high_s32(int32x4_t a, int32x4_t b) {10066  return vsubl_high_s32(a, b);10067}10068 10069// CHECK-LABEL: define dso_local <8 x i16> @test_vsubl_high_u8(10070// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {10071// CHECK-NEXT:  [[ENTRY:.*:]]10072// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10073// CHECK-NEXT:    [[TMP0:%.*]] = zext <8 x i8> [[SHUFFLE_I_I12_I]] to <8 x i16>10074// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10075// CHECK-NEXT:    [[TMP1:%.*]] = zext <8 x i8> [[SHUFFLE_I_I_I]] to <8 x i16>10076// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[TMP0]], [[TMP1]]10077// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]10078//10079uint16x8_t test_vsubl_high_u8(uint8x16_t a, uint8x16_t b) {10080  return vsubl_high_u8(a, b);10081}10082 10083// CHECK-LABEL: define dso_local <4 x i32> @test_vsubl_high_u16(10084// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10085// CHECK-NEXT:  [[ENTRY:.*:]]10086// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>10087// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I12_I]] to <8 x i8>10088// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>10089// CHECK-NEXT:    [[TMP2:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>10090// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>10091// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I_I]] to <8 x i8>10092// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>10093// CHECK-NEXT:    [[TMP5:%.*]] = zext <4 x i16> [[TMP4]] to <4 x i32>10094// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[TMP2]], [[TMP5]]10095// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]10096//10097uint32x4_t test_vsubl_high_u16(uint16x8_t a, uint16x8_t b) {10098  return vsubl_high_u16(a, b);10099}10100 10101// CHECK-LABEL: define dso_local <2 x i64> @test_vsubl_high_u32(10102// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10103// CHECK-NEXT:  [[ENTRY:.*:]]10104// CHECK-NEXT:    [[SHUFFLE_I_I12_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>10105// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I12_I]] to <8 x i8>10106// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>10107// CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>10108// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>10109// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I_I]] to <8 x i8>10110// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>10111// CHECK-NEXT:    [[TMP5:%.*]] = zext <2 x i32> [[TMP4]] to <2 x i64>10112// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[TMP2]], [[TMP5]]10113// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]10114//10115uint64x2_t test_vsubl_high_u32(uint32x4_t a, uint32x4_t b) {10116  return vsubl_high_u32(a, b);10117}10118 10119// CHECK-LABEL: define dso_local <8 x i16> @test_vsubw_s8(10120// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {10121// CHECK-NEXT:  [[ENTRY:.*:]]10122// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <8 x i8> [[B]] to <8 x i16>10123// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[A]], [[VMOVL_I_I]]10124// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]10125//10126int16x8_t test_vsubw_s8(int16x8_t a, int8x8_t b) {10127  return vsubw_s8(a, b);10128}10129 10130// CHECK-LABEL: define dso_local <4 x i32> @test_vsubw_s16(10131// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10132// CHECK-NEXT:  [[ENTRY:.*:]]10133// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>10134// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>10135// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>10136// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[A]], [[VMOVL_I_I]]10137// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]10138//10139int32x4_t test_vsubw_s16(int32x4_t a, int16x4_t b) {10140  return vsubw_s16(a, b);10141}10142 10143// CHECK-LABEL: define dso_local <2 x i64> @test_vsubw_s32(10144// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10145// CHECK-NEXT:  [[ENTRY:.*:]]10146// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>10147// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>10148// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>10149// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[A]], [[VMOVL_I_I]]10150// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]10151//10152int64x2_t test_vsubw_s32(int64x2_t a, int32x2_t b) {10153  return vsubw_s32(a, b);10154}10155 10156// CHECK-LABEL: define dso_local <8 x i16> @test_vsubw_u8(10157// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {10158// CHECK-NEXT:  [[ENTRY:.*:]]10159// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <8 x i8> [[B]] to <8 x i16>10160// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[A]], [[VMOVL_I_I]]10161// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]10162//10163uint16x8_t test_vsubw_u8(uint16x8_t a, uint8x8_t b) {10164  return vsubw_u8(a, b);10165}10166 10167// CHECK-LABEL: define dso_local <4 x i32> @test_vsubw_u16(10168// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10169// CHECK-NEXT:  [[ENTRY:.*:]]10170// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>10171// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>10172// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>10173// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[A]], [[VMOVL_I_I]]10174// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]10175//10176uint32x4_t test_vsubw_u16(uint32x4_t a, uint16x4_t b) {10177  return vsubw_u16(a, b);10178}10179 10180// CHECK-LABEL: define dso_local <2 x i64> @test_vsubw_u32(10181// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10182// CHECK-NEXT:  [[ENTRY:.*:]]10183// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>10184// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>10185// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>10186// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[A]], [[VMOVL_I_I]]10187// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]10188//10189uint64x2_t test_vsubw_u32(uint64x2_t a, uint32x2_t b) {10190  return vsubw_u32(a, b);10191}10192 10193// CHECK-LABEL: define dso_local <8 x i16> @test_vsubw_high_s8(10194// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {10195// CHECK-NEXT:  [[ENTRY:.*:]]10196// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10197// CHECK-NEXT:    [[TMP0:%.*]] = sext <8 x i8> [[SHUFFLE_I_I_I]] to <8 x i16>10198// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[A]], [[TMP0]]10199// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]10200//10201int16x8_t test_vsubw_high_s8(int16x8_t a, int8x16_t b) {10202  return vsubw_high_s8(a, b);10203}10204 10205// CHECK-LABEL: define dso_local <4 x i32> @test_vsubw_high_s16(10206// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10207// CHECK-NEXT:  [[ENTRY:.*:]]10208// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>10209// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I_I]] to <8 x i8>10210// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>10211// CHECK-NEXT:    [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>10212// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[A]], [[TMP2]]10213// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]10214//10215int32x4_t test_vsubw_high_s16(int32x4_t a, int16x8_t b) {10216  return vsubw_high_s16(a, b);10217}10218 10219// CHECK-LABEL: define dso_local <2 x i64> @test_vsubw_high_s32(10220// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10221// CHECK-NEXT:  [[ENTRY:.*:]]10222// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>10223// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I_I]] to <8 x i8>10224// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>10225// CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>10226// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[A]], [[TMP2]]10227// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]10228//10229int64x2_t test_vsubw_high_s32(int64x2_t a, int32x4_t b) {10230  return vsubw_high_s32(a, b);10231}10232 10233// CHECK-LABEL: define dso_local <8 x i16> @test_vsubw_high_u8(10234// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {10235// CHECK-NEXT:  [[ENTRY:.*:]]10236// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10237// CHECK-NEXT:    [[TMP0:%.*]] = zext <8 x i8> [[SHUFFLE_I_I_I]] to <8 x i16>10238// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[A]], [[TMP0]]10239// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]10240//10241uint16x8_t test_vsubw_high_u8(uint16x8_t a, uint8x16_t b) {10242  return vsubw_high_u8(a, b);10243}10244 10245// CHECK-LABEL: define dso_local <4 x i32> @test_vsubw_high_u16(10246// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10247// CHECK-NEXT:  [[ENTRY:.*:]]10248// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>10249// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I_I]] to <8 x i8>10250// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>10251// CHECK-NEXT:    [[TMP2:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>10252// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[A]], [[TMP2]]10253// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]10254//10255uint32x4_t test_vsubw_high_u16(uint32x4_t a, uint16x8_t b) {10256  return vsubw_high_u16(a, b);10257}10258 10259// CHECK-LABEL: define dso_local <2 x i64> @test_vsubw_high_u32(10260// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10261// CHECK-NEXT:  [[ENTRY:.*:]]10262// CHECK-NEXT:    [[SHUFFLE_I_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>10263// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I_I]] to <8 x i8>10264// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>10265// CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>10266// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[A]], [[TMP2]]10267// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]10268//10269uint64x2_t test_vsubw_high_u32(uint64x2_t a, uint32x4_t b) {10270  return vsubw_high_u32(a, b);10271}10272 10273// CHECK-LABEL: define dso_local <8 x i8> @test_vaddhn_s16(10274// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10275// CHECK-NEXT:  [[ENTRY:.*:]]10276// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10277// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10278// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10279// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10280// CHECK-NEXT:    [[VADDHN_I:%.*]] = add <8 x i16> [[TMP2]], [[TMP3]]10281// CHECK-NEXT:    [[VADDHN1_I:%.*]] = lshr <8 x i16> [[VADDHN_I]], splat (i16 8)10282// CHECK-NEXT:    [[VADDHN2_I:%.*]] = trunc <8 x i16> [[VADDHN1_I]] to <8 x i8>10283// CHECK-NEXT:    ret <8 x i8> [[VADDHN2_I]]10284//10285int8x8_t test_vaddhn_s16(int16x8_t a, int16x8_t b) {10286  return vaddhn_s16(a, b);10287}10288 10289// CHECK-LABEL: define dso_local <4 x i16> @test_vaddhn_s32(10290// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10291// CHECK-NEXT:  [[ENTRY:.*:]]10292// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10293// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10294// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10295// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10296// CHECK-NEXT:    [[VADDHN_I:%.*]] = add <4 x i32> [[TMP2]], [[TMP3]]10297// CHECK-NEXT:    [[VADDHN1_I:%.*]] = lshr <4 x i32> [[VADDHN_I]], splat (i32 16)10298// CHECK-NEXT:    [[VADDHN2_I:%.*]] = trunc <4 x i32> [[VADDHN1_I]] to <4 x i16>10299// CHECK-NEXT:    ret <4 x i16> [[VADDHN2_I]]10300//10301int16x4_t test_vaddhn_s32(int32x4_t a, int32x4_t b) {10302  return vaddhn_s32(a, b);10303}10304 10305// CHECK-LABEL: define dso_local <2 x i32> @test_vaddhn_s64(10306// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10307// CHECK-NEXT:  [[ENTRY:.*:]]10308// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10309// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10310// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10311// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10312// CHECK-NEXT:    [[VADDHN_I:%.*]] = add <2 x i64> [[TMP2]], [[TMP3]]10313// CHECK-NEXT:    [[VADDHN1_I:%.*]] = lshr <2 x i64> [[VADDHN_I]], splat (i64 32)10314// CHECK-NEXT:    [[VADDHN2_I:%.*]] = trunc <2 x i64> [[VADDHN1_I]] to <2 x i32>10315// CHECK-NEXT:    ret <2 x i32> [[VADDHN2_I]]10316//10317int32x2_t test_vaddhn_s64(int64x2_t a, int64x2_t b) {10318  return vaddhn_s64(a, b);10319}10320 10321// CHECK-LABEL: define dso_local <8 x i8> @test_vaddhn_u16(10322// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10323// CHECK-NEXT:  [[ENTRY:.*:]]10324// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10325// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10326// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10327// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10328// CHECK-NEXT:    [[VADDHN_I:%.*]] = add <8 x i16> [[TMP2]], [[TMP3]]10329// CHECK-NEXT:    [[VADDHN1_I:%.*]] = lshr <8 x i16> [[VADDHN_I]], splat (i16 8)10330// CHECK-NEXT:    [[VADDHN2_I:%.*]] = trunc <8 x i16> [[VADDHN1_I]] to <8 x i8>10331// CHECK-NEXT:    ret <8 x i8> [[VADDHN2_I]]10332//10333uint8x8_t test_vaddhn_u16(uint16x8_t a, uint16x8_t b) {10334  return vaddhn_u16(a, b);10335}10336 10337// CHECK-LABEL: define dso_local <4 x i16> @test_vaddhn_u32(10338// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10339// CHECK-NEXT:  [[ENTRY:.*:]]10340// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10341// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10342// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10343// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10344// CHECK-NEXT:    [[VADDHN_I:%.*]] = add <4 x i32> [[TMP2]], [[TMP3]]10345// CHECK-NEXT:    [[VADDHN1_I:%.*]] = lshr <4 x i32> [[VADDHN_I]], splat (i32 16)10346// CHECK-NEXT:    [[VADDHN2_I:%.*]] = trunc <4 x i32> [[VADDHN1_I]] to <4 x i16>10347// CHECK-NEXT:    ret <4 x i16> [[VADDHN2_I]]10348//10349uint16x4_t test_vaddhn_u32(uint32x4_t a, uint32x4_t b) {10350  return vaddhn_u32(a, b);10351}10352 10353// CHECK-LABEL: define dso_local <2 x i32> @test_vaddhn_u64(10354// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10355// CHECK-NEXT:  [[ENTRY:.*:]]10356// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10357// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10358// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10359// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10360// CHECK-NEXT:    [[VADDHN_I:%.*]] = add <2 x i64> [[TMP2]], [[TMP3]]10361// CHECK-NEXT:    [[VADDHN1_I:%.*]] = lshr <2 x i64> [[VADDHN_I]], splat (i64 32)10362// CHECK-NEXT:    [[VADDHN2_I:%.*]] = trunc <2 x i64> [[VADDHN1_I]] to <2 x i32>10363// CHECK-NEXT:    ret <2 x i32> [[VADDHN2_I]]10364//10365uint32x2_t test_vaddhn_u64(uint64x2_t a, uint64x2_t b) {10366  return vaddhn_u64(a, b);10367}10368 10369// CHECK-LABEL: define dso_local <16 x i8> @test_vaddhn_high_s16(10370// CHECK-SAME: <8 x i8> noundef [[R:%.*]], <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10371// CHECK-NEXT:  [[ENTRY:.*:]]10372// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10373// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10374// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10375// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10376// CHECK-NEXT:    [[VADDHN_I_I:%.*]] = add <8 x i16> [[TMP2]], [[TMP3]]10377// CHECK-NEXT:    [[VADDHN1_I_I:%.*]] = lshr <8 x i16> [[VADDHN_I_I]], splat (i16 8)10378// CHECK-NEXT:    [[VADDHN2_I_I:%.*]] = trunc <8 x i16> [[VADDHN1_I_I]] to <8 x i8>10379// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> [[R]], <8 x i8> [[VADDHN2_I_I]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10380// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I_I]]10381//10382int8x16_t test_vaddhn_high_s16(int8x8_t r, int16x8_t a, int16x8_t b) {10383  return vaddhn_high_s16(r, a, b);10384}10385 10386// CHECK-LABEL: define dso_local <8 x i16> @test_vaddhn_high_s32(10387// CHECK-SAME: <4 x i16> noundef [[R:%.*]], <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10388// CHECK-NEXT:  [[ENTRY:.*:]]10389// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10390// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10391// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10392// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10393// CHECK-NEXT:    [[VADDHN_I_I:%.*]] = add <4 x i32> [[TMP2]], [[TMP3]]10394// CHECK-NEXT:    [[VADDHN1_I_I:%.*]] = lshr <4 x i32> [[VADDHN_I_I]], splat (i32 16)10395// CHECK-NEXT:    [[VADDHN2_I_I:%.*]] = trunc <4 x i32> [[VADDHN1_I_I]] to <4 x i16>10396// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> [[R]], <4 x i16> [[VADDHN2_I_I]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10397// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I_I]]10398//10399int16x8_t test_vaddhn_high_s32(int16x4_t r, int32x4_t a, int32x4_t b) {10400  return vaddhn_high_s32(r, a, b);10401}10402 10403// CHECK-LABEL: define dso_local <4 x i32> @test_vaddhn_high_s64(10404// CHECK-SAME: <2 x i32> noundef [[R:%.*]], <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10405// CHECK-NEXT:  [[ENTRY:.*:]]10406// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10407// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10408// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10409// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10410// CHECK-NEXT:    [[VADDHN_I_I:%.*]] = add <2 x i64> [[TMP2]], [[TMP3]]10411// CHECK-NEXT:    [[VADDHN1_I_I:%.*]] = lshr <2 x i64> [[VADDHN_I_I]], splat (i64 32)10412// CHECK-NEXT:    [[VADDHN2_I_I:%.*]] = trunc <2 x i64> [[VADDHN1_I_I]] to <2 x i32>10413// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i32> [[R]], <2 x i32> [[VADDHN2_I_I]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10414// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I_I]]10415//10416int32x4_t test_vaddhn_high_s64(int32x2_t r, int64x2_t a, int64x2_t b) {10417  return vaddhn_high_s64(r, a, b);10418}10419 10420// CHECK-LABEL: define dso_local <16 x i8> @test_vaddhn_high_u16(10421// CHECK-SAME: <8 x i8> noundef [[R:%.*]], <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10422// CHECK-NEXT:  [[ENTRY:.*:]]10423// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10424// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10425// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10426// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10427// CHECK-NEXT:    [[VADDHN_I_I:%.*]] = add <8 x i16> [[TMP2]], [[TMP3]]10428// CHECK-NEXT:    [[VADDHN1_I_I:%.*]] = lshr <8 x i16> [[VADDHN_I_I]], splat (i16 8)10429// CHECK-NEXT:    [[VADDHN2_I_I:%.*]] = trunc <8 x i16> [[VADDHN1_I_I]] to <8 x i8>10430// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> [[R]], <8 x i8> [[VADDHN2_I_I]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10431// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I_I]]10432//10433uint8x16_t test_vaddhn_high_u16(uint8x8_t r, uint16x8_t a, uint16x8_t b) {10434  return vaddhn_high_u16(r, a, b);10435}10436 10437// CHECK-LABEL: define dso_local <8 x i16> @test_vaddhn_high_u32(10438// CHECK-SAME: <4 x i16> noundef [[R:%.*]], <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10439// CHECK-NEXT:  [[ENTRY:.*:]]10440// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10441// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10442// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10443// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10444// CHECK-NEXT:    [[VADDHN_I_I:%.*]] = add <4 x i32> [[TMP2]], [[TMP3]]10445// CHECK-NEXT:    [[VADDHN1_I_I:%.*]] = lshr <4 x i32> [[VADDHN_I_I]], splat (i32 16)10446// CHECK-NEXT:    [[VADDHN2_I_I:%.*]] = trunc <4 x i32> [[VADDHN1_I_I]] to <4 x i16>10447// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> [[R]], <4 x i16> [[VADDHN2_I_I]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10448// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I_I]]10449//10450uint16x8_t test_vaddhn_high_u32(uint16x4_t r, uint32x4_t a, uint32x4_t b) {10451  return vaddhn_high_u32(r, a, b);10452}10453 10454// CHECK-LABEL: define dso_local <4 x i32> @test_vaddhn_high_u64(10455// CHECK-SAME: <2 x i32> noundef [[R:%.*]], <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10456// CHECK-NEXT:  [[ENTRY:.*:]]10457// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10458// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10459// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10460// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10461// CHECK-NEXT:    [[VADDHN_I_I:%.*]] = add <2 x i64> [[TMP2]], [[TMP3]]10462// CHECK-NEXT:    [[VADDHN1_I_I:%.*]] = lshr <2 x i64> [[VADDHN_I_I]], splat (i64 32)10463// CHECK-NEXT:    [[VADDHN2_I_I:%.*]] = trunc <2 x i64> [[VADDHN1_I_I]] to <2 x i32>10464// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i32> [[R]], <2 x i32> [[VADDHN2_I_I]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10465// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I_I]]10466//10467uint32x4_t test_vaddhn_high_u64(uint32x2_t r, uint64x2_t a, uint64x2_t b) {10468  return vaddhn_high_u64(r, a, b);10469}10470 10471// CHECK-LABEL: define dso_local <8 x i8> @test_vraddhn_s16(10472// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10473// CHECK-NEXT:  [[ENTRY:.*:]]10474// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10475// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10476// CHECK-NEXT:    [[VRADDHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10477// CHECK-NEXT:    [[VRADDHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10478// CHECK-NEXT:    [[VRADDHN_V2_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16> [[VRADDHN_V_I]], <8 x i16> [[VRADDHN_V1_I]])10479// CHECK-NEXT:    ret <8 x i8> [[VRADDHN_V2_I]]10480//10481int8x8_t test_vraddhn_s16(int16x8_t a, int16x8_t b) {10482  return vraddhn_s16(a, b);10483}10484 10485// CHECK-LABEL: define dso_local <4 x i16> @test_vraddhn_s32(10486// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10487// CHECK-NEXT:  [[ENTRY:.*:]]10488// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10489// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10490// CHECK-NEXT:    [[VRADDHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10491// CHECK-NEXT:    [[VRADDHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10492// CHECK-NEXT:    [[VRADDHN_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.raddhn.v4i16(<4 x i32> [[VRADDHN_V_I]], <4 x i32> [[VRADDHN_V1_I]])10493// CHECK-NEXT:    [[VRADDHN_V3_I:%.*]] = bitcast <4 x i16> [[VRADDHN_V2_I]] to <8 x i8>10494// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRADDHN_V3_I]] to <4 x i16>10495// CHECK-NEXT:    ret <4 x i16> [[TMP2]]10496//10497int16x4_t test_vraddhn_s32(int32x4_t a, int32x4_t b) {10498  return vraddhn_s32(a, b);10499}10500 10501// CHECK-LABEL: define dso_local <2 x i32> @test_vraddhn_s64(10502// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10503// CHECK-NEXT:  [[ENTRY:.*:]]10504// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10505// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10506// CHECK-NEXT:    [[VRADDHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10507// CHECK-NEXT:    [[VRADDHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10508// CHECK-NEXT:    [[VRADDHN_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.raddhn.v2i32(<2 x i64> [[VRADDHN_V_I]], <2 x i64> [[VRADDHN_V1_I]])10509// CHECK-NEXT:    [[VRADDHN_V3_I:%.*]] = bitcast <2 x i32> [[VRADDHN_V2_I]] to <8 x i8>10510// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRADDHN_V3_I]] to <2 x i32>10511// CHECK-NEXT:    ret <2 x i32> [[TMP2]]10512//10513int32x2_t test_vraddhn_s64(int64x2_t a, int64x2_t b) {10514  return vraddhn_s64(a, b);10515}10516 10517// CHECK-LABEL: define dso_local <8 x i8> @test_vraddhn_u16(10518// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10519// CHECK-NEXT:  [[ENTRY:.*:]]10520// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10521// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10522// CHECK-NEXT:    [[VRADDHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10523// CHECK-NEXT:    [[VRADDHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10524// CHECK-NEXT:    [[VRADDHN_V2_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16> [[VRADDHN_V_I]], <8 x i16> [[VRADDHN_V1_I]])10525// CHECK-NEXT:    ret <8 x i8> [[VRADDHN_V2_I]]10526//10527uint8x8_t test_vraddhn_u16(uint16x8_t a, uint16x8_t b) {10528  return vraddhn_u16(a, b);10529}10530 10531// CHECK-LABEL: define dso_local <4 x i16> @test_vraddhn_u32(10532// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10533// CHECK-NEXT:  [[ENTRY:.*:]]10534// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10535// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10536// CHECK-NEXT:    [[VRADDHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10537// CHECK-NEXT:    [[VRADDHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10538// CHECK-NEXT:    [[VRADDHN_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.raddhn.v4i16(<4 x i32> [[VRADDHN_V_I]], <4 x i32> [[VRADDHN_V1_I]])10539// CHECK-NEXT:    [[VRADDHN_V3_I:%.*]] = bitcast <4 x i16> [[VRADDHN_V2_I]] to <8 x i8>10540// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRADDHN_V3_I]] to <4 x i16>10541// CHECK-NEXT:    ret <4 x i16> [[TMP2]]10542//10543uint16x4_t test_vraddhn_u32(uint32x4_t a, uint32x4_t b) {10544  return vraddhn_u32(a, b);10545}10546 10547// CHECK-LABEL: define dso_local <2 x i32> @test_vraddhn_u64(10548// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10549// CHECK-NEXT:  [[ENTRY:.*:]]10550// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10551// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10552// CHECK-NEXT:    [[VRADDHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10553// CHECK-NEXT:    [[VRADDHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10554// CHECK-NEXT:    [[VRADDHN_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.raddhn.v2i32(<2 x i64> [[VRADDHN_V_I]], <2 x i64> [[VRADDHN_V1_I]])10555// CHECK-NEXT:    [[VRADDHN_V3_I:%.*]] = bitcast <2 x i32> [[VRADDHN_V2_I]] to <8 x i8>10556// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRADDHN_V3_I]] to <2 x i32>10557// CHECK-NEXT:    ret <2 x i32> [[TMP2]]10558//10559uint32x2_t test_vraddhn_u64(uint64x2_t a, uint64x2_t b) {10560  return vraddhn_u64(a, b);10561}10562 10563// CHECK-LABEL: define dso_local <16 x i8> @test_vraddhn_high_s16(10564// CHECK-SAME: <8 x i8> noundef [[R:%.*]], <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10565// CHECK-NEXT:  [[ENTRY:.*:]]10566// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10567// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10568// CHECK-NEXT:    [[VRADDHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10569// CHECK-NEXT:    [[VRADDHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10570// CHECK-NEXT:    [[VRADDHN_V2_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16> [[VRADDHN_V_I_I]], <8 x i16> [[VRADDHN_V1_I_I]])10571// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> [[R]], <8 x i8> [[VRADDHN_V2_I_I]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10572// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I_I]]10573//10574int8x16_t test_vraddhn_high_s16(int8x8_t r, int16x8_t a, int16x8_t b) {10575  return vraddhn_high_s16(r, a, b);10576}10577 10578// CHECK-LABEL: define dso_local <8 x i16> @test_vraddhn_high_s32(10579// CHECK-SAME: <4 x i16> noundef [[R:%.*]], <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10580// CHECK-NEXT:  [[ENTRY:.*:]]10581// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10582// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10583// CHECK-NEXT:    [[VRADDHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10584// CHECK-NEXT:    [[VRADDHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10585// CHECK-NEXT:    [[VRADDHN_V2_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.raddhn.v4i16(<4 x i32> [[VRADDHN_V_I_I]], <4 x i32> [[VRADDHN_V1_I_I]])10586// CHECK-NEXT:    [[VRADDHN_V3_I_I:%.*]] = bitcast <4 x i16> [[VRADDHN_V2_I_I]] to <8 x i8>10587// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRADDHN_V3_I_I]] to <4 x i16>10588// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> [[R]], <4 x i16> [[TMP2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10589// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I_I]]10590//10591int16x8_t test_vraddhn_high_s32(int16x4_t r, int32x4_t a, int32x4_t b) {10592  return vraddhn_high_s32(r, a, b);10593}10594 10595// CHECK-LABEL: define dso_local <4 x i32> @test_vraddhn_high_s64(10596// CHECK-SAME: <2 x i32> noundef [[R:%.*]], <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10597// CHECK-NEXT:  [[ENTRY:.*:]]10598// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10599// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10600// CHECK-NEXT:    [[VRADDHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10601// CHECK-NEXT:    [[VRADDHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10602// CHECK-NEXT:    [[VRADDHN_V2_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.raddhn.v2i32(<2 x i64> [[VRADDHN_V_I_I]], <2 x i64> [[VRADDHN_V1_I_I]])10603// CHECK-NEXT:    [[VRADDHN_V3_I_I:%.*]] = bitcast <2 x i32> [[VRADDHN_V2_I_I]] to <8 x i8>10604// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRADDHN_V3_I_I]] to <2 x i32>10605// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i32> [[R]], <2 x i32> [[TMP2]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10606// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I_I]]10607//10608int32x4_t test_vraddhn_high_s64(int32x2_t r, int64x2_t a, int64x2_t b) {10609  return vraddhn_high_s64(r, a, b);10610}10611 10612// CHECK-LABEL: define dso_local <16 x i8> @test_vraddhn_high_u16(10613// CHECK-SAME: <8 x i8> noundef [[R:%.*]], <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10614// CHECK-NEXT:  [[ENTRY:.*:]]10615// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10616// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10617// CHECK-NEXT:    [[VRADDHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10618// CHECK-NEXT:    [[VRADDHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10619// CHECK-NEXT:    [[VRADDHN_V2_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16> [[VRADDHN_V_I_I]], <8 x i16> [[VRADDHN_V1_I_I]])10620// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> [[R]], <8 x i8> [[VRADDHN_V2_I_I]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10621// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I_I]]10622//10623uint8x16_t test_vraddhn_high_u16(uint8x8_t r, uint16x8_t a, uint16x8_t b) {10624  return vraddhn_high_u16(r, a, b);10625}10626 10627// CHECK-LABEL: define dso_local <8 x i16> @test_vraddhn_high_u32(10628// CHECK-SAME: <4 x i16> noundef [[R:%.*]], <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10629// CHECK-NEXT:  [[ENTRY:.*:]]10630// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10631// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10632// CHECK-NEXT:    [[VRADDHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10633// CHECK-NEXT:    [[VRADDHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10634// CHECK-NEXT:    [[VRADDHN_V2_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.raddhn.v4i16(<4 x i32> [[VRADDHN_V_I_I]], <4 x i32> [[VRADDHN_V1_I_I]])10635// CHECK-NEXT:    [[VRADDHN_V3_I_I:%.*]] = bitcast <4 x i16> [[VRADDHN_V2_I_I]] to <8 x i8>10636// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRADDHN_V3_I_I]] to <4 x i16>10637// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> [[R]], <4 x i16> [[TMP2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10638// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I_I]]10639//10640uint16x8_t test_vraddhn_high_u32(uint16x4_t r, uint32x4_t a, uint32x4_t b) {10641  return vraddhn_high_u32(r, a, b);10642}10643 10644// CHECK-LABEL: define dso_local <4 x i32> @test_vraddhn_high_u64(10645// CHECK-SAME: <2 x i32> noundef [[R:%.*]], <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10646// CHECK-NEXT:  [[ENTRY:.*:]]10647// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10648// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10649// CHECK-NEXT:    [[VRADDHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10650// CHECK-NEXT:    [[VRADDHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10651// CHECK-NEXT:    [[VRADDHN_V2_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.raddhn.v2i32(<2 x i64> [[VRADDHN_V_I_I]], <2 x i64> [[VRADDHN_V1_I_I]])10652// CHECK-NEXT:    [[VRADDHN_V3_I_I:%.*]] = bitcast <2 x i32> [[VRADDHN_V2_I_I]] to <8 x i8>10653// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRADDHN_V3_I_I]] to <2 x i32>10654// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i32> [[R]], <2 x i32> [[TMP2]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10655// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I_I]]10656//10657uint32x4_t test_vraddhn_high_u64(uint32x2_t r, uint64x2_t a, uint64x2_t b) {10658  return vraddhn_high_u64(r, a, b);10659}10660 10661// CHECK-LABEL: define dso_local <8 x i8> @test_vsubhn_s16(10662// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10663// CHECK-NEXT:  [[ENTRY:.*:]]10664// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10665// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10666// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10667// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10668// CHECK-NEXT:    [[VSUBHN_I:%.*]] = sub <8 x i16> [[TMP2]], [[TMP3]]10669// CHECK-NEXT:    [[VSUBHN1_I:%.*]] = lshr <8 x i16> [[VSUBHN_I]], splat (i16 8)10670// CHECK-NEXT:    [[VSUBHN2_I:%.*]] = trunc <8 x i16> [[VSUBHN1_I]] to <8 x i8>10671// CHECK-NEXT:    ret <8 x i8> [[VSUBHN2_I]]10672//10673int8x8_t test_vsubhn_s16(int16x8_t a, int16x8_t b) {10674  return vsubhn_s16(a, b);10675}10676 10677// CHECK-LABEL: define dso_local <4 x i16> @test_vsubhn_s32(10678// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10679// CHECK-NEXT:  [[ENTRY:.*:]]10680// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10681// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10682// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10683// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10684// CHECK-NEXT:    [[VSUBHN_I:%.*]] = sub <4 x i32> [[TMP2]], [[TMP3]]10685// CHECK-NEXT:    [[VSUBHN1_I:%.*]] = lshr <4 x i32> [[VSUBHN_I]], splat (i32 16)10686// CHECK-NEXT:    [[VSUBHN2_I:%.*]] = trunc <4 x i32> [[VSUBHN1_I]] to <4 x i16>10687// CHECK-NEXT:    ret <4 x i16> [[VSUBHN2_I]]10688//10689int16x4_t test_vsubhn_s32(int32x4_t a, int32x4_t b) {10690  return vsubhn_s32(a, b);10691}10692 10693// CHECK-LABEL: define dso_local <2 x i32> @test_vsubhn_s64(10694// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10695// CHECK-NEXT:  [[ENTRY:.*:]]10696// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10697// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10698// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10699// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10700// CHECK-NEXT:    [[VSUBHN_I:%.*]] = sub <2 x i64> [[TMP2]], [[TMP3]]10701// CHECK-NEXT:    [[VSUBHN1_I:%.*]] = lshr <2 x i64> [[VSUBHN_I]], splat (i64 32)10702// CHECK-NEXT:    [[VSUBHN2_I:%.*]] = trunc <2 x i64> [[VSUBHN1_I]] to <2 x i32>10703// CHECK-NEXT:    ret <2 x i32> [[VSUBHN2_I]]10704//10705int32x2_t test_vsubhn_s64(int64x2_t a, int64x2_t b) {10706  return vsubhn_s64(a, b);10707}10708 10709// CHECK-LABEL: define dso_local <8 x i8> @test_vsubhn_u16(10710// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10711// CHECK-NEXT:  [[ENTRY:.*:]]10712// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10713// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10714// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10715// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10716// CHECK-NEXT:    [[VSUBHN_I:%.*]] = sub <8 x i16> [[TMP2]], [[TMP3]]10717// CHECK-NEXT:    [[VSUBHN1_I:%.*]] = lshr <8 x i16> [[VSUBHN_I]], splat (i16 8)10718// CHECK-NEXT:    [[VSUBHN2_I:%.*]] = trunc <8 x i16> [[VSUBHN1_I]] to <8 x i8>10719// CHECK-NEXT:    ret <8 x i8> [[VSUBHN2_I]]10720//10721uint8x8_t test_vsubhn_u16(uint16x8_t a, uint16x8_t b) {10722  return vsubhn_u16(a, b);10723}10724 10725// CHECK-LABEL: define dso_local <4 x i16> @test_vsubhn_u32(10726// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10727// CHECK-NEXT:  [[ENTRY:.*:]]10728// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10729// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10730// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10731// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10732// CHECK-NEXT:    [[VSUBHN_I:%.*]] = sub <4 x i32> [[TMP2]], [[TMP3]]10733// CHECK-NEXT:    [[VSUBHN1_I:%.*]] = lshr <4 x i32> [[VSUBHN_I]], splat (i32 16)10734// CHECK-NEXT:    [[VSUBHN2_I:%.*]] = trunc <4 x i32> [[VSUBHN1_I]] to <4 x i16>10735// CHECK-NEXT:    ret <4 x i16> [[VSUBHN2_I]]10736//10737uint16x4_t test_vsubhn_u32(uint32x4_t a, uint32x4_t b) {10738  return vsubhn_u32(a, b);10739}10740 10741// CHECK-LABEL: define dso_local <2 x i32> @test_vsubhn_u64(10742// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10743// CHECK-NEXT:  [[ENTRY:.*:]]10744// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10745// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10746// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10747// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10748// CHECK-NEXT:    [[VSUBHN_I:%.*]] = sub <2 x i64> [[TMP2]], [[TMP3]]10749// CHECK-NEXT:    [[VSUBHN1_I:%.*]] = lshr <2 x i64> [[VSUBHN_I]], splat (i64 32)10750// CHECK-NEXT:    [[VSUBHN2_I:%.*]] = trunc <2 x i64> [[VSUBHN1_I]] to <2 x i32>10751// CHECK-NEXT:    ret <2 x i32> [[VSUBHN2_I]]10752//10753uint32x2_t test_vsubhn_u64(uint64x2_t a, uint64x2_t b) {10754  return vsubhn_u64(a, b);10755}10756 10757// CHECK-LABEL: define dso_local <16 x i8> @test_vsubhn_high_s16(10758// CHECK-SAME: <8 x i8> noundef [[R:%.*]], <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10759// CHECK-NEXT:  [[ENTRY:.*:]]10760// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10761// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10762// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10763// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10764// CHECK-NEXT:    [[VSUBHN_I_I:%.*]] = sub <8 x i16> [[TMP2]], [[TMP3]]10765// CHECK-NEXT:    [[VSUBHN1_I_I:%.*]] = lshr <8 x i16> [[VSUBHN_I_I]], splat (i16 8)10766// CHECK-NEXT:    [[VSUBHN2_I_I:%.*]] = trunc <8 x i16> [[VSUBHN1_I_I]] to <8 x i8>10767// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> [[R]], <8 x i8> [[VSUBHN2_I_I]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10768// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I_I]]10769//10770int8x16_t test_vsubhn_high_s16(int8x8_t r, int16x8_t a, int16x8_t b) {10771  return vsubhn_high_s16(r, a, b);10772}10773 10774// CHECK-LABEL: define dso_local <8 x i16> @test_vsubhn_high_s32(10775// CHECK-SAME: <4 x i16> noundef [[R:%.*]], <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10776// CHECK-NEXT:  [[ENTRY:.*:]]10777// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10778// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10779// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10780// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10781// CHECK-NEXT:    [[VSUBHN_I_I:%.*]] = sub <4 x i32> [[TMP2]], [[TMP3]]10782// CHECK-NEXT:    [[VSUBHN1_I_I:%.*]] = lshr <4 x i32> [[VSUBHN_I_I]], splat (i32 16)10783// CHECK-NEXT:    [[VSUBHN2_I_I:%.*]] = trunc <4 x i32> [[VSUBHN1_I_I]] to <4 x i16>10784// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> [[R]], <4 x i16> [[VSUBHN2_I_I]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10785// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I_I]]10786//10787int16x8_t test_vsubhn_high_s32(int16x4_t r, int32x4_t a, int32x4_t b) {10788  return vsubhn_high_s32(r, a, b);10789}10790 10791// CHECK-LABEL: define dso_local <4 x i32> @test_vsubhn_high_s64(10792// CHECK-SAME: <2 x i32> noundef [[R:%.*]], <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10793// CHECK-NEXT:  [[ENTRY:.*:]]10794// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10795// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10796// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10797// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10798// CHECK-NEXT:    [[VSUBHN_I_I:%.*]] = sub <2 x i64> [[TMP2]], [[TMP3]]10799// CHECK-NEXT:    [[VSUBHN1_I_I:%.*]] = lshr <2 x i64> [[VSUBHN_I_I]], splat (i64 32)10800// CHECK-NEXT:    [[VSUBHN2_I_I:%.*]] = trunc <2 x i64> [[VSUBHN1_I_I]] to <2 x i32>10801// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i32> [[R]], <2 x i32> [[VSUBHN2_I_I]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10802// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I_I]]10803//10804int32x4_t test_vsubhn_high_s64(int32x2_t r, int64x2_t a, int64x2_t b) {10805  return vsubhn_high_s64(r, a, b);10806}10807 10808// CHECK-LABEL: define dso_local <16 x i8> @test_vsubhn_high_u16(10809// CHECK-SAME: <8 x i8> noundef [[R:%.*]], <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10810// CHECK-NEXT:  [[ENTRY:.*:]]10811// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10812// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10813// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10814// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10815// CHECK-NEXT:    [[VSUBHN_I_I:%.*]] = sub <8 x i16> [[TMP2]], [[TMP3]]10816// CHECK-NEXT:    [[VSUBHN1_I_I:%.*]] = lshr <8 x i16> [[VSUBHN_I_I]], splat (i16 8)10817// CHECK-NEXT:    [[VSUBHN2_I_I:%.*]] = trunc <8 x i16> [[VSUBHN1_I_I]] to <8 x i8>10818// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> [[R]], <8 x i8> [[VSUBHN2_I_I]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10819// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I_I]]10820//10821uint8x16_t test_vsubhn_high_u16(uint8x8_t r, uint16x8_t a, uint16x8_t b) {10822  return vsubhn_high_u16(r, a, b);10823}10824 10825// CHECK-LABEL: define dso_local <8 x i16> @test_vsubhn_high_u32(10826// CHECK-SAME: <4 x i16> noundef [[R:%.*]], <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10827// CHECK-NEXT:  [[ENTRY:.*:]]10828// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10829// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10830// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10831// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10832// CHECK-NEXT:    [[VSUBHN_I_I:%.*]] = sub <4 x i32> [[TMP2]], [[TMP3]]10833// CHECK-NEXT:    [[VSUBHN1_I_I:%.*]] = lshr <4 x i32> [[VSUBHN_I_I]], splat (i32 16)10834// CHECK-NEXT:    [[VSUBHN2_I_I:%.*]] = trunc <4 x i32> [[VSUBHN1_I_I]] to <4 x i16>10835// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> [[R]], <4 x i16> [[VSUBHN2_I_I]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10836// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I_I]]10837//10838uint16x8_t test_vsubhn_high_u32(uint16x4_t r, uint32x4_t a, uint32x4_t b) {10839  return vsubhn_high_u32(r, a, b);10840}10841 10842// CHECK-LABEL: define dso_local <4 x i32> @test_vsubhn_high_u64(10843// CHECK-SAME: <2 x i32> noundef [[R:%.*]], <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10844// CHECK-NEXT:  [[ENTRY:.*:]]10845// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10846// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10847// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10848// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10849// CHECK-NEXT:    [[VSUBHN_I_I:%.*]] = sub <2 x i64> [[TMP2]], [[TMP3]]10850// CHECK-NEXT:    [[VSUBHN1_I_I:%.*]] = lshr <2 x i64> [[VSUBHN_I_I]], splat (i64 32)10851// CHECK-NEXT:    [[VSUBHN2_I_I:%.*]] = trunc <2 x i64> [[VSUBHN1_I_I]] to <2 x i32>10852// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i32> [[R]], <2 x i32> [[VSUBHN2_I_I]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10853// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I_I]]10854//10855uint32x4_t test_vsubhn_high_u64(uint32x2_t r, uint64x2_t a, uint64x2_t b) {10856  return vsubhn_high_u64(r, a, b);10857}10858 10859// CHECK-LABEL: define dso_local <8 x i8> @test_vrsubhn_s16(10860// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10861// CHECK-NEXT:  [[ENTRY:.*:]]10862// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10863// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10864// CHECK-NEXT:    [[VRSUBHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10865// CHECK-NEXT:    [[VRSUBHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10866// CHECK-NEXT:    [[VRSUBHN_V2_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> [[VRSUBHN_V_I]], <8 x i16> [[VRSUBHN_V1_I]])10867// CHECK-NEXT:    ret <8 x i8> [[VRSUBHN_V2_I]]10868//10869int8x8_t test_vrsubhn_s16(int16x8_t a, int16x8_t b) {10870  return vrsubhn_s16(a, b);10871}10872 10873// CHECK-LABEL: define dso_local <4 x i16> @test_vrsubhn_s32(10874// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10875// CHECK-NEXT:  [[ENTRY:.*:]]10876// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10877// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10878// CHECK-NEXT:    [[VRSUBHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10879// CHECK-NEXT:    [[VRSUBHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10880// CHECK-NEXT:    [[VRSUBHN_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32> [[VRSUBHN_V_I]], <4 x i32> [[VRSUBHN_V1_I]])10881// CHECK-NEXT:    [[VRSUBHN_V3_I:%.*]] = bitcast <4 x i16> [[VRSUBHN_V2_I]] to <8 x i8>10882// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSUBHN_V3_I]] to <4 x i16>10883// CHECK-NEXT:    ret <4 x i16> [[TMP2]]10884//10885int16x4_t test_vrsubhn_s32(int32x4_t a, int32x4_t b) {10886  return vrsubhn_s32(a, b);10887}10888 10889// CHECK-LABEL: define dso_local <2 x i32> @test_vrsubhn_s64(10890// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10891// CHECK-NEXT:  [[ENTRY:.*:]]10892// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10893// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10894// CHECK-NEXT:    [[VRSUBHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10895// CHECK-NEXT:    [[VRSUBHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10896// CHECK-NEXT:    [[VRSUBHN_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64> [[VRSUBHN_V_I]], <2 x i64> [[VRSUBHN_V1_I]])10897// CHECK-NEXT:    [[VRSUBHN_V3_I:%.*]] = bitcast <2 x i32> [[VRSUBHN_V2_I]] to <8 x i8>10898// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSUBHN_V3_I]] to <2 x i32>10899// CHECK-NEXT:    ret <2 x i32> [[TMP2]]10900//10901int32x2_t test_vrsubhn_s64(int64x2_t a, int64x2_t b) {10902  return vrsubhn_s64(a, b);10903}10904 10905// CHECK-LABEL: define dso_local <8 x i8> @test_vrsubhn_u16(10906// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10907// CHECK-NEXT:  [[ENTRY:.*:]]10908// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10909// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10910// CHECK-NEXT:    [[VRSUBHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10911// CHECK-NEXT:    [[VRSUBHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10912// CHECK-NEXT:    [[VRSUBHN_V2_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> [[VRSUBHN_V_I]], <8 x i16> [[VRSUBHN_V1_I]])10913// CHECK-NEXT:    ret <8 x i8> [[VRSUBHN_V2_I]]10914//10915uint8x8_t test_vrsubhn_u16(uint16x8_t a, uint16x8_t b) {10916  return vrsubhn_u16(a, b);10917}10918 10919// CHECK-LABEL: define dso_local <4 x i16> @test_vrsubhn_u32(10920// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10921// CHECK-NEXT:  [[ENTRY:.*:]]10922// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10923// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10924// CHECK-NEXT:    [[VRSUBHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10925// CHECK-NEXT:    [[VRSUBHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10926// CHECK-NEXT:    [[VRSUBHN_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32> [[VRSUBHN_V_I]], <4 x i32> [[VRSUBHN_V1_I]])10927// CHECK-NEXT:    [[VRSUBHN_V3_I:%.*]] = bitcast <4 x i16> [[VRSUBHN_V2_I]] to <8 x i8>10928// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSUBHN_V3_I]] to <4 x i16>10929// CHECK-NEXT:    ret <4 x i16> [[TMP2]]10930//10931uint16x4_t test_vrsubhn_u32(uint32x4_t a, uint32x4_t b) {10932  return vrsubhn_u32(a, b);10933}10934 10935// CHECK-LABEL: define dso_local <2 x i32> @test_vrsubhn_u64(10936// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10937// CHECK-NEXT:  [[ENTRY:.*:]]10938// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10939// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10940// CHECK-NEXT:    [[VRSUBHN_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10941// CHECK-NEXT:    [[VRSUBHN_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10942// CHECK-NEXT:    [[VRSUBHN_V2_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64> [[VRSUBHN_V_I]], <2 x i64> [[VRSUBHN_V1_I]])10943// CHECK-NEXT:    [[VRSUBHN_V3_I:%.*]] = bitcast <2 x i32> [[VRSUBHN_V2_I]] to <8 x i8>10944// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSUBHN_V3_I]] to <2 x i32>10945// CHECK-NEXT:    ret <2 x i32> [[TMP2]]10946//10947uint32x2_t test_vrsubhn_u64(uint64x2_t a, uint64x2_t b) {10948  return vrsubhn_u64(a, b);10949}10950 10951// CHECK-LABEL: define dso_local <16 x i8> @test_vrsubhn_high_s16(10952// CHECK-SAME: <8 x i8> noundef [[R:%.*]], <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {10953// CHECK-NEXT:  [[ENTRY:.*:]]10954// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>10955// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>10956// CHECK-NEXT:    [[VRSUBHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>10957// CHECK-NEXT:    [[VRSUBHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>10958// CHECK-NEXT:    [[VRSUBHN_V2_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> [[VRSUBHN_V_I_I]], <8 x i16> [[VRSUBHN_V1_I_I]])10959// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> [[R]], <8 x i8> [[VRSUBHN_V2_I_I]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10960// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I_I]]10961//10962int8x16_t test_vrsubhn_high_s16(int8x8_t r, int16x8_t a, int16x8_t b) {10963  return vrsubhn_high_s16(r, a, b);10964}10965 10966// CHECK-LABEL: define dso_local <8 x i16> @test_vrsubhn_high_s32(10967// CHECK-SAME: <4 x i16> noundef [[R:%.*]], <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {10968// CHECK-NEXT:  [[ENTRY:.*:]]10969// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>10970// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>10971// CHECK-NEXT:    [[VRSUBHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>10972// CHECK-NEXT:    [[VRSUBHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>10973// CHECK-NEXT:    [[VRSUBHN_V2_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32> [[VRSUBHN_V_I_I]], <4 x i32> [[VRSUBHN_V1_I_I]])10974// CHECK-NEXT:    [[VRSUBHN_V3_I_I:%.*]] = bitcast <4 x i16> [[VRSUBHN_V2_I_I]] to <8 x i8>10975// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSUBHN_V3_I_I]] to <4 x i16>10976// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> [[R]], <4 x i16> [[TMP2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10977// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I_I]]10978//10979int16x8_t test_vrsubhn_high_s32(int16x4_t r, int32x4_t a, int32x4_t b) {10980  return vrsubhn_high_s32(r, a, b);10981}10982 10983// CHECK-LABEL: define dso_local <4 x i32> @test_vrsubhn_high_s64(10984// CHECK-SAME: <2 x i32> noundef [[R:%.*]], <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {10985// CHECK-NEXT:  [[ENTRY:.*:]]10986// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>10987// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>10988// CHECK-NEXT:    [[VRSUBHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>10989// CHECK-NEXT:    [[VRSUBHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>10990// CHECK-NEXT:    [[VRSUBHN_V2_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64> [[VRSUBHN_V_I_I]], <2 x i64> [[VRSUBHN_V1_I_I]])10991// CHECK-NEXT:    [[VRSUBHN_V3_I_I:%.*]] = bitcast <2 x i32> [[VRSUBHN_V2_I_I]] to <8 x i8>10992// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSUBHN_V3_I_I]] to <2 x i32>10993// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i32> [[R]], <2 x i32> [[TMP2]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10994// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I_I]]10995//10996int32x4_t test_vrsubhn_high_s64(int32x2_t r, int64x2_t a, int64x2_t b) {10997  return vrsubhn_high_s64(r, a, b);10998}10999 11000// CHECK-LABEL: define dso_local <16 x i8> @test_vrsubhn_high_u16(11001// CHECK-SAME: <8 x i8> noundef [[R:%.*]], <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11002// CHECK-NEXT:  [[ENTRY:.*:]]11003// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>11004// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>11005// CHECK-NEXT:    [[VRSUBHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>11006// CHECK-NEXT:    [[VRSUBHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>11007// CHECK-NEXT:    [[VRSUBHN_V2_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> [[VRSUBHN_V_I_I]], <8 x i16> [[VRSUBHN_V1_I_I]])11008// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i8> [[R]], <8 x i8> [[VRSUBHN_V2_I_I]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11009// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I_I]]11010//11011uint8x16_t test_vrsubhn_high_u16(uint8x8_t r, uint16x8_t a, uint16x8_t b) {11012  return vrsubhn_high_u16(r, a, b);11013}11014 11015// CHECK-LABEL: define dso_local <8 x i16> @test_vrsubhn_high_u32(11016// CHECK-SAME: <4 x i16> noundef [[R:%.*]], <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11017// CHECK-NEXT:  [[ENTRY:.*:]]11018// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>11019// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>11020// CHECK-NEXT:    [[VRSUBHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>11021// CHECK-NEXT:    [[VRSUBHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>11022// CHECK-NEXT:    [[VRSUBHN_V2_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32> [[VRSUBHN_V_I_I]], <4 x i32> [[VRSUBHN_V1_I_I]])11023// CHECK-NEXT:    [[VRSUBHN_V3_I_I:%.*]] = bitcast <4 x i16> [[VRSUBHN_V2_I_I]] to <8 x i8>11024// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSUBHN_V3_I_I]] to <4 x i16>11025// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i16> [[R]], <4 x i16> [[TMP2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>11026// CHECK-NEXT:    ret <8 x i16> [[SHUFFLE_I_I]]11027//11028uint16x8_t test_vrsubhn_high_u32(uint16x4_t r, uint32x4_t a, uint32x4_t b) {11029  return vrsubhn_high_u32(r, a, b);11030}11031 11032// CHECK-LABEL: define dso_local <4 x i32> @test_vrsubhn_high_u64(11033// CHECK-SAME: <2 x i32> noundef [[R:%.*]], <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {11034// CHECK-NEXT:  [[ENTRY:.*:]]11035// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>11036// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>11037// CHECK-NEXT:    [[VRSUBHN_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>11038// CHECK-NEXT:    [[VRSUBHN_V1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>11039// CHECK-NEXT:    [[VRSUBHN_V2_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64> [[VRSUBHN_V_I_I]], <2 x i64> [[VRSUBHN_V1_I_I]])11040// CHECK-NEXT:    [[VRSUBHN_V3_I_I:%.*]] = bitcast <2 x i32> [[VRSUBHN_V2_I_I]] to <8 x i8>11041// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[VRSUBHN_V3_I_I]] to <2 x i32>11042// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i32> [[R]], <2 x i32> [[TMP2]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>11043// CHECK-NEXT:    ret <4 x i32> [[SHUFFLE_I_I]]11044//11045uint32x4_t test_vrsubhn_high_u64(uint32x2_t r, uint64x2_t a, uint64x2_t b) {11046  return vrsubhn_high_u64(r, a, b);11047}11048 11049// CHECK-LABEL: define dso_local <8 x i16> @test_vabdl_s8(11050// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {11051// CHECK-NEXT:  [[ENTRY:.*:]]11052// CHECK-NEXT:    [[VABD_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])11053// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <8 x i8> [[VABD_I_I]] to <8 x i16>11054// CHECK-NEXT:    ret <8 x i16> [[VMOVL_I_I]]11055//11056int16x8_t test_vabdl_s8(int8x8_t a, int8x8_t b) {11057  return vabdl_s8(a, b);11058}11059 11060// CHECK-LABEL: define dso_local <4 x i32> @test_vabdl_s16(11061// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11062// CHECK-NEXT:  [[ENTRY:.*:]]11063// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>11064// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11065// CHECK-NEXT:    [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11066// CHECK-NEXT:    [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11067// CHECK-NEXT:    [[VABD2_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I_I]], <4 x i16> [[VABD1_I_I]])11068// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I]] to <8 x i8>11069// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>11070// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>11071// CHECK-NEXT:    ret <4 x i32> [[VMOVL_I_I]]11072//11073int32x4_t test_vabdl_s16(int16x4_t a, int16x4_t b) {11074  return vabdl_s16(a, b);11075}11076 11077// CHECK-LABEL: define dso_local <2 x i64> @test_vabdl_s32(11078// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11079// CHECK-NEXT:  [[ENTRY:.*:]]11080// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>11081// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11082// CHECK-NEXT:    [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11083// CHECK-NEXT:    [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11084// CHECK-NEXT:    [[VABD2_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I_I]], <2 x i32> [[VABD1_I_I]])11085// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I]] to <8 x i8>11086// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>11087// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>11088// CHECK-NEXT:    ret <2 x i64> [[VMOVL_I_I]]11089//11090int64x2_t test_vabdl_s32(int32x2_t a, int32x2_t b) {11091  return vabdl_s32(a, b);11092}11093 11094// CHECK-LABEL: define dso_local <8 x i16> @test_vabdl_u8(11095// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {11096// CHECK-NEXT:  [[ENTRY:.*:]]11097// CHECK-NEXT:    [[VABD_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> [[A]], <8 x i8> [[B]])11098// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <8 x i8> [[VABD_I_I]] to <8 x i16>11099// CHECK-NEXT:    ret <8 x i16> [[VMOVL_I_I]]11100//11101uint16x8_t test_vabdl_u8(uint8x8_t a, uint8x8_t b) {11102  return vabdl_u8(a, b);11103}11104 11105// CHECK-LABEL: define dso_local <4 x i32> @test_vabdl_u16(11106// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11107// CHECK-NEXT:  [[ENTRY:.*:]]11108// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>11109// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11110// CHECK-NEXT:    [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11111// CHECK-NEXT:    [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11112// CHECK-NEXT:    [[VABD2_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I_I]], <4 x i16> [[VABD1_I_I]])11113// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I]] to <8 x i8>11114// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>11115// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>11116// CHECK-NEXT:    ret <4 x i32> [[VMOVL_I_I]]11117//11118uint32x4_t test_vabdl_u16(uint16x4_t a, uint16x4_t b) {11119  return vabdl_u16(a, b);11120}11121 11122// CHECK-LABEL: define dso_local <2 x i64> @test_vabdl_u32(11123// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11124// CHECK-NEXT:  [[ENTRY:.*:]]11125// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>11126// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11127// CHECK-NEXT:    [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11128// CHECK-NEXT:    [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11129// CHECK-NEXT:    [[VABD2_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I_I]], <2 x i32> [[VABD1_I_I]])11130// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I]] to <8 x i8>11131// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>11132// CHECK-NEXT:    [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>11133// CHECK-NEXT:    ret <2 x i64> [[VMOVL_I_I]]11134//11135uint64x2_t test_vabdl_u32(uint32x2_t a, uint32x2_t b) {11136  return vabdl_u32(a, b);11137}11138 11139// CHECK-LABEL: define dso_local <8 x i16> @test_vabal_s8(11140// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11141// CHECK-NEXT:  [[ENTRY:.*:]]11142// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> [[B]], <8 x i8> [[C]])11143// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <8 x i8> [[VABD_I_I_I]] to <8 x i16>11144// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[A]], [[VMOVL_I_I_I]]11145// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]11146//11147int16x8_t test_vabal_s8(int16x8_t a, int8x8_t b, int8x8_t c) {11148  return vabal_s8(a, b, c);11149}11150 11151// CHECK-LABEL: define dso_local <4 x i32> @test_vabal_s16(11152// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11153// CHECK-NEXT:  [[ENTRY:.*:]]11154// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11155// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[C]] to <8 x i8>11156// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11157// CHECK-NEXT:    [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11158// CHECK-NEXT:    [[VABD2_I_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I_I_I]], <4 x i16> [[VABD1_I_I_I]])11159// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I_I]] to <8 x i8>11160// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>11161// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>11162// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[A]], [[VMOVL_I_I_I]]11163// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]11164//11165int32x4_t test_vabal_s16(int32x4_t a, int16x4_t b, int16x4_t c) {11166  return vabal_s16(a, b, c);11167}11168 11169// CHECK-LABEL: define dso_local <2 x i64> @test_vabal_s32(11170// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11171// CHECK-NEXT:  [[ENTRY:.*:]]11172// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11173// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[C]] to <8 x i8>11174// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11175// CHECK-NEXT:    [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11176// CHECK-NEXT:    [[VABD2_I_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I_I_I]], <2 x i32> [[VABD1_I_I_I]])11177// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I_I]] to <8 x i8>11178// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>11179// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>11180// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[A]], [[VMOVL_I_I_I]]11181// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]11182//11183int64x2_t test_vabal_s32(int64x2_t a, int32x2_t b, int32x2_t c) {11184  return vabal_s32(a, b, c);11185}11186 11187// CHECK-LABEL: define dso_local <8 x i16> @test_vabal_u8(11188// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11189// CHECK-NEXT:  [[ENTRY:.*:]]11190// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> [[B]], <8 x i8> [[C]])11191// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <8 x i8> [[VABD_I_I_I]] to <8 x i16>11192// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[A]], [[VMOVL_I_I_I]]11193// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]11194//11195uint16x8_t test_vabal_u8(uint16x8_t a, uint8x8_t b, uint8x8_t c) {11196  return vabal_u8(a, b, c);11197}11198 11199// CHECK-LABEL: define dso_local <4 x i32> @test_vabal_u16(11200// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11201// CHECK-NEXT:  [[ENTRY:.*:]]11202// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11203// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[C]] to <8 x i8>11204// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11205// CHECK-NEXT:    [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11206// CHECK-NEXT:    [[VABD2_I_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I_I_I]], <4 x i16> [[VABD1_I_I_I]])11207// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I_I]] to <8 x i8>11208// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>11209// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>11210// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[A]], [[VMOVL_I_I_I]]11211// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]11212//11213uint32x4_t test_vabal_u16(uint32x4_t a, uint16x4_t b, uint16x4_t c) {11214  return vabal_u16(a, b, c);11215}11216 11217// CHECK-LABEL: define dso_local <2 x i64> @test_vabal_u32(11218// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11219// CHECK-NEXT:  [[ENTRY:.*:]]11220// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11221// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[C]] to <8 x i8>11222// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11223// CHECK-NEXT:    [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11224// CHECK-NEXT:    [[VABD2_I_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I_I_I]], <2 x i32> [[VABD1_I_I_I]])11225// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I_I]] to <8 x i8>11226// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>11227// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>11228// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[A]], [[VMOVL_I_I_I]]11229// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]11230//11231uint64x2_t test_vabal_u32(uint64x2_t a, uint32x2_t b, uint32x2_t c) {11232  return vabal_u32(a, b, c);11233}11234 11235// CHECK-LABEL: define dso_local <8 x i16> @test_vabdl_high_s8(11236// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {11237// CHECK-NEXT:  [[ENTRY:.*:]]11238// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11239// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11240// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11241// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <8 x i8> [[VABD_I_I_I]] to <8 x i16>11242// CHECK-NEXT:    ret <8 x i16> [[VMOVL_I_I_I]]11243//11244int16x8_t test_vabdl_high_s8(int8x16_t a, int8x16_t b) {11245  return vabdl_high_s8(a, b);11246}11247 11248// CHECK-LABEL: define dso_local <4 x i32> @test_vabdl_high_s16(11249// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11250// CHECK-NEXT:  [[ENTRY:.*:]]11251// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11252// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11253// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11254// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11255// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11256// CHECK-NEXT:    [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11257// CHECK-NEXT:    [[VABD2_I_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I_I_I]], <4 x i16> [[VABD1_I_I_I]])11258// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I_I]] to <8 x i8>11259// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>11260// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>11261// CHECK-NEXT:    ret <4 x i32> [[VMOVL_I_I_I]]11262//11263int32x4_t test_vabdl_high_s16(int16x8_t a, int16x8_t b) {11264  return vabdl_high_s16(a, b);11265}11266 11267// CHECK-LABEL: define dso_local <2 x i64> @test_vabdl_high_s32(11268// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11269// CHECK-NEXT:  [[ENTRY:.*:]]11270// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>11271// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11272// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11273// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11274// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11275// CHECK-NEXT:    [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11276// CHECK-NEXT:    [[VABD2_I_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I_I_I]], <2 x i32> [[VABD1_I_I_I]])11277// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I_I]] to <8 x i8>11278// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>11279// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>11280// CHECK-NEXT:    ret <2 x i64> [[VMOVL_I_I_I]]11281//11282int64x2_t test_vabdl_high_s32(int32x4_t a, int32x4_t b) {11283  return vabdl_high_s32(a, b);11284}11285 11286// CHECK-LABEL: define dso_local <8 x i16> @test_vabdl_high_u8(11287// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {11288// CHECK-NEXT:  [[ENTRY:.*:]]11289// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11290// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11291// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11292// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <8 x i8> [[VABD_I_I_I]] to <8 x i16>11293// CHECK-NEXT:    ret <8 x i16> [[VMOVL_I_I_I]]11294//11295uint16x8_t test_vabdl_high_u8(uint8x16_t a, uint8x16_t b) {11296  return vabdl_high_u8(a, b);11297}11298 11299// CHECK-LABEL: define dso_local <4 x i32> @test_vabdl_high_u16(11300// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11301// CHECK-NEXT:  [[ENTRY:.*:]]11302// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11303// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11304// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11305// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11306// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11307// CHECK-NEXT:    [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11308// CHECK-NEXT:    [[VABD2_I_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I_I_I]], <4 x i16> [[VABD1_I_I_I]])11309// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I_I]] to <8 x i8>11310// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>11311// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>11312// CHECK-NEXT:    ret <4 x i32> [[VMOVL_I_I_I]]11313//11314uint32x4_t test_vabdl_high_u16(uint16x8_t a, uint16x8_t b) {11315  return vabdl_high_u16(a, b);11316}11317 11318// CHECK-LABEL: define dso_local <2 x i64> @test_vabdl_high_u32(11319// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11320// CHECK-NEXT:  [[ENTRY:.*:]]11321// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>11322// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11323// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11324// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11325// CHECK-NEXT:    [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11326// CHECK-NEXT:    [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11327// CHECK-NEXT:    [[VABD2_I_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I_I_I]], <2 x i32> [[VABD1_I_I_I]])11328// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I_I]] to <8 x i8>11329// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>11330// CHECK-NEXT:    [[VMOVL_I_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>11331// CHECK-NEXT:    ret <2 x i64> [[VMOVL_I_I_I]]11332//11333uint64x2_t test_vabdl_high_u32(uint32x4_t a, uint32x4_t b) {11334  return vabdl_high_u32(a, b);11335}11336 11337// CHECK-LABEL: define dso_local <8 x i16> @test_vabal_high_s8(11338// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11339// CHECK-NEXT:  [[ENTRY:.*:]]11340// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11341// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[C]], <16 x i8> [[C]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11342// CHECK-NEXT:    [[VABD_I_I_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11343// CHECK-NEXT:    [[VMOVL_I_I_I_I:%.*]] = zext <8 x i8> [[VABD_I_I_I_I]] to <8 x i16>11344// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <8 x i16> [[A]], [[VMOVL_I_I_I_I]]11345// CHECK-NEXT:    ret <8 x i16> [[ADD_I_I]]11346//11347int16x8_t test_vabal_high_s8(int16x8_t a, int8x16_t b, int8x16_t c) {11348  return vabal_high_s8(a, b, c);11349}11350 11351// CHECK-LABEL: define dso_local <4 x i32> @test_vabal_high_s16(11352// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11353// CHECK-NEXT:  [[ENTRY:.*:]]11354// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11355// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[C]], <8 x i16> [[C]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11356// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11357// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11358// CHECK-NEXT:    [[VABD_I_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11359// CHECK-NEXT:    [[VABD1_I_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11360// CHECK-NEXT:    [[VABD2_I_I_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I_I_I_I]], <4 x i16> [[VABD1_I_I_I_I]])11361// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I_I_I]] to <8 x i8>11362// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>11363// CHECK-NEXT:    [[VMOVL_I_I_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>11364// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <4 x i32> [[A]], [[VMOVL_I_I_I_I]]11365// CHECK-NEXT:    ret <4 x i32> [[ADD_I_I]]11366//11367int32x4_t test_vabal_high_s16(int32x4_t a, int16x8_t b, int16x8_t c) {11368  return vabal_high_s16(a, b, c);11369}11370 11371// CHECK-LABEL: define dso_local <2 x i64> @test_vabal_high_s32(11372// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11373// CHECK-NEXT:  [[ENTRY:.*:]]11374// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11375// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[C]], <4 x i32> [[C]], <2 x i32> <i32 2, i32 3>11376// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11377// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11378// CHECK-NEXT:    [[VABD_I_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11379// CHECK-NEXT:    [[VABD1_I_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11380// CHECK-NEXT:    [[VABD2_I_I_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I_I_I_I]], <2 x i32> [[VABD1_I_I_I_I]])11381// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I_I_I]] to <8 x i8>11382// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>11383// CHECK-NEXT:    [[VMOVL_I_I_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>11384// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <2 x i64> [[A]], [[VMOVL_I_I_I_I]]11385// CHECK-NEXT:    ret <2 x i64> [[ADD_I_I]]11386//11387int64x2_t test_vabal_high_s32(int64x2_t a, int32x4_t b, int32x4_t c) {11388  return vabal_high_s32(a, b, c);11389}11390 11391// CHECK-LABEL: define dso_local <8 x i16> @test_vabal_high_u8(11392// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11393// CHECK-NEXT:  [[ENTRY:.*:]]11394// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11395// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[C]], <16 x i8> [[C]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11396// CHECK-NEXT:    [[VABD_I_I_I_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11397// CHECK-NEXT:    [[VMOVL_I_I_I_I:%.*]] = zext <8 x i8> [[VABD_I_I_I_I]] to <8 x i16>11398// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <8 x i16> [[A]], [[VMOVL_I_I_I_I]]11399// CHECK-NEXT:    ret <8 x i16> [[ADD_I_I]]11400//11401uint16x8_t test_vabal_high_u8(uint16x8_t a, uint8x16_t b, uint8x16_t c) {11402  return vabal_high_u8(a, b, c);11403}11404 11405// CHECK-LABEL: define dso_local <4 x i32> @test_vabal_high_u16(11406// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11407// CHECK-NEXT:  [[ENTRY:.*:]]11408// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11409// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[C]], <8 x i16> [[C]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11410// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11411// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11412// CHECK-NEXT:    [[VABD_I_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11413// CHECK-NEXT:    [[VABD1_I_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11414// CHECK-NEXT:    [[VABD2_I_I_I_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I_I_I_I]], <4 x i16> [[VABD1_I_I_I_I]])11415// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I_I_I]] to <8 x i8>11416// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>11417// CHECK-NEXT:    [[VMOVL_I_I_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>11418// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <4 x i32> [[A]], [[VMOVL_I_I_I_I]]11419// CHECK-NEXT:    ret <4 x i32> [[ADD_I_I]]11420//11421uint32x4_t test_vabal_high_u16(uint32x4_t a, uint16x8_t b, uint16x8_t c) {11422  return vabal_high_u16(a, b, c);11423}11424 11425// CHECK-LABEL: define dso_local <2 x i64> @test_vabal_high_u32(11426// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11427// CHECK-NEXT:  [[ENTRY:.*:]]11428// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11429// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[C]], <4 x i32> [[C]], <2 x i32> <i32 2, i32 3>11430// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11431// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11432// CHECK-NEXT:    [[VABD_I_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11433// CHECK-NEXT:    [[VABD1_I_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11434// CHECK-NEXT:    [[VABD2_I_I_I_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I_I_I_I]], <2 x i32> [[VABD1_I_I_I_I]])11435// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I_I_I]] to <8 x i8>11436// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>11437// CHECK-NEXT:    [[VMOVL_I_I_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>11438// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <2 x i64> [[A]], [[VMOVL_I_I_I_I]]11439// CHECK-NEXT:    ret <2 x i64> [[ADD_I_I]]11440//11441uint64x2_t test_vabal_high_u32(uint64x2_t a, uint32x4_t b, uint32x4_t c) {11442  return vabal_high_u32(a, b, c);11443}11444 11445// CHECK-LABEL: define dso_local <8 x i16> @test_vmull_s8(11446// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {11447// CHECK-NEXT:  [[ENTRY:.*:]]11448// CHECK-NEXT:    [[VMULL_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> [[A]], <8 x i8> [[B]])11449// CHECK-NEXT:    ret <8 x i16> [[VMULL_I]]11450//11451int16x8_t test_vmull_s8(int8x8_t a, int8x8_t b) {11452  return vmull_s8(a, b);11453}11454 11455// CHECK-LABEL: define dso_local <4 x i32> @test_vmull_s16(11456// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11457// CHECK-NEXT:  [[ENTRY:.*:]]11458// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>11459// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11460// CHECK-NEXT:    [[VMULL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11461// CHECK-NEXT:    [[VMULL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11462// CHECK-NEXT:    [[VMULL2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16> [[VMULL_I]], <4 x i16> [[VMULL1_I]])11463// CHECK-NEXT:    ret <4 x i32> [[VMULL2_I]]11464//11465int32x4_t test_vmull_s16(int16x4_t a, int16x4_t b) {11466  return vmull_s16(a, b);11467}11468 11469// CHECK-LABEL: define dso_local <2 x i64> @test_vmull_s32(11470// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11471// CHECK-NEXT:  [[ENTRY:.*:]]11472// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>11473// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11474// CHECK-NEXT:    [[VMULL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11475// CHECK-NEXT:    [[VMULL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11476// CHECK-NEXT:    [[VMULL2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.smull.v2i64(<2 x i32> [[VMULL_I]], <2 x i32> [[VMULL1_I]])11477// CHECK-NEXT:    ret <2 x i64> [[VMULL2_I]]11478//11479int64x2_t test_vmull_s32(int32x2_t a, int32x2_t b) {11480  return vmull_s32(a, b);11481}11482 11483// CHECK-LABEL: define dso_local <8 x i16> @test_vmull_u8(11484// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {11485// CHECK-NEXT:  [[ENTRY:.*:]]11486// CHECK-NEXT:    [[VMULL_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> [[A]], <8 x i8> [[B]])11487// CHECK-NEXT:    ret <8 x i16> [[VMULL_I]]11488//11489uint16x8_t test_vmull_u8(uint8x8_t a, uint8x8_t b) {11490  return vmull_u8(a, b);11491}11492 11493// CHECK-LABEL: define dso_local <4 x i32> @test_vmull_u16(11494// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11495// CHECK-NEXT:  [[ENTRY:.*:]]11496// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>11497// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11498// CHECK-NEXT:    [[VMULL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11499// CHECK-NEXT:    [[VMULL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11500// CHECK-NEXT:    [[VMULL2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> [[VMULL_I]], <4 x i16> [[VMULL1_I]])11501// CHECK-NEXT:    ret <4 x i32> [[VMULL2_I]]11502//11503uint32x4_t test_vmull_u16(uint16x4_t a, uint16x4_t b) {11504  return vmull_u16(a, b);11505}11506 11507// CHECK-LABEL: define dso_local <2 x i64> @test_vmull_u32(11508// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11509// CHECK-NEXT:  [[ENTRY:.*:]]11510// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>11511// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11512// CHECK-NEXT:    [[VMULL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11513// CHECK-NEXT:    [[VMULL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11514// CHECK-NEXT:    [[VMULL2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> [[VMULL_I]], <2 x i32> [[VMULL1_I]])11515// CHECK-NEXT:    ret <2 x i64> [[VMULL2_I]]11516//11517uint64x2_t test_vmull_u32(uint32x2_t a, uint32x2_t b) {11518  return vmull_u32(a, b);11519}11520 11521// CHECK-LABEL: define dso_local <8 x i16> @test_vmull_high_s8(11522// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {11523// CHECK-NEXT:  [[ENTRY:.*:]]11524// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11525// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11526// CHECK-NEXT:    [[VMULL_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11527// CHECK-NEXT:    ret <8 x i16> [[VMULL_I_I]]11528//11529int16x8_t test_vmull_high_s8(int8x16_t a, int8x16_t b) {11530  return vmull_high_s8(a, b);11531}11532 11533// CHECK-LABEL: define dso_local <4 x i32> @test_vmull_high_s16(11534// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11535// CHECK-NEXT:  [[ENTRY:.*:]]11536// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11537// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11538// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11539// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11540// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11541// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11542// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16> [[VMULL_I_I]], <4 x i16> [[VMULL1_I_I]])11543// CHECK-NEXT:    ret <4 x i32> [[VMULL2_I_I]]11544//11545int32x4_t test_vmull_high_s16(int16x8_t a, int16x8_t b) {11546  return vmull_high_s16(a, b);11547}11548 11549// CHECK-LABEL: define dso_local <2 x i64> @test_vmull_high_s32(11550// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11551// CHECK-NEXT:  [[ENTRY:.*:]]11552// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>11553// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11554// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11555// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11556// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11557// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11558// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.smull.v2i64(<2 x i32> [[VMULL_I_I]], <2 x i32> [[VMULL1_I_I]])11559// CHECK-NEXT:    ret <2 x i64> [[VMULL2_I_I]]11560//11561int64x2_t test_vmull_high_s32(int32x4_t a, int32x4_t b) {11562  return vmull_high_s32(a, b);11563}11564 11565// CHECK-LABEL: define dso_local <8 x i16> @test_vmull_high_u8(11566// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {11567// CHECK-NEXT:  [[ENTRY:.*:]]11568// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11569// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11570// CHECK-NEXT:    [[VMULL_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11571// CHECK-NEXT:    ret <8 x i16> [[VMULL_I_I]]11572//11573uint16x8_t test_vmull_high_u8(uint8x16_t a, uint8x16_t b) {11574  return vmull_high_u8(a, b);11575}11576 11577// CHECK-LABEL: define dso_local <4 x i32> @test_vmull_high_u16(11578// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11579// CHECK-NEXT:  [[ENTRY:.*:]]11580// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11581// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11582// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11583// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11584// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11585// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11586// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> [[VMULL_I_I]], <4 x i16> [[VMULL1_I_I]])11587// CHECK-NEXT:    ret <4 x i32> [[VMULL2_I_I]]11588//11589uint32x4_t test_vmull_high_u16(uint16x8_t a, uint16x8_t b) {11590  return vmull_high_u16(a, b);11591}11592 11593// CHECK-LABEL: define dso_local <2 x i64> @test_vmull_high_u32(11594// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11595// CHECK-NEXT:  [[ENTRY:.*:]]11596// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>11597// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11598// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11599// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11600// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11601// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11602// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> [[VMULL_I_I]], <2 x i32> [[VMULL1_I_I]])11603// CHECK-NEXT:    ret <2 x i64> [[VMULL2_I_I]]11604//11605uint64x2_t test_vmull_high_u32(uint32x4_t a, uint32x4_t b) {11606  return vmull_high_u32(a, b);11607}11608 11609// CHECK-LABEL: define dso_local <8 x i16> @test_vmlal_s8(11610// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11611// CHECK-NEXT:  [[ENTRY:.*:]]11612// CHECK-NEXT:    [[VMULL_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> [[B]], <8 x i8> [[C]])11613// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[A]], [[VMULL_I_I]]11614// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]11615//11616int16x8_t test_vmlal_s8(int16x8_t a, int8x8_t b, int8x8_t c) {11617  return vmlal_s8(a, b, c);11618}11619 11620// CHECK-LABEL: define dso_local <4 x i32> @test_vmlal_s16(11621// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11622// CHECK-NEXT:  [[ENTRY:.*:]]11623// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11624// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[C]] to <8 x i8>11625// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11626// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11627// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16> [[VMULL_I_I]], <4 x i16> [[VMULL1_I_I]])11628// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[A]], [[VMULL2_I_I]]11629// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]11630//11631int32x4_t test_vmlal_s16(int32x4_t a, int16x4_t b, int16x4_t c) {11632  return vmlal_s16(a, b, c);11633}11634 11635// CHECK-LABEL: define dso_local <2 x i64> @test_vmlal_s32(11636// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11637// CHECK-NEXT:  [[ENTRY:.*:]]11638// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11639// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[C]] to <8 x i8>11640// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11641// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11642// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.smull.v2i64(<2 x i32> [[VMULL_I_I]], <2 x i32> [[VMULL1_I_I]])11643// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[A]], [[VMULL2_I_I]]11644// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]11645//11646int64x2_t test_vmlal_s32(int64x2_t a, int32x2_t b, int32x2_t c) {11647  return vmlal_s32(a, b, c);11648}11649 11650// CHECK-LABEL: define dso_local <8 x i16> @test_vmlal_u8(11651// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11652// CHECK-NEXT:  [[ENTRY:.*:]]11653// CHECK-NEXT:    [[VMULL_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> [[B]], <8 x i8> [[C]])11654// CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[A]], [[VMULL_I_I]]11655// CHECK-NEXT:    ret <8 x i16> [[ADD_I]]11656//11657uint16x8_t test_vmlal_u8(uint16x8_t a, uint8x8_t b, uint8x8_t c) {11658  return vmlal_u8(a, b, c);11659}11660 11661// CHECK-LABEL: define dso_local <4 x i32> @test_vmlal_u16(11662// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11663// CHECK-NEXT:  [[ENTRY:.*:]]11664// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11665// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[C]] to <8 x i8>11666// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11667// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11668// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> [[VMULL_I_I]], <4 x i16> [[VMULL1_I_I]])11669// CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[A]], [[VMULL2_I_I]]11670// CHECK-NEXT:    ret <4 x i32> [[ADD_I]]11671//11672uint32x4_t test_vmlal_u16(uint32x4_t a, uint16x4_t b, uint16x4_t c) {11673  return vmlal_u16(a, b, c);11674}11675 11676// CHECK-LABEL: define dso_local <2 x i64> @test_vmlal_u32(11677// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11678// CHECK-NEXT:  [[ENTRY:.*:]]11679// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11680// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[C]] to <8 x i8>11681// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11682// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11683// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> [[VMULL_I_I]], <2 x i32> [[VMULL1_I_I]])11684// CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[A]], [[VMULL2_I_I]]11685// CHECK-NEXT:    ret <2 x i64> [[ADD_I]]11686//11687uint64x2_t test_vmlal_u32(uint64x2_t a, uint32x2_t b, uint32x2_t c) {11688  return vmlal_u32(a, b, c);11689}11690 11691// CHECK-LABEL: define dso_local <8 x i16> @test_vmlal_high_s8(11692// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11693// CHECK-NEXT:  [[ENTRY:.*:]]11694// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11695// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[C]], <16 x i8> [[C]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11696// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11697// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <8 x i16> [[A]], [[VMULL_I_I_I]]11698// CHECK-NEXT:    ret <8 x i16> [[ADD_I_I]]11699//11700int16x8_t test_vmlal_high_s8(int16x8_t a, int8x16_t b, int8x16_t c) {11701  return vmlal_high_s8(a, b, c);11702}11703 11704// CHECK-LABEL: define dso_local <4 x i32> @test_vmlal_high_s16(11705// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11706// CHECK-NEXT:  [[ENTRY:.*:]]11707// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11708// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[C]], <8 x i16> [[C]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11709// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11710// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11711// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11712// CHECK-NEXT:    [[VMULL1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11713// CHECK-NEXT:    [[VMULL2_I_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16> [[VMULL_I_I_I]], <4 x i16> [[VMULL1_I_I_I]])11714// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <4 x i32> [[A]], [[VMULL2_I_I_I]]11715// CHECK-NEXT:    ret <4 x i32> [[ADD_I_I]]11716//11717int32x4_t test_vmlal_high_s16(int32x4_t a, int16x8_t b, int16x8_t c) {11718  return vmlal_high_s16(a, b, c);11719}11720 11721// CHECK-LABEL: define dso_local <2 x i64> @test_vmlal_high_s32(11722// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11723// CHECK-NEXT:  [[ENTRY:.*:]]11724// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11725// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[C]], <4 x i32> [[C]], <2 x i32> <i32 2, i32 3>11726// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11727// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11728// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11729// CHECK-NEXT:    [[VMULL1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11730// CHECK-NEXT:    [[VMULL2_I_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.smull.v2i64(<2 x i32> [[VMULL_I_I_I]], <2 x i32> [[VMULL1_I_I_I]])11731// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <2 x i64> [[A]], [[VMULL2_I_I_I]]11732// CHECK-NEXT:    ret <2 x i64> [[ADD_I_I]]11733//11734int64x2_t test_vmlal_high_s32(int64x2_t a, int32x4_t b, int32x4_t c) {11735  return vmlal_high_s32(a, b, c);11736}11737 11738// CHECK-LABEL: define dso_local <8 x i16> @test_vmlal_high_u8(11739// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11740// CHECK-NEXT:  [[ENTRY:.*:]]11741// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11742// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[C]], <16 x i8> [[C]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11743// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11744// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <8 x i16> [[A]], [[VMULL_I_I_I]]11745// CHECK-NEXT:    ret <8 x i16> [[ADD_I_I]]11746//11747uint16x8_t test_vmlal_high_u8(uint16x8_t a, uint8x16_t b, uint8x16_t c) {11748  return vmlal_high_u8(a, b, c);11749}11750 11751// CHECK-LABEL: define dso_local <4 x i32> @test_vmlal_high_u16(11752// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11753// CHECK-NEXT:  [[ENTRY:.*:]]11754// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11755// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[C]], <8 x i16> [[C]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11756// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11757// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11758// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11759// CHECK-NEXT:    [[VMULL1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11760// CHECK-NEXT:    [[VMULL2_I_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> [[VMULL_I_I_I]], <4 x i16> [[VMULL1_I_I_I]])11761// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <4 x i32> [[A]], [[VMULL2_I_I_I]]11762// CHECK-NEXT:    ret <4 x i32> [[ADD_I_I]]11763//11764uint32x4_t test_vmlal_high_u16(uint32x4_t a, uint16x8_t b, uint16x8_t c) {11765  return vmlal_high_u16(a, b, c);11766}11767 11768// CHECK-LABEL: define dso_local <2 x i64> @test_vmlal_high_u32(11769// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11770// CHECK-NEXT:  [[ENTRY:.*:]]11771// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11772// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[C]], <4 x i32> [[C]], <2 x i32> <i32 2, i32 3>11773// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11774// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11775// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11776// CHECK-NEXT:    [[VMULL1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11777// CHECK-NEXT:    [[VMULL2_I_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> [[VMULL_I_I_I]], <2 x i32> [[VMULL1_I_I_I]])11778// CHECK-NEXT:    [[ADD_I_I:%.*]] = add <2 x i64> [[A]], [[VMULL2_I_I_I]]11779// CHECK-NEXT:    ret <2 x i64> [[ADD_I_I]]11780//11781uint64x2_t test_vmlal_high_u32(uint64x2_t a, uint32x4_t b, uint32x4_t c) {11782  return vmlal_high_u32(a, b, c);11783}11784 11785// CHECK-LABEL: define dso_local <8 x i16> @test_vmlsl_s8(11786// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11787// CHECK-NEXT:  [[ENTRY:.*:]]11788// CHECK-NEXT:    [[VMULL_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> [[B]], <8 x i8> [[C]])11789// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[A]], [[VMULL_I_I]]11790// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]11791//11792int16x8_t test_vmlsl_s8(int16x8_t a, int8x8_t b, int8x8_t c) {11793  return vmlsl_s8(a, b, c);11794}11795 11796// CHECK-LABEL: define dso_local <4 x i32> @test_vmlsl_s16(11797// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11798// CHECK-NEXT:  [[ENTRY:.*:]]11799// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11800// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[C]] to <8 x i8>11801// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11802// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11803// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16> [[VMULL_I_I]], <4 x i16> [[VMULL1_I_I]])11804// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[A]], [[VMULL2_I_I]]11805// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]11806//11807int32x4_t test_vmlsl_s16(int32x4_t a, int16x4_t b, int16x4_t c) {11808  return vmlsl_s16(a, b, c);11809}11810 11811// CHECK-LABEL: define dso_local <2 x i64> @test_vmlsl_s32(11812// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11813// CHECK-NEXT:  [[ENTRY:.*:]]11814// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11815// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[C]] to <8 x i8>11816// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11817// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11818// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.smull.v2i64(<2 x i32> [[VMULL_I_I]], <2 x i32> [[VMULL1_I_I]])11819// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[A]], [[VMULL2_I_I]]11820// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]11821//11822int64x2_t test_vmlsl_s32(int64x2_t a, int32x2_t b, int32x2_t c) {11823  return vmlsl_s32(a, b, c);11824}11825 11826// CHECK-LABEL: define dso_local <8 x i16> @test_vmlsl_u8(11827// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11828// CHECK-NEXT:  [[ENTRY:.*:]]11829// CHECK-NEXT:    [[VMULL_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> [[B]], <8 x i8> [[C]])11830// CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[A]], [[VMULL_I_I]]11831// CHECK-NEXT:    ret <8 x i16> [[SUB_I]]11832//11833uint16x8_t test_vmlsl_u8(uint16x8_t a, uint8x8_t b, uint8x8_t c) {11834  return vmlsl_u8(a, b, c);11835}11836 11837// CHECK-LABEL: define dso_local <4 x i32> @test_vmlsl_u16(11838// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11839// CHECK-NEXT:  [[ENTRY:.*:]]11840// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11841// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[C]] to <8 x i8>11842// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11843// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11844// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> [[VMULL_I_I]], <4 x i16> [[VMULL1_I_I]])11845// CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[A]], [[VMULL2_I_I]]11846// CHECK-NEXT:    ret <4 x i32> [[SUB_I]]11847//11848uint32x4_t test_vmlsl_u16(uint32x4_t a, uint16x4_t b, uint16x4_t c) {11849  return vmlsl_u16(a, b, c);11850}11851 11852// CHECK-LABEL: define dso_local <2 x i64> @test_vmlsl_u32(11853// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11854// CHECK-NEXT:  [[ENTRY:.*:]]11855// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11856// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[C]] to <8 x i8>11857// CHECK-NEXT:    [[VMULL_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11858// CHECK-NEXT:    [[VMULL1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11859// CHECK-NEXT:    [[VMULL2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> [[VMULL_I_I]], <2 x i32> [[VMULL1_I_I]])11860// CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[A]], [[VMULL2_I_I]]11861// CHECK-NEXT:    ret <2 x i64> [[SUB_I]]11862//11863uint64x2_t test_vmlsl_u32(uint64x2_t a, uint32x2_t b, uint32x2_t c) {11864  return vmlsl_u32(a, b, c);11865}11866 11867// CHECK-LABEL: define dso_local <8 x i16> @test_vmlsl_high_s8(11868// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11869// CHECK-NEXT:  [[ENTRY:.*:]]11870// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11871// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[C]], <16 x i8> [[C]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11872// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11873// CHECK-NEXT:    [[SUB_I_I:%.*]] = sub <8 x i16> [[A]], [[VMULL_I_I_I]]11874// CHECK-NEXT:    ret <8 x i16> [[SUB_I_I]]11875//11876int16x8_t test_vmlsl_high_s8(int16x8_t a, int8x16_t b, int8x16_t c) {11877  return vmlsl_high_s8(a, b, c);11878}11879 11880// CHECK-LABEL: define dso_local <4 x i32> @test_vmlsl_high_s16(11881// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11882// CHECK-NEXT:  [[ENTRY:.*:]]11883// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11884// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[C]], <8 x i16> [[C]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11885// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11886// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11887// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11888// CHECK-NEXT:    [[VMULL1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11889// CHECK-NEXT:    [[VMULL2_I_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16> [[VMULL_I_I_I]], <4 x i16> [[VMULL1_I_I_I]])11890// CHECK-NEXT:    [[SUB_I_I:%.*]] = sub <4 x i32> [[A]], [[VMULL2_I_I_I]]11891// CHECK-NEXT:    ret <4 x i32> [[SUB_I_I]]11892//11893int32x4_t test_vmlsl_high_s16(int32x4_t a, int16x8_t b, int16x8_t c) {11894  return vmlsl_high_s16(a, b, c);11895}11896 11897// CHECK-LABEL: define dso_local <2 x i64> @test_vmlsl_high_s32(11898// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11899// CHECK-NEXT:  [[ENTRY:.*:]]11900// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11901// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[C]], <4 x i32> [[C]], <2 x i32> <i32 2, i32 3>11902// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11903// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11904// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11905// CHECK-NEXT:    [[VMULL1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11906// CHECK-NEXT:    [[VMULL2_I_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.smull.v2i64(<2 x i32> [[VMULL_I_I_I]], <2 x i32> [[VMULL1_I_I_I]])11907// CHECK-NEXT:    [[SUB_I_I:%.*]] = sub <2 x i64> [[A]], [[VMULL2_I_I_I]]11908// CHECK-NEXT:    ret <2 x i64> [[SUB_I_I]]11909//11910int64x2_t test_vmlsl_high_s32(int64x2_t a, int32x4_t b, int32x4_t c) {11911  return vmlsl_high_s32(a, b, c);11912}11913 11914// CHECK-LABEL: define dso_local <8 x i16> @test_vmlsl_high_u8(11915// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR0]] {11916// CHECK-NEXT:  [[ENTRY:.*:]]11917// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11918// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <16 x i8> [[C]], <16 x i8> [[C]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>11919// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> [[SHUFFLE_I5_I]], <8 x i8> [[SHUFFLE_I_I]])11920// CHECK-NEXT:    [[SUB_I_I:%.*]] = sub <8 x i16> [[A]], [[VMULL_I_I_I]]11921// CHECK-NEXT:    ret <8 x i16> [[SUB_I_I]]11922//11923uint16x8_t test_vmlsl_high_u8(uint16x8_t a, uint8x16_t b, uint8x16_t c) {11924  return vmlsl_high_u8(a, b, c);11925}11926 11927// CHECK-LABEL: define dso_local <4 x i32> @test_vmlsl_high_u16(11928// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11929// CHECK-NEXT:  [[ENTRY:.*:]]11930// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11931// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[C]], <8 x i16> [[C]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>11932// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>11933// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>11934// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11935// CHECK-NEXT:    [[VMULL1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11936// CHECK-NEXT:    [[VMULL2_I_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> [[VMULL_I_I_I]], <4 x i16> [[VMULL1_I_I_I]])11937// CHECK-NEXT:    [[SUB_I_I:%.*]] = sub <4 x i32> [[A]], [[VMULL2_I_I_I]]11938// CHECK-NEXT:    ret <4 x i32> [[SUB_I_I]]11939//11940uint32x4_t test_vmlsl_high_u16(uint32x4_t a, uint16x8_t b, uint16x8_t c) {11941  return vmlsl_high_u16(a, b, c);11942}11943 11944// CHECK-LABEL: define dso_local <2 x i64> @test_vmlsl_high_u32(11945// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {11946// CHECK-NEXT:  [[ENTRY:.*:]]11947// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>11948// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[C]], <4 x i32> [[C]], <2 x i32> <i32 2, i32 3>11949// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>11950// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>11951// CHECK-NEXT:    [[VMULL_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11952// CHECK-NEXT:    [[VMULL1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11953// CHECK-NEXT:    [[VMULL2_I_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> [[VMULL_I_I_I]], <2 x i32> [[VMULL1_I_I_I]])11954// CHECK-NEXT:    [[SUB_I_I:%.*]] = sub <2 x i64> [[A]], [[VMULL2_I_I_I]]11955// CHECK-NEXT:    ret <2 x i64> [[SUB_I_I]]11956//11957uint64x2_t test_vmlsl_high_u32(uint64x2_t a, uint32x4_t b, uint32x4_t c) {11958  return vmlsl_high_u32(a, b, c);11959}11960 11961// CHECK-LABEL: define dso_local <4 x i32> @test_vqdmull_s16(11962// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {11963// CHECK-NEXT:  [[ENTRY:.*:]]11964// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>11965// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11966// CHECK-NEXT:    [[VQDMULL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>11967// CHECK-NEXT:    [[VQDMULL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>11968// CHECK-NEXT:    [[VQDMULL_V2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[VQDMULL_V_I]], <4 x i16> [[VQDMULL_V1_I]])11969// CHECK-NEXT:    [[VQDMULL_V3_I:%.*]] = bitcast <4 x i32> [[VQDMULL_V2_I]] to <16 x i8>11970// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQDMULL_V3_I]] to <4 x i32>11971// CHECK-NEXT:    ret <4 x i32> [[TMP2]]11972//11973int32x4_t test_vqdmull_s16(int16x4_t a, int16x4_t b) {11974  return vqdmull_s16(a, b);11975}11976 11977// CHECK-LABEL: define dso_local <2 x i64> @test_vqdmull_s32(11978// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {11979// CHECK-NEXT:  [[ENTRY:.*:]]11980// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>11981// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>11982// CHECK-NEXT:    [[VQDMULL_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>11983// CHECK-NEXT:    [[VQDMULL_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>11984// CHECK-NEXT:    [[VQDMULL_V2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> [[VQDMULL_V_I]], <2 x i32> [[VQDMULL_V1_I]])11985// CHECK-NEXT:    [[VQDMULL_V3_I:%.*]] = bitcast <2 x i64> [[VQDMULL_V2_I]] to <16 x i8>11986// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQDMULL_V3_I]] to <2 x i64>11987// CHECK-NEXT:    ret <2 x i64> [[TMP2]]11988//11989int64x2_t test_vqdmull_s32(int32x2_t a, int32x2_t b) {11990  return vqdmull_s32(a, b);11991}11992 11993// CHECK-LABEL: define dso_local <4 x i32> @test_vqdmlal_s16(11994// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {11995// CHECK-NEXT:  [[ENTRY:.*:]]11996// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>11997// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>11998// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[C]] to <8 x i8>11999// CHECK-NEXT:    [[VQDMLAL_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>12000// CHECK-NEXT:    [[VQDMLAL1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>12001// CHECK-NEXT:    [[VQDMLAL2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[VQDMLAL_I]], <4 x i16> [[VQDMLAL1_I]])12002// CHECK-NEXT:    [[VQDMLAL_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>12003// CHECK-NEXT:    [[VQDMLAL_V3_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqadd.v4i32(<4 x i32> [[VQDMLAL_V_I]], <4 x i32> [[VQDMLAL2_I]])12004// CHECK-NEXT:    ret <4 x i32> [[VQDMLAL_V3_I]]12005//12006int32x4_t test_vqdmlal_s16(int32x4_t a, int16x4_t b, int16x4_t c) {12007  return vqdmlal_s16(a, b, c);12008}12009 12010// CHECK-LABEL: define dso_local <2 x i64> @test_vqdmlal_s32(12011// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {12012// CHECK-NEXT:  [[ENTRY:.*:]]12013// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>12014// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>12015// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[C]] to <8 x i8>12016// CHECK-NEXT:    [[VQDMLAL_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>12017// CHECK-NEXT:    [[VQDMLAL1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>12018// CHECK-NEXT:    [[VQDMLAL2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> [[VQDMLAL_I]], <2 x i32> [[VQDMLAL1_I]])12019// CHECK-NEXT:    [[VQDMLAL_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>12020// CHECK-NEXT:    [[VQDMLAL_V3_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqadd.v2i64(<2 x i64> [[VQDMLAL_V_I]], <2 x i64> [[VQDMLAL2_I]])12021// CHECK-NEXT:    ret <2 x i64> [[VQDMLAL_V3_I]]12022//12023int64x2_t test_vqdmlal_s32(int64x2_t a, int32x2_t b, int32x2_t c) {12024  return vqdmlal_s32(a, b, c);12025}12026 12027// CHECK-LABEL: define dso_local <4 x i32> @test_vqdmlsl_s16(12028// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {12029// CHECK-NEXT:  [[ENTRY:.*:]]12030// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>12031// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>12032// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[C]] to <8 x i8>12033// CHECK-NEXT:    [[VQDMLAL_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>12034// CHECK-NEXT:    [[VQDMLAL1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>12035// CHECK-NEXT:    [[VQDMLAL2_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[VQDMLAL_I]], <4 x i16> [[VQDMLAL1_I]])12036// CHECK-NEXT:    [[VQDMLSL_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>12037// CHECK-NEXT:    [[VQDMLSL_V3_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqsub.v4i32(<4 x i32> [[VQDMLSL_V_I]], <4 x i32> [[VQDMLAL2_I]])12038// CHECK-NEXT:    ret <4 x i32> [[VQDMLSL_V3_I]]12039//12040int32x4_t test_vqdmlsl_s16(int32x4_t a, int16x4_t b, int16x4_t c) {12041  return vqdmlsl_s16(a, b, c);12042}12043 12044// CHECK-LABEL: define dso_local <2 x i64> @test_vqdmlsl_s32(12045// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {12046// CHECK-NEXT:  [[ENTRY:.*:]]12047// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>12048// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>12049// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[C]] to <8 x i8>12050// CHECK-NEXT:    [[VQDMLAL_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>12051// CHECK-NEXT:    [[VQDMLAL1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>12052// CHECK-NEXT:    [[VQDMLAL2_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> [[VQDMLAL_I]], <2 x i32> [[VQDMLAL1_I]])12053// CHECK-NEXT:    [[VQDMLSL_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>12054// CHECK-NEXT:    [[VQDMLSL_V3_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqsub.v2i64(<2 x i64> [[VQDMLSL_V_I]], <2 x i64> [[VQDMLAL2_I]])12055// CHECK-NEXT:    ret <2 x i64> [[VQDMLSL_V3_I]]12056//12057int64x2_t test_vqdmlsl_s32(int64x2_t a, int32x2_t b, int32x2_t c) {12058  return vqdmlsl_s32(a, b, c);12059}12060 12061// CHECK-LABEL: define dso_local <4 x i32> @test_vqdmull_high_s16(12062// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {12063// CHECK-NEXT:  [[ENTRY:.*:]]12064// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>12065// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>12066// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>12067// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>12068// CHECK-NEXT:    [[VQDMULL_V_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>12069// CHECK-NEXT:    [[VQDMULL_V1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>12070// CHECK-NEXT:    [[VQDMULL_V2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[VQDMULL_V_I_I]], <4 x i16> [[VQDMULL_V1_I_I]])12071// CHECK-NEXT:    [[VQDMULL_V3_I_I:%.*]] = bitcast <4 x i32> [[VQDMULL_V2_I_I]] to <16 x i8>12072// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQDMULL_V3_I_I]] to <4 x i32>12073// CHECK-NEXT:    ret <4 x i32> [[TMP2]]12074//12075int32x4_t test_vqdmull_high_s16(int16x8_t a, int16x8_t b) {12076  return vqdmull_high_s16(a, b);12077}12078 12079// CHECK-LABEL: define dso_local <2 x i64> @test_vqdmull_high_s32(12080// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {12081// CHECK-NEXT:  [[ENTRY:.*:]]12082// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[A]], <2 x i32> <i32 2, i32 3>12083// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>12084// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>12085// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>12086// CHECK-NEXT:    [[VQDMULL_V_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>12087// CHECK-NEXT:    [[VQDMULL_V1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>12088// CHECK-NEXT:    [[VQDMULL_V2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> [[VQDMULL_V_I_I]], <2 x i32> [[VQDMULL_V1_I_I]])12089// CHECK-NEXT:    [[VQDMULL_V3_I_I:%.*]] = bitcast <2 x i64> [[VQDMULL_V2_I_I]] to <16 x i8>12090// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VQDMULL_V3_I_I]] to <2 x i64>12091// CHECK-NEXT:    ret <2 x i64> [[TMP2]]12092//12093int64x2_t test_vqdmull_high_s32(int32x4_t a, int32x4_t b) {12094  return vqdmull_high_s32(a, b);12095}12096 12097// CHECK-LABEL: define dso_local <4 x i32> @test_vqdmlal_high_s16(12098// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {12099// CHECK-NEXT:  [[ENTRY:.*:]]12100// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>12101// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[C]], <8 x i16> [[C]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>12102// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>12103// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>12104// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>12105// CHECK-NEXT:    [[VQDMLAL_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>12106// CHECK-NEXT:    [[VQDMLAL1_I_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>12107// CHECK-NEXT:    [[VQDMLAL2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[VQDMLAL_I_I]], <4 x i16> [[VQDMLAL1_I_I]])12108// CHECK-NEXT:    [[VQDMLAL_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>12109// CHECK-NEXT:    [[VQDMLAL_V3_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqadd.v4i32(<4 x i32> [[VQDMLAL_V_I_I]], <4 x i32> [[VQDMLAL2_I_I]])12110// CHECK-NEXT:    ret <4 x i32> [[VQDMLAL_V3_I_I]]12111//12112int32x4_t test_vqdmlal_high_s16(int32x4_t a, int16x8_t b, int16x8_t c) {12113  return vqdmlal_high_s16(a, b, c);12114}12115 12116// CHECK-LABEL: define dso_local <2 x i64> @test_vqdmlal_high_s32(12117// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {12118// CHECK-NEXT:  [[ENTRY:.*:]]12119// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>12120// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[C]], <4 x i32> [[C]], <2 x i32> <i32 2, i32 3>12121// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>12122// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>12123// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>12124// CHECK-NEXT:    [[VQDMLAL_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>12125// CHECK-NEXT:    [[VQDMLAL1_I_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>12126// CHECK-NEXT:    [[VQDMLAL2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> [[VQDMLAL_I_I]], <2 x i32> [[VQDMLAL1_I_I]])12127// CHECK-NEXT:    [[VQDMLAL_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>12128// CHECK-NEXT:    [[VQDMLAL_V3_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqadd.v2i64(<2 x i64> [[VQDMLAL_V_I_I]], <2 x i64> [[VQDMLAL2_I_I]])12129// CHECK-NEXT:    ret <2 x i64> [[VQDMLAL_V3_I_I]]12130//12131int64x2_t test_vqdmlal_high_s32(int64x2_t a, int32x4_t b, int32x4_t c) {12132  return vqdmlal_high_s32(a, b, c);12133}12134 12135// CHECK-LABEL: define dso_local <4 x i32> @test_vqdmlsl_high_s16(12136// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {12137// CHECK-NEXT:  [[ENTRY:.*:]]12138// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> [[B]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>12139// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <8 x i16> [[C]], <8 x i16> [[C]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>12140// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>12141// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[SHUFFLE_I5_I]] to <8 x i8>12142// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[SHUFFLE_I_I]] to <8 x i8>12143// CHECK-NEXT:    [[VQDMLAL_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>12144// CHECK-NEXT:    [[VQDMLAL1_I_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>12145// CHECK-NEXT:    [[VQDMLAL2_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[VQDMLAL_I_I]], <4 x i16> [[VQDMLAL1_I_I]])12146// CHECK-NEXT:    [[VQDMLSL_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>12147// CHECK-NEXT:    [[VQDMLSL_V3_I_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqsub.v4i32(<4 x i32> [[VQDMLSL_V_I_I]], <4 x i32> [[VQDMLAL2_I_I]])12148// CHECK-NEXT:    ret <4 x i32> [[VQDMLSL_V3_I_I]]12149//12150int32x4_t test_vqdmlsl_high_s16(int32x4_t a, int16x8_t b, int16x8_t c) {12151  return vqdmlsl_high_s16(a, b, c);12152}12153 12154// CHECK-LABEL: define dso_local <2 x i64> @test_vqdmlsl_high_s32(12155// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {12156// CHECK-NEXT:  [[ENTRY:.*:]]12157// CHECK-NEXT:    [[SHUFFLE_I5_I:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> [[B]], <2 x i32> <i32 2, i32 3>12158// CHECK-NEXT:    [[SHUFFLE_I_I:%.*]] = shufflevector <4 x i32> [[C]], <4 x i32> [[C]], <2 x i32> <i32 2, i32 3>12159// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>12160// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[SHUFFLE_I5_I]] to <8 x i8>12161// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[SHUFFLE_I_I]] to <8 x i8>12162// CHECK-NEXT:    [[VQDMLAL_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>12163// CHECK-NEXT:    [[VQDMLAL1_I_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>12164// CHECK-NEXT:    [[VQDMLAL2_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> [[VQDMLAL_I_I]], <2 x i32> [[VQDMLAL1_I_I]])12165// CHECK-NEXT:    [[VQDMLSL_V_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>12166// CHECK-NEXT:    [[VQDMLSL_V3_I_I:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqsub.v2i64(<2 x i64> [[VQDMLSL_V_I_I]], <2 x i64> [[VQDMLAL2_I_I]])12167// CHECK-NEXT:    ret <2 x i64> [[VQDMLSL_V3_I_I]]12168//12169int64x2_t test_vqdmlsl_high_s32(int64x2_t a, int32x4_t b, int32x4_t c) {12170  return vqdmlsl_high_s32(a, b, c);12171}12172 12173// CHECK-LABEL: define dso_local <8 x i16> @test_vmull_p8(12174// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {12175// CHECK-NEXT:  [[ENTRY:.*:]]12176// CHECK-NEXT:    [[VMULL_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.pmull.v8i16(<8 x i8> [[A]], <8 x i8> [[B]])12177// CHECK-NEXT:    ret <8 x i16> [[VMULL_I]]12178//12179poly16x8_t test_vmull_p8(poly8x8_t a, poly8x8_t b) {12180  return vmull_p8(a, b);12181}12182 12183// CHECK-LABEL: define dso_local <8 x i16> @test_vmull_high_p8(12184// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {12185// CHECK-NEXT:  [[ENTRY:.*:]]12186// CHECK-NEXT:    [[SHUFFLE_I5:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>12187// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[B]], <16 x i8> [[B]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>12188// CHECK-NEXT:    [[VMULL_I_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.pmull.v8i16(<8 x i8> [[SHUFFLE_I5]], <8 x i8> [[SHUFFLE_I]])12189// CHECK-NEXT:    ret <8 x i16> [[VMULL_I_I]]12190//12191poly16x8_t test_vmull_high_p8(poly8x16_t a, poly8x16_t b) {12192  return vmull_high_p8(a, b);12193}12194 12195// CHECK-LABEL: define dso_local i64 @test_vaddd_s64(12196// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12197// CHECK-NEXT:  [[ENTRY:.*:]]12198// CHECK-NEXT:    [[VADDD_I:%.*]] = add i64 [[A]], [[B]]12199// CHECK-NEXT:    ret i64 [[VADDD_I]]12200//12201int64_t test_vaddd_s64(int64_t a, int64_t b) {12202  return vaddd_s64(a, b);12203}12204 12205// CHECK-LABEL: define dso_local i64 @test_vaddd_u64(12206// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12207// CHECK-NEXT:  [[ENTRY:.*:]]12208// CHECK-NEXT:    [[VADDD_I:%.*]] = add i64 [[A]], [[B]]12209// CHECK-NEXT:    ret i64 [[VADDD_I]]12210//12211uint64_t test_vaddd_u64(uint64_t a, uint64_t b) {12212  return vaddd_u64(a, b);12213}12214 12215// CHECK-LABEL: define dso_local i64 @test_vsubd_s64(12216// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12217// CHECK-NEXT:  [[ENTRY:.*:]]12218// CHECK-NEXT:    [[VSUBD_I:%.*]] = sub i64 [[A]], [[B]]12219// CHECK-NEXT:    ret i64 [[VSUBD_I]]12220//12221int64_t test_vsubd_s64(int64_t a, int64_t b) {12222  return vsubd_s64(a, b);12223}12224 12225// CHECK-LABEL: define dso_local i64 @test_vsubd_u64(12226// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12227// CHECK-NEXT:  [[ENTRY:.*:]]12228// CHECK-NEXT:    [[VSUBD_I:%.*]] = sub i64 [[A]], [[B]]12229// CHECK-NEXT:    ret i64 [[VSUBD_I]]12230//12231uint64_t test_vsubd_u64(uint64_t a, uint64_t b) {12232  return vsubd_u64(a, b);12233}12234 12235// CHECK-LABEL: define dso_local i8 @test_vqaddb_s8(12236// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {12237// CHECK-NEXT:  [[ENTRY:.*:]]12238// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 012239// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 012240// CHECK-NEXT:    [[VQADDB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqadd.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])12241// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VQADDB_S8_I]], i64 012242// CHECK-NEXT:    ret i8 [[TMP2]]12243//12244int8_t test_vqaddb_s8(int8_t a, int8_t b) {12245  return vqaddb_s8(a, b);12246}12247 12248// CHECK-LABEL: define dso_local i16 @test_vqaddh_s16(12249// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12250// CHECK-NEXT:  [[ENTRY:.*:]]12251// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012252// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012253// CHECK-NEXT:    [[VQADDH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12254// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQADDH_S16_I]], i64 012255// CHECK-NEXT:    ret i16 [[TMP2]]12256//12257int16_t test_vqaddh_s16(int16_t a, int16_t b) {12258  return vqaddh_s16(a, b);12259}12260 12261// CHECK-LABEL: define dso_local i32 @test_vqadds_s32(12262// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12263// CHECK-NEXT:  [[ENTRY:.*:]]12264// CHECK-NEXT:    [[VQADDS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqadd.i32(i32 [[A]], i32 [[B]])12265// CHECK-NEXT:    ret i32 [[VQADDS_S32_I]]12266//12267int32_t test_vqadds_s32(int32_t a, int32_t b) {12268  return vqadds_s32(a, b);12269}12270 12271// CHECK-LABEL: define dso_local i64 @test_vqaddd_s64(12272// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12273// CHECK-NEXT:  [[ENTRY:.*:]]12274// CHECK-NEXT:    [[VQADDD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 [[A]], i64 [[B]])12275// CHECK-NEXT:    ret i64 [[VQADDD_S64_I]]12276//12277int64_t test_vqaddd_s64(int64_t a, int64_t b) {12278  return vqaddd_s64(a, b);12279}12280 12281// CHECK-LABEL: define dso_local i8 @test_vqaddb_u8(12282// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {12283// CHECK-NEXT:  [[ENTRY:.*:]]12284// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 012285// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 012286// CHECK-NEXT:    [[VQADDB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqadd.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])12287// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VQADDB_U8_I]], i64 012288// CHECK-NEXT:    ret i8 [[TMP2]]12289//12290uint8_t test_vqaddb_u8(uint8_t a, uint8_t b) {12291  return vqaddb_u8(a, b);12292}12293 12294// CHECK-LABEL: define dso_local i16 @test_vqaddh_u16(12295// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12296// CHECK-NEXT:  [[ENTRY:.*:]]12297// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012298// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012299// CHECK-NEXT:    [[VQADDH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqadd.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12300// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQADDH_U16_I]], i64 012301// CHECK-NEXT:    ret i16 [[TMP2]]12302//12303uint16_t test_vqaddh_u16(uint16_t a, uint16_t b) {12304  return vqaddh_u16(a, b);12305}12306 12307// CHECK-LABEL: define dso_local i32 @test_vqadds_u32(12308// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12309// CHECK-NEXT:  [[ENTRY:.*:]]12310// CHECK-NEXT:    [[VQADDS_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uqadd.i32(i32 [[A]], i32 [[B]])12311// CHECK-NEXT:    ret i32 [[VQADDS_U32_I]]12312//12313uint32_t test_vqadds_u32(uint32_t a, uint32_t b) {12314  return vqadds_u32(a, b);12315}12316 12317// CHECK-LABEL: define dso_local i64 @test_vqaddd_u64(12318// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12319// CHECK-NEXT:  [[ENTRY:.*:]]12320// CHECK-NEXT:    [[VQADDD_U64_I:%.*]] = call i64 @llvm.aarch64.neon.uqadd.i64(i64 [[A]], i64 [[B]])12321// CHECK-NEXT:    ret i64 [[VQADDD_U64_I]]12322//12323uint64_t test_vqaddd_u64(uint64_t a, uint64_t b) {12324  return vqaddd_u64(a, b);12325}12326 12327// CHECK-LABEL: define dso_local i8 @test_vqsubb_s8(12328// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {12329// CHECK-NEXT:  [[ENTRY:.*:]]12330// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 012331// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 012332// CHECK-NEXT:    [[VQSUBB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqsub.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])12333// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VQSUBB_S8_I]], i64 012334// CHECK-NEXT:    ret i8 [[TMP2]]12335//12336int8_t test_vqsubb_s8(int8_t a, int8_t b) {12337  return vqsubb_s8(a, b);12338}12339 12340// CHECK-LABEL: define dso_local i16 @test_vqsubh_s16(12341// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12342// CHECK-NEXT:  [[ENTRY:.*:]]12343// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012344// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012345// CHECK-NEXT:    [[VQSUBH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqsub.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12346// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQSUBH_S16_I]], i64 012347// CHECK-NEXT:    ret i16 [[TMP2]]12348//12349int16_t test_vqsubh_s16(int16_t a, int16_t b) {12350  return vqsubh_s16(a, b);12351}12352 12353// CHECK-LABEL: define dso_local i32 @test_vqsubs_s32(12354// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12355// CHECK-NEXT:  [[ENTRY:.*:]]12356// CHECK-NEXT:    [[VQSUBS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqsub.i32(i32 [[A]], i32 [[B]])12357// CHECK-NEXT:    ret i32 [[VQSUBS_S32_I]]12358//12359int32_t test_vqsubs_s32(int32_t a, int32_t b) {12360  return vqsubs_s32(a, b);12361}12362 12363// CHECK-LABEL: define dso_local i64 @test_vqsubd_s64(12364// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12365// CHECK-NEXT:  [[ENTRY:.*:]]12366// CHECK-NEXT:    [[VQSUBD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 [[A]], i64 [[B]])12367// CHECK-NEXT:    ret i64 [[VQSUBD_S64_I]]12368//12369int64_t test_vqsubd_s64(int64_t a, int64_t b) {12370  return vqsubd_s64(a, b);12371}12372 12373// CHECK-LABEL: define dso_local i8 @test_vqsubb_u8(12374// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {12375// CHECK-NEXT:  [[ENTRY:.*:]]12376// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 012377// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 012378// CHECK-NEXT:    [[VQSUBB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqsub.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])12379// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VQSUBB_U8_I]], i64 012380// CHECK-NEXT:    ret i8 [[TMP2]]12381//12382uint8_t test_vqsubb_u8(uint8_t a, uint8_t b) {12383  return vqsubb_u8(a, b);12384}12385 12386// CHECK-LABEL: define dso_local i16 @test_vqsubh_u16(12387// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12388// CHECK-NEXT:  [[ENTRY:.*:]]12389// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012390// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012391// CHECK-NEXT:    [[VQSUBH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqsub.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12392// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQSUBH_U16_I]], i64 012393// CHECK-NEXT:    ret i16 [[TMP2]]12394//12395uint16_t test_vqsubh_u16(uint16_t a, uint16_t b) {12396  return vqsubh_u16(a, b);12397}12398 12399// CHECK-LABEL: define dso_local i32 @test_vqsubs_u32(12400// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12401// CHECK-NEXT:  [[ENTRY:.*:]]12402// CHECK-NEXT:    [[VQSUBS_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uqsub.i32(i32 [[A]], i32 [[B]])12403// CHECK-NEXT:    ret i32 [[VQSUBS_U32_I]]12404//12405uint32_t test_vqsubs_u32(uint32_t a, uint32_t b) {12406  return vqsubs_u32(a, b);12407}12408 12409// CHECK-LABEL: define dso_local i64 @test_vqsubd_u64(12410// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12411// CHECK-NEXT:  [[ENTRY:.*:]]12412// CHECK-NEXT:    [[VQSUBD_U64_I:%.*]] = call i64 @llvm.aarch64.neon.uqsub.i64(i64 [[A]], i64 [[B]])12413// CHECK-NEXT:    ret i64 [[VQSUBD_U64_I]]12414//12415uint64_t test_vqsubd_u64(uint64_t a, uint64_t b) {12416  return vqsubd_u64(a, b);12417}12418 12419// CHECK-LABEL: define dso_local i64 @test_vshld_s64(12420// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12421// CHECK-NEXT:  [[ENTRY:.*:]]12422// CHECK-NEXT:    [[VSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sshl.i64(i64 [[A]], i64 [[B]])12423// CHECK-NEXT:    ret i64 [[VSHLD_S64_I]]12424//12425int64_t test_vshld_s64(int64_t a, int64_t b) {12426  return vshld_s64(a, b);12427}12428 12429// CHECK-LABEL: define dso_local i64 @test_vshld_u64(12430// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12431// CHECK-NEXT:  [[ENTRY:.*:]]12432// CHECK-NEXT:    [[VSHLD_U64_I:%.*]] = call i64 @llvm.aarch64.neon.ushl.i64(i64 [[A]], i64 [[B]])12433// CHECK-NEXT:    ret i64 [[VSHLD_U64_I]]12434//12435uint64_t test_vshld_u64(uint64_t a, int64_t b) {12436  return vshld_u64(a, b);12437}12438 12439// CHECK-LABEL: define dso_local i8 @test_vqshlb_s8(12440// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {12441// CHECK-NEXT:  [[ENTRY:.*:]]12442// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 012443// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 012444// CHECK-NEXT:    [[VQSHLB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])12445// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VQSHLB_S8_I]], i64 012446// CHECK-NEXT:    ret i8 [[TMP2]]12447//12448int8_t test_vqshlb_s8(int8_t a, int8_t b) {12449  return vqshlb_s8(a, b);12450}12451 12452// CHECK-LABEL: define dso_local i16 @test_vqshlh_s16(12453// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12454// CHECK-NEXT:  [[ENTRY:.*:]]12455// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012456// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012457// CHECK-NEXT:    [[VQSHLH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12458// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQSHLH_S16_I]], i64 012459// CHECK-NEXT:    ret i16 [[TMP2]]12460//12461int16_t test_vqshlh_s16(int16_t a, int16_t b) {12462  return vqshlh_s16(a, b);12463}12464 12465// CHECK-LABEL: define dso_local i32 @test_vqshls_s32(12466// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12467// CHECK-NEXT:  [[ENTRY:.*:]]12468// CHECK-NEXT:    [[VQSHLS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqshl.i32(i32 [[A]], i32 [[B]])12469// CHECK-NEXT:    ret i32 [[VQSHLS_S32_I]]12470//12471int32_t test_vqshls_s32(int32_t a, int32_t b) {12472  return vqshls_s32(a, b);12473}12474 12475// CHECK-LABEL: define dso_local i64 @test_vqshld_s64(12476// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12477// CHECK-NEXT:  [[ENTRY:.*:]]12478// CHECK-NEXT:    [[VQSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sqshl.i64(i64 [[A]], i64 [[B]])12479// CHECK-NEXT:    ret i64 [[VQSHLD_S64_I]]12480//12481int64_t test_vqshld_s64(int64_t a, int64_t b) {12482  return vqshld_s64(a, b);12483}12484 12485// CHECK-LABEL: define dso_local i8 @test_vqshlb_u8(12486// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {12487// CHECK-NEXT:  [[ENTRY:.*:]]12488// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 012489// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 012490// CHECK-NEXT:    [[VQSHLB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])12491// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VQSHLB_U8_I]], i64 012492// CHECK-NEXT:    ret i8 [[TMP2]]12493//12494uint8_t test_vqshlb_u8(uint8_t a, int8_t b) {12495  return vqshlb_u8(a, b);12496}12497 12498// CHECK-LABEL: define dso_local i16 @test_vqshlh_u16(12499// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12500// CHECK-NEXT:  [[ENTRY:.*:]]12501// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012502// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012503// CHECK-NEXT:    [[VQSHLH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12504// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQSHLH_U16_I]], i64 012505// CHECK-NEXT:    ret i16 [[TMP2]]12506//12507uint16_t test_vqshlh_u16(uint16_t a, int16_t b) {12508  return vqshlh_u16(a, b);12509}12510 12511// CHECK-LABEL: define dso_local i32 @test_vqshls_u32(12512// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12513// CHECK-NEXT:  [[ENTRY:.*:]]12514// CHECK-NEXT:    [[VQSHLS_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uqshl.i32(i32 [[A]], i32 [[B]])12515// CHECK-NEXT:    ret i32 [[VQSHLS_U32_I]]12516//12517uint32_t test_vqshls_u32(uint32_t a, int32_t b) {12518  return vqshls_u32(a, b);12519}12520 12521// CHECK-LABEL: define dso_local i64 @test_vqshld_u64(12522// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12523// CHECK-NEXT:  [[ENTRY:.*:]]12524// CHECK-NEXT:    [[VQSHLD_U64_I:%.*]] = call i64 @llvm.aarch64.neon.uqshl.i64(i64 [[A]], i64 [[B]])12525// CHECK-NEXT:    ret i64 [[VQSHLD_U64_I]]12526//12527uint64_t test_vqshld_u64(uint64_t a, int64_t b) {12528  return vqshld_u64(a, b);12529}12530 12531// CHECK-LABEL: define dso_local i64 @test_vrshld_s64(12532// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12533// CHECK-NEXT:  [[ENTRY:.*:]]12534// CHECK-NEXT:    [[VRSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.srshl.i64(i64 [[A]], i64 [[B]])12535// CHECK-NEXT:    ret i64 [[VRSHLD_S64_I]]12536//12537int64_t test_vrshld_s64(int64_t a, int64_t b) {12538  return vrshld_s64(a, b);12539}12540 12541// CHECK-LABEL: define dso_local i64 @test_vrshld_u64(12542// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12543// CHECK-NEXT:  [[ENTRY:.*:]]12544// CHECK-NEXT:    [[VRSHLD_U64_I:%.*]] = call i64 @llvm.aarch64.neon.urshl.i64(i64 [[A]], i64 [[B]])12545// CHECK-NEXT:    ret i64 [[VRSHLD_U64_I]]12546//12547uint64_t test_vrshld_u64(uint64_t a, int64_t b) {12548  return vrshld_u64(a, b);12549}12550 12551// CHECK-LABEL: define dso_local i8 @test_vqrshlb_s8(12552// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {12553// CHECK-NEXT:  [[ENTRY:.*:]]12554// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 012555// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 012556// CHECK-NEXT:    [[VQRSHLB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])12557// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VQRSHLB_S8_I]], i64 012558// CHECK-NEXT:    ret i8 [[TMP2]]12559//12560int8_t test_vqrshlb_s8(int8_t a, int8_t b) {12561  return vqrshlb_s8(a, b);12562}12563 12564// CHECK-LABEL: define dso_local i16 @test_vqrshlh_s16(12565// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12566// CHECK-NEXT:  [[ENTRY:.*:]]12567// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012568// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012569// CHECK-NEXT:    [[VQRSHLH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12570// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQRSHLH_S16_I]], i64 012571// CHECK-NEXT:    ret i16 [[TMP2]]12572//12573int16_t test_vqrshlh_s16(int16_t a, int16_t b) {12574  return vqrshlh_s16(a, b);12575}12576 12577// CHECK-LABEL: define dso_local i32 @test_vqrshls_s32(12578// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12579// CHECK-NEXT:  [[ENTRY:.*:]]12580// CHECK-NEXT:    [[VQRSHLS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrshl.i32(i32 [[A]], i32 [[B]])12581// CHECK-NEXT:    ret i32 [[VQRSHLS_S32_I]]12582//12583int32_t test_vqrshls_s32(int32_t a, int32_t b) {12584  return vqrshls_s32(a, b);12585}12586 12587// CHECK-LABEL: define dso_local i64 @test_vqrshld_s64(12588// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12589// CHECK-NEXT:  [[ENTRY:.*:]]12590// CHECK-NEXT:    [[VQRSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sqrshl.i64(i64 [[A]], i64 [[B]])12591// CHECK-NEXT:    ret i64 [[VQRSHLD_S64_I]]12592//12593int64_t test_vqrshld_s64(int64_t a, int64_t b) {12594  return vqrshld_s64(a, b);12595}12596 12597// CHECK-LABEL: define dso_local i8 @test_vqrshlb_u8(12598// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {12599// CHECK-NEXT:  [[ENTRY:.*:]]12600// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 012601// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 012602// CHECK-NEXT:    [[VQRSHLB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqrshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])12603// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VQRSHLB_U8_I]], i64 012604// CHECK-NEXT:    ret i8 [[TMP2]]12605//12606uint8_t test_vqrshlb_u8(uint8_t a, int8_t b) {12607  return vqrshlb_u8(a, b);12608}12609 12610// CHECK-LABEL: define dso_local i16 @test_vqrshlh_u16(12611// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12612// CHECK-NEXT:  [[ENTRY:.*:]]12613// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012614// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012615// CHECK-NEXT:    [[VQRSHLH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqrshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12616// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQRSHLH_U16_I]], i64 012617// CHECK-NEXT:    ret i16 [[TMP2]]12618//12619uint16_t test_vqrshlh_u16(uint16_t a, int16_t b) {12620  return vqrshlh_u16(a, b);12621}12622 12623// CHECK-LABEL: define dso_local i32 @test_vqrshls_u32(12624// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12625// CHECK-NEXT:  [[ENTRY:.*:]]12626// CHECK-NEXT:    [[VQRSHLS_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uqrshl.i32(i32 [[A]], i32 [[B]])12627// CHECK-NEXT:    ret i32 [[VQRSHLS_U32_I]]12628//12629uint32_t test_vqrshls_u32(uint32_t a, int32_t b) {12630  return vqrshls_u32(a, b);12631}12632 12633// CHECK-LABEL: define dso_local i64 @test_vqrshld_u64(12634// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {12635// CHECK-NEXT:  [[ENTRY:.*:]]12636// CHECK-NEXT:    [[VQRSHLD_U64_I:%.*]] = call i64 @llvm.aarch64.neon.uqrshl.i64(i64 [[A]], i64 [[B]])12637// CHECK-NEXT:    ret i64 [[VQRSHLD_U64_I]]12638//12639uint64_t test_vqrshld_u64(uint64_t a, int64_t b) {12640  return vqrshld_u64(a, b);12641}12642 12643// CHECK-LABEL: define dso_local i64 @test_vpaddd_s64(12644// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {12645// CHECK-NEXT:  [[ENTRY:.*:]]12646// CHECK-NEXT:    [[VPADDD_S64_I:%.*]] = call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> [[A]])12647// CHECK-NEXT:    ret i64 [[VPADDD_S64_I]]12648//12649int64_t test_vpaddd_s64(int64x2_t a) {12650  return vpaddd_s64(a);12651}12652 12653// CHECK-LABEL: define dso_local float @test_vpadds_f32(12654// CHECK-SAME: <2 x float> noundef [[A:%.*]]) #[[ATTR0]] {12655// CHECK-NEXT:  [[ENTRY:.*:]]12656// CHECK-NEXT:    [[LANE0_I:%.*]] = extractelement <2 x float> [[A]], i64 012657// CHECK-NEXT:    [[LANE1_I:%.*]] = extractelement <2 x float> [[A]], i64 112658// CHECK-NEXT:    [[VPADDD_I:%.*]] = fadd float [[LANE0_I]], [[LANE1_I]]12659// CHECK-NEXT:    ret float [[VPADDD_I]]12660//12661float32_t test_vpadds_f32(float32x2_t a) {12662  return vpadds_f32(a);12663}12664 12665// CHECK-LABEL: define dso_local double @test_vpaddd_f64(12666// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] {12667// CHECK-NEXT:  [[ENTRY:.*:]]12668// CHECK-NEXT:    [[LANE0_I:%.*]] = extractelement <2 x double> [[A]], i64 012669// CHECK-NEXT:    [[LANE1_I:%.*]] = extractelement <2 x double> [[A]], i64 112670// CHECK-NEXT:    [[VPADDD_I:%.*]] = fadd double [[LANE0_I]], [[LANE1_I]]12671// CHECK-NEXT:    ret double [[VPADDD_I]]12672//12673float64_t test_vpaddd_f64(float64x2_t a) {12674  return vpaddd_f64(a);12675}12676 12677// CHECK-LABEL: define dso_local float @test_vpmaxnms_f32(12678// CHECK-SAME: <2 x float> noundef [[A:%.*]]) #[[ATTR0]] {12679// CHECK-NEXT:  [[ENTRY:.*:]]12680// CHECK-NEXT:    [[VPMAXNMS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> [[A]])12681// CHECK-NEXT:    ret float [[VPMAXNMS_F32_I]]12682//12683float32_t test_vpmaxnms_f32(float32x2_t a) {12684  return vpmaxnms_f32(a);12685}12686 12687// CHECK-LABEL: define dso_local double @test_vpmaxnmqd_f64(12688// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] {12689// CHECK-NEXT:  [[ENTRY:.*:]]12690// CHECK-NEXT:    [[VPMAXNMQD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> [[A]])12691// CHECK-NEXT:    ret double [[VPMAXNMQD_F64_I]]12692//12693float64_t test_vpmaxnmqd_f64(float64x2_t a) {12694  return vpmaxnmqd_f64(a);12695}12696 12697// CHECK-LABEL: define dso_local float @test_vpmaxs_f32(12698// CHECK-SAME: <2 x float> noundef [[A:%.*]]) #[[ATTR0]] {12699// CHECK-NEXT:  [[ENTRY:.*:]]12700// CHECK-NEXT:    [[VPMAXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float> [[A]])12701// CHECK-NEXT:    ret float [[VPMAXS_F32_I]]12702//12703float32_t test_vpmaxs_f32(float32x2_t a) {12704  return vpmaxs_f32(a);12705}12706 12707// CHECK-LABEL: define dso_local double @test_vpmaxqd_f64(12708// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] {12709// CHECK-NEXT:  [[ENTRY:.*:]]12710// CHECK-NEXT:    [[VPMAXQD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double> [[A]])12711// CHECK-NEXT:    ret double [[VPMAXQD_F64_I]]12712//12713float64_t test_vpmaxqd_f64(float64x2_t a) {12714  return vpmaxqd_f64(a);12715}12716 12717// CHECK-LABEL: define dso_local float @test_vpminnms_f32(12718// CHECK-SAME: <2 x float> noundef [[A:%.*]]) #[[ATTR0]] {12719// CHECK-NEXT:  [[ENTRY:.*:]]12720// CHECK-NEXT:    [[VPMINNMS_F32_I:%.*]] = call float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float> [[A]])12721// CHECK-NEXT:    ret float [[VPMINNMS_F32_I]]12722//12723float32_t test_vpminnms_f32(float32x2_t a) {12724  return vpminnms_f32(a);12725}12726 12727// CHECK-LABEL: define dso_local double @test_vpminnmqd_f64(12728// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] {12729// CHECK-NEXT:  [[ENTRY:.*:]]12730// CHECK-NEXT:    [[VPMINNMQD_F64_I:%.*]] = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> [[A]])12731// CHECK-NEXT:    ret double [[VPMINNMQD_F64_I]]12732//12733float64_t test_vpminnmqd_f64(float64x2_t a) {12734  return vpminnmqd_f64(a);12735}12736 12737// CHECK-LABEL: define dso_local float @test_vpmins_f32(12738// CHECK-SAME: <2 x float> noundef [[A:%.*]]) #[[ATTR0]] {12739// CHECK-NEXT:  [[ENTRY:.*:]]12740// CHECK-NEXT:    [[VPMINS_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> [[A]])12741// CHECK-NEXT:    ret float [[VPMINS_F32_I]]12742//12743float32_t test_vpmins_f32(float32x2_t a) {12744  return vpmins_f32(a);12745}12746 12747// CHECK-LABEL: define dso_local double @test_vpminqd_f64(12748// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] {12749// CHECK-NEXT:  [[ENTRY:.*:]]12750// CHECK-NEXT:    [[VPMINQD_F64_I:%.*]] = call double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double> [[A]])12751// CHECK-NEXT:    ret double [[VPMINQD_F64_I]]12752//12753float64_t test_vpminqd_f64(float64x2_t a) {12754  return vpminqd_f64(a);12755}12756 12757// CHECK-LABEL: define dso_local i16 @test_vqdmulhh_s16(12758// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12759// CHECK-NEXT:  [[ENTRY:.*:]]12760// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012761// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012762// CHECK-NEXT:    [[VQDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqdmulh.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12763// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQDMULHH_S16_I]], i64 012764// CHECK-NEXT:    ret i16 [[TMP2]]12765//12766int16_t test_vqdmulhh_s16(int16_t a, int16_t b) {12767  return vqdmulhh_s16(a, b);12768}12769 12770// CHECK-LABEL: define dso_local i32 @test_vqdmulhs_s32(12771// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12772// CHECK-NEXT:  [[ENTRY:.*:]]12773// CHECK-NEXT:    [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 [[A]], i32 [[B]])12774// CHECK-NEXT:    ret i32 [[VQDMULHS_S32_I]]12775//12776int32_t test_vqdmulhs_s32(int32_t a, int32_t b) {12777  return vqdmulhs_s32(a, b);12778}12779 12780// CHECK-LABEL: define dso_local i16 @test_vqrdmulhh_s16(12781// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {12782// CHECK-NEXT:  [[ENTRY:.*:]]12783// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 012784// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 012785// CHECK-NEXT:    [[VQRDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])12786// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VQRDMULHH_S16_I]], i64 012787// CHECK-NEXT:    ret i16 [[TMP2]]12788//12789int16_t test_vqrdmulhh_s16(int16_t a, int16_t b) {12790  return vqrdmulhh_s16(a, b);12791}12792 12793// CHECK-LABEL: define dso_local i32 @test_vqrdmulhs_s32(12794// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {12795// CHECK-NEXT:  [[ENTRY:.*:]]12796// CHECK-NEXT:    [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 [[A]], i32 [[B]])12797// CHECK-NEXT:    ret i32 [[VQRDMULHS_S32_I]]12798//12799int32_t test_vqrdmulhs_s32(int32_t a, int32_t b) {12800  return vqrdmulhs_s32(a, b);12801}12802 12803// CHECK-LABEL: define dso_local float @test_vmulxs_f32(12804// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {12805// CHECK-NEXT:  [[ENTRY:.*:]]12806// CHECK-NEXT:    [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float [[A]], float [[B]])12807// CHECK-NEXT:    ret float [[VMULXS_F32_I]]12808//12809float32_t test_vmulxs_f32(float32_t a, float32_t b) {12810  return vmulxs_f32(a, b);12811}12812 12813// CHECK-LABEL: define dso_local double @test_vmulxd_f64(12814// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {12815// CHECK-NEXT:  [[ENTRY:.*:]]12816// CHECK-NEXT:    [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[A]], double [[B]])12817// CHECK-NEXT:    ret double [[VMULXD_F64_I]]12818//12819float64_t test_vmulxd_f64(float64_t a, float64_t b) {12820  return vmulxd_f64(a, b);12821}12822 12823// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_f64(12824// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {12825// CHECK-NEXT:  [[ENTRY:.*:]]12826// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i6412827// CHECK-NEXT:    [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 012828// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B]] to i6412829// CHECK-NEXT:    [[__P1_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 012830// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>12831// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[__P1_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>12832// CHECK-NEXT:    [[VMULX_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>12833// CHECK-NEXT:    [[VMULX1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>12834// CHECK-NEXT:    [[VMULX2_I:%.*]] = call <1 x double> @llvm.aarch64.neon.fmulx.v1f64(<1 x double> [[VMULX_I]], <1 x double> [[VMULX1_I]])12835// CHECK-NEXT:    ret <1 x double> [[VMULX2_I]]12836//12837float64x1_t test_vmulx_f64(float64x1_t a, float64x1_t b) {12838  return vmulx_f64(a, b);12839}12840 12841// CHECK-LABEL: define dso_local float @test_vrecpss_f32(12842// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {12843// CHECK-NEXT:  [[ENTRY:.*:]]12844// CHECK-NEXT:    [[VRECPS_I:%.*]] = call float @llvm.aarch64.neon.frecps.f32(float [[A]], float [[B]])12845// CHECK-NEXT:    ret float [[VRECPS_I]]12846//12847float32_t test_vrecpss_f32(float32_t a, float32_t b) {12848  return vrecpss_f32(a, b);12849}12850 12851// CHECK-LABEL: define dso_local double @test_vrecpsd_f64(12852// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {12853// CHECK-NEXT:  [[ENTRY:.*:]]12854// CHECK-NEXT:    [[VRECPS_I:%.*]] = call double @llvm.aarch64.neon.frecps.f64(double [[A]], double [[B]])12855// CHECK-NEXT:    ret double [[VRECPS_I]]12856//12857float64_t test_vrecpsd_f64(float64_t a, float64_t b) {12858  return vrecpsd_f64(a, b);12859}12860 12861// CHECK-LABEL: define dso_local float @test_vrsqrtss_f32(12862// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {12863// CHECK-NEXT:  [[ENTRY:.*:]]12864// CHECK-NEXT:    [[VRSQRTSS_F32_I:%.*]] = call float @llvm.aarch64.neon.frsqrts.f32(float [[A]], float [[B]])12865// CHECK-NEXT:    ret float [[VRSQRTSS_F32_I]]12866//12867float32_t test_vrsqrtss_f32(float32_t a, float32_t b) {12868  return vrsqrtss_f32(a, b);12869}12870 12871// CHECK-LABEL: define dso_local double @test_vrsqrtsd_f64(12872// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {12873// CHECK-NEXT:  [[ENTRY:.*:]]12874// CHECK-NEXT:    [[VRSQRTSD_F64_I:%.*]] = call double @llvm.aarch64.neon.frsqrts.f64(double [[A]], double [[B]])12875// CHECK-NEXT:    ret double [[VRSQRTSD_F64_I]]12876//12877float64_t test_vrsqrtsd_f64(float64_t a, float64_t b) {12878  return vrsqrtsd_f64(a, b);12879}12880 12881// CHECK-LABEL: define dso_local float @test_vcvts_f32_s32(12882// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {12883// CHECK-NEXT:  [[ENTRY:.*:]]12884// CHECK-NEXT:    [[TMP0:%.*]] = sitofp i32 [[A]] to float12885// CHECK-NEXT:    ret float [[TMP0]]12886//12887float32_t test_vcvts_f32_s32(int32_t a) {12888  return vcvts_f32_s32(a);12889}12890 12891// CHECK-LABEL: define dso_local double @test_vcvtd_f64_s64(12892// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {12893// CHECK-NEXT:  [[ENTRY:.*:]]12894// CHECK-NEXT:    [[TMP0:%.*]] = sitofp i64 [[A]] to double12895// CHECK-NEXT:    ret double [[TMP0]]12896//12897float64_t test_vcvtd_f64_s64(int64_t a) {12898  return vcvtd_f64_s64(a);12899}12900 12901// CHECK-LABEL: define dso_local float @test_vcvts_f32_u32(12902// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {12903// CHECK-NEXT:  [[ENTRY:.*:]]12904// CHECK-NEXT:    [[TMP0:%.*]] = uitofp i32 [[A]] to float12905// CHECK-NEXT:    ret float [[TMP0]]12906//12907float32_t test_vcvts_f32_u32(uint32_t a) {12908  return vcvts_f32_u32(a);12909}12910 12911// CHECK-LABEL: define dso_local double @test_vcvtd_f64_u64(12912// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {12913// CHECK-NEXT:  [[ENTRY:.*:]]12914// CHECK-NEXT:    [[TMP0:%.*]] = uitofp i64 [[A]] to double12915// CHECK-NEXT:    ret double [[TMP0]]12916//12917float64_t test_vcvtd_f64_u64(uint64_t a) {12918  return vcvtd_f64_u64(a);12919}12920 12921// CHECK-LABEL: define dso_local float @test_vrecpes_f32(12922// CHECK-SAME: float noundef [[A:%.*]]) #[[ATTR0]] {12923// CHECK-NEXT:  [[ENTRY:.*:]]12924// CHECK-NEXT:    [[VRECPES_F32_I:%.*]] = call float @llvm.aarch64.neon.frecpe.f32(float [[A]])12925// CHECK-NEXT:    ret float [[VRECPES_F32_I]]12926//12927float32_t test_vrecpes_f32(float32_t a) {12928  return vrecpes_f32(a);12929}12930 12931// CHECK-LABEL: define dso_local double @test_vrecped_f64(12932// CHECK-SAME: double noundef [[A:%.*]]) #[[ATTR0]] {12933// CHECK-NEXT:  [[ENTRY:.*:]]12934// CHECK-NEXT:    [[VRECPED_F64_I:%.*]] = call double @llvm.aarch64.neon.frecpe.f64(double [[A]])12935// CHECK-NEXT:    ret double [[VRECPED_F64_I]]12936//12937float64_t test_vrecped_f64(float64_t a) {12938  return vrecped_f64(a);12939}12940 12941// CHECK-LABEL: define dso_local float @test_vrecpxs_f32(12942// CHECK-SAME: float noundef [[A:%.*]]) #[[ATTR0]] {12943// CHECK-NEXT:  [[ENTRY:.*:]]12944// CHECK-NEXT:    [[VRECPXS_F32_I:%.*]] = call float @llvm.aarch64.neon.frecpx.f32(float [[A]])12945// CHECK-NEXT:    ret float [[VRECPXS_F32_I]]12946//12947float32_t test_vrecpxs_f32(float32_t a) {12948  return vrecpxs_f32(a);12949}12950 12951// CHECK-LABEL: define dso_local double @test_vrecpxd_f64(12952// CHECK-SAME: double noundef [[A:%.*]]) #[[ATTR0]] {12953// CHECK-NEXT:  [[ENTRY:.*:]]12954// CHECK-NEXT:    [[VRECPXD_F64_I:%.*]] = call double @llvm.aarch64.neon.frecpx.f64(double [[A]])12955// CHECK-NEXT:    ret double [[VRECPXD_F64_I]]12956//12957float64_t test_vrecpxd_f64(float64_t a) {12958  return vrecpxd_f64(a);12959}12960 12961// CHECK-LABEL: define dso_local <2 x i32> @test_vrsqrte_u32(12962// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {12963// CHECK-NEXT:  [[ENTRY:.*:]]12964// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>12965// CHECK-NEXT:    [[VRSQRTE_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>12966// CHECK-NEXT:    [[VRSQRTE_V1_I:%.*]] = call <2 x i32> @llvm.aarch64.neon.ursqrte.v2i32(<2 x i32> [[VRSQRTE_V_I]])12967// CHECK-NEXT:    ret <2 x i32> [[VRSQRTE_V1_I]]12968//12969uint32x2_t test_vrsqrte_u32(uint32x2_t a) {12970  return vrsqrte_u32(a);12971}12972 12973// CHECK-LABEL: define dso_local <4 x i32> @test_vrsqrteq_u32(12974// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {12975// CHECK-NEXT:  [[ENTRY:.*:]]12976// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>12977// CHECK-NEXT:    [[VRSQRTEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>12978// CHECK-NEXT:    [[VRSQRTEQ_V1_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.ursqrte.v4i32(<4 x i32> [[VRSQRTEQ_V_I]])12979// CHECK-NEXT:    ret <4 x i32> [[VRSQRTEQ_V1_I]]12980//12981uint32x4_t test_vrsqrteq_u32(uint32x4_t a) {12982  return vrsqrteq_u32(a);12983}12984 12985// CHECK-LABEL: define dso_local float @test_vrsqrtes_f32(12986// CHECK-SAME: float noundef [[A:%.*]]) #[[ATTR0]] {12987// CHECK-NEXT:  [[ENTRY:.*:]]12988// CHECK-NEXT:    [[VRSQRTES_F32_I:%.*]] = call float @llvm.aarch64.neon.frsqrte.f32(float [[A]])12989// CHECK-NEXT:    ret float [[VRSQRTES_F32_I]]12990//12991float32_t test_vrsqrtes_f32(float32_t a) {12992  return vrsqrtes_f32(a);12993}12994 12995// CHECK-LABEL: define dso_local double @test_vrsqrted_f64(12996// CHECK-SAME: double noundef [[A:%.*]]) #[[ATTR0]] {12997// CHECK-NEXT:  [[ENTRY:.*:]]12998// CHECK-NEXT:    [[VRSQRTED_F64_I:%.*]] = call double @llvm.aarch64.neon.frsqrte.f64(double [[A]])12999// CHECK-NEXT:    ret double [[VRSQRTED_F64_I]]13000//13001float64_t test_vrsqrted_f64(float64_t a) {13002  return vrsqrted_f64(a);13003}13004 13005// CHECK-LABEL: define dso_local <16 x i8> @test_vld1q_u8(13006// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13007// CHECK-NEXT:  [[ENTRY:.*:]]13008// CHECK-NEXT:    [[TMP0:%.*]] = load <16 x i8>, ptr [[A]], align 113009// CHECK-NEXT:    ret <16 x i8> [[TMP0]]13010//13011uint8x16_t test_vld1q_u8(uint8_t const *a) {13012  return vld1q_u8(a);13013}13014 13015// CHECK-LABEL: define dso_local <8 x i16> @test_vld1q_u16(13016// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13017// CHECK-NEXT:  [[ENTRY:.*:]]13018// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i16>, ptr [[A]], align 213019// CHECK-NEXT:    ret <8 x i16> [[TMP0]]13020//13021uint16x8_t test_vld1q_u16(uint16_t const *a) {13022  return vld1q_u16(a);13023}13024 13025// CHECK-LABEL: define dso_local <4 x i32> @test_vld1q_u32(13026// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13027// CHECK-NEXT:  [[ENTRY:.*:]]13028// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i32>, ptr [[A]], align 413029// CHECK-NEXT:    ret <4 x i32> [[TMP0]]13030//13031uint32x4_t test_vld1q_u32(uint32_t const *a) {13032  return vld1q_u32(a);13033}13034 13035// CHECK-LABEL: define dso_local <2 x i64> @test_vld1q_u64(13036// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13037// CHECK-NEXT:  [[ENTRY:.*:]]13038// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i64>, ptr [[A]], align 813039// CHECK-NEXT:    ret <2 x i64> [[TMP0]]13040//13041uint64x2_t test_vld1q_u64(uint64_t const *a) {13042  return vld1q_u64(a);13043}13044 13045// CHECK-LABEL: define dso_local <16 x i8> @test_vld1q_s8(13046// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13047// CHECK-NEXT:  [[ENTRY:.*:]]13048// CHECK-NEXT:    [[TMP0:%.*]] = load <16 x i8>, ptr [[A]], align 113049// CHECK-NEXT:    ret <16 x i8> [[TMP0]]13050//13051int8x16_t test_vld1q_s8(int8_t const *a) {13052  return vld1q_s8(a);13053}13054 13055// CHECK-LABEL: define dso_local <8 x i16> @test_vld1q_s16(13056// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13057// CHECK-NEXT:  [[ENTRY:.*:]]13058// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i16>, ptr [[A]], align 213059// CHECK-NEXT:    ret <8 x i16> [[TMP0]]13060//13061int16x8_t test_vld1q_s16(int16_t const *a) {13062  return vld1q_s16(a);13063}13064 13065// CHECK-LABEL: define dso_local <4 x i32> @test_vld1q_s32(13066// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13067// CHECK-NEXT:  [[ENTRY:.*:]]13068// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i32>, ptr [[A]], align 413069// CHECK-NEXT:    ret <4 x i32> [[TMP0]]13070//13071int32x4_t test_vld1q_s32(int32_t const *a) {13072  return vld1q_s32(a);13073}13074 13075// CHECK-LABEL: define dso_local <2 x i64> @test_vld1q_s64(13076// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13077// CHECK-NEXT:  [[ENTRY:.*:]]13078// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i64>, ptr [[A]], align 813079// CHECK-NEXT:    ret <2 x i64> [[TMP0]]13080//13081int64x2_t test_vld1q_s64(int64_t const *a) {13082  return vld1q_s64(a);13083}13084 13085// CHECK-LABEL: define dso_local <8 x half> @test_vld1q_f16(13086// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13087// CHECK-NEXT:  [[ENTRY:.*:]]13088// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x half>, ptr [[A]], align 213089// CHECK-NEXT:    ret <8 x half> [[TMP0]]13090//13091float16x8_t test_vld1q_f16(float16_t const *a) {13092  return vld1q_f16(a);13093}13094 13095// CHECK-LABEL: define dso_local <4 x float> @test_vld1q_f32(13096// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13097// CHECK-NEXT:  [[ENTRY:.*:]]13098// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 413099// CHECK-NEXT:    ret <4 x float> [[TMP0]]13100//13101float32x4_t test_vld1q_f32(float32_t const *a) {13102  return vld1q_f32(a);13103}13104 13105// CHECK-LABEL: define dso_local <2 x double> @test_vld1q_f64(13106// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13107// CHECK-NEXT:  [[ENTRY:.*:]]13108// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x double>, ptr [[A]], align 813109// CHECK-NEXT:    ret <2 x double> [[TMP0]]13110//13111float64x2_t test_vld1q_f64(float64_t const *a) {13112  return vld1q_f64(a);13113}13114 13115// CHECK-LABEL: define dso_local <16 x i8> @test_vld1q_mf8(13116// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13117// CHECK-NEXT:  [[ENTRY:.*:]]13118// CHECK-NEXT:    [[TMP0:%.*]] = load <16 x i8>, ptr [[A]], align 113119// CHECK-NEXT:    ret <16 x i8> [[TMP0]]13120//13121mfloat8x16_t test_vld1q_mf8(mfloat8_t const *a) {13122  return vld1q_mf8(a);13123}13124 13125// CHECK-LABEL: define dso_local <16 x i8> @test_vld1q_p8(13126// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13127// CHECK-NEXT:  [[ENTRY:.*:]]13128// CHECK-NEXT:    [[TMP0:%.*]] = load <16 x i8>, ptr [[A]], align 113129// CHECK-NEXT:    ret <16 x i8> [[TMP0]]13130//13131poly8x16_t test_vld1q_p8(poly8_t const *a) {13132  return vld1q_p8(a);13133}13134 13135// CHECK-LABEL: define dso_local <8 x i16> @test_vld1q_p16(13136// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13137// CHECK-NEXT:  [[ENTRY:.*:]]13138// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i16>, ptr [[A]], align 213139// CHECK-NEXT:    ret <8 x i16> [[TMP0]]13140//13141poly16x8_t test_vld1q_p16(poly16_t const *a) {13142  return vld1q_p16(a);13143}13144 13145// CHECK-LABEL: define dso_local <8 x i8> @test_vld1_u8(13146// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13147// CHECK-NEXT:  [[ENTRY:.*:]]13148// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[A]], align 113149// CHECK-NEXT:    ret <8 x i8> [[TMP0]]13150//13151uint8x8_t test_vld1_u8(uint8_t const *a) {13152  return vld1_u8(a);13153}13154 13155// CHECK-LABEL: define dso_local <4 x i16> @test_vld1_u16(13156// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13157// CHECK-NEXT:  [[ENTRY:.*:]]13158// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 213159// CHECK-NEXT:    ret <4 x i16> [[TMP0]]13160//13161uint16x4_t test_vld1_u16(uint16_t const *a) {13162  return vld1_u16(a);13163}13164 13165// CHECK-LABEL: define dso_local <2 x i32> @test_vld1_u32(13166// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13167// CHECK-NEXT:  [[ENTRY:.*:]]13168// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i32>, ptr [[A]], align 413169// CHECK-NEXT:    ret <2 x i32> [[TMP0]]13170//13171uint32x2_t test_vld1_u32(uint32_t const *a) {13172  return vld1_u32(a);13173}13174 13175// CHECK-LABEL: define dso_local <1 x i64> @test_vld1_u64(13176// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13177// CHECK-NEXT:  [[ENTRY:.*:]]13178// CHECK-NEXT:    [[TMP0:%.*]] = load <1 x i64>, ptr [[A]], align 813179// CHECK-NEXT:    ret <1 x i64> [[TMP0]]13180//13181uint64x1_t test_vld1_u64(uint64_t const *a) {13182  return vld1_u64(a);13183}13184 13185// CHECK-LABEL: define dso_local <8 x i8> @test_vld1_s8(13186// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13187// CHECK-NEXT:  [[ENTRY:.*:]]13188// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[A]], align 113189// CHECK-NEXT:    ret <8 x i8> [[TMP0]]13190//13191int8x8_t test_vld1_s8(int8_t const *a) {13192  return vld1_s8(a);13193}13194 13195// CHECK-LABEL: define dso_local <4 x i16> @test_vld1_s16(13196// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13197// CHECK-NEXT:  [[ENTRY:.*:]]13198// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 213199// CHECK-NEXT:    ret <4 x i16> [[TMP0]]13200//13201int16x4_t test_vld1_s16(int16_t const *a) {13202  return vld1_s16(a);13203}13204 13205// CHECK-LABEL: define dso_local <2 x i32> @test_vld1_s32(13206// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13207// CHECK-NEXT:  [[ENTRY:.*:]]13208// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i32>, ptr [[A]], align 413209// CHECK-NEXT:    ret <2 x i32> [[TMP0]]13210//13211int32x2_t test_vld1_s32(int32_t const *a) {13212  return vld1_s32(a);13213}13214 13215// CHECK-LABEL: define dso_local <1 x i64> @test_vld1_s64(13216// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13217// CHECK-NEXT:  [[ENTRY:.*:]]13218// CHECK-NEXT:    [[TMP0:%.*]] = load <1 x i64>, ptr [[A]], align 813219// CHECK-NEXT:    ret <1 x i64> [[TMP0]]13220//13221int64x1_t test_vld1_s64(int64_t const *a) {13222  return vld1_s64(a);13223}13224 13225// CHECK-LABEL: define dso_local <4 x half> @test_vld1_f16(13226// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13227// CHECK-NEXT:  [[ENTRY:.*:]]13228// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x half>, ptr [[A]], align 213229// CHECK-NEXT:    ret <4 x half> [[TMP0]]13230//13231float16x4_t test_vld1_f16(float16_t const *a) {13232  return vld1_f16(a);13233}13234 13235// CHECK-LABEL: define dso_local <2 x float> @test_vld1_f32(13236// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13237// CHECK-NEXT:  [[ENTRY:.*:]]13238// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x float>, ptr [[A]], align 413239// CHECK-NEXT:    ret <2 x float> [[TMP0]]13240//13241float32x2_t test_vld1_f32(float32_t const *a) {13242  return vld1_f32(a);13243}13244 13245// CHECK-LABEL: define dso_local <1 x double> @test_vld1_f64(13246// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13247// CHECK-NEXT:  [[ENTRY:.*:]]13248// CHECK-NEXT:    [[TMP0:%.*]] = load <1 x double>, ptr [[A]], align 813249// CHECK-NEXT:    ret <1 x double> [[TMP0]]13250//13251float64x1_t test_vld1_f64(float64_t const *a) {13252  return vld1_f64(a);13253}13254 13255// CHECK-LABEL: define dso_local <8 x i8> @test_vld1_mf8(13256// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13257// CHECK-NEXT:  [[ENTRY:.*:]]13258// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[A]], align 113259// CHECK-NEXT:    ret <8 x i8> [[TMP0]]13260//13261mfloat8x8_t test_vld1_mf8(mfloat8_t const *a) {13262  return vld1_mf8(a);13263}13264 13265// CHECK-LABEL: define dso_local <8 x i8> @test_vld1_p8(13266// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13267// CHECK-NEXT:  [[ENTRY:.*:]]13268// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[A]], align 113269// CHECK-NEXT:    ret <8 x i8> [[TMP0]]13270//13271poly8x8_t test_vld1_p8(poly8_t const *a) {13272  return vld1_p8(a);13273}13274 13275// CHECK-LABEL: define dso_local <4 x i16> @test_vld1_p16(13276// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13277// CHECK-NEXT:  [[ENTRY:.*:]]13278// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 213279// CHECK-NEXT:    ret <4 x i16> [[TMP0]]13280//13281poly16x4_t test_vld1_p16(poly16_t const *a) {13282  return vld1_p16(a);13283}13284 13285// CHECK-LABEL: define dso_local <8 x i8> @test_vld1_u8_void(13286// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13287// CHECK-NEXT:  [[ENTRY:.*:]]13288// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[A]], align 113289// CHECK-NEXT:    ret <8 x i8> [[TMP0]]13290//13291uint8x8_t test_vld1_u8_void(void *a) {13292  return vld1_u8(a);13293}13294 13295// CHECK-LABEL: define dso_local <4 x i16> @test_vld1_u16_void(13296// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13297// CHECK-NEXT:  [[ENTRY:.*:]]13298// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 113299// CHECK-NEXT:    ret <4 x i16> [[TMP0]]13300//13301uint16x4_t test_vld1_u16_void(void *a) {13302  return vld1_u16(a);13303}13304 13305// CHECK-LABEL: define dso_local <2 x i32> @test_vld1_u32_void(13306// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13307// CHECK-NEXT:  [[ENTRY:.*:]]13308// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i32>, ptr [[A]], align 113309// CHECK-NEXT:    ret <2 x i32> [[TMP0]]13310//13311uint32x2_t test_vld1_u32_void(void *a) {13312  return vld1_u32(a);13313}13314 13315// CHECK-LABEL: define dso_local <1 x i64> @test_vld1_u64_void(13316// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13317// CHECK-NEXT:  [[ENTRY:.*:]]13318// CHECK-NEXT:    [[TMP0:%.*]] = load <1 x i64>, ptr [[A]], align 113319// CHECK-NEXT:    ret <1 x i64> [[TMP0]]13320//13321uint64x1_t test_vld1_u64_void(void *a) {13322  return vld1_u64(a);13323}13324 13325// CHECK-LABEL: define dso_local <8 x i8> @test_vld1_s8_void(13326// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13327// CHECK-NEXT:  [[ENTRY:.*:]]13328// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[A]], align 113329// CHECK-NEXT:    ret <8 x i8> [[TMP0]]13330//13331int8x8_t test_vld1_s8_void(void *a) {13332  return vld1_s8(a);13333}13334 13335// CHECK-LABEL: define dso_local <4 x i16> @test_vld1_s16_void(13336// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13337// CHECK-NEXT:  [[ENTRY:.*:]]13338// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 113339// CHECK-NEXT:    ret <4 x i16> [[TMP0]]13340//13341int16x4_t test_vld1_s16_void(void *a) {13342  return vld1_s16(a);13343}13344 13345// CHECK-LABEL: define dso_local <2 x i32> @test_vld1_s32_void(13346// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13347// CHECK-NEXT:  [[ENTRY:.*:]]13348// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i32>, ptr [[A]], align 113349// CHECK-NEXT:    ret <2 x i32> [[TMP0]]13350//13351int32x2_t test_vld1_s32_void(void *a) {13352  return vld1_s32(a);13353}13354 13355// CHECK-LABEL: define dso_local <1 x i64> @test_vld1_s64_void(13356// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13357// CHECK-NEXT:  [[ENTRY:.*:]]13358// CHECK-NEXT:    [[TMP0:%.*]] = load <1 x i64>, ptr [[A]], align 113359// CHECK-NEXT:    ret <1 x i64> [[TMP0]]13360//13361int64x1_t test_vld1_s64_void(void *a) {13362  return vld1_s64(a);13363}13364 13365// CHECK-LABEL: define dso_local <4 x half> @test_vld1_f16_void(13366// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13367// CHECK-NEXT:  [[ENTRY:.*:]]13368// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x half>, ptr [[A]], align 113369// CHECK-NEXT:    ret <4 x half> [[TMP0]]13370//13371float16x4_t test_vld1_f16_void(void *a) {13372  return vld1_f16(a);13373}13374 13375// CHECK-LABEL: define dso_local <2 x float> @test_vld1_f32_void(13376// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13377// CHECK-NEXT:  [[ENTRY:.*:]]13378// CHECK-NEXT:    [[TMP0:%.*]] = load <2 x float>, ptr [[A]], align 113379// CHECK-NEXT:    ret <2 x float> [[TMP0]]13380//13381float32x2_t test_vld1_f32_void(void *a) {13382  return vld1_f32(a);13383}13384 13385// CHECK-LABEL: define dso_local <1 x double> @test_vld1_f64_void(13386// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13387// CHECK-NEXT:  [[ENTRY:.*:]]13388// CHECK-NEXT:    [[TMP0:%.*]] = load <1 x double>, ptr [[A]], align 113389// CHECK-NEXT:    ret <1 x double> [[TMP0]]13390//13391float64x1_t test_vld1_f64_void(void *a) {13392  return vld1_f64(a);13393}13394 13395// CHECK-LABEL: define dso_local <8 x i8> @test_vld1_p8_void(13396// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13397// CHECK-NEXT:  [[ENTRY:.*:]]13398// CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[A]], align 113399// CHECK-NEXT:    ret <8 x i8> [[TMP0]]13400//13401poly8x8_t test_vld1_p8_void(void *a) {13402  return vld1_p8(a);13403}13404 13405// CHECK-LABEL: define dso_local <4 x i16> @test_vld1_p16_void(13406// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13407// CHECK-NEXT:  [[ENTRY:.*:]]13408// CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 113409// CHECK-NEXT:    ret <4 x i16> [[TMP0]]13410//13411poly16x4_t test_vld1_p16_void(void *a) {13412  return vld1_p16(a);13413}13414 13415// CHECK-LABEL: define dso_local %struct.uint8x16x2_t @test_vld2q_u8(13416// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13417// CHECK-NEXT:  [[ENTRY:.*:]]13418// CHECK-NEXT:    [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])13419// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 013420// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 113421// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 013422// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 113423// CHECK-NEXT:    ret [[STRUCT_UINT8X16X2_T]] [[DOTFCA_0_1_INSERT]]13424//13425uint8x16x2_t test_vld2q_u8(uint8_t const *a) {13426  return vld2q_u8(a);13427}13428 13429// CHECK-LABEL: define dso_local %struct.uint16x8x2_t @test_vld2q_u16(13430// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13431// CHECK-NEXT:  [[ENTRY:.*:]]13432// CHECK-NEXT:    [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])13433// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 013434// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 113435// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 013436// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 113437// CHECK-NEXT:    ret [[STRUCT_UINT16X8X2_T]] [[DOTFCA_0_1_INSERT]]13438//13439uint16x8x2_t test_vld2q_u16(uint16_t const *a) {13440  return vld2q_u16(a);13441}13442 13443// CHECK-LABEL: define dso_local %struct.uint32x4x2_t @test_vld2q_u32(13444// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13445// CHECK-NEXT:  [[ENTRY:.*:]]13446// CHECK-NEXT:    [[VLD2:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr [[A]])13447// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2]], 013448// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2]], 113449// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X2_T:%.*]] poison, <4 x i32> [[VLD2_FCA_0_EXTRACT]], 0, 013450// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD2_FCA_1_EXTRACT]], 0, 113451// CHECK-NEXT:    ret [[STRUCT_UINT32X4X2_T]] [[DOTFCA_0_1_INSERT]]13452//13453uint32x4x2_t test_vld2q_u32(uint32_t const *a) {13454  return vld2q_u32(a);13455}13456 13457// CHECK-LABEL: define dso_local %struct.uint64x2x2_t @test_vld2q_u64(13458// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13459// CHECK-NEXT:  [[ENTRY:.*:]]13460// CHECK-NEXT:    [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr [[A]])13461// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 013462// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 113463// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 013464// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 113465// CHECK-NEXT:    ret [[STRUCT_UINT64X2X2_T]] [[DOTFCA_0_1_INSERT]]13466//13467uint64x2x2_t test_vld2q_u64(uint64_t const *a) {13468  return vld2q_u64(a);13469}13470 13471// CHECK-LABEL: define dso_local %struct.int8x16x2_t @test_vld2q_s8(13472// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13473// CHECK-NEXT:  [[ENTRY:.*:]]13474// CHECK-NEXT:    [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])13475// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 013476// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 113477// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 013478// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 113479// CHECK-NEXT:    ret [[STRUCT_INT8X16X2_T]] [[DOTFCA_0_1_INSERT]]13480//13481int8x16x2_t test_vld2q_s8(int8_t const *a) {13482  return vld2q_s8(a);13483}13484 13485// CHECK-LABEL: define dso_local %struct.int16x8x2_t @test_vld2q_s16(13486// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13487// CHECK-NEXT:  [[ENTRY:.*:]]13488// CHECK-NEXT:    [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])13489// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 013490// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 113491// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 013492// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 113493// CHECK-NEXT:    ret [[STRUCT_INT16X8X2_T]] [[DOTFCA_0_1_INSERT]]13494//13495int16x8x2_t test_vld2q_s16(int16_t const *a) {13496  return vld2q_s16(a);13497}13498 13499// CHECK-LABEL: define dso_local %struct.int32x4x2_t @test_vld2q_s32(13500// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13501// CHECK-NEXT:  [[ENTRY:.*:]]13502// CHECK-NEXT:    [[VLD2:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr [[A]])13503// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2]], 013504// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[VLD2]], 113505// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X2_T:%.*]] poison, <4 x i32> [[VLD2_FCA_0_EXTRACT]], 0, 013506// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD2_FCA_1_EXTRACT]], 0, 113507// CHECK-NEXT:    ret [[STRUCT_INT32X4X2_T]] [[DOTFCA_0_1_INSERT]]13508//13509int32x4x2_t test_vld2q_s32(int32_t const *a) {13510  return vld2q_s32(a);13511}13512 13513// CHECK-LABEL: define dso_local %struct.int64x2x2_t @test_vld2q_s64(13514// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13515// CHECK-NEXT:  [[ENTRY:.*:]]13516// CHECK-NEXT:    [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr [[A]])13517// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 013518// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD2]], 113519// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X2_T:%.*]] poison, <2 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 013520// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 113521// CHECK-NEXT:    ret [[STRUCT_INT64X2X2_T]] [[DOTFCA_0_1_INSERT]]13522//13523int64x2x2_t test_vld2q_s64(int64_t const *a) {13524  return vld2q_s64(a);13525}13526 13527// CHECK-LABEL: define dso_local %struct.float16x8x2_t @test_vld2q_f16(13528// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13529// CHECK-NEXT:  [[ENTRY:.*:]]13530// CHECK-NEXT:    [[VLD2:%.*]] = call { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2.v8f16.p0(ptr [[A]])13531// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half> } [[VLD2]], 013532// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half> } [[VLD2]], 113533// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X2_T:%.*]] poison, <8 x half> [[VLD2_FCA_0_EXTRACT]], 0, 013534// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD2_FCA_1_EXTRACT]], 0, 113535// CHECK-NEXT:    ret [[STRUCT_FLOAT16X8X2_T]] [[DOTFCA_0_1_INSERT]]13536//13537float16x8x2_t test_vld2q_f16(float16_t const *a) {13538  return vld2q_f16(a);13539}13540 13541// CHECK-LABEL: define dso_local %struct.float32x4x2_t @test_vld2q_f32(13542// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13543// CHECK-NEXT:  [[ENTRY:.*:]]13544// CHECK-NEXT:    [[VLD2:%.*]] = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr [[A]])13545// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float> } [[VLD2]], 013546// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float> } [[VLD2]], 113547// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X2_T:%.*]] poison, <4 x float> [[VLD2_FCA_0_EXTRACT]], 0, 013548// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD2_FCA_1_EXTRACT]], 0, 113549// CHECK-NEXT:    ret [[STRUCT_FLOAT32X4X2_T]] [[DOTFCA_0_1_INSERT]]13550//13551float32x4x2_t test_vld2q_f32(float32_t const *a) {13552  return vld2q_f32(a);13553}13554 13555// CHECK-LABEL: define dso_local %struct.float64x2x2_t @test_vld2q_f64(13556// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13557// CHECK-NEXT:  [[ENTRY:.*:]]13558// CHECK-NEXT:    [[VLD2:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr [[A]])13559// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD2]], 013560// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD2]], 113561// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T:%.*]] poison, <2 x double> [[VLD2_FCA_0_EXTRACT]], 0, 013562// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD2_FCA_1_EXTRACT]], 0, 113563// CHECK-NEXT:    ret [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_1_INSERT]]13564//13565float64x2x2_t test_vld2q_f64(float64_t const *a) {13566  return vld2q_f64(a);13567}13568 13569// CHECK-LABEL: define dso_local %struct.mfloat8x16x2_t @test_vld2q_mf8(13570// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13571// CHECK-NEXT:  [[ENTRY:.*:]]13572// CHECK-NEXT:    [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])13573// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 013574// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 113575// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 013576// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 113577// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_1_INSERT]]13578//13579mfloat8x16x2_t test_vld2q_mf8(mfloat8_t const *a) {13580  return vld2q_mf8(a);13581}13582 13583// CHECK-LABEL: define dso_local %struct.poly8x16x2_t @test_vld2q_p8(13584// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13585// CHECK-NEXT:  [[ENTRY:.*:]]13586// CHECK-NEXT:    [[VLD2:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr [[A]])13587// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 013588// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD2]], 113589// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X2_T:%.*]] poison, <16 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 013590// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 113591// CHECK-NEXT:    ret [[STRUCT_POLY8X16X2_T]] [[DOTFCA_0_1_INSERT]]13592//13593poly8x16x2_t test_vld2q_p8(poly8_t const *a) {13594  return vld2q_p8(a);13595}13596 13597// CHECK-LABEL: define dso_local %struct.poly16x8x2_t @test_vld2q_p16(13598// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13599// CHECK-NEXT:  [[ENTRY:.*:]]13600// CHECK-NEXT:    [[VLD2:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr [[A]])13601// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 013602// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16> } [[VLD2]], 113603// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X2_T:%.*]] poison, <8 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 013604// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 113605// CHECK-NEXT:    ret [[STRUCT_POLY16X8X2_T]] [[DOTFCA_0_1_INSERT]]13606//13607poly16x8x2_t test_vld2q_p16(poly16_t const *a) {13608  return vld2q_p16(a);13609}13610 13611// CHECK-LABEL: define dso_local %struct.uint8x8x2_t @test_vld2_u8(13612// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13613// CHECK-NEXT:  [[ENTRY:.*:]]13614// CHECK-NEXT:    [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])13615// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 013616// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 113617// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 013618// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 113619// CHECK-NEXT:    ret [[STRUCT_UINT8X8X2_T]] [[DOTFCA_0_1_INSERT]]13620//13621uint8x8x2_t test_vld2_u8(uint8_t const *a) {13622  return vld2_u8(a);13623}13624 13625// CHECK-LABEL: define dso_local %struct.uint16x4x2_t @test_vld2_u16(13626// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13627// CHECK-NEXT:  [[ENTRY:.*:]]13628// CHECK-NEXT:    [[VLD2:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])13629// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 013630// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 113631// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 013632// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 113633// CHECK-NEXT:    ret [[STRUCT_UINT16X4X2_T]] [[DOTFCA_0_1_INSERT]]13634//13635uint16x4x2_t test_vld2_u16(uint16_t const *a) {13636  return vld2_u16(a);13637}13638 13639// CHECK-LABEL: define dso_local %struct.uint32x2x2_t @test_vld2_u32(13640// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13641// CHECK-NEXT:  [[ENTRY:.*:]]13642// CHECK-NEXT:    [[VLD2:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr [[A]])13643// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2]], 013644// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2]], 113645// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X2_T:%.*]] poison, <2 x i32> [[VLD2_FCA_0_EXTRACT]], 0, 013646// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD2_FCA_1_EXTRACT]], 0, 113647// CHECK-NEXT:    ret [[STRUCT_UINT32X2X2_T]] [[DOTFCA_0_1_INSERT]]13648//13649uint32x2x2_t test_vld2_u32(uint32_t const *a) {13650  return vld2_u32(a);13651}13652 13653// CHECK-LABEL: define dso_local %struct.uint64x1x2_t @test_vld2_u64(13654// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13655// CHECK-NEXT:  [[ENTRY:.*:]]13656// CHECK-NEXT:    [[VLD2:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr [[A]])13657// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 013658// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 113659// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 013660// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 113661// CHECK-NEXT:    ret [[STRUCT_UINT64X1X2_T]] [[DOTFCA_0_1_INSERT]]13662//13663uint64x1x2_t test_vld2_u64(uint64_t const *a) {13664  return vld2_u64(a);13665}13666 13667// CHECK-LABEL: define dso_local %struct.int8x8x2_t @test_vld2_s8(13668// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13669// CHECK-NEXT:  [[ENTRY:.*:]]13670// CHECK-NEXT:    [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])13671// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 013672// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 113673// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 013674// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 113675// CHECK-NEXT:    ret [[STRUCT_INT8X8X2_T]] [[DOTFCA_0_1_INSERT]]13676//13677int8x8x2_t test_vld2_s8(int8_t const *a) {13678  return vld2_s8(a);13679}13680 13681// CHECK-LABEL: define dso_local %struct.int16x4x2_t @test_vld2_s16(13682// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13683// CHECK-NEXT:  [[ENTRY:.*:]]13684// CHECK-NEXT:    [[VLD2:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])13685// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 013686// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 113687// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 013688// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 113689// CHECK-NEXT:    ret [[STRUCT_INT16X4X2_T]] [[DOTFCA_0_1_INSERT]]13690//13691int16x4x2_t test_vld2_s16(int16_t const *a) {13692  return vld2_s16(a);13693}13694 13695// CHECK-LABEL: define dso_local %struct.int32x2x2_t @test_vld2_s32(13696// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13697// CHECK-NEXT:  [[ENTRY:.*:]]13698// CHECK-NEXT:    [[VLD2:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr [[A]])13699// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2]], 013700// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[VLD2]], 113701// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X2_T:%.*]] poison, <2 x i32> [[VLD2_FCA_0_EXTRACT]], 0, 013702// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD2_FCA_1_EXTRACT]], 0, 113703// CHECK-NEXT:    ret [[STRUCT_INT32X2X2_T]] [[DOTFCA_0_1_INSERT]]13704//13705int32x2x2_t test_vld2_s32(int32_t const *a) {13706  return vld2_s32(a);13707}13708 13709// CHECK-LABEL: define dso_local %struct.int64x1x2_t @test_vld2_s64(13710// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13711// CHECK-NEXT:  [[ENTRY:.*:]]13712// CHECK-NEXT:    [[VLD2:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr [[A]])13713// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 013714// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD2]], 113715// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X2_T:%.*]] poison, <1 x i64> [[VLD2_FCA_0_EXTRACT]], 0, 013716// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD2_FCA_1_EXTRACT]], 0, 113717// CHECK-NEXT:    ret [[STRUCT_INT64X1X2_T]] [[DOTFCA_0_1_INSERT]]13718//13719int64x1x2_t test_vld2_s64(int64_t const *a) {13720  return vld2_s64(a);13721}13722 13723// CHECK-LABEL: define dso_local %struct.float16x4x2_t @test_vld2_f16(13724// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13725// CHECK-NEXT:  [[ENTRY:.*:]]13726// CHECK-NEXT:    [[VLD2:%.*]] = call { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2.v4f16.p0(ptr [[A]])13727// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half> } [[VLD2]], 013728// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half> } [[VLD2]], 113729// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X2_T:%.*]] poison, <4 x half> [[VLD2_FCA_0_EXTRACT]], 0, 013730// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD2_FCA_1_EXTRACT]], 0, 113731// CHECK-NEXT:    ret [[STRUCT_FLOAT16X4X2_T]] [[DOTFCA_0_1_INSERT]]13732//13733float16x4x2_t test_vld2_f16(float16_t const *a) {13734  return vld2_f16(a);13735}13736 13737// CHECK-LABEL: define dso_local %struct.float32x2x2_t @test_vld2_f32(13738// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13739// CHECK-NEXT:  [[ENTRY:.*:]]13740// CHECK-NEXT:    [[VLD2:%.*]] = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr [[A]])13741// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float> } [[VLD2]], 013742// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float> } [[VLD2]], 113743// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X2_T:%.*]] poison, <2 x float> [[VLD2_FCA_0_EXTRACT]], 0, 013744// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD2_FCA_1_EXTRACT]], 0, 113745// CHECK-NEXT:    ret [[STRUCT_FLOAT32X2X2_T]] [[DOTFCA_0_1_INSERT]]13746//13747float32x2x2_t test_vld2_f32(float32_t const *a) {13748  return vld2_f32(a);13749}13750 13751// CHECK-LABEL: define dso_local %struct.float64x1x2_t @test_vld2_f64(13752// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13753// CHECK-NEXT:  [[ENTRY:.*:]]13754// CHECK-NEXT:    [[VLD2:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr [[A]])13755// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD2]], 013756// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD2]], 113757// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T:%.*]] poison, <1 x double> [[VLD2_FCA_0_EXTRACT]], 0, 013758// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD2_FCA_1_EXTRACT]], 0, 113759// CHECK-NEXT:    ret [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_1_INSERT]]13760//13761float64x1x2_t test_vld2_f64(float64_t const *a) {13762  return vld2_f64(a);13763}13764 13765// CHECK-LABEL: define dso_local %struct.mfloat8x8x2_t @test_vld2_mf8(13766// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13767// CHECK-NEXT:  [[ENTRY:.*:]]13768// CHECK-NEXT:    [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])13769// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 013770// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 113771// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 013772// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 113773// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_1_INSERT]]13774//13775mfloat8x8x2_t test_vld2_mf8(mfloat8_t const *a) {13776  return vld2_mf8(a);13777}13778 13779// CHECK-LABEL: define dso_local %struct.poly8x8x2_t @test_vld2_p8(13780// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13781// CHECK-NEXT:  [[ENTRY:.*:]]13782// CHECK-NEXT:    [[VLD2:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr [[A]])13783// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 013784// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD2]], 113785// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X2_T:%.*]] poison, <8 x i8> [[VLD2_FCA_0_EXTRACT]], 0, 013786// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD2_FCA_1_EXTRACT]], 0, 113787// CHECK-NEXT:    ret [[STRUCT_POLY8X8X2_T]] [[DOTFCA_0_1_INSERT]]13788//13789poly8x8x2_t test_vld2_p8(poly8_t const *a) {13790  return vld2_p8(a);13791}13792 13793// CHECK-LABEL: define dso_local %struct.poly16x4x2_t @test_vld2_p16(13794// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13795// CHECK-NEXT:  [[ENTRY:.*:]]13796// CHECK-NEXT:    [[VLD2:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr [[A]])13797// CHECK-NEXT:    [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 013798// CHECK-NEXT:    [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16> } [[VLD2]], 113799// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X2_T:%.*]] poison, <4 x i16> [[VLD2_FCA_0_EXTRACT]], 0, 013800// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD2_FCA_1_EXTRACT]], 0, 113801// CHECK-NEXT:    ret [[STRUCT_POLY16X4X2_T]] [[DOTFCA_0_1_INSERT]]13802//13803poly16x4x2_t test_vld2_p16(poly16_t const *a) {13804  return vld2_p16(a);13805}13806 13807// CHECK-LABEL: define dso_local %struct.uint8x16x3_t @test_vld3q_u8(13808// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13809// CHECK-NEXT:  [[ENTRY:.*:]]13810// CHECK-NEXT:    [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])13811// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 013812// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 113813// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 213814// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 013815// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 113816// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 213817// CHECK-NEXT:    ret [[STRUCT_UINT8X16X3_T]] [[DOTFCA_0_2_INSERT]]13818//13819uint8x16x3_t test_vld3q_u8(uint8_t const *a) {13820  return vld3q_u8(a);13821}13822 13823// CHECK-LABEL: define dso_local %struct.uint16x8x3_t @test_vld3q_u16(13824// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13825// CHECK-NEXT:  [[ENTRY:.*:]]13826// CHECK-NEXT:    [[VLD3:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])13827// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 013828// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 113829// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 213830// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 013831// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 113832// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 213833// CHECK-NEXT:    ret [[STRUCT_UINT16X8X3_T]] [[DOTFCA_0_2_INSERT]]13834//13835uint16x8x3_t test_vld3q_u16(uint16_t const *a) {13836  return vld3q_u16(a);13837}13838 13839// CHECK-LABEL: define dso_local %struct.uint32x4x3_t @test_vld3q_u32(13840// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13841// CHECK-NEXT:  [[ENTRY:.*:]]13842// CHECK-NEXT:    [[VLD3:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr [[A]])13843// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 013844// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 113845// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 213846// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T:%.*]] poison, <4 x i32> [[VLD3_FCA_0_EXTRACT]], 0, 013847// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD3_FCA_1_EXTRACT]], 0, 113848// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD3_FCA_2_EXTRACT]], 0, 213849// CHECK-NEXT:    ret [[STRUCT_UINT32X4X3_T]] [[DOTFCA_0_2_INSERT]]13850//13851uint32x4x3_t test_vld3q_u32(uint32_t const *a) {13852  return vld3q_u32(a);13853}13854 13855// CHECK-LABEL: define dso_local %struct.uint64x2x3_t @test_vld3q_u64(13856// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13857// CHECK-NEXT:  [[ENTRY:.*:]]13858// CHECK-NEXT:    [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr [[A]])13859// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 013860// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 113861// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 213862// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 013863// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 113864// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 213865// CHECK-NEXT:    ret [[STRUCT_UINT64X2X3_T]] [[DOTFCA_0_2_INSERT]]13866//13867uint64x2x3_t test_vld3q_u64(uint64_t const *a) {13868  return vld3q_u64(a);13869}13870 13871// CHECK-LABEL: define dso_local %struct.int8x16x3_t @test_vld3q_s8(13872// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13873// CHECK-NEXT:  [[ENTRY:.*:]]13874// CHECK-NEXT:    [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])13875// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 013876// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 113877// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 213878// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 013879// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 113880// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 213881// CHECK-NEXT:    ret [[STRUCT_INT8X16X3_T]] [[DOTFCA_0_2_INSERT]]13882//13883int8x16x3_t test_vld3q_s8(int8_t const *a) {13884  return vld3q_s8(a);13885}13886 13887// CHECK-LABEL: define dso_local %struct.int16x8x3_t @test_vld3q_s16(13888// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13889// CHECK-NEXT:  [[ENTRY:.*:]]13890// CHECK-NEXT:    [[VLD3:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])13891// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 013892// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 113893// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 213894// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 013895// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 113896// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 213897// CHECK-NEXT:    ret [[STRUCT_INT16X8X3_T]] [[DOTFCA_0_2_INSERT]]13898//13899int16x8x3_t test_vld3q_s16(int16_t const *a) {13900  return vld3q_s16(a);13901}13902 13903// CHECK-LABEL: define dso_local %struct.int32x4x3_t @test_vld3q_s32(13904// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13905// CHECK-NEXT:  [[ENTRY:.*:]]13906// CHECK-NEXT:    [[VLD3:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr [[A]])13907// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 013908// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 113909// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3]], 213910// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T:%.*]] poison, <4 x i32> [[VLD3_FCA_0_EXTRACT]], 0, 013911// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD3_FCA_1_EXTRACT]], 0, 113912// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD3_FCA_2_EXTRACT]], 0, 213913// CHECK-NEXT:    ret [[STRUCT_INT32X4X3_T]] [[DOTFCA_0_2_INSERT]]13914//13915int32x4x3_t test_vld3q_s32(int32_t const *a) {13916  return vld3q_s32(a);13917}13918 13919// CHECK-LABEL: define dso_local %struct.int64x2x3_t @test_vld3q_s64(13920// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13921// CHECK-NEXT:  [[ENTRY:.*:]]13922// CHECK-NEXT:    [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr [[A]])13923// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 013924// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 113925// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], 213926// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T:%.*]] poison, <2 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 013927// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 113928// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 213929// CHECK-NEXT:    ret [[STRUCT_INT64X2X3_T]] [[DOTFCA_0_2_INSERT]]13930//13931int64x2x3_t test_vld3q_s64(int64_t const *a) {13932  return vld3q_s64(a);13933}13934 13935// CHECK-LABEL: define dso_local %struct.float16x8x3_t @test_vld3q_f16(13936// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13937// CHECK-NEXT:  [[ENTRY:.*:]]13938// CHECK-NEXT:    [[VLD3:%.*]] = call { <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld3.v8f16.p0(ptr [[A]])13939// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3]], 013940// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3]], 113941// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half> } [[VLD3]], 213942// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T:%.*]] poison, <8 x half> [[VLD3_FCA_0_EXTRACT]], 0, 013943// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD3_FCA_1_EXTRACT]], 0, 113944// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x half> [[VLD3_FCA_2_EXTRACT]], 0, 213945// CHECK-NEXT:    ret [[STRUCT_FLOAT16X8X3_T]] [[DOTFCA_0_2_INSERT]]13946//13947float16x8x3_t test_vld3q_f16(float16_t const *a) {13948  return vld3q_f16(a);13949}13950 13951// CHECK-LABEL: define dso_local %struct.float32x4x3_t @test_vld3q_f32(13952// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13953// CHECK-NEXT:  [[ENTRY:.*:]]13954// CHECK-NEXT:    [[VLD3:%.*]] = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr [[A]])13955// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3]], 013956// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3]], 113957// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float> } [[VLD3]], 213958// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T:%.*]] poison, <4 x float> [[VLD3_FCA_0_EXTRACT]], 0, 013959// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD3_FCA_1_EXTRACT]], 0, 113960// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x float> [[VLD3_FCA_2_EXTRACT]], 0, 213961// CHECK-NEXT:    ret [[STRUCT_FLOAT32X4X3_T]] [[DOTFCA_0_2_INSERT]]13962//13963float32x4x3_t test_vld3q_f32(float32_t const *a) {13964  return vld3q_f32(a);13965}13966 13967// CHECK-LABEL: define dso_local %struct.float64x2x3_t @test_vld3q_f64(13968// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13969// CHECK-NEXT:  [[ENTRY:.*:]]13970// CHECK-NEXT:    [[VLD3:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr [[A]])13971// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 013972// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 113973// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], 213974// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T:%.*]] poison, <2 x double> [[VLD3_FCA_0_EXTRACT]], 0, 013975// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD3_FCA_1_EXTRACT]], 0, 113976// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD3_FCA_2_EXTRACT]], 0, 213977// CHECK-NEXT:    ret [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_2_INSERT]]13978//13979float64x2x3_t test_vld3q_f64(float64_t const *a) {13980  return vld3q_f64(a);13981}13982 13983// CHECK-LABEL: define dso_local %struct.mfloat8x16x3_t @test_vld3q_mf8(13984// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {13985// CHECK-NEXT:  [[ENTRY:.*:]]13986// CHECK-NEXT:    [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])13987// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 013988// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 113989// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 213990// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 013991// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 113992// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 213993// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_2_INSERT]]13994//13995mfloat8x16x3_t test_vld3q_mf8(mfloat8_t const *a) {13996  return vld3q_mf8(a);13997}13998 13999// CHECK-LABEL: define dso_local %struct.poly8x16x3_t @test_vld3q_p8(14000// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14001// CHECK-NEXT:  [[ENTRY:.*:]]14002// CHECK-NEXT:    [[VLD3:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr [[A]])14003// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 014004// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 114005// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3]], 214006// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T:%.*]] poison, <16 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 014007// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 114008// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 214009// CHECK-NEXT:    ret [[STRUCT_POLY8X16X3_T]] [[DOTFCA_0_2_INSERT]]14010//14011poly8x16x3_t test_vld3q_p8(poly8_t const *a) {14012  return vld3q_p8(a);14013}14014 14015// CHECK-LABEL: define dso_local %struct.poly16x8x3_t @test_vld3q_p16(14016// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14017// CHECK-NEXT:  [[ENTRY:.*:]]14018// CHECK-NEXT:    [[VLD3:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr [[A]])14019// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 014020// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 114021// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3]], 214022// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T:%.*]] poison, <8 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 014023// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 114024// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 214025// CHECK-NEXT:    ret [[STRUCT_POLY16X8X3_T]] [[DOTFCA_0_2_INSERT]]14026//14027poly16x8x3_t test_vld3q_p16(poly16_t const *a) {14028  return vld3q_p16(a);14029}14030 14031// CHECK-LABEL: define dso_local %struct.uint8x8x3_t @test_vld3_u8(14032// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14033// CHECK-NEXT:  [[ENTRY:.*:]]14034// CHECK-NEXT:    [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])14035// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 014036// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 114037// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 214038// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 014039// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 114040// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 214041// CHECK-NEXT:    ret [[STRUCT_UINT8X8X3_T]] [[DOTFCA_0_2_INSERT]]14042//14043uint8x8x3_t test_vld3_u8(uint8_t const *a) {14044  return vld3_u8(a);14045}14046 14047// CHECK-LABEL: define dso_local %struct.uint16x4x3_t @test_vld3_u16(14048// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14049// CHECK-NEXT:  [[ENTRY:.*:]]14050// CHECK-NEXT:    [[VLD3:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])14051// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 014052// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 114053// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 214054// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 014055// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 114056// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 214057// CHECK-NEXT:    ret [[STRUCT_UINT16X4X3_T]] [[DOTFCA_0_2_INSERT]]14058//14059uint16x4x3_t test_vld3_u16(uint16_t const *a) {14060  return vld3_u16(a);14061}14062 14063// CHECK-LABEL: define dso_local %struct.uint32x2x3_t @test_vld3_u32(14064// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14065// CHECK-NEXT:  [[ENTRY:.*:]]14066// CHECK-NEXT:    [[VLD3:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr [[A]])14067// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 014068// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 114069// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 214070// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T:%.*]] poison, <2 x i32> [[VLD3_FCA_0_EXTRACT]], 0, 014071// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD3_FCA_1_EXTRACT]], 0, 114072// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD3_FCA_2_EXTRACT]], 0, 214073// CHECK-NEXT:    ret [[STRUCT_UINT32X2X3_T]] [[DOTFCA_0_2_INSERT]]14074//14075uint32x2x3_t test_vld3_u32(uint32_t const *a) {14076  return vld3_u32(a);14077}14078 14079// CHECK-LABEL: define dso_local %struct.uint64x1x3_t @test_vld3_u64(14080// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14081// CHECK-NEXT:  [[ENTRY:.*:]]14082// CHECK-NEXT:    [[VLD3:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr [[A]])14083// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 014084// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 114085// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 214086// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 014087// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 114088// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 214089// CHECK-NEXT:    ret [[STRUCT_UINT64X1X3_T]] [[DOTFCA_0_2_INSERT]]14090//14091uint64x1x3_t test_vld3_u64(uint64_t const *a) {14092  return vld3_u64(a);14093}14094 14095// CHECK-LABEL: define dso_local %struct.int8x8x3_t @test_vld3_s8(14096// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14097// CHECK-NEXT:  [[ENTRY:.*:]]14098// CHECK-NEXT:    [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])14099// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 014100// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 114101// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 214102// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 014103// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 114104// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 214105// CHECK-NEXT:    ret [[STRUCT_INT8X8X3_T]] [[DOTFCA_0_2_INSERT]]14106//14107int8x8x3_t test_vld3_s8(int8_t const *a) {14108  return vld3_s8(a);14109}14110 14111// CHECK-LABEL: define dso_local %struct.int16x4x3_t @test_vld3_s16(14112// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14113// CHECK-NEXT:  [[ENTRY:.*:]]14114// CHECK-NEXT:    [[VLD3:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])14115// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 014116// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 114117// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 214118// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 014119// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 114120// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 214121// CHECK-NEXT:    ret [[STRUCT_INT16X4X3_T]] [[DOTFCA_0_2_INSERT]]14122//14123int16x4x3_t test_vld3_s16(int16_t const *a) {14124  return vld3_s16(a);14125}14126 14127// CHECK-LABEL: define dso_local %struct.int32x2x3_t @test_vld3_s32(14128// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14129// CHECK-NEXT:  [[ENTRY:.*:]]14130// CHECK-NEXT:    [[VLD3:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr [[A]])14131// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 014132// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 114133// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3]], 214134// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T:%.*]] poison, <2 x i32> [[VLD3_FCA_0_EXTRACT]], 0, 014135// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD3_FCA_1_EXTRACT]], 0, 114136// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD3_FCA_2_EXTRACT]], 0, 214137// CHECK-NEXT:    ret [[STRUCT_INT32X2X3_T]] [[DOTFCA_0_2_INSERT]]14138//14139int32x2x3_t test_vld3_s32(int32_t const *a) {14140  return vld3_s32(a);14141}14142 14143// CHECK-LABEL: define dso_local %struct.int64x1x3_t @test_vld3_s64(14144// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14145// CHECK-NEXT:  [[ENTRY:.*:]]14146// CHECK-NEXT:    [[VLD3:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr [[A]])14147// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 014148// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 114149// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], 214150// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T:%.*]] poison, <1 x i64> [[VLD3_FCA_0_EXTRACT]], 0, 014151// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD3_FCA_1_EXTRACT]], 0, 114152// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD3_FCA_2_EXTRACT]], 0, 214153// CHECK-NEXT:    ret [[STRUCT_INT64X1X3_T]] [[DOTFCA_0_2_INSERT]]14154//14155int64x1x3_t test_vld3_s64(int64_t const *a) {14156  return vld3_s64(a);14157}14158 14159// CHECK-LABEL: define dso_local %struct.float16x4x3_t @test_vld3_f16(14160// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14161// CHECK-NEXT:  [[ENTRY:.*:]]14162// CHECK-NEXT:    [[VLD3:%.*]] = call { <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld3.v4f16.p0(ptr [[A]])14163// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3]], 014164// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3]], 114165// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half> } [[VLD3]], 214166// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T:%.*]] poison, <4 x half> [[VLD3_FCA_0_EXTRACT]], 0, 014167// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD3_FCA_1_EXTRACT]], 0, 114168// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x half> [[VLD3_FCA_2_EXTRACT]], 0, 214169// CHECK-NEXT:    ret [[STRUCT_FLOAT16X4X3_T]] [[DOTFCA_0_2_INSERT]]14170//14171float16x4x3_t test_vld3_f16(float16_t const *a) {14172  return vld3_f16(a);14173}14174 14175// CHECK-LABEL: define dso_local %struct.float32x2x3_t @test_vld3_f32(14176// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14177// CHECK-NEXT:  [[ENTRY:.*:]]14178// CHECK-NEXT:    [[VLD3:%.*]] = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr [[A]])14179// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3]], 014180// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3]], 114181// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float> } [[VLD3]], 214182// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T:%.*]] poison, <2 x float> [[VLD3_FCA_0_EXTRACT]], 0, 014183// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD3_FCA_1_EXTRACT]], 0, 114184// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x float> [[VLD3_FCA_2_EXTRACT]], 0, 214185// CHECK-NEXT:    ret [[STRUCT_FLOAT32X2X3_T]] [[DOTFCA_0_2_INSERT]]14186//14187float32x2x3_t test_vld3_f32(float32_t const *a) {14188  return vld3_f32(a);14189}14190 14191// CHECK-LABEL: define dso_local %struct.float64x1x3_t @test_vld3_f64(14192// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14193// CHECK-NEXT:  [[ENTRY:.*:]]14194// CHECK-NEXT:    [[VLD3:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr [[A]])14195// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 014196// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 114197// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], 214198// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T:%.*]] poison, <1 x double> [[VLD3_FCA_0_EXTRACT]], 0, 014199// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD3_FCA_1_EXTRACT]], 0, 114200// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD3_FCA_2_EXTRACT]], 0, 214201// CHECK-NEXT:    ret [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_2_INSERT]]14202//14203float64x1x3_t test_vld3_f64(float64_t const *a) {14204  return vld3_f64(a);14205}14206 14207// CHECK-LABEL: define dso_local %struct.mfloat8x8x3_t @test_vld3_mf8(14208// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14209// CHECK-NEXT:  [[ENTRY:.*:]]14210// CHECK-NEXT:    [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])14211// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 014212// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 114213// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 214214// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 014215// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 114216// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 214217// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_2_INSERT]]14218//14219mfloat8x8x3_t test_vld3_mf8(mfloat8_t const *a) {14220  return vld3_mf8(a);14221}14222 14223// CHECK-LABEL: define dso_local %struct.poly8x8x3_t @test_vld3_p8(14224// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14225// CHECK-NEXT:  [[ENTRY:.*:]]14226// CHECK-NEXT:    [[VLD3:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr [[A]])14227// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 014228// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 114229// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3]], 214230// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T:%.*]] poison, <8 x i8> [[VLD3_FCA_0_EXTRACT]], 0, 014231// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD3_FCA_1_EXTRACT]], 0, 114232// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD3_FCA_2_EXTRACT]], 0, 214233// CHECK-NEXT:    ret [[STRUCT_POLY8X8X3_T]] [[DOTFCA_0_2_INSERT]]14234//14235poly8x8x3_t test_vld3_p8(poly8_t const *a) {14236  return vld3_p8(a);14237}14238 14239// CHECK-LABEL: define dso_local %struct.poly16x4x3_t @test_vld3_p16(14240// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14241// CHECK-NEXT:  [[ENTRY:.*:]]14242// CHECK-NEXT:    [[VLD3:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr [[A]])14243// CHECK-NEXT:    [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 014244// CHECK-NEXT:    [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 114245// CHECK-NEXT:    [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3]], 214246// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T:%.*]] poison, <4 x i16> [[VLD3_FCA_0_EXTRACT]], 0, 014247// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD3_FCA_1_EXTRACT]], 0, 114248// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD3_FCA_2_EXTRACT]], 0, 214249// CHECK-NEXT:    ret [[STRUCT_POLY16X4X3_T]] [[DOTFCA_0_2_INSERT]]14250//14251poly16x4x3_t test_vld3_p16(poly16_t const *a) {14252  return vld3_p16(a);14253}14254 14255// CHECK-LABEL: define dso_local %struct.uint8x16x4_t @test_vld4q_u8(14256// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14257// CHECK-NEXT:  [[ENTRY:.*:]]14258// CHECK-NEXT:    [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])14259// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 014260// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 114261// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 214262// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 314263// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 014264// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 114265// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 214266// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 314267// CHECK-NEXT:    ret [[STRUCT_UINT8X16X4_T]] [[DOTFCA_0_3_INSERT]]14268//14269uint8x16x4_t test_vld4q_u8(uint8_t const *a) {14270  return vld4q_u8(a);14271}14272 14273// CHECK-LABEL: define dso_local %struct.uint16x8x4_t @test_vld4q_u16(14274// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14275// CHECK-NEXT:  [[ENTRY:.*:]]14276// CHECK-NEXT:    [[VLD4:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])14277// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 014278// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 114279// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 214280// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 314281// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 014282// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 114283// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 214284// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 314285// CHECK-NEXT:    ret [[STRUCT_UINT16X8X4_T]] [[DOTFCA_0_3_INSERT]]14286//14287uint16x8x4_t test_vld4q_u16(uint16_t const *a) {14288  return vld4q_u16(a);14289}14290 14291// CHECK-LABEL: define dso_local %struct.uint32x4x4_t @test_vld4q_u32(14292// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14293// CHECK-NEXT:  [[ENTRY:.*:]]14294// CHECK-NEXT:    [[VLD4:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr [[A]])14295// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 014296// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 114297// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 214298// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 314299// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T:%.*]] poison, <4 x i32> [[VLD4_FCA_0_EXTRACT]], 0, 014300// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD4_FCA_1_EXTRACT]], 0, 114301// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD4_FCA_2_EXTRACT]], 0, 214302// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i32> [[VLD4_FCA_3_EXTRACT]], 0, 314303// CHECK-NEXT:    ret [[STRUCT_UINT32X4X4_T]] [[DOTFCA_0_3_INSERT]]14304//14305uint32x4x4_t test_vld4q_u32(uint32_t const *a) {14306  return vld4q_u32(a);14307}14308 14309// CHECK-LABEL: define dso_local %struct.uint64x2x4_t @test_vld4q_u64(14310// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14311// CHECK-NEXT:  [[ENTRY:.*:]]14312// CHECK-NEXT:    [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr [[A]])14313// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 014314// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 114315// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 214316// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 314317// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 014318// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 114319// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 214320// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 314321// CHECK-NEXT:    ret [[STRUCT_UINT64X2X4_T]] [[DOTFCA_0_3_INSERT]]14322//14323uint64x2x4_t test_vld4q_u64(uint64_t const *a) {14324  return vld4q_u64(a);14325}14326 14327// CHECK-LABEL: define dso_local %struct.int8x16x4_t @test_vld4q_s8(14328// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14329// CHECK-NEXT:  [[ENTRY:.*:]]14330// CHECK-NEXT:    [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])14331// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 014332// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 114333// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 214334// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 314335// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 014336// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 114337// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 214338// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 314339// CHECK-NEXT:    ret [[STRUCT_INT8X16X4_T]] [[DOTFCA_0_3_INSERT]]14340//14341int8x16x4_t test_vld4q_s8(int8_t const *a) {14342  return vld4q_s8(a);14343}14344 14345// CHECK-LABEL: define dso_local %struct.int16x8x4_t @test_vld4q_s16(14346// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14347// CHECK-NEXT:  [[ENTRY:.*:]]14348// CHECK-NEXT:    [[VLD4:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])14349// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 014350// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 114351// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 214352// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 314353// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 014354// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 114355// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 214356// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 314357// CHECK-NEXT:    ret [[STRUCT_INT16X8X4_T]] [[DOTFCA_0_3_INSERT]]14358//14359int16x8x4_t test_vld4q_s16(int16_t const *a) {14360  return vld4q_s16(a);14361}14362 14363// CHECK-LABEL: define dso_local %struct.int32x4x4_t @test_vld4q_s32(14364// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14365// CHECK-NEXT:  [[ENTRY:.*:]]14366// CHECK-NEXT:    [[VLD4:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr [[A]])14367// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 014368// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 114369// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 214370// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4]], 314371// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T:%.*]] poison, <4 x i32> [[VLD4_FCA_0_EXTRACT]], 0, 014372// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i32> [[VLD4_FCA_1_EXTRACT]], 0, 114373// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i32> [[VLD4_FCA_2_EXTRACT]], 0, 214374// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i32> [[VLD4_FCA_3_EXTRACT]], 0, 314375// CHECK-NEXT:    ret [[STRUCT_INT32X4X4_T]] [[DOTFCA_0_3_INSERT]]14376//14377int32x4x4_t test_vld4q_s32(int32_t const *a) {14378  return vld4q_s32(a);14379}14380 14381// CHECK-LABEL: define dso_local %struct.int64x2x4_t @test_vld4q_s64(14382// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14383// CHECK-NEXT:  [[ENTRY:.*:]]14384// CHECK-NEXT:    [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr [[A]])14385// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 014386// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 114387// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 214388// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], 314389// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T:%.*]] poison, <2 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 014390// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 114391// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 214392// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 314393// CHECK-NEXT:    ret [[STRUCT_INT64X2X4_T]] [[DOTFCA_0_3_INSERT]]14394//14395int64x2x4_t test_vld4q_s64(int64_t const *a) {14396  return vld4q_s64(a);14397}14398 14399// CHECK-LABEL: define dso_local %struct.float16x8x4_t @test_vld4q_f16(14400// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14401// CHECK-NEXT:  [[ENTRY:.*:]]14402// CHECK-NEXT:    [[VLD4:%.*]] = call { <8 x half>, <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld4.v8f16.p0(ptr [[A]])14403// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4]], 014404// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4]], 114405// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4]], 214406// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4]], 314407// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T:%.*]] poison, <8 x half> [[VLD4_FCA_0_EXTRACT]], 0, 014408// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x half> [[VLD4_FCA_1_EXTRACT]], 0, 114409// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x half> [[VLD4_FCA_2_EXTRACT]], 0, 214410// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x half> [[VLD4_FCA_3_EXTRACT]], 0, 314411// CHECK-NEXT:    ret [[STRUCT_FLOAT16X8X4_T]] [[DOTFCA_0_3_INSERT]]14412//14413float16x8x4_t test_vld4q_f16(float16_t const *a) {14414  return vld4q_f16(a);14415}14416 14417// CHECK-LABEL: define dso_local %struct.float32x4x4_t @test_vld4q_f32(14418// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14419// CHECK-NEXT:  [[ENTRY:.*:]]14420// CHECK-NEXT:    [[VLD4:%.*]] = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr [[A]])14421// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4]], 014422// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4]], 114423// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4]], 214424// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4]], 314425// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T:%.*]] poison, <4 x float> [[VLD4_FCA_0_EXTRACT]], 0, 014426// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x float> [[VLD4_FCA_1_EXTRACT]], 0, 114427// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x float> [[VLD4_FCA_2_EXTRACT]], 0, 214428// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x float> [[VLD4_FCA_3_EXTRACT]], 0, 314429// CHECK-NEXT:    ret [[STRUCT_FLOAT32X4X4_T]] [[DOTFCA_0_3_INSERT]]14430//14431float32x4x4_t test_vld4q_f32(float32_t const *a) {14432  return vld4q_f32(a);14433}14434 14435// CHECK-LABEL: define dso_local %struct.float64x2x4_t @test_vld4q_f64(14436// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14437// CHECK-NEXT:  [[ENTRY:.*:]]14438// CHECK-NEXT:    [[VLD4:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr [[A]])14439// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 014440// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 114441// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 214442// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], 314443// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T:%.*]] poison, <2 x double> [[VLD4_FCA_0_EXTRACT]], 0, 014444// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD4_FCA_1_EXTRACT]], 0, 114445// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD4_FCA_2_EXTRACT]], 0, 214446// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x double> [[VLD4_FCA_3_EXTRACT]], 0, 314447// CHECK-NEXT:    ret [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_3_INSERT]]14448//14449float64x2x4_t test_vld4q_f64(float64_t const *a) {14450  return vld4q_f64(a);14451}14452 14453// CHECK-LABEL: define dso_local %struct.mfloat8x16x4_t @test_vld4q_mf8(14454// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14455// CHECK-NEXT:  [[ENTRY:.*:]]14456// CHECK-NEXT:    [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])14457// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 014458// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 114459// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 214460// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 314461// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 014462// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 114463// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 214464// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 314465// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_3_INSERT]]14466//14467mfloat8x16x4_t test_vld4q_mf8(mfloat8_t const *a) {14468  return vld4q_mf8(a);14469}14470 14471// CHECK-LABEL: define dso_local %struct.poly8x16x4_t @test_vld4q_p8(14472// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14473// CHECK-NEXT:  [[ENTRY:.*:]]14474// CHECK-NEXT:    [[VLD4:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr [[A]])14475// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 014476// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 114477// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 214478// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4]], 314479// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T:%.*]] poison, <16 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 014480// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 114481// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 214482// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 314483// CHECK-NEXT:    ret [[STRUCT_POLY8X16X4_T]] [[DOTFCA_0_3_INSERT]]14484//14485poly8x16x4_t test_vld4q_p8(poly8_t const *a) {14486  return vld4q_p8(a);14487}14488 14489// CHECK-LABEL: define dso_local %struct.poly16x8x4_t @test_vld4q_p16(14490// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14491// CHECK-NEXT:  [[ENTRY:.*:]]14492// CHECK-NEXT:    [[VLD4:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr [[A]])14493// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 014494// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 114495// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 214496// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4]], 314497// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T:%.*]] poison, <8 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 014498// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 114499// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 214500// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 314501// CHECK-NEXT:    ret [[STRUCT_POLY16X8X4_T]] [[DOTFCA_0_3_INSERT]]14502//14503poly16x8x4_t test_vld4q_p16(poly16_t const *a) {14504  return vld4q_p16(a);14505}14506 14507// CHECK-LABEL: define dso_local %struct.uint8x8x4_t @test_vld4_u8(14508// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14509// CHECK-NEXT:  [[ENTRY:.*:]]14510// CHECK-NEXT:    [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])14511// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 014512// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 114513// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 214514// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 314515// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 014516// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 114517// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 214518// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 314519// CHECK-NEXT:    ret [[STRUCT_UINT8X8X4_T]] [[DOTFCA_0_3_INSERT]]14520//14521uint8x8x4_t test_vld4_u8(uint8_t const *a) {14522  return vld4_u8(a);14523}14524 14525// CHECK-LABEL: define dso_local %struct.uint16x4x4_t @test_vld4_u16(14526// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14527// CHECK-NEXT:  [[ENTRY:.*:]]14528// CHECK-NEXT:    [[VLD4:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])14529// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 014530// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 114531// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 214532// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 314533// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 014534// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 114535// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 214536// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 314537// CHECK-NEXT:    ret [[STRUCT_UINT16X4X4_T]] [[DOTFCA_0_3_INSERT]]14538//14539uint16x4x4_t test_vld4_u16(uint16_t const *a) {14540  return vld4_u16(a);14541}14542 14543// CHECK-LABEL: define dso_local %struct.uint32x2x4_t @test_vld4_u32(14544// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14545// CHECK-NEXT:  [[ENTRY:.*:]]14546// CHECK-NEXT:    [[VLD4:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr [[A]])14547// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 014548// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 114549// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 214550// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 314551// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T:%.*]] poison, <2 x i32> [[VLD4_FCA_0_EXTRACT]], 0, 014552// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD4_FCA_1_EXTRACT]], 0, 114553// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD4_FCA_2_EXTRACT]], 0, 214554// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i32> [[VLD4_FCA_3_EXTRACT]], 0, 314555// CHECK-NEXT:    ret [[STRUCT_UINT32X2X4_T]] [[DOTFCA_0_3_INSERT]]14556//14557uint32x2x4_t test_vld4_u32(uint32_t const *a) {14558  return vld4_u32(a);14559}14560 14561// CHECK-LABEL: define dso_local %struct.uint64x1x4_t @test_vld4_u64(14562// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14563// CHECK-NEXT:  [[ENTRY:.*:]]14564// CHECK-NEXT:    [[VLD4:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr [[A]])14565// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 014566// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 114567// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 214568// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 314569// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 014570// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 114571// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 214572// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 314573// CHECK-NEXT:    ret [[STRUCT_UINT64X1X4_T]] [[DOTFCA_0_3_INSERT]]14574//14575uint64x1x4_t test_vld4_u64(uint64_t const *a) {14576  return vld4_u64(a);14577}14578 14579// CHECK-LABEL: define dso_local %struct.int8x8x4_t @test_vld4_s8(14580// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14581// CHECK-NEXT:  [[ENTRY:.*:]]14582// CHECK-NEXT:    [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])14583// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 014584// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 114585// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 214586// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 314587// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 014588// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 114589// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 214590// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 314591// CHECK-NEXT:    ret [[STRUCT_INT8X8X4_T]] [[DOTFCA_0_3_INSERT]]14592//14593int8x8x4_t test_vld4_s8(int8_t const *a) {14594  return vld4_s8(a);14595}14596 14597// CHECK-LABEL: define dso_local %struct.int16x4x4_t @test_vld4_s16(14598// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14599// CHECK-NEXT:  [[ENTRY:.*:]]14600// CHECK-NEXT:    [[VLD4:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])14601// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 014602// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 114603// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 214604// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 314605// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 014606// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 114607// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 214608// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 314609// CHECK-NEXT:    ret [[STRUCT_INT16X4X4_T]] [[DOTFCA_0_3_INSERT]]14610//14611int16x4x4_t test_vld4_s16(int16_t const *a) {14612  return vld4_s16(a);14613}14614 14615// CHECK-LABEL: define dso_local %struct.int32x2x4_t @test_vld4_s32(14616// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14617// CHECK-NEXT:  [[ENTRY:.*:]]14618// CHECK-NEXT:    [[VLD4:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr [[A]])14619// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 014620// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 114621// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 214622// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4]], 314623// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T:%.*]] poison, <2 x i32> [[VLD4_FCA_0_EXTRACT]], 0, 014624// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i32> [[VLD4_FCA_1_EXTRACT]], 0, 114625// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i32> [[VLD4_FCA_2_EXTRACT]], 0, 214626// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i32> [[VLD4_FCA_3_EXTRACT]], 0, 314627// CHECK-NEXT:    ret [[STRUCT_INT32X2X4_T]] [[DOTFCA_0_3_INSERT]]14628//14629int32x2x4_t test_vld4_s32(int32_t const *a) {14630  return vld4_s32(a);14631}14632 14633// CHECK-LABEL: define dso_local %struct.int64x1x4_t @test_vld4_s64(14634// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14635// CHECK-NEXT:  [[ENTRY:.*:]]14636// CHECK-NEXT:    [[VLD4:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr [[A]])14637// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 014638// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 114639// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 214640// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], 314641// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T:%.*]] poison, <1 x i64> [[VLD4_FCA_0_EXTRACT]], 0, 014642// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD4_FCA_1_EXTRACT]], 0, 114643// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD4_FCA_2_EXTRACT]], 0, 214644// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD4_FCA_3_EXTRACT]], 0, 314645// CHECK-NEXT:    ret [[STRUCT_INT64X1X4_T]] [[DOTFCA_0_3_INSERT]]14646//14647int64x1x4_t test_vld4_s64(int64_t const *a) {14648  return vld4_s64(a);14649}14650 14651// CHECK-LABEL: define dso_local %struct.float16x4x4_t @test_vld4_f16(14652// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14653// CHECK-NEXT:  [[ENTRY:.*:]]14654// CHECK-NEXT:    [[VLD4:%.*]] = call { <4 x half>, <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld4.v4f16.p0(ptr [[A]])14655// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4]], 014656// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4]], 114657// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4]], 214658// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4]], 314659// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T:%.*]] poison, <4 x half> [[VLD4_FCA_0_EXTRACT]], 0, 014660// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x half> [[VLD4_FCA_1_EXTRACT]], 0, 114661// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x half> [[VLD4_FCA_2_EXTRACT]], 0, 214662// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x half> [[VLD4_FCA_3_EXTRACT]], 0, 314663// CHECK-NEXT:    ret [[STRUCT_FLOAT16X4X4_T]] [[DOTFCA_0_3_INSERT]]14664//14665float16x4x4_t test_vld4_f16(float16_t const *a) {14666  return vld4_f16(a);14667}14668 14669// CHECK-LABEL: define dso_local %struct.float32x2x4_t @test_vld4_f32(14670// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14671// CHECK-NEXT:  [[ENTRY:.*:]]14672// CHECK-NEXT:    [[VLD4:%.*]] = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr [[A]])14673// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4]], 014674// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4]], 114675// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4]], 214676// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4]], 314677// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T:%.*]] poison, <2 x float> [[VLD4_FCA_0_EXTRACT]], 0, 014678// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x float> [[VLD4_FCA_1_EXTRACT]], 0, 114679// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x float> [[VLD4_FCA_2_EXTRACT]], 0, 214680// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x float> [[VLD4_FCA_3_EXTRACT]], 0, 314681// CHECK-NEXT:    ret [[STRUCT_FLOAT32X2X4_T]] [[DOTFCA_0_3_INSERT]]14682//14683float32x2x4_t test_vld4_f32(float32_t const *a) {14684  return vld4_f32(a);14685}14686 14687// CHECK-LABEL: define dso_local %struct.float64x1x4_t @test_vld4_f64(14688// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14689// CHECK-NEXT:  [[ENTRY:.*:]]14690// CHECK-NEXT:    [[VLD4:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr [[A]])14691// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 014692// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 114693// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 214694// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], 314695// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T:%.*]] poison, <1 x double> [[VLD4_FCA_0_EXTRACT]], 0, 014696// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD4_FCA_1_EXTRACT]], 0, 114697// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD4_FCA_2_EXTRACT]], 0, 214698// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x double> [[VLD4_FCA_3_EXTRACT]], 0, 314699// CHECK-NEXT:    ret [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_3_INSERT]]14700//14701float64x1x4_t test_vld4_f64(float64_t const *a) {14702  return vld4_f64(a);14703}14704 14705// CHECK-LABEL: define dso_local %struct.mfloat8x8x4_t @test_vld4_mf8(14706// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14707// CHECK-NEXT:  [[ENTRY:.*:]]14708// CHECK-NEXT:    [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])14709// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 014710// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 114711// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 214712// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 314713// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 014714// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 114715// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 214716// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 314717// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_3_INSERT]]14718//14719mfloat8x8x4_t test_vld4_mf8(mfloat8_t const *a) {14720  return vld4_mf8(a);14721}14722 14723// CHECK-LABEL: define dso_local %struct.poly8x8x4_t @test_vld4_p8(14724// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14725// CHECK-NEXT:  [[ENTRY:.*:]]14726// CHECK-NEXT:    [[VLD4:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr [[A]])14727// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 014728// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 114729// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 214730// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4]], 314731// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T:%.*]] poison, <8 x i8> [[VLD4_FCA_0_EXTRACT]], 0, 014732// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD4_FCA_1_EXTRACT]], 0, 114733// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD4_FCA_2_EXTRACT]], 0, 214734// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD4_FCA_3_EXTRACT]], 0, 314735// CHECK-NEXT:    ret [[STRUCT_POLY8X8X4_T]] [[DOTFCA_0_3_INSERT]]14736//14737poly8x8x4_t test_vld4_p8(poly8_t const *a) {14738  return vld4_p8(a);14739}14740 14741// CHECK-LABEL: define dso_local %struct.poly16x4x4_t @test_vld4_p16(14742// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {14743// CHECK-NEXT:  [[ENTRY:.*:]]14744// CHECK-NEXT:    [[VLD4:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr [[A]])14745// CHECK-NEXT:    [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 014746// CHECK-NEXT:    [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 114747// CHECK-NEXT:    [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 214748// CHECK-NEXT:    [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4]], 314749// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T:%.*]] poison, <4 x i16> [[VLD4_FCA_0_EXTRACT]], 0, 014750// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x i16> [[VLD4_FCA_1_EXTRACT]], 0, 114751// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x i16> [[VLD4_FCA_2_EXTRACT]], 0, 214752// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x i16> [[VLD4_FCA_3_EXTRACT]], 0, 314753// CHECK-NEXT:    ret [[STRUCT_POLY16X4X4_T]] [[DOTFCA_0_3_INSERT]]14754//14755poly16x4x4_t test_vld4_p16(poly16_t const *a) {14756  return vld4_p16(a);14757}14758 14759// CHECK-LABEL: define dso_local void @test_vst1q_u8(14760// CHECK-SAME: ptr noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {14761// CHECK-NEXT:  [[ENTRY:.*:]]14762// CHECK-NEXT:    store <16 x i8> [[B]], ptr [[A]], align 114763// CHECK-NEXT:    ret void14764//14765void test_vst1q_u8(uint8_t *a, uint8x16_t b) {14766  vst1q_u8(a, b);14767}14768 14769// CHECK-LABEL: define dso_local void @test_vst1q_u16(14770// CHECK-SAME: ptr noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {14771// CHECK-NEXT:  [[ENTRY:.*:]]14772// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>14773// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>14774// CHECK-NEXT:    store <8 x i16> [[TMP1]], ptr [[A]], align 214775// CHECK-NEXT:    ret void14776//14777void test_vst1q_u16(uint16_t *a, uint16x8_t b) {14778  vst1q_u16(a, b);14779}14780 14781// CHECK-LABEL: define dso_local void @test_vst1q_u32(14782// CHECK-SAME: ptr noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {14783// CHECK-NEXT:  [[ENTRY:.*:]]14784// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>14785// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>14786// CHECK-NEXT:    store <4 x i32> [[TMP1]], ptr [[A]], align 414787// CHECK-NEXT:    ret void14788//14789void test_vst1q_u32(uint32_t *a, uint32x4_t b) {14790  vst1q_u32(a, b);14791}14792 14793// CHECK-LABEL: define dso_local void @test_vst1q_u64(14794// CHECK-SAME: ptr noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {14795// CHECK-NEXT:  [[ENTRY:.*:]]14796// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>14797// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>14798// CHECK-NEXT:    store <2 x i64> [[TMP1]], ptr [[A]], align 814799// CHECK-NEXT:    ret void14800//14801void test_vst1q_u64(uint64_t *a, uint64x2_t b) {14802  vst1q_u64(a, b);14803}14804 14805// CHECK-LABEL: define dso_local void @test_vst1q_s8(14806// CHECK-SAME: ptr noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {14807// CHECK-NEXT:  [[ENTRY:.*:]]14808// CHECK-NEXT:    store <16 x i8> [[B]], ptr [[A]], align 114809// CHECK-NEXT:    ret void14810//14811void test_vst1q_s8(int8_t *a, int8x16_t b) {14812  vst1q_s8(a, b);14813}14814 14815// CHECK-LABEL: define dso_local void @test_vst1q_s16(14816// CHECK-SAME: ptr noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {14817// CHECK-NEXT:  [[ENTRY:.*:]]14818// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>14819// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>14820// CHECK-NEXT:    store <8 x i16> [[TMP1]], ptr [[A]], align 214821// CHECK-NEXT:    ret void14822//14823void test_vst1q_s16(int16_t *a, int16x8_t b) {14824  vst1q_s16(a, b);14825}14826 14827// CHECK-LABEL: define dso_local void @test_vst1q_s32(14828// CHECK-SAME: ptr noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {14829// CHECK-NEXT:  [[ENTRY:.*:]]14830// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B]] to <16 x i8>14831// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>14832// CHECK-NEXT:    store <4 x i32> [[TMP1]], ptr [[A]], align 414833// CHECK-NEXT:    ret void14834//14835void test_vst1q_s32(int32_t *a, int32x4_t b) {14836  vst1q_s32(a, b);14837}14838 14839// CHECK-LABEL: define dso_local void @test_vst1q_s64(14840// CHECK-SAME: ptr noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {14841// CHECK-NEXT:  [[ENTRY:.*:]]14842// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B]] to <16 x i8>14843// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>14844// CHECK-NEXT:    store <2 x i64> [[TMP1]], ptr [[A]], align 814845// CHECK-NEXT:    ret void14846//14847void test_vst1q_s64(int64_t *a, int64x2_t b) {14848  vst1q_s64(a, b);14849}14850 14851// CHECK-LABEL: define dso_local void @test_vst1q_mf8(14852// CHECK-SAME: ptr noundef [[A:%.*]], <16 x i8> [[VAL:%.*]]) #[[ATTR0]] {14853// CHECK-NEXT:  [[ENTRY:.*:]]14854// CHECK-NEXT:    store <16 x i8> [[VAL]], ptr [[A]], align 114855// CHECK-NEXT:    ret void14856//14857void test_vst1q_mf8(mfloat8_t *a, mfloat8x16_t val) {14858  vst1q_mf8(a, val);14859}14860 14861// CHECK-LABEL: define dso_local void @test_vst1q_f16(14862// CHECK-SAME: ptr noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {14863// CHECK-NEXT:  [[ENTRY:.*:]]14864// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>14865// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>14866// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>14867// CHECK-NEXT:    store <8 x half> [[TMP2]], ptr [[A]], align 214868// CHECK-NEXT:    ret void14869//14870void test_vst1q_f16(float16_t *a, float16x8_t b) {14871  vst1q_f16(a, b);14872}14873 14874// CHECK-LABEL: define dso_local void @test_vst1q_f32(14875// CHECK-SAME: ptr noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {14876// CHECK-NEXT:  [[ENTRY:.*:]]14877// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[B]] to <4 x i32>14878// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>14879// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>14880// CHECK-NEXT:    store <4 x float> [[TMP2]], ptr [[A]], align 414881// CHECK-NEXT:    ret void14882//14883void test_vst1q_f32(float32_t *a, float32x4_t b) {14884  vst1q_f32(a, b);14885}14886 14887// CHECK-LABEL: define dso_local void @test_vst1q_f64(14888// CHECK-SAME: ptr noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {14889// CHECK-NEXT:  [[ENTRY:.*:]]14890// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[B]] to <2 x i64>14891// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>14892// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>14893// CHECK-NEXT:    store <2 x double> [[TMP2]], ptr [[A]], align 814894// CHECK-NEXT:    ret void14895//14896void test_vst1q_f64(float64_t *a, float64x2_t b) {14897  vst1q_f64(a, b);14898}14899 14900// CHECK-LABEL: define dso_local void @test_vst1q_p8(14901// CHECK-SAME: ptr noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {14902// CHECK-NEXT:  [[ENTRY:.*:]]14903// CHECK-NEXT:    store <16 x i8> [[B]], ptr [[A]], align 114904// CHECK-NEXT:    ret void14905//14906void test_vst1q_p8(poly8_t *a, poly8x16_t b) {14907  vst1q_p8(a, b);14908}14909 14910// CHECK-LABEL: define dso_local void @test_vst1q_p16(14911// CHECK-SAME: ptr noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {14912// CHECK-NEXT:  [[ENTRY:.*:]]14913// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B]] to <16 x i8>14914// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>14915// CHECK-NEXT:    store <8 x i16> [[TMP1]], ptr [[A]], align 214916// CHECK-NEXT:    ret void14917//14918void test_vst1q_p16(poly16_t *a, poly16x8_t b) {14919  vst1q_p16(a, b);14920}14921 14922// CHECK-LABEL: define dso_local void @test_vst1_u8(14923// CHECK-SAME: ptr noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {14924// CHECK-NEXT:  [[ENTRY:.*:]]14925// CHECK-NEXT:    store <8 x i8> [[B]], ptr [[A]], align 114926// CHECK-NEXT:    ret void14927//14928void test_vst1_u8(uint8_t *a, uint8x8_t b) {14929  vst1_u8(a, b);14930}14931 14932// CHECK-LABEL: define dso_local void @test_vst1_u16(14933// CHECK-SAME: ptr noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {14934// CHECK-NEXT:  [[ENTRY:.*:]]14935// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>14936// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>14937// CHECK-NEXT:    store <4 x i16> [[TMP1]], ptr [[A]], align 214938// CHECK-NEXT:    ret void14939//14940void test_vst1_u16(uint16_t *a, uint16x4_t b) {14941  vst1_u16(a, b);14942}14943 14944// CHECK-LABEL: define dso_local void @test_vst1_u32(14945// CHECK-SAME: ptr noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {14946// CHECK-NEXT:  [[ENTRY:.*:]]14947// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>14948// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>14949// CHECK-NEXT:    store <2 x i32> [[TMP1]], ptr [[A]], align 414950// CHECK-NEXT:    ret void14951//14952void test_vst1_u32(uint32_t *a, uint32x2_t b) {14953  vst1_u32(a, b);14954}14955 14956// CHECK-LABEL: define dso_local void @test_vst1_u64(14957// CHECK-SAME: ptr noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {14958// CHECK-NEXT:  [[ENTRY:.*:]]14959// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>14960// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>14961// CHECK-NEXT:    store <1 x i64> [[TMP1]], ptr [[A]], align 814962// CHECK-NEXT:    ret void14963//14964void test_vst1_u64(uint64_t *a, uint64x1_t b) {14965  vst1_u64(a, b);14966}14967 14968// CHECK-LABEL: define dso_local void @test_vst1_s8(14969// CHECK-SAME: ptr noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {14970// CHECK-NEXT:  [[ENTRY:.*:]]14971// CHECK-NEXT:    store <8 x i8> [[B]], ptr [[A]], align 114972// CHECK-NEXT:    ret void14973//14974void test_vst1_s8(int8_t *a, int8x8_t b) {14975  vst1_s8(a, b);14976}14977 14978// CHECK-LABEL: define dso_local void @test_vst1_s16(14979// CHECK-SAME: ptr noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {14980// CHECK-NEXT:  [[ENTRY:.*:]]14981// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>14982// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>14983// CHECK-NEXT:    store <4 x i16> [[TMP1]], ptr [[A]], align 214984// CHECK-NEXT:    ret void14985//14986void test_vst1_s16(int16_t *a, int16x4_t b) {14987  vst1_s16(a, b);14988}14989 14990// CHECK-LABEL: define dso_local void @test_vst1_s32(14991// CHECK-SAME: ptr noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {14992// CHECK-NEXT:  [[ENTRY:.*:]]14993// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B]] to <8 x i8>14994// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>14995// CHECK-NEXT:    store <2 x i32> [[TMP1]], ptr [[A]], align 414996// CHECK-NEXT:    ret void14997//14998void test_vst1_s32(int32_t *a, int32x2_t b) {14999  vst1_s32(a, b);15000}15001 15002// CHECK-LABEL: define dso_local void @test_vst1_s64(15003// CHECK-SAME: ptr noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {15004// CHECK-NEXT:  [[ENTRY:.*:]]15005// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>15006// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>15007// CHECK-NEXT:    store <1 x i64> [[TMP1]], ptr [[A]], align 815008// CHECK-NEXT:    ret void15009//15010void test_vst1_s64(int64_t *a, int64x1_t b) {15011  vst1_s64(a, b);15012}15013 15014// CHECK-LABEL: define dso_local void @test_vst1_mf8(15015// CHECK-SAME: ptr noundef [[A:%.*]], <8 x i8> [[VAL:%.*]]) #[[ATTR0]] {15016// CHECK-NEXT:  [[ENTRY:.*:]]15017// CHECK-NEXT:    store <8 x i8> [[VAL]], ptr [[A]], align 115018// CHECK-NEXT:    ret void15019//15020void test_vst1_mf8(mfloat8_t *a, mfloat8x8_t val) {15021  vst1_mf8(a, val);15022}15023 15024// CHECK-LABEL: define dso_local void @test_vst1_f16(15025// CHECK-SAME: ptr noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {15026// CHECK-NEXT:  [[ENTRY:.*:]]15027// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>15028// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>15029// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>15030// CHECK-NEXT:    store <4 x half> [[TMP2]], ptr [[A]], align 215031// CHECK-NEXT:    ret void15032//15033void test_vst1_f16(float16_t *a, float16x4_t b) {15034  vst1_f16(a, b);15035}15036 15037// CHECK-LABEL: define dso_local void @test_vst1_f32(15038// CHECK-SAME: ptr noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {15039// CHECK-NEXT:  [[ENTRY:.*:]]15040// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[B]] to <2 x i32>15041// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>15042// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>15043// CHECK-NEXT:    store <2 x float> [[TMP2]], ptr [[A]], align 415044// CHECK-NEXT:    ret void15045//15046void test_vst1_f32(float32_t *a, float32x2_t b) {15047  vst1_f32(a, b);15048}15049 15050// CHECK-LABEL: define dso_local void @test_vst1_f64(15051// CHECK-SAME: ptr noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {15052// CHECK-NEXT:  [[ENTRY:.*:]]15053// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[B]] to i6415054// CHECK-NEXT:    [[__S1_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 015055// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[__S1_SROA_0_0_VEC_INSERT]] to <8 x i8>15056// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double>15057// CHECK-NEXT:    store <1 x double> [[TMP2]], ptr [[A]], align 815058// CHECK-NEXT:    ret void15059//15060void test_vst1_f64(float64_t *a, float64x1_t b) {15061  vst1_f64(a, b);15062}15063 15064// CHECK-LABEL: define dso_local void @test_vst1_p8(15065// CHECK-SAME: ptr noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {15066// CHECK-NEXT:  [[ENTRY:.*:]]15067// CHECK-NEXT:    store <8 x i8> [[B]], ptr [[A]], align 115068// CHECK-NEXT:    ret void15069//15070void test_vst1_p8(poly8_t *a, poly8x8_t b) {15071  vst1_p8(a, b);15072}15073 15074// CHECK-LABEL: define dso_local void @test_vst1_p16(15075// CHECK-SAME: ptr noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {15076// CHECK-NEXT:  [[ENTRY:.*:]]15077// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>15078// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>15079// CHECK-NEXT:    store <4 x i16> [[TMP1]], ptr [[A]], align 215080// CHECK-NEXT:    ret void15081//15082void test_vst1_p16(poly16_t *a, poly16x4_t b) {15083  vst1_p16(a, b);15084}15085 15086// CHECK-LABEL: define dso_local void @test_vst2q_u8(15087// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15088// CHECK-NEXT:  [[ENTRY:.*:]]15089// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 015090// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 115091// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])15092// CHECK-NEXT:    ret void15093//15094void test_vst2q_u8(uint8_t *a, uint8x16x2_t b) {15095  vst2q_u8(a, b);15096}15097 15098// CHECK-LABEL: define dso_local void @test_vst2q_u16(15099// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15100// CHECK-NEXT:  [[ENTRY:.*:]]15101// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 015102// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 115103// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15104// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15105// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>15106// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>15107// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> [[TMP2]], <8 x i16> [[TMP3]], ptr [[A]])15108// CHECK-NEXT:    ret void15109//15110void test_vst2q_u16(uint16_t *a, uint16x8x2_t b) {15111  vst2q_u16(a, b);15112}15113 15114// CHECK-LABEL: define dso_local void @test_vst2q_u32(15115// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15116// CHECK-NEXT:  [[ENTRY:.*:]]15117// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[B_COERCE]], 015118// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[B_COERCE]], 115119// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15120// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15121// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>15122// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>15123// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> [[TMP2]], <4 x i32> [[TMP3]], ptr [[A]])15124// CHECK-NEXT:    ret void15125//15126void test_vst2q_u32(uint32_t *a, uint32x4x2_t b) {15127  vst2q_u32(a, b);15128}15129 15130// CHECK-LABEL: define dso_local void @test_vst2q_u64(15131// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15132// CHECK-NEXT:  [[ENTRY:.*:]]15133// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 015134// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 115135// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15136// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15137// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>15138// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>15139// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64> [[TMP2]], <2 x i64> [[TMP3]], ptr [[A]])15140// CHECK-NEXT:    ret void15141//15142void test_vst2q_u64(uint64_t *a, uint64x2x2_t b) {15143  vst2q_u64(a, b);15144}15145 15146// CHECK-LABEL: define dso_local void @test_vst2q_s8(15147// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15148// CHECK-NEXT:  [[ENTRY:.*:]]15149// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 015150// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 115151// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])15152// CHECK-NEXT:    ret void15153//15154void test_vst2q_s8(int8_t *a, int8x16x2_t b) {15155  vst2q_s8(a, b);15156}15157 15158// CHECK-LABEL: define dso_local void @test_vst2q_s16(15159// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15160// CHECK-NEXT:  [[ENTRY:.*:]]15161// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 015162// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 115163// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15164// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15165// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>15166// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>15167// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> [[TMP2]], <8 x i16> [[TMP3]], ptr [[A]])15168// CHECK-NEXT:    ret void15169//15170void test_vst2q_s16(int16_t *a, int16x8x2_t b) {15171  vst2q_s16(a, b);15172}15173 15174// CHECK-LABEL: define dso_local void @test_vst2q_s32(15175// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15176// CHECK-NEXT:  [[ENTRY:.*:]]15177// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[B_COERCE]], 015178// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[B_COERCE]], 115179// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15180// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15181// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>15182// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>15183// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> [[TMP2]], <4 x i32> [[TMP3]], ptr [[A]])15184// CHECK-NEXT:    ret void15185//15186void test_vst2q_s32(int32_t *a, int32x4x2_t b) {15187  vst2q_s32(a, b);15188}15189 15190// CHECK-LABEL: define dso_local void @test_vst2q_s64(15191// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15192// CHECK-NEXT:  [[ENTRY:.*:]]15193// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 015194// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 115195// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15196// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15197// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>15198// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>15199// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64> [[TMP2]], <2 x i64> [[TMP3]], ptr [[A]])15200// CHECK-NEXT:    ret void15201//15202void test_vst2q_s64(int64_t *a, int64x2x2_t b) {15203  vst2q_s64(a, b);15204}15205 15206// CHECK-LABEL: define dso_local void @test_vst2q_mf8(15207// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15208// CHECK-NEXT:  [[ENTRY:.*:]]15209// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 015210// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 115211// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])15212// CHECK-NEXT:    ret void15213//15214void test_vst2q_mf8(mfloat8_t *a, mfloat8x16x2_t b) {15215  vst2q_mf8(a, b);15216}15217 15218// CHECK-LABEL: define dso_local void @test_vst2q_f16(15219// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x half>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15220// CHECK-NEXT:  [[ENTRY:.*:]]15221// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x half>] [[B_COERCE]], 015222// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i16>15223// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x half>] [[B_COERCE]], 115224// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i16>15225// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>15226// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>15227// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>15228// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>15229// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v8f16.p0(<8 x half> [[TMP4]], <8 x half> [[TMP5]], ptr [[A]])15230// CHECK-NEXT:    ret void15231//15232void test_vst2q_f16(float16_t *a, float16x8x2_t b) {15233  vst2q_f16(a, b);15234}15235 15236// CHECK-LABEL: define dso_local void @test_vst2q_f32(15237// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x float>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15238// CHECK-NEXT:  [[ENTRY:.*:]]15239// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x float>] [[B_COERCE]], 015240// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i32>15241// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x float>] [[B_COERCE]], 115242// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i32>15243// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>15244// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>15245// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float>15246// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>15247// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float> [[TMP4]], <4 x float> [[TMP5]], ptr [[A]])15248// CHECK-NEXT:    ret void15249//15250void test_vst2q_f32(float32_t *a, float32x4x2_t b) {15251  vst2q_f32(a, b);15252}15253 15254// CHECK-LABEL: define dso_local void @test_vst2q_f64(15255// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15256// CHECK-NEXT:  [[ENTRY:.*:]]15257// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x double>] [[B_COERCE]], 015258// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>15259// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x double>] [[B_COERCE]], 115260// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>15261// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>15262// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>15263// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>15264// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>15265// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double> [[TMP4]], <2 x double> [[TMP5]], ptr [[A]])15266// CHECK-NEXT:    ret void15267//15268void test_vst2q_f64(float64_t *a, float64x2x2_t b) {15269  vst2q_f64(a, b);15270}15271 15272// CHECK-LABEL: define dso_local void @test_vst2q_p8(15273// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15274// CHECK-NEXT:  [[ENTRY:.*:]]15275// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 015276// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 115277// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])15278// CHECK-NEXT:    ret void15279//15280void test_vst2q_p8(poly8_t *a, poly8x16x2_t b) {15281  vst2q_p8(a, b);15282}15283 15284// CHECK-LABEL: define dso_local void @test_vst2q_p16(15285// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15286// CHECK-NEXT:  [[ENTRY:.*:]]15287// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 015288// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i16>] [[B_COERCE]], 115289// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15290// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15291// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>15292// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>15293// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> [[TMP2]], <8 x i16> [[TMP3]], ptr [[A]])15294// CHECK-NEXT:    ret void15295//15296void test_vst2q_p16(poly16_t *a, poly16x8x2_t b) {15297  vst2q_p16(a, b);15298}15299 15300// CHECK-LABEL: define dso_local void @test_vst2_u8(15301// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15302// CHECK-NEXT:  [[ENTRY:.*:]]15303// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 015304// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 115305// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])15306// CHECK-NEXT:    ret void15307//15308void test_vst2_u8(uint8_t *a, uint8x8x2_t b) {15309  vst2_u8(a, b);15310}15311 15312// CHECK-LABEL: define dso_local void @test_vst2_u16(15313// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15314// CHECK-NEXT:  [[ENTRY:.*:]]15315// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 015316// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 115317// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15318// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15319// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>15320// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>15321// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]], ptr [[A]])15322// CHECK-NEXT:    ret void15323//15324void test_vst2_u16(uint16_t *a, uint16x4x2_t b) {15325  vst2_u16(a, b);15326}15327 15328// CHECK-LABEL: define dso_local void @test_vst2_u32(15329// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15330// CHECK-NEXT:  [[ENTRY:.*:]]15331// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[B_COERCE]], 015332// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[B_COERCE]], 115333// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15334// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15335// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>15336// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>15337// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32> [[TMP2]], <2 x i32> [[TMP3]], ptr [[A]])15338// CHECK-NEXT:    ret void15339//15340void test_vst2_u32(uint32_t *a, uint32x2x2_t b) {15341  vst2_u32(a, b);15342}15343 15344// CHECK-LABEL: define dso_local void @test_vst2_u64(15345// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15346// CHECK-NEXT:  [[ENTRY:.*:]]15347// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 015348// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 115349// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15350// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15351// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>15352// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>15353// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64> [[TMP2]], <1 x i64> [[TMP3]], ptr [[A]])15354// CHECK-NEXT:    ret void15355//15356void test_vst2_u64(uint64_t *a, uint64x1x2_t b) {15357  vst2_u64(a, b);15358}15359 15360// CHECK-LABEL: define dso_local void @test_vst2_s8(15361// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15362// CHECK-NEXT:  [[ENTRY:.*:]]15363// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 015364// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 115365// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])15366// CHECK-NEXT:    ret void15367//15368void test_vst2_s8(int8_t *a, int8x8x2_t b) {15369  vst2_s8(a, b);15370}15371 15372// CHECK-LABEL: define dso_local void @test_vst2_s16(15373// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15374// CHECK-NEXT:  [[ENTRY:.*:]]15375// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 015376// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 115377// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15378// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15379// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>15380// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>15381// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]], ptr [[A]])15382// CHECK-NEXT:    ret void15383//15384void test_vst2_s16(int16_t *a, int16x4x2_t b) {15385  vst2_s16(a, b);15386}15387 15388// CHECK-LABEL: define dso_local void @test_vst2_s32(15389// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15390// CHECK-NEXT:  [[ENTRY:.*:]]15391// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[B_COERCE]], 015392// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[B_COERCE]], 115393// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15394// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15395// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>15396// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>15397// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32> [[TMP2]], <2 x i32> [[TMP3]], ptr [[A]])15398// CHECK-NEXT:    ret void15399//15400void test_vst2_s32(int32_t *a, int32x2x2_t b) {15401  vst2_s32(a, b);15402}15403 15404// CHECK-LABEL: define dso_local void @test_vst2_s64(15405// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15406// CHECK-NEXT:  [[ENTRY:.*:]]15407// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 015408// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 115409// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15410// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15411// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>15412// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>15413// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64> [[TMP2]], <1 x i64> [[TMP3]], ptr [[A]])15414// CHECK-NEXT:    ret void15415//15416void test_vst2_s64(int64_t *a, int64x1x2_t b) {15417  vst2_s64(a, b);15418}15419 15420// CHECK-LABEL: define dso_local void @test_vst2_mf8(15421// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15422// CHECK-NEXT:  [[ENTRY:.*:]]15423// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 015424// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 115425// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])15426// CHECK-NEXT:    ret void15427//15428void test_vst2_mf8(mfloat8_t *a, mfloat8x8x2_t b) {15429  vst2_mf8(a, b);15430}15431 15432// CHECK-LABEL: define dso_local void @test_vst2_f16(15433// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x half>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15434// CHECK-NEXT:  [[ENTRY:.*:]]15435// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x half>] [[B_COERCE]], 015436// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i16>15437// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x half>] [[B_COERCE]], 115438// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i16>15439// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>15440// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>15441// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>15442// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>15443// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v4f16.p0(<4 x half> [[TMP4]], <4 x half> [[TMP5]], ptr [[A]])15444// CHECK-NEXT:    ret void15445//15446void test_vst2_f16(float16_t *a, float16x4x2_t b) {15447  vst2_f16(a, b);15448}15449 15450// CHECK-LABEL: define dso_local void @test_vst2_f32(15451// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x float>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15452// CHECK-NEXT:  [[ENTRY:.*:]]15453// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x float>] [[B_COERCE]], 015454// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i32>15455// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x float>] [[B_COERCE]], 115456// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i32>15457// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>15458// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>15459// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float>15460// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>15461// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float> [[TMP4]], <2 x float> [[TMP5]], ptr [[A]])15462// CHECK-NEXT:    ret void15463//15464void test_vst2_f32(float32_t *a, float32x2x2_t b) {15465  vst2_f32(a, b);15466}15467 15468// CHECK-LABEL: define dso_local void @test_vst2_f64(15469// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15470// CHECK-NEXT:  [[ENTRY:.*:]]15471// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x double>] [[B_COERCE]], 015472// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i6415473// CHECK-NEXT:    [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 015474// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x double>] [[B_COERCE]], 115475// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i6415476// CHECK-NEXT:    [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 015477// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>15478// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>15479// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>15480// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>15481// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double> [[TMP4]], <1 x double> [[TMP5]], ptr [[A]])15482// CHECK-NEXT:    ret void15483//15484void test_vst2_f64(float64_t *a, float64x1x2_t b) {15485  vst2_f64(a, b);15486}15487 15488// CHECK-LABEL: define dso_local void @test_vst2_p8(15489// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15490// CHECK-NEXT:  [[ENTRY:.*:]]15491// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 015492// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 115493// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])15494// CHECK-NEXT:    ret void15495//15496void test_vst2_p8(poly8_t *a, poly8x8x2_t b) {15497  vst2_p8(a, b);15498}15499 15500// CHECK-LABEL: define dso_local void @test_vst2_p16(15501// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15502// CHECK-NEXT:  [[ENTRY:.*:]]15503// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 015504// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i16>] [[B_COERCE]], 115505// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15506// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15507// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>15508// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>15509// CHECK-NEXT:    call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]], ptr [[A]])15510// CHECK-NEXT:    ret void15511//15512void test_vst2_p16(poly16_t *a, poly16x4x2_t b) {15513  vst2_p16(a, b);15514}15515 15516// CHECK-LABEL: define dso_local void @test_vst3q_u8(15517// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15518// CHECK-NEXT:  [[ENTRY:.*:]]15519// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 015520// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 115521// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 215522// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])15523// CHECK-NEXT:    ret void15524//15525void test_vst3q_u8(uint8_t *a, uint8x16x3_t b) {15526  vst3q_u8(a, b);15527}15528 15529// CHECK-LABEL: define dso_local void @test_vst3q_u16(15530// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15531// CHECK-NEXT:  [[ENTRY:.*:]]15532// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 015533// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 115534// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 215535// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15536// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15537// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>15538// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>15539// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>15540// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>15541// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> [[TMP3]], <8 x i16> [[TMP4]], <8 x i16> [[TMP5]], ptr [[A]])15542// CHECK-NEXT:    ret void15543//15544void test_vst3q_u16(uint16_t *a, uint16x8x3_t b) {15545  vst3q_u16(a, b);15546}15547 15548// CHECK-LABEL: define dso_local void @test_vst3q_u32(15549// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15550// CHECK-NEXT:  [[ENTRY:.*:]]15551// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 015552// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 115553// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 215554// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15555// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15556// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>15557// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>15558// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>15559// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>15560// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> [[TMP5]], ptr [[A]])15561// CHECK-NEXT:    ret void15562//15563void test_vst3q_u32(uint32_t *a, uint32x4x3_t b) {15564  vst3q_u32(a, b);15565}15566 15567// CHECK-LABEL: define dso_local void @test_vst3q_u64(15568// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15569// CHECK-NEXT:  [[ENTRY:.*:]]15570// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 015571// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 115572// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 215573// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15574// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15575// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>15576// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>15577// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>15578// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>15579// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64> [[TMP3]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], ptr [[A]])15580// CHECK-NEXT:    ret void15581//15582void test_vst3q_u64(uint64_t *a, uint64x2x3_t b) {15583  vst3q_u64(a, b);15584}15585 15586// CHECK-LABEL: define dso_local void @test_vst3q_s8(15587// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15588// CHECK-NEXT:  [[ENTRY:.*:]]15589// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 015590// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 115591// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 215592// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])15593// CHECK-NEXT:    ret void15594//15595void test_vst3q_s8(int8_t *a, int8x16x3_t b) {15596  vst3q_s8(a, b);15597}15598 15599// CHECK-LABEL: define dso_local void @test_vst3q_s16(15600// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15601// CHECK-NEXT:  [[ENTRY:.*:]]15602// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 015603// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 115604// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 215605// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15606// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15607// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>15608// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>15609// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>15610// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>15611// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> [[TMP3]], <8 x i16> [[TMP4]], <8 x i16> [[TMP5]], ptr [[A]])15612// CHECK-NEXT:    ret void15613//15614void test_vst3q_s16(int16_t *a, int16x8x3_t b) {15615  vst3q_s16(a, b);15616}15617 15618// CHECK-LABEL: define dso_local void @test_vst3q_s32(15619// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15620// CHECK-NEXT:  [[ENTRY:.*:]]15621// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 015622// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 115623// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[B_COERCE]], 215624// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15625// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15626// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>15627// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>15628// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>15629// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>15630// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> [[TMP5]], ptr [[A]])15631// CHECK-NEXT:    ret void15632//15633void test_vst3q_s32(int32_t *a, int32x4x3_t b) {15634  vst3q_s32(a, b);15635}15636 15637// CHECK-LABEL: define dso_local void @test_vst3q_s64(15638// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15639// CHECK-NEXT:  [[ENTRY:.*:]]15640// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 015641// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 115642// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 215643// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15644// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15645// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>15646// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>15647// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>15648// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>15649// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64> [[TMP3]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], ptr [[A]])15650// CHECK-NEXT:    ret void15651//15652void test_vst3q_s64(int64_t *a, int64x2x3_t b) {15653  vst3q_s64(a, b);15654}15655 15656// CHECK-LABEL: define dso_local void @test_vst3q_mf8(15657// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15658// CHECK-NEXT:  [[ENTRY:.*:]]15659// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 015660// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 115661// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 215662// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])15663// CHECK-NEXT:    ret void15664//15665void test_vst3q_mf8(mfloat8_t *a, mfloat8x16x3_t b) {15666  vst3q_mf8(a, b);15667}15668 15669// CHECK-LABEL: define dso_local void @test_vst3q_f16(15670// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x half>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15671// CHECK-NEXT:  [[ENTRY:.*:]]15672// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x half>] [[B_COERCE]], 015673// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i16>15674// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x half>] [[B_COERCE]], 115675// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i16>15676// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x half>] [[B_COERCE]], 215677// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i16>15678// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>15679// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>15680// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>15681// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>15682// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>15683// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>15684// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v8f16.p0(<8 x half> [[TMP6]], <8 x half> [[TMP7]], <8 x half> [[TMP8]], ptr [[A]])15685// CHECK-NEXT:    ret void15686//15687void test_vst3q_f16(float16_t *a, float16x8x3_t b) {15688  vst3q_f16(a, b);15689}15690 15691// CHECK-LABEL: define dso_local void @test_vst3q_f32(15692// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x float>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15693// CHECK-NEXT:  [[ENTRY:.*:]]15694// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x float>] [[B_COERCE]], 015695// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i32>15696// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x float>] [[B_COERCE]], 115697// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i32>15698// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x float>] [[B_COERCE]], 215699// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_2_EXTRACT]] to <4 x i32>15700// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>15701// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>15702// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP2]] to <16 x i8>15703// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x float>15704// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float>15705// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>15706// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float> [[TMP6]], <4 x float> [[TMP7]], <4 x float> [[TMP8]], ptr [[A]])15707// CHECK-NEXT:    ret void15708//15709void test_vst3q_f32(float32_t *a, float32x4x3_t b) {15710  vst3q_f32(a, b);15711}15712 15713// CHECK-LABEL: define dso_local void @test_vst3q_f64(15714// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15715// CHECK-NEXT:  [[ENTRY:.*:]]15716// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 015717// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>15718// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 115719// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>15720// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 215721// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i64>15722// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>15723// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>15724// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>15725// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>15726// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double>15727// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>15728// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double> [[TMP6]], <2 x double> [[TMP7]], <2 x double> [[TMP8]], ptr [[A]])15729// CHECK-NEXT:    ret void15730//15731void test_vst3q_f64(float64_t *a, float64x2x3_t b) {15732  vst3q_f64(a, b);15733}15734 15735// CHECK-LABEL: define dso_local void @test_vst3q_p8(15736// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15737// CHECK-NEXT:  [[ENTRY:.*:]]15738// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 015739// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 115740// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 215741// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])15742// CHECK-NEXT:    ret void15743//15744void test_vst3q_p8(poly8_t *a, poly8x16x3_t b) {15745  vst3q_p8(a, b);15746}15747 15748// CHECK-LABEL: define dso_local void @test_vst3q_p16(15749// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {15750// CHECK-NEXT:  [[ENTRY:.*:]]15751// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 015752// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 115753// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i16>] [[B_COERCE]], 215754// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>15755// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>15756// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>15757// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>15758// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>15759// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>15760// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> [[TMP3]], <8 x i16> [[TMP4]], <8 x i16> [[TMP5]], ptr [[A]])15761// CHECK-NEXT:    ret void15762//15763void test_vst3q_p16(poly16_t *a, poly16x8x3_t b) {15764  vst3q_p16(a, b);15765}15766 15767// CHECK-LABEL: define dso_local void @test_vst3_u8(15768// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15769// CHECK-NEXT:  [[ENTRY:.*:]]15770// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 015771// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 115772// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 215773// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])15774// CHECK-NEXT:    ret void15775//15776void test_vst3_u8(uint8_t *a, uint8x8x3_t b) {15777  vst3_u8(a, b);15778}15779 15780// CHECK-LABEL: define dso_local void @test_vst3_u16(15781// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15782// CHECK-NEXT:  [[ENTRY:.*:]]15783// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 015784// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 115785// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 215786// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15787// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15788// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>15789// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>15790// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>15791// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>15792// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> [[TMP3]], <4 x i16> [[TMP4]], <4 x i16> [[TMP5]], ptr [[A]])15793// CHECK-NEXT:    ret void15794//15795void test_vst3_u16(uint16_t *a, uint16x4x3_t b) {15796  vst3_u16(a, b);15797}15798 15799// CHECK-LABEL: define dso_local void @test_vst3_u32(15800// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15801// CHECK-NEXT:  [[ENTRY:.*:]]15802// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 015803// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 115804// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 215805// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15806// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15807// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>15808// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>15809// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>15810// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>15811// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32> [[TMP3]], <2 x i32> [[TMP4]], <2 x i32> [[TMP5]], ptr [[A]])15812// CHECK-NEXT:    ret void15813//15814void test_vst3_u32(uint32_t *a, uint32x2x3_t b) {15815  vst3_u32(a, b);15816}15817 15818// CHECK-LABEL: define dso_local void @test_vst3_u64(15819// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15820// CHECK-NEXT:  [[ENTRY:.*:]]15821// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 015822// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 115823// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 215824// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15825// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15826// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>15827// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>15828// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>15829// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>15830// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64> [[TMP3]], <1 x i64> [[TMP4]], <1 x i64> [[TMP5]], ptr [[A]])15831// CHECK-NEXT:    ret void15832//15833void test_vst3_u64(uint64_t *a, uint64x1x3_t b) {15834  vst3_u64(a, b);15835}15836 15837// CHECK-LABEL: define dso_local void @test_vst3_s8(15838// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15839// CHECK-NEXT:  [[ENTRY:.*:]]15840// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 015841// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 115842// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 215843// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])15844// CHECK-NEXT:    ret void15845//15846void test_vst3_s8(int8_t *a, int8x8x3_t b) {15847  vst3_s8(a, b);15848}15849 15850// CHECK-LABEL: define dso_local void @test_vst3_s16(15851// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15852// CHECK-NEXT:  [[ENTRY:.*:]]15853// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 015854// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 115855// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 215856// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15857// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15858// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>15859// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>15860// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>15861// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>15862// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> [[TMP3]], <4 x i16> [[TMP4]], <4 x i16> [[TMP5]], ptr [[A]])15863// CHECK-NEXT:    ret void15864//15865void test_vst3_s16(int16_t *a, int16x4x3_t b) {15866  vst3_s16(a, b);15867}15868 15869// CHECK-LABEL: define dso_local void @test_vst3_s32(15870// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15871// CHECK-NEXT:  [[ENTRY:.*:]]15872// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 015873// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 115874// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[B_COERCE]], 215875// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15876// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15877// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>15878// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>15879// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>15880// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>15881// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32> [[TMP3]], <2 x i32> [[TMP4]], <2 x i32> [[TMP5]], ptr [[A]])15882// CHECK-NEXT:    ret void15883//15884void test_vst3_s32(int32_t *a, int32x2x3_t b) {15885  vst3_s32(a, b);15886}15887 15888// CHECK-LABEL: define dso_local void @test_vst3_s64(15889// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15890// CHECK-NEXT:  [[ENTRY:.*:]]15891// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 015892// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 115893// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 215894// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>15895// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>15896// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>15897// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>15898// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>15899// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>15900// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64> [[TMP3]], <1 x i64> [[TMP4]], <1 x i64> [[TMP5]], ptr [[A]])15901// CHECK-NEXT:    ret void15902//15903void test_vst3_s64(int64_t *a, int64x1x3_t b) {15904  vst3_s64(a, b);15905}15906 15907// CHECK-LABEL: define dso_local void @test_vst3_mf8(15908// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15909// CHECK-NEXT:  [[ENTRY:.*:]]15910// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 015911// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 115912// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 215913// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])15914// CHECK-NEXT:    ret void15915//15916void test_vst3_mf8(mfloat8_t *a, mfloat8x8x3_t b) {15917  vst3_mf8(a, b);15918}15919 15920// CHECK-LABEL: define dso_local void @test_vst3_f16(15921// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x half>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15922// CHECK-NEXT:  [[ENTRY:.*:]]15923// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x half>] [[B_COERCE]], 015924// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i16>15925// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x half>] [[B_COERCE]], 115926// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i16>15927// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x half>] [[B_COERCE]], 215928// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_2_EXTRACT]] to <4 x i16>15929// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>15930// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>15931// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>15932// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>15933// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>15934// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>15935// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v4f16.p0(<4 x half> [[TMP6]], <4 x half> [[TMP7]], <4 x half> [[TMP8]], ptr [[A]])15936// CHECK-NEXT:    ret void15937//15938void test_vst3_f16(float16_t *a, float16x4x3_t b) {15939  vst3_f16(a, b);15940}15941 15942// CHECK-LABEL: define dso_local void @test_vst3_f32(15943// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x float>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15944// CHECK-NEXT:  [[ENTRY:.*:]]15945// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x float>] [[B_COERCE]], 015946// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i32>15947// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x float>] [[B_COERCE]], 115948// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i32>15949// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x float>] [[B_COERCE]], 215950// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i32>15951// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>15952// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>15953// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i32> [[TMP2]] to <8 x i8>15954// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x float>15955// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float>15956// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float>15957// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float> [[TMP6]], <2 x float> [[TMP7]], <2 x float> [[TMP8]], ptr [[A]])15958// CHECK-NEXT:    ret void15959//15960void test_vst3_f32(float32_t *a, float32x2x3_t b) {15961  vst3_f32(a, b);15962}15963 15964// CHECK-LABEL: define dso_local void @test_vst3_f64(15965// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15966// CHECK-NEXT:  [[ENTRY:.*:]]15967// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 015968// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i6415969// CHECK-NEXT:    [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 015970// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 115971// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i6415972// CHECK-NEXT:    [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 015973// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 215974// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_2_EXTRACT]] to i6415975// CHECK-NEXT:    [[B_SROA_4_16_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 015976// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>15977// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>15978// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <1 x i64> [[B_SROA_4_16_VEC_INSERT]] to <8 x i8>15979// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>15980// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double>15981// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double>15982// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double> [[TMP6]], <1 x double> [[TMP7]], <1 x double> [[TMP8]], ptr [[A]])15983// CHECK-NEXT:    ret void15984//15985void test_vst3_f64(float64_t *a, float64x1x3_t b) {15986  vst3_f64(a, b);15987}15988 15989// CHECK-LABEL: define dso_local void @test_vst3_p8(15990// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {15991// CHECK-NEXT:  [[ENTRY:.*:]]15992// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 015993// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 115994// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 215995// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])15996// CHECK-NEXT:    ret void15997//15998void test_vst3_p8(poly8_t *a, poly8x8x3_t b) {15999  vst3_p8(a, b);16000}16001 16002// CHECK-LABEL: define dso_local void @test_vst3_p16(16003// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16004// CHECK-NEXT:  [[ENTRY:.*:]]16005// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 016006// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 116007// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i16>] [[B_COERCE]], 216008// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16009// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16010// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>16011// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>16012// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>16013// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>16014// CHECK-NEXT:    call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> [[TMP3]], <4 x i16> [[TMP4]], <4 x i16> [[TMP5]], ptr [[A]])16015// CHECK-NEXT:    ret void16016//16017void test_vst3_p16(poly16_t *a, poly16x4x3_t b) {16018  vst3_p16(a, b);16019}16020 16021// CHECK-LABEL: define dso_local void @test_vst4q_u8(16022// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16023// CHECK-NEXT:  [[ENTRY:.*:]]16024// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 016025// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 116026// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 216027// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 316028// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])16029// CHECK-NEXT:    ret void16030//16031void test_vst4q_u8(uint8_t *a, uint8x16x4_t b) {16032  vst4q_u8(a, b);16033}16034 16035// CHECK-LABEL: define dso_local void @test_vst4q_u16(16036// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16037// CHECK-NEXT:  [[ENTRY:.*:]]16038// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 016039// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 116040// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 216041// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 316042// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>16043// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>16044// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>16045// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>16046// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>16047// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>16048// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>16049// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x i16>16050// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> [[TMP4]], <8 x i16> [[TMP5]], <8 x i16> [[TMP6]], <8 x i16> [[TMP7]], ptr [[A]])16051// CHECK-NEXT:    ret void16052//16053void test_vst4q_u16(uint16_t *a, uint16x8x4_t b) {16054  vst4q_u16(a, b);16055}16056 16057// CHECK-LABEL: define dso_local void @test_vst4q_u32(16058// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16059// CHECK-NEXT:  [[ENTRY:.*:]]16060// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 016061// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 116062// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 216063// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 316064// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>16065// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>16066// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>16067// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>16068// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>16069// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>16070// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>16071// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x i32>16072// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32> [[TMP4]], <4 x i32> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP7]], ptr [[A]])16073// CHECK-NEXT:    ret void16074//16075void test_vst4q_u32(uint32_t *a, uint32x4x4_t b) {16076  vst4q_u32(a, b);16077}16078 16079// CHECK-LABEL: define dso_local void @test_vst4q_u64(16080// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16081// CHECK-NEXT:  [[ENTRY:.*:]]16082// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 016083// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 116084// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 216085// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 316086// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>16087// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>16088// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>16089// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>16090// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>16091// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>16092// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>16093// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x i64>16094// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], ptr [[A]])16095// CHECK-NEXT:    ret void16096//16097void test_vst4q_u64(uint64_t *a, uint64x2x4_t b) {16098  vst4q_u64(a, b);16099}16100 16101// CHECK-LABEL: define dso_local void @test_vst4q_s8(16102// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16103// CHECK-NEXT:  [[ENTRY:.*:]]16104// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 016105// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 116106// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 216107// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 316108// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])16109// CHECK-NEXT:    ret void16110//16111void test_vst4q_s8(int8_t *a, int8x16x4_t b) {16112  vst4q_s8(a, b);16113}16114 16115// CHECK-LABEL: define dso_local void @test_vst4q_s16(16116// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16117// CHECK-NEXT:  [[ENTRY:.*:]]16118// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 016119// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 116120// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 216121// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 316122// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>16123// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>16124// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>16125// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>16126// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>16127// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>16128// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>16129// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x i16>16130// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> [[TMP4]], <8 x i16> [[TMP5]], <8 x i16> [[TMP6]], <8 x i16> [[TMP7]], ptr [[A]])16131// CHECK-NEXT:    ret void16132//16133void test_vst4q_s16(int16_t *a, int16x8x4_t b) {16134  vst4q_s16(a, b);16135}16136 16137// CHECK-LABEL: define dso_local void @test_vst4q_s32(16138// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i32>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16139// CHECK-NEXT:  [[ENTRY:.*:]]16140// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 016141// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 116142// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 216143// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[B_COERCE]], 316144// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>16145// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>16146// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>16147// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i32> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>16148// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>16149// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>16150// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>16151// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <4 x i32>16152// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32> [[TMP4]], <4 x i32> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP7]], ptr [[A]])16153// CHECK-NEXT:    ret void16154//16155void test_vst4q_s32(int32_t *a, int32x4x4_t b) {16156  vst4q_s32(a, b);16157}16158 16159// CHECK-LABEL: define dso_local void @test_vst4q_s64(16160// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16161// CHECK-NEXT:  [[ENTRY:.*:]]16162// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 016163// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 116164// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 216165// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 316166// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>16167// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>16168// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>16169// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>16170// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>16171// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>16172// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>16173// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x i64>16174// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], ptr [[A]])16175// CHECK-NEXT:    ret void16176//16177void test_vst4q_s64(int64_t *a, int64x2x4_t b) {16178  vst4q_s64(a, b);16179}16180 16181// CHECK-LABEL: define dso_local void @test_vst4q_mf8(16182// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16183// CHECK-NEXT:  [[ENTRY:.*:]]16184// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 016185// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 116186// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 216187// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 316188// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])16189// CHECK-NEXT:    ret void16190//16191void test_vst4q_mf8(mfloat8_t *a, mfloat8x16x4_t b) {16192  vst4q_mf8(a, b);16193}16194 16195// CHECK-LABEL: define dso_local void @test_vst4q_f16(16196// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x half>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16197// CHECK-NEXT:  [[ENTRY:.*:]]16198// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x half>] [[B_COERCE]], 016199// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i16>16200// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x half>] [[B_COERCE]], 116201// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i16>16202// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x half>] [[B_COERCE]], 216203// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i16>16204// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x half>] [[B_COERCE]], 316205// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x half> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i16>16206// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>16207// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>16208// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>16209// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8>16210// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>16211// CHECK-NEXT:    [[TMP9:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>16212// CHECK-NEXT:    [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x half>16213// CHECK-NEXT:    [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x half>16214// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v8f16.p0(<8 x half> [[TMP8]], <8 x half> [[TMP9]], <8 x half> [[TMP10]], <8 x half> [[TMP11]], ptr [[A]])16215// CHECK-NEXT:    ret void16216//16217void test_vst4q_f16(float16_t *a, float16x8x4_t b) {16218  vst4q_f16(a, b);16219}16220 16221// CHECK-LABEL: define dso_local void @test_vst4q_f32(16222// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x float>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16223// CHECK-NEXT:  [[ENTRY:.*:]]16224// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x float>] [[B_COERCE]], 016225// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i32>16226// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x float>] [[B_COERCE]], 116227// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i32>16228// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x float>] [[B_COERCE]], 216229// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_2_EXTRACT]] to <4 x i32>16230// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x float>] [[B_COERCE]], 316231// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x float> [[B_COERCE_FCA_3_EXTRACT]] to <4 x i32>16232// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>16233// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>16234// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <4 x i32> [[TMP2]] to <16 x i8>16235// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8>16236// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float>16237// CHECK-NEXT:    [[TMP9:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float>16238// CHECK-NEXT:    [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x float>16239// CHECK-NEXT:    [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x float>16240// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float> [[TMP8]], <4 x float> [[TMP9]], <4 x float> [[TMP10]], <4 x float> [[TMP11]], ptr [[A]])16241// CHECK-NEXT:    ret void16242//16243void test_vst4q_f32(float32_t *a, float32x4x4_t b) {16244  vst4q_f32(a, b);16245}16246 16247// CHECK-LABEL: define dso_local void @test_vst4q_f64(16248// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16249// CHECK-NEXT:  [[ENTRY:.*:]]16250// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 016251// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>16252// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 116253// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>16254// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 216255// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i64>16256// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 316257// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_3_EXTRACT]] to <2 x i64>16258// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>16259// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>16260// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>16261// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8>16262// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double>16263// CHECK-NEXT:    [[TMP9:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>16264// CHECK-NEXT:    [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x double>16265// CHECK-NEXT:    [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x double>16266// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double> [[TMP8]], <2 x double> [[TMP9]], <2 x double> [[TMP10]], <2 x double> [[TMP11]], ptr [[A]])16267// CHECK-NEXT:    ret void16268//16269void test_vst4q_f64(float64_t *a, float64x2x4_t b) {16270  vst4q_f64(a, b);16271}16272 16273// CHECK-LABEL: define dso_local void @test_vst4q_p8(16274// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16275// CHECK-NEXT:  [[ENTRY:.*:]]16276// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 016277// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 116278// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 216279// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 316280// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])16281// CHECK-NEXT:    ret void16282//16283void test_vst4q_p8(poly8_t *a, poly8x16x4_t b) {16284  vst4q_p8(a, b);16285}16286 16287// CHECK-LABEL: define dso_local void @test_vst4q_p16(16288// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i16>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16289// CHECK-NEXT:  [[ENTRY:.*:]]16290// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 016291// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 116292// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 216293// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i16>] [[B_COERCE]], 316294// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>16295// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>16296// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>16297// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>16298// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>16299// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>16300// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>16301// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x i16>16302// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> [[TMP4]], <8 x i16> [[TMP5]], <8 x i16> [[TMP6]], <8 x i16> [[TMP7]], ptr [[A]])16303// CHECK-NEXT:    ret void16304//16305void test_vst4q_p16(poly16_t *a, poly16x8x4_t b) {16306  vst4q_p16(a, b);16307}16308 16309// CHECK-LABEL: define dso_local void @test_vst4_u8(16310// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16311// CHECK-NEXT:  [[ENTRY:.*:]]16312// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 016313// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 116314// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 216315// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 316316// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])16317// CHECK-NEXT:    ret void16318//16319void test_vst4_u8(uint8_t *a, uint8x8x4_t b) {16320  vst4_u8(a, b);16321}16322 16323// CHECK-LABEL: define dso_local void @test_vst4_u16(16324// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16325// CHECK-NEXT:  [[ENTRY:.*:]]16326// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 016327// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 116328// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 216329// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 316330// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16331// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16332// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>16333// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>16334// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>16335// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>16336// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>16337// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>16338// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> [[TMP4]], <4 x i16> [[TMP5]], <4 x i16> [[TMP6]], <4 x i16> [[TMP7]], ptr [[A]])16339// CHECK-NEXT:    ret void16340//16341void test_vst4_u16(uint16_t *a, uint16x4x4_t b) {16342  vst4_u16(a, b);16343}16344 16345// CHECK-LABEL: define dso_local void @test_vst4_u32(16346// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16347// CHECK-NEXT:  [[ENTRY:.*:]]16348// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 016349// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 116350// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 216351// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 316352// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16353// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16354// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>16355// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>16356// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>16357// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>16358// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>16359// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>16360// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32> [[TMP4]], <2 x i32> [[TMP5]], <2 x i32> [[TMP6]], <2 x i32> [[TMP7]], ptr [[A]])16361// CHECK-NEXT:    ret void16362//16363void test_vst4_u32(uint32_t *a, uint32x2x4_t b) {16364  vst4_u32(a, b);16365}16366 16367// CHECK-LABEL: define dso_local void @test_vst4_u64(16368// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16369// CHECK-NEXT:  [[ENTRY:.*:]]16370// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 016371// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 116372// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 216373// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 316374// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16375// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16376// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>16377// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>16378// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>16379// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>16380// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>16381// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x i64>16382// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64> [[TMP4]], <1 x i64> [[TMP5]], <1 x i64> [[TMP6]], <1 x i64> [[TMP7]], ptr [[A]])16383// CHECK-NEXT:    ret void16384//16385void test_vst4_u64(uint64_t *a, uint64x1x4_t b) {16386  vst4_u64(a, b);16387}16388 16389// CHECK-LABEL: define dso_local void @test_vst4_s8(16390// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16391// CHECK-NEXT:  [[ENTRY:.*:]]16392// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 016393// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 116394// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 216395// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 316396// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])16397// CHECK-NEXT:    ret void16398//16399void test_vst4_s8(int8_t *a, int8x8x4_t b) {16400  vst4_s8(a, b);16401}16402 16403// CHECK-LABEL: define dso_local void @test_vst4_s16(16404// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16405// CHECK-NEXT:  [[ENTRY:.*:]]16406// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 016407// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 116408// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 216409// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 316410// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16411// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16412// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>16413// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>16414// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>16415// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>16416// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>16417// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>16418// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> [[TMP4]], <4 x i16> [[TMP5]], <4 x i16> [[TMP6]], <4 x i16> [[TMP7]], ptr [[A]])16419// CHECK-NEXT:    ret void16420//16421void test_vst4_s16(int16_t *a, int16x4x4_t b) {16422  vst4_s16(a, b);16423}16424 16425// CHECK-LABEL: define dso_local void @test_vst4_s32(16426// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i32>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16427// CHECK-NEXT:  [[ENTRY:.*:]]16428// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 016429// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 116430// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 216431// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[B_COERCE]], 316432// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16433// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16434// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>16435// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i32> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>16436// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>16437// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>16438// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>16439// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>16440// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32> [[TMP4]], <2 x i32> [[TMP5]], <2 x i32> [[TMP6]], <2 x i32> [[TMP7]], ptr [[A]])16441// CHECK-NEXT:    ret void16442//16443void test_vst4_s32(int32_t *a, int32x2x4_t b) {16444  vst4_s32(a, b);16445}16446 16447// CHECK-LABEL: define dso_local void @test_vst4_s64(16448// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16449// CHECK-NEXT:  [[ENTRY:.*:]]16450// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 016451// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 116452// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 216453// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 316454// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16455// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16456// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>16457// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>16458// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>16459// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>16460// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>16461// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x i64>16462// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64> [[TMP4]], <1 x i64> [[TMP5]], <1 x i64> [[TMP6]], <1 x i64> [[TMP7]], ptr [[A]])16463// CHECK-NEXT:    ret void16464//16465void test_vst4_s64(int64_t *a, int64x1x4_t b) {16466  vst4_s64(a, b);16467}16468 16469// CHECK-LABEL: define dso_local void @test_vst4_mf8(16470// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16471// CHECK-NEXT:  [[ENTRY:.*:]]16472// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 016473// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 116474// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 216475// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 316476// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])16477// CHECK-NEXT:    ret void16478//16479void test_vst4_mf8(mfloat8_t *a, mfloat8x8x4_t b) {16480  vst4_mf8(a, b);16481}16482 16483// CHECK-LABEL: define dso_local void @test_vst4_f16(16484// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x half>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16485// CHECK-NEXT:  [[ENTRY:.*:]]16486// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x half>] [[B_COERCE]], 016487// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_0_EXTRACT]] to <4 x i16>16488// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x half>] [[B_COERCE]], 116489// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_1_EXTRACT]] to <4 x i16>16490// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x half>] [[B_COERCE]], 216491// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_2_EXTRACT]] to <4 x i16>16492// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x half>] [[B_COERCE]], 316493// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x half> [[B_COERCE_FCA_3_EXTRACT]] to <4 x i16>16494// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>16495// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>16496// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>16497// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8>16498// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>16499// CHECK-NEXT:    [[TMP9:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>16500// CHECK-NEXT:    [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x half>16501// CHECK-NEXT:    [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x half>16502// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v4f16.p0(<4 x half> [[TMP8]], <4 x half> [[TMP9]], <4 x half> [[TMP10]], <4 x half> [[TMP11]], ptr [[A]])16503// CHECK-NEXT:    ret void16504//16505void test_vst4_f16(float16_t *a, float16x4x4_t b) {16506  vst4_f16(a, b);16507}16508 16509// CHECK-LABEL: define dso_local void @test_vst4_f32(16510// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x float>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16511// CHECK-NEXT:  [[ENTRY:.*:]]16512// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x float>] [[B_COERCE]], 016513// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i32>16514// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x float>] [[B_COERCE]], 116515// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i32>16516// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x float>] [[B_COERCE]], 216517// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i32>16518// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x float>] [[B_COERCE]], 316519// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x float> [[B_COERCE_FCA_3_EXTRACT]] to <2 x i32>16520// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>16521// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i32> [[TMP1]] to <8 x i8>16522// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <2 x i32> [[TMP2]] to <8 x i8>16523// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <2 x i32> [[TMP3]] to <8 x i8>16524// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float>16525// CHECK-NEXT:    [[TMP9:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float>16526// CHECK-NEXT:    [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x float>16527// CHECK-NEXT:    [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x float>16528// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float> [[TMP8]], <2 x float> [[TMP9]], <2 x float> [[TMP10]], <2 x float> [[TMP11]], ptr [[A]])16529// CHECK-NEXT:    ret void16530//16531void test_vst4_f32(float32_t *a, float32x2x4_t b) {16532  vst4_f32(a, b);16533}16534 16535// CHECK-LABEL: define dso_local void @test_vst4_f64(16536// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16537// CHECK-NEXT:  [[ENTRY:.*:]]16538// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 016539// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i6416540// CHECK-NEXT:    [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 016541// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 116542// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i6416543// CHECK-NEXT:    [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 016544// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 216545// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_2_EXTRACT]] to i6416546// CHECK-NEXT:    [[B_SROA_4_16_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 016547// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 316548// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_3_EXTRACT]] to i6416549// CHECK-NEXT:    [[B_SROA_6_24_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP3]], i32 016550// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>16551// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>16552// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <1 x i64> [[B_SROA_4_16_VEC_INSERT]] to <8 x i8>16553// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <1 x i64> [[B_SROA_6_24_VEC_INSERT]] to <8 x i8>16554// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double>16555// CHECK-NEXT:    [[TMP9:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double>16556// CHECK-NEXT:    [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x double>16557// CHECK-NEXT:    [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x double>16558// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double> [[TMP8]], <1 x double> [[TMP9]], <1 x double> [[TMP10]], <1 x double> [[TMP11]], ptr [[A]])16559// CHECK-NEXT:    ret void16560//16561void test_vst4_f64(float64_t *a, float64x1x4_t b) {16562  vst4_f64(a, b);16563}16564 16565// CHECK-LABEL: define dso_local void @test_vst4_p8(16566// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16567// CHECK-NEXT:  [[ENTRY:.*:]]16568// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 016569// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 116570// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 216571// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 316572// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])16573// CHECK-NEXT:    ret void16574//16575void test_vst4_p8(poly8_t *a, poly8x8x4_t b) {16576  vst4_p8(a, b);16577}16578 16579// CHECK-LABEL: define dso_local void @test_vst4_p16(16580// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <4 x i16>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16581// CHECK-NEXT:  [[ENTRY:.*:]]16582// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 016583// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 116584// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 216585// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i16>] [[B_COERCE]], 316586// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16587// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16588// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>16589// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x i16> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>16590// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>16591// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>16592// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>16593// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>16594// CHECK-NEXT:    call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> [[TMP4]], <4 x i16> [[TMP5]], <4 x i16> [[TMP6]], <4 x i16> [[TMP7]], ptr [[A]])16595// CHECK-NEXT:    ret void16596//16597void test_vst4_p16(poly16_t *a, poly16x4x4_t b) {16598  vst4_p16(a, b);16599}16600 16601// CHECK-LABEL: define dso_local %struct.float64x2x2_t @test_vld1q_f64_x2(16602// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16603// CHECK-NEXT:  [[ENTRY:.*:]]16604// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr [[A]])16605// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD1XN]], 016606// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double> } [[VLD1XN]], 116607// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T:%.*]] poison, <2 x double> [[VLD1XN_FCA_0_EXTRACT]], 0, 016608// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD1XN_FCA_1_EXTRACT]], 0, 116609// CHECK-NEXT:    ret [[STRUCT_FLOAT64X2X2_T]] [[DOTFCA_0_1_INSERT]]16610//16611float64x2x2_t test_vld1q_f64_x2(float64_t const *a) {16612  return vld1q_f64_x2(a);16613}16614 16615// CHECK-LABEL: define dso_local %struct.mfloat8x16x2_t @test_vld1q_mf8_x2(16616// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16617// CHECK-NEXT:  [[ENTRY:.*:]]16618// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr [[A]])16619// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD1XN]], 016620// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8> } [[VLD1XN]], 116621// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T:%.*]] poison, <16 x i8> [[VLD1XN_FCA_0_EXTRACT]], 0, 016622// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD1XN_FCA_1_EXTRACT]], 0, 116623// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_1_INSERT]]16624//16625mfloat8x16x2_t test_vld1q_mf8_x2(mfloat8_t const *a) {16626  return vld1q_mf8_x2(a);16627}16628 16629// CHECK-LABEL: define dso_local %struct.poly64x2x2_t @test_vld1q_p64_x2(16630// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16631// CHECK-NEXT:  [[ENTRY:.*:]]16632// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr [[A]])16633// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD1XN]], 016634// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[VLD1XN]], 116635// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X2_T:%.*]] poison, <2 x i64> [[VLD1XN_FCA_0_EXTRACT]], 0, 016636// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X2_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD1XN_FCA_1_EXTRACT]], 0, 116637// CHECK-NEXT:    ret [[STRUCT_POLY64X2X2_T]] [[DOTFCA_0_1_INSERT]]16638//16639poly64x2x2_t test_vld1q_p64_x2(poly64_t const *a) {16640  return vld1q_p64_x2(a);16641}16642 16643// CHECK-LABEL: define dso_local %struct.float64x1x2_t @test_vld1_f64_x2(16644// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16645// CHECK-NEXT:  [[ENTRY:.*:]]16646// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr [[A]])16647// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD1XN]], 016648// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double> } [[VLD1XN]], 116649// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T:%.*]] poison, <1 x double> [[VLD1XN_FCA_0_EXTRACT]], 0, 016650// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD1XN_FCA_1_EXTRACT]], 0, 116651// CHECK-NEXT:    ret [[STRUCT_FLOAT64X1X2_T]] [[DOTFCA_0_1_INSERT]]16652//16653float64x1x2_t test_vld1_f64_x2(float64_t const *a) {16654  return vld1_f64_x2(a);16655}16656 16657// CHECK-LABEL: define dso_local %struct.mfloat8x8x2_t @test_vld1_mf8_x2(16658// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16659// CHECK-NEXT:  [[ENTRY:.*:]]16660// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr [[A]])16661// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD1XN]], 016662// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8> } [[VLD1XN]], 116663// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T:%.*]] poison, <8 x i8> [[VLD1XN_FCA_0_EXTRACT]], 0, 016664// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD1XN_FCA_1_EXTRACT]], 0, 116665// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_1_INSERT]]16666//16667mfloat8x8x2_t test_vld1_mf8_x2(mfloat8_t const *a) {16668  return vld1_mf8_x2(a);16669}16670 16671// CHECK-LABEL: define dso_local %struct.poly64x1x2_t @test_vld1_p64_x2(16672// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16673// CHECK-NEXT:  [[ENTRY:.*:]]16674// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr [[A]])16675// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD1XN]], 016676// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64> } [[VLD1XN]], 116677// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X2_T:%.*]] poison, <1 x i64> [[VLD1XN_FCA_0_EXTRACT]], 0, 016678// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X2_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD1XN_FCA_1_EXTRACT]], 0, 116679// CHECK-NEXT:    ret [[STRUCT_POLY64X1X2_T]] [[DOTFCA_0_1_INSERT]]16680//16681poly64x1x2_t test_vld1_p64_x2(poly64_t const *a) {16682  return vld1_p64_x2(a);16683}16684 16685// CHECK-LABEL: define dso_local %struct.float64x2x3_t @test_vld1q_f64_x3(16686// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16687// CHECK-NEXT:  [[ENTRY:.*:]]16688// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0(ptr [[A]])16689// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD1XN]], 016690// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD1XN]], 116691// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double> } [[VLD1XN]], 216692// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T:%.*]] poison, <2 x double> [[VLD1XN_FCA_0_EXTRACT]], 0, 016693// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD1XN_FCA_1_EXTRACT]], 0, 116694// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD1XN_FCA_2_EXTRACT]], 0, 216695// CHECK-NEXT:    ret [[STRUCT_FLOAT64X2X3_T]] [[DOTFCA_0_2_INSERT]]16696//16697float64x2x3_t test_vld1q_f64_x3(float64_t const *a) {16698  return vld1q_f64_x3(a);16699}16700 16701// CHECK-LABEL: define dso_local %struct.mfloat8x16x3_t @test_vld1q_mf8_x3(16702// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {16703// CHECK-NEXT:  [[ENTRY:.*:]]16704// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(ptr [[PTR]])16705// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD1XN]], 016706// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD1XN]], 116707// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD1XN]], 216708// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T:%.*]] poison, <16 x i8> [[VLD1XN_FCA_0_EXTRACT]], 0, 016709// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD1XN_FCA_1_EXTRACT]], 0, 116710// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD1XN_FCA_2_EXTRACT]], 0, 216711// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X3_T]] [[DOTFCA_0_2_INSERT]]16712//16713mfloat8x16x3_t test_vld1q_mf8_x3(mfloat8_t const *ptr) {16714  return vld1q_mf8_x3(ptr);16715}16716 16717// CHECK-LABEL: define dso_local %struct.poly64x2x3_t @test_vld1q_p64_x3(16718// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16719// CHECK-NEXT:  [[ENTRY:.*:]]16720// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(ptr [[A]])16721// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD1XN]], 016722// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD1XN]], 116723// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD1XN]], 216724// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T:%.*]] poison, <2 x i64> [[VLD1XN_FCA_0_EXTRACT]], 0, 016725// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD1XN_FCA_1_EXTRACT]], 0, 116726// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD1XN_FCA_2_EXTRACT]], 0, 216727// CHECK-NEXT:    ret [[STRUCT_POLY64X2X3_T]] [[DOTFCA_0_2_INSERT]]16728//16729poly64x2x3_t test_vld1q_p64_x3(poly64_t const *a) {16730  return vld1q_p64_x3(a);16731}16732 16733// CHECK-LABEL: define dso_local %struct.float64x1x3_t @test_vld1_f64_x3(16734// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16735// CHECK-NEXT:  [[ENTRY:.*:]]16736// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0(ptr [[A]])16737// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD1XN]], 016738// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD1XN]], 116739// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double> } [[VLD1XN]], 216740// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T:%.*]] poison, <1 x double> [[VLD1XN_FCA_0_EXTRACT]], 0, 016741// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD1XN_FCA_1_EXTRACT]], 0, 116742// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD1XN_FCA_2_EXTRACT]], 0, 216743// CHECK-NEXT:    ret [[STRUCT_FLOAT64X1X3_T]] [[DOTFCA_0_2_INSERT]]16744//16745float64x1x3_t test_vld1_f64_x3(float64_t const *a) {16746  return vld1_f64_x3(a);16747}16748 16749 16750// CHECK-LABEL: define dso_local %struct.mfloat8x8x3_t @test_vld1_mf8_x3(16751// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16752// CHECK-NEXT:  [[ENTRY:.*:]]16753// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr [[A]])16754// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD1XN]], 016755// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD1XN]], 116756// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD1XN]], 216757// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T:%.*]] poison, <8 x i8> [[VLD1XN_FCA_0_EXTRACT]], 0, 016758// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD1XN_FCA_1_EXTRACT]], 0, 116759// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD1XN_FCA_2_EXTRACT]], 0, 216760// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X3_T]] [[DOTFCA_0_2_INSERT]]16761//16762mfloat8x8x3_t test_vld1_mf8_x3(mfloat8_t const *a) {16763  return vld1_mf8_x3(a);16764}16765 16766// CHECK-LABEL: define dso_local %struct.poly64x1x3_t @test_vld1_p64_x3(16767// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16768// CHECK-NEXT:  [[ENTRY:.*:]]16769// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(ptr [[A]])16770// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD1XN]], 016771// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD1XN]], 116772// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD1XN]], 216773// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T:%.*]] poison, <1 x i64> [[VLD1XN_FCA_0_EXTRACT]], 0, 016774// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD1XN_FCA_1_EXTRACT]], 0, 116775// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD1XN_FCA_2_EXTRACT]], 0, 216776// CHECK-NEXT:    ret [[STRUCT_POLY64X1X3_T]] [[DOTFCA_0_2_INSERT]]16777//16778poly64x1x3_t test_vld1_p64_x3(poly64_t const *a) {16779  return vld1_p64_x3(a);16780}16781 16782// CHECK-LABEL: define dso_local %struct.float64x2x4_t @test_vld1q_f64_x4(16783// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16784// CHECK-NEXT:  [[ENTRY:.*:]]16785// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0(ptr [[A]])16786// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD1XN]], 016787// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD1XN]], 116788// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD1XN]], 216789// CHECK-NEXT:    [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD1XN]], 316790// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T:%.*]] poison, <2 x double> [[VLD1XN_FCA_0_EXTRACT]], 0, 016791// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x double> [[VLD1XN_FCA_1_EXTRACT]], 0, 116792// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x double> [[VLD1XN_FCA_2_EXTRACT]], 0, 216793// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x double> [[VLD1XN_FCA_3_EXTRACT]], 0, 316794// CHECK-NEXT:    ret [[STRUCT_FLOAT64X2X4_T]] [[DOTFCA_0_3_INSERT]]16795//16796float64x2x4_t test_vld1q_f64_x4(float64_t const *a) {16797  return vld1q_f64_x4(a);16798}16799 16800// CHECK-LABEL: define dso_local %struct.mfloat8x16x4_t @test_vld1q_mf8_x4(16801// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {16802// CHECK-NEXT:  [[ENTRY:.*:]]16803// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0(ptr [[PTR]])16804// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD1XN]], 016805// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD1XN]], 116806// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD1XN]], 216807// CHECK-NEXT:    [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD1XN]], 316808// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T:%.*]] poison, <16 x i8> [[VLD1XN_FCA_0_EXTRACT]], 0, 016809// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> [[VLD1XN_FCA_1_EXTRACT]], 0, 116810// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_1_INSERT]], <16 x i8> [[VLD1XN_FCA_2_EXTRACT]], 0, 216811// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_2_INSERT]], <16 x i8> [[VLD1XN_FCA_3_EXTRACT]], 0, 316812// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X4_T]] [[DOTFCA_0_3_INSERT]]16813//16814mfloat8x16x4_t test_vld1q_mf8_x4(mfloat8_t const *ptr) {16815  return vld1q_mf8_x4(ptr);16816}16817 16818// CHECK-LABEL: define dso_local %struct.poly64x2x4_t @test_vld1q_p64_x4(16819// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16820// CHECK-NEXT:  [[ENTRY:.*:]]16821// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0(ptr [[A]])16822// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD1XN]], 016823// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD1XN]], 116824// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD1XN]], 216825// CHECK-NEXT:    [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD1XN]], 316826// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T:%.*]] poison, <2 x i64> [[VLD1XN_FCA_0_EXTRACT]], 0, 016827// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_0_INSERT]], <2 x i64> [[VLD1XN_FCA_1_EXTRACT]], 0, 116828// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_1_INSERT]], <2 x i64> [[VLD1XN_FCA_2_EXTRACT]], 0, 216829// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_2_INSERT]], <2 x i64> [[VLD1XN_FCA_3_EXTRACT]], 0, 316830// CHECK-NEXT:    ret [[STRUCT_POLY64X2X4_T]] [[DOTFCA_0_3_INSERT]]16831//16832poly64x2x4_t test_vld1q_p64_x4(poly64_t const *a) {16833  return vld1q_p64_x4(a);16834}16835 16836// CHECK-LABEL: define dso_local %struct.float64x1x4_t @test_vld1_f64_x4(16837// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16838// CHECK-NEXT:  [[ENTRY:.*:]]16839// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0(ptr [[A]])16840// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD1XN]], 016841// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD1XN]], 116842// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD1XN]], 216843// CHECK-NEXT:    [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD1XN]], 316844// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T:%.*]] poison, <1 x double> [[VLD1XN_FCA_0_EXTRACT]], 0, 016845// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x double> [[VLD1XN_FCA_1_EXTRACT]], 0, 116846// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x double> [[VLD1XN_FCA_2_EXTRACT]], 0, 216847// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x double> [[VLD1XN_FCA_3_EXTRACT]], 0, 316848// CHECK-NEXT:    ret [[STRUCT_FLOAT64X1X4_T]] [[DOTFCA_0_3_INSERT]]16849//16850float64x1x4_t test_vld1_f64_x4(float64_t const *a) {16851  return vld1_f64_x4(a);16852}16853 16854// CHECK-LABEL: define dso_local %struct.mfloat8x8x4_t @test_vld1_mf8_x4(16855// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16856// CHECK-NEXT:  [[ENTRY:.*:]]16857// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0(ptr [[A]])16858// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD1XN]], 016859// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD1XN]], 116860// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD1XN]], 216861// CHECK-NEXT:    [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD1XN]], 316862// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T:%.*]] poison, <8 x i8> [[VLD1XN_FCA_0_EXTRACT]], 0, 016863// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[VLD1XN_FCA_1_EXTRACT]], 0, 116864// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x i8> [[VLD1XN_FCA_2_EXTRACT]], 0, 216865// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x i8> [[VLD1XN_FCA_3_EXTRACT]], 0, 316866// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X4_T]] [[DOTFCA_0_3_INSERT]]16867//16868mfloat8x8x4_t test_vld1_mf8_x4(mfloat8_t const *a) {16869  return vld1_mf8_x4(a);16870}16871 16872// CHECK-LABEL: define dso_local %struct.poly64x1x4_t @test_vld1_p64_x4(16873// CHECK-SAME: ptr noundef [[A:%.*]]) #[[ATTR0]] {16874// CHECK-NEXT:  [[ENTRY:.*:]]16875// CHECK-NEXT:    [[VLD1XN:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0(ptr [[A]])16876// CHECK-NEXT:    [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD1XN]], 016877// CHECK-NEXT:    [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD1XN]], 116878// CHECK-NEXT:    [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD1XN]], 216879// CHECK-NEXT:    [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD1XN]], 316880// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T:%.*]] poison, <1 x i64> [[VLD1XN_FCA_0_EXTRACT]], 0, 016881// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_0_INSERT]], <1 x i64> [[VLD1XN_FCA_1_EXTRACT]], 0, 116882// CHECK-NEXT:    [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_1_INSERT]], <1 x i64> [[VLD1XN_FCA_2_EXTRACT]], 0, 216883// CHECK-NEXT:    [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_2_INSERT]], <1 x i64> [[VLD1XN_FCA_3_EXTRACT]], 0, 316884// CHECK-NEXT:    ret [[STRUCT_POLY64X1X4_T]] [[DOTFCA_0_3_INSERT]]16885//16886poly64x1x4_t test_vld1_p64_x4(poly64_t const *a) {16887  return vld1_p64_x4(a);16888}16889 16890// CHECK-LABEL: define dso_local void @test_vst1q_mf8_x2(16891// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16892// CHECK-NEXT:  [[ENTRY:.*:]]16893// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 016894// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] [[B_COERCE]], 116895// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])16896// CHECK-NEXT:    ret void16897//16898void test_vst1q_mf8_x2(mfloat8_t *a, mfloat8x16x2_t b) {16899  vst1q_mf8_x2(a, b);16900}16901 16902// CHECK-LABEL: define dso_local void @test_vst1q_f64_x2(16903// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16904// CHECK-NEXT:  [[ENTRY:.*:]]16905// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x double>] [[B_COERCE]], 016906// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>16907// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x double>] [[B_COERCE]], 116908// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>16909// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>16910// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>16911// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x double>16912// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>16913// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double> [[TMP4]], <2 x double> [[TMP5]], ptr [[A]])16914// CHECK-NEXT:    ret void16915//16916void test_vst1q_f64_x2(float64_t *a, float64x2x2_t b) {16917  vst1q_f64_x2(a, b);16918}16919 16920// CHECK-LABEL: define dso_local void @test_vst1q_p64_x2(16921// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16922// CHECK-NEXT:  [[ENTRY:.*:]]16923// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 016924// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i64>] [[B_COERCE]], 116925// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>16926// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>16927// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>16928// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>16929// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64> [[TMP2]], <2 x i64> [[TMP3]], ptr [[A]])16930// CHECK-NEXT:    ret void16931//16932void test_vst1q_p64_x2(poly64_t *a, poly64x2x2_t b) {16933  vst1q_p64_x2(a, b);16934}16935 16936// CHECK-LABEL: define dso_local void @test_vst1_mf8_x2(16937// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16938// CHECK-NEXT:  [[ENTRY:.*:]]16939// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 016940// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] [[B_COERCE]], 116941// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], ptr [[A]])16942// CHECK-NEXT:    ret void16943//16944void test_vst1_mf8_x2(mfloat8_t *a, mfloat8x8x2_t b) {16945  vst1_mf8_x2(a, b);16946}16947 16948// CHECK-LABEL: define dso_local void @test_vst1_f64_x2(16949// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16950// CHECK-NEXT:  [[ENTRY:.*:]]16951// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x double>] [[B_COERCE]], 016952// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i6416953// CHECK-NEXT:    [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 016954// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x double>] [[B_COERCE]], 116955// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i6416956// CHECK-NEXT:    [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 016957// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>16958// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>16959// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x double>16960// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>16961// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double> [[TMP4]], <1 x double> [[TMP5]], ptr [[A]])16962// CHECK-NEXT:    ret void16963//16964void test_vst1_f64_x2(float64_t *a, float64x1x2_t b) {16965  vst1_f64_x2(a, b);16966}16967 16968// CHECK-LABEL: define dso_local void @test_vst1_p64_x2(16969// CHECK-SAME: ptr noundef [[A:%.*]], [2 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {16970// CHECK-NEXT:  [[ENTRY:.*:]]16971// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 016972// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <1 x i64>] [[B_COERCE]], 116973// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>16974// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>16975// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>16976// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>16977// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64> [[TMP2]], <1 x i64> [[TMP3]], ptr [[A]])16978// CHECK-NEXT:    ret void16979//16980void test_vst1_p64_x2(poly64_t *a, poly64x1x2_t b) {16981  vst1_p64_x2(a, b);16982}16983 16984// CHECK-LABEL: define dso_local void @test_vst1q_mf8_x3(16985// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16986// CHECK-NEXT:  [[ENTRY:.*:]]16987// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 016988// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 116989// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x i8>] [[B_COERCE]], 216990// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])16991// CHECK-NEXT:    ret void16992//16993void test_vst1q_mf8_x3(mfloat8_t *a, mfloat8x16x3_t b) {16994  vst1q_mf8_x3(a, b);16995}16996 16997// CHECK-LABEL: define dso_local void @test_vst1q_f64_x3(16998// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {16999// CHECK-NEXT:  [[ENTRY:.*:]]17000// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 017001// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>17002// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 117003// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>17004// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x double>] [[B_COERCE]], 217005// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i64>17006// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>17007// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>17008// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>17009// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x double>17010// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double>17011// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>17012// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double> [[TMP6]], <2 x double> [[TMP7]], <2 x double> [[TMP8]], ptr [[A]])17013// CHECK-NEXT:    ret void17014//17015void test_vst1q_f64_x3(float64_t *a, float64x2x3_t b) {17016  vst1q_f64_x3(a, b);17017}17018 17019// CHECK-LABEL: define dso_local void @test_vst1q_p64_x3(17020// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {17021// CHECK-NEXT:  [[ENTRY:.*:]]17022// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 017023// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 117024// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i64>] [[B_COERCE]], 217025// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>17026// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>17027// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>17028// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>17029// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>17030// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>17031// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64> [[TMP3]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], ptr [[A]])17032// CHECK-NEXT:    ret void17033//17034void test_vst1q_p64_x3(poly64_t *a, poly64x2x3_t b) {17035  vst1q_p64_x3(a, b);17036}17037 17038// CHECK-LABEL: define dso_local void @test_vst1_mf8_x3(17039// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {17040// CHECK-NEXT:  [[ENTRY:.*:]]17041// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 017042// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 117043// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] [[B_COERCE]], 217044// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], ptr [[A]])17045// CHECK-NEXT:    ret void17046//17047void test_vst1_mf8_x3(mfloat8_t *a, mfloat8x8x3_t b) {17048  vst1_mf8_x3(a, b);17049}17050 17051// CHECK-LABEL: define dso_local void @test_vst1_f64_x3(17052// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {17053// CHECK-NEXT:  [[ENTRY:.*:]]17054// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 017055// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i6417056// CHECK-NEXT:    [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 017057// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 117058// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i6417059// CHECK-NEXT:    [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 017060// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x double>] [[B_COERCE]], 217061// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_2_EXTRACT]] to i6417062// CHECK-NEXT:    [[B_SROA_4_16_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 017063// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>17064// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>17065// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <1 x i64> [[B_SROA_4_16_VEC_INSERT]] to <8 x i8>17066// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>17067// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double>17068// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double>17069// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double> [[TMP6]], <1 x double> [[TMP7]], <1 x double> [[TMP8]], ptr [[A]])17070// CHECK-NEXT:    ret void17071//17072void test_vst1_f64_x3(float64_t *a, float64x1x3_t b) {17073  vst1_f64_x3(a, b);17074}17075 17076// CHECK-LABEL: define dso_local void @test_vst1_p64_x3(17077// CHECK-SAME: ptr noundef [[A:%.*]], [3 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {17078// CHECK-NEXT:  [[ENTRY:.*:]]17079// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 017080// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 117081// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <1 x i64>] [[B_COERCE]], 217082// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>17083// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>17084// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>17085// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>17086// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>17087// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>17088// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64> [[TMP3]], <1 x i64> [[TMP4]], <1 x i64> [[TMP5]], ptr [[A]])17089// CHECK-NEXT:    ret void17090//17091void test_vst1_p64_x3(poly64_t *a, poly64x1x3_t b) {17092  vst1_p64_x3(a, b);17093}17094 17095// CHECK-LABEL: define dso_local void @test_vst1q_mf8_x4(17096// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <16 x i8>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {17097// CHECK-NEXT:  [[ENTRY:.*:]]17098// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 017099// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 117100// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 217101// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x i8>] [[B_COERCE]], 317102// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8> [[B_COERCE_FCA_0_EXTRACT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])17103// CHECK-NEXT:    ret void17104//17105void test_vst1q_mf8_x4(mfloat8_t *a, mfloat8x16x4_t b) {17106  vst1q_mf8_x4(a, b);17107}17108 17109// CHECK-LABEL: define dso_local void @test_vst1q_f64_x4(17110// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x double>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {17111// CHECK-NEXT:  [[ENTRY:.*:]]17112// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 017113// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_0_EXTRACT]] to <2 x i64>17114// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 117115// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_1_EXTRACT]] to <2 x i64>17116// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 217117// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_2_EXTRACT]] to <2 x i64>17118// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x double>] [[B_COERCE]], 317119// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x double> [[B_COERCE_FCA_3_EXTRACT]] to <2 x i64>17120// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>17121// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>17122// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>17123// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8>17124// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double>17125// CHECK-NEXT:    [[TMP9:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>17126// CHECK-NEXT:    [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x double>17127// CHECK-NEXT:    [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x double>17128// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double> [[TMP8]], <2 x double> [[TMP9]], <2 x double> [[TMP10]], <2 x double> [[TMP11]], ptr [[A]])17129// CHECK-NEXT:    ret void17130//17131void test_vst1q_f64_x4(float64_t *a, float64x2x4_t b) {17132  vst1q_f64_x4(a, b);17133}17134 17135// CHECK-LABEL: define dso_local void @test_vst1q_p64_x4(17136// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <2 x i64>] alignstack(16) [[B_COERCE:%.*]]) #[[ATTR0]] {17137// CHECK-NEXT:  [[ENTRY:.*:]]17138// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 017139// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 117140// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 217141// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i64>] [[B_COERCE]], 317142// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <16 x i8>17143// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <16 x i8>17144// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <16 x i8>17145// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <16 x i8>17146// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>17147// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>17148// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>17149// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <16 x i8> [[TMP3]] to <2 x i64>17150// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], ptr [[A]])17151// CHECK-NEXT:    ret void17152//17153void test_vst1q_p64_x4(poly64_t *a, poly64x2x4_t b) {17154  vst1q_p64_x4(a, b);17155}17156 17157// CHECK-LABEL: define dso_local void @test_vst1_mf8_x4(17158// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <8 x i8>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {17159// CHECK-NEXT:  [[ENTRY:.*:]]17160// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 017161// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 117162// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 217163// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] [[B_COERCE]], 317164// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], ptr [[A]])17165// CHECK-NEXT:    ret void17166//17167void test_vst1_mf8_x4(mfloat8_t *a, mfloat8x8x4_t b) {17168  vst1_mf8_x4(a, b);17169}17170 17171// CHECK-LABEL: define dso_local void @test_vst1_f64_x4(17172// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x double>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {17173// CHECK-NEXT:  [[ENTRY:.*:]]17174// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 017175// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_0_EXTRACT]] to i6417176// CHECK-NEXT:    [[B_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 017177// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 117178// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_1_EXTRACT]] to i6417179// CHECK-NEXT:    [[B_SROA_2_8_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 017180// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 217181// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_2_EXTRACT]] to i6417182// CHECK-NEXT:    [[B_SROA_4_16_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 017183// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x double>] [[B_COERCE]], 317184// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x double> [[B_COERCE_FCA_3_EXTRACT]] to i6417185// CHECK-NEXT:    [[B_SROA_6_24_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP3]], i32 017186// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i64> [[B_SROA_0_0_VEC_INSERT]] to <8 x i8>17187// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <1 x i64> [[B_SROA_2_8_VEC_INSERT]] to <8 x i8>17188// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <1 x i64> [[B_SROA_4_16_VEC_INSERT]] to <8 x i8>17189// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <1 x i64> [[B_SROA_6_24_VEC_INSERT]] to <8 x i8>17190// CHECK-NEXT:    [[TMP8:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double>17191// CHECK-NEXT:    [[TMP9:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double>17192// CHECK-NEXT:    [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x double>17193// CHECK-NEXT:    [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x double>17194// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double> [[TMP8]], <1 x double> [[TMP9]], <1 x double> [[TMP10]], <1 x double> [[TMP11]], ptr [[A]])17195// CHECK-NEXT:    ret void17196//17197void test_vst1_f64_x4(float64_t *a, float64x1x4_t b) {17198  vst1_f64_x4(a, b);17199}17200 17201// CHECK-LABEL: define dso_local void @test_vst1_p64_x4(17202// CHECK-SAME: ptr noundef [[A:%.*]], [4 x <1 x i64>] alignstack(8) [[B_COERCE:%.*]]) #[[ATTR0]] {17203// CHECK-NEXT:  [[ENTRY:.*:]]17204// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 017205// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 117206// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 217207// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <1 x i64>] [[B_COERCE]], 317208// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_0_EXTRACT]] to <8 x i8>17209// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_1_EXTRACT]] to <8 x i8>17210// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_2_EXTRACT]] to <8 x i8>17211// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i64> [[B_COERCE_FCA_3_EXTRACT]] to <8 x i8>17212// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>17213// CHECK-NEXT:    [[TMP5:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>17214// CHECK-NEXT:    [[TMP6:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>17215// CHECK-NEXT:    [[TMP7:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x i64>17216// CHECK-NEXT:    call void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64> [[TMP4]], <1 x i64> [[TMP5]], <1 x i64> [[TMP6]], <1 x i64> [[TMP7]], ptr [[A]])17217// CHECK-NEXT:    ret void17218//17219void test_vst1_p64_x4(poly64_t *a, poly64x1x4_t b) {17220  vst1_p64_x4(a, b);17221}17222 17223// CHECK-LABEL: define dso_local i64 @test_vceqd_s64(17224// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17225// CHECK-NEXT:  [[ENTRY:.*:]]17226// CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i64 [[A]], [[B]]17227// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417228// CHECK-NEXT:    ret i64 [[VCEQD_I]]17229//17230uint64_t test_vceqd_s64(int64_t a, int64_t b) {17231  return (uint64_t)vceqd_s64(a, b);17232}17233 17234// CHECK-LABEL: define dso_local i64 @test_vceqd_u64(17235// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17236// CHECK-NEXT:  [[ENTRY:.*:]]17237// CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i64 [[A]], [[B]]17238// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417239// CHECK-NEXT:    ret i64 [[VCEQD_I]]17240//17241uint64_t test_vceqd_u64(uint64_t a, uint64_t b) {17242  return (int64_t)vceqd_u64(a, b);17243}17244 17245// CHECK-LABEL: define dso_local i64 @test_vceqzd_s64(17246// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17247// CHECK-NEXT:  [[ENTRY:.*:]]17248// CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i64 [[A]], 017249// CHECK-NEXT:    [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i6417250// CHECK-NEXT:    ret i64 [[VCEQZ_I]]17251//17252uint64_t test_vceqzd_s64(int64_t a) {17253  return (uint64_t)vceqzd_s64(a);17254}17255 17256// CHECK-LABEL: define dso_local i64 @test_vceqzd_u64(17257// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17258// CHECK-NEXT:  [[ENTRY:.*:]]17259// CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i64 [[A]], 017260// CHECK-NEXT:    [[VCEQZD_I:%.*]] = sext i1 [[TMP0]] to i6417261// CHECK-NEXT:    ret i64 [[VCEQZD_I]]17262//17263int64_t test_vceqzd_u64(int64_t a) {17264  return (int64_t)vceqzd_u64(a);17265}17266 17267// CHECK-LABEL: define dso_local i64 @test_vcged_s64(17268// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17269// CHECK-NEXT:  [[ENTRY:.*:]]17270// CHECK-NEXT:    [[TMP0:%.*]] = icmp sge i64 [[A]], [[B]]17271// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417272// CHECK-NEXT:    ret i64 [[VCEQD_I]]17273//17274uint64_t test_vcged_s64(int64_t a, int64_t b) {17275  return (uint64_t)vcged_s64(a, b);17276}17277 17278// CHECK-LABEL: define dso_local i64 @test_vcged_u64(17279// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17280// CHECK-NEXT:  [[ENTRY:.*:]]17281// CHECK-NEXT:    [[TMP0:%.*]] = icmp uge i64 [[A]], [[B]]17282// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417283// CHECK-NEXT:    ret i64 [[VCEQD_I]]17284//17285uint64_t test_vcged_u64(uint64_t a, uint64_t b) {17286  return (uint64_t)vcged_u64(a, b);17287}17288 17289// CHECK-LABEL: define dso_local i64 @test_vcgezd_s64(17290// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17291// CHECK-NEXT:  [[ENTRY:.*:]]17292// CHECK-NEXT:    [[TMP0:%.*]] = icmp sge i64 [[A]], 017293// CHECK-NEXT:    [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i6417294// CHECK-NEXT:    ret i64 [[VCGEZ_I]]17295//17296uint64_t test_vcgezd_s64(int64_t a) {17297  return (uint64_t)vcgezd_s64(a);17298}17299 17300// CHECK-LABEL: define dso_local i64 @test_vcgtd_s64(17301// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17302// CHECK-NEXT:  [[ENTRY:.*:]]17303// CHECK-NEXT:    [[TMP0:%.*]] = icmp sgt i64 [[A]], [[B]]17304// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417305// CHECK-NEXT:    ret i64 [[VCEQD_I]]17306//17307uint64_t test_vcgtd_s64(int64_t a, int64_t b) {17308  return (uint64_t)vcgtd_s64(a, b);17309}17310 17311// CHECK-LABEL: define dso_local i64 @test_vcgtd_u64(17312// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17313// CHECK-NEXT:  [[ENTRY:.*:]]17314// CHECK-NEXT:    [[TMP0:%.*]] = icmp ugt i64 [[A]], [[B]]17315// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417316// CHECK-NEXT:    ret i64 [[VCEQD_I]]17317//17318uint64_t test_vcgtd_u64(uint64_t a, uint64_t b) {17319  return (uint64_t)vcgtd_u64(a, b);17320}17321 17322// CHECK-LABEL: define dso_local i64 @test_vcgtzd_s64(17323// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17324// CHECK-NEXT:  [[ENTRY:.*:]]17325// CHECK-NEXT:    [[TMP0:%.*]] = icmp sgt i64 [[A]], 017326// CHECK-NEXT:    [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i6417327// CHECK-NEXT:    ret i64 [[VCGTZ_I]]17328//17329uint64_t test_vcgtzd_s64(int64_t a) {17330  return (uint64_t)vcgtzd_s64(a);17331}17332 17333// CHECK-LABEL: define dso_local i64 @test_vcled_s64(17334// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17335// CHECK-NEXT:  [[ENTRY:.*:]]17336// CHECK-NEXT:    [[TMP0:%.*]] = icmp sle i64 [[A]], [[B]]17337// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417338// CHECK-NEXT:    ret i64 [[VCEQD_I]]17339//17340uint64_t test_vcled_s64(int64_t a, int64_t b) {17341  return (uint64_t)vcled_s64(a, b);17342}17343 17344// CHECK-LABEL: define dso_local i64 @test_vcled_u64(17345// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17346// CHECK-NEXT:  [[ENTRY:.*:]]17347// CHECK-NEXT:    [[TMP0:%.*]] = icmp ule i64 [[A]], [[B]]17348// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417349// CHECK-NEXT:    ret i64 [[VCEQD_I]]17350//17351uint64_t test_vcled_u64(uint64_t a, uint64_t b) {17352  return (uint64_t)vcled_u64(a, b);17353}17354 17355// CHECK-LABEL: define dso_local i64 @test_vclezd_s64(17356// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17357// CHECK-NEXT:  [[ENTRY:.*:]]17358// CHECK-NEXT:    [[TMP0:%.*]] = icmp sle i64 [[A]], 017359// CHECK-NEXT:    [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i6417360// CHECK-NEXT:    ret i64 [[VCLEZ_I]]17361//17362uint64_t test_vclezd_s64(int64_t a) {17363  return (uint64_t)vclezd_s64(a);17364}17365 17366// CHECK-LABEL: define dso_local i64 @test_vcltd_s64(17367// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17368// CHECK-NEXT:  [[ENTRY:.*:]]17369// CHECK-NEXT:    [[TMP0:%.*]] = icmp slt i64 [[A]], [[B]]17370// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417371// CHECK-NEXT:    ret i64 [[VCEQD_I]]17372//17373uint64_t test_vcltd_s64(int64_t a, int64_t b) {17374  return (uint64_t)vcltd_s64(a, b);17375}17376 17377// CHECK-LABEL: define dso_local i64 @test_vcltd_u64(17378// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17379// CHECK-NEXT:  [[ENTRY:.*:]]17380// CHECK-NEXT:    [[TMP0:%.*]] = icmp ult i64 [[A]], [[B]]17381// CHECK-NEXT:    [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i6417382// CHECK-NEXT:    ret i64 [[VCEQD_I]]17383//17384uint64_t test_vcltd_u64(uint64_t a, uint64_t b) {17385  return (uint64_t)vcltd_u64(a, b);17386}17387 17388// CHECK-LABEL: define dso_local i64 @test_vcltzd_s64(17389// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17390// CHECK-NEXT:  [[ENTRY:.*:]]17391// CHECK-NEXT:    [[TMP0:%.*]] = icmp slt i64 [[A]], 017392// CHECK-NEXT:    [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i6417393// CHECK-NEXT:    ret i64 [[VCLTZ_I]]17394//17395uint64_t test_vcltzd_s64(int64_t a) {17396  return (uint64_t)vcltzd_s64(a);17397}17398 17399// CHECK-LABEL: define dso_local i64 @test_vtstd_s64(17400// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17401// CHECK-NEXT:  [[ENTRY:.*:]]17402// CHECK-NEXT:    [[TMP0:%.*]] = and i64 [[A]], [[B]]17403// CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i64 [[TMP0]], 017404// CHECK-NEXT:    [[VTSTD_I:%.*]] = sext i1 [[TMP1]] to i6417405// CHECK-NEXT:    ret i64 [[VTSTD_I]]17406//17407uint64_t test_vtstd_s64(int64_t a, int64_t b) {17408  return (uint64_t)vtstd_s64(a, b);17409}17410 17411// CHECK-LABEL: define dso_local i64 @test_vtstd_u64(17412// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17413// CHECK-NEXT:  [[ENTRY:.*:]]17414// CHECK-NEXT:    [[TMP0:%.*]] = and i64 [[A]], [[B]]17415// CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i64 [[TMP0]], 017416// CHECK-NEXT:    [[VTSTD_I:%.*]] = sext i1 [[TMP1]] to i6417417// CHECK-NEXT:    ret i64 [[VTSTD_I]]17418//17419uint64_t test_vtstd_u64(uint64_t a, uint64_t b) {17420  return (uint64_t)vtstd_u64(a, b);17421}17422 17423// CHECK-LABEL: define dso_local i64 @test_vabsd_s64(17424// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17425// CHECK-NEXT:  [[ENTRY:.*:]]17426// CHECK-NEXT:    [[VABSD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.abs.i64(i64 [[A]])17427// CHECK-NEXT:    ret i64 [[VABSD_S64_I]]17428//17429int64_t test_vabsd_s64(int64_t a) {17430  return (int64_t)vabsd_s64(a);17431}17432 17433// CHECK-LABEL: define dso_local i8 @test_vqabsb_s8(17434// CHECK-SAME: i8 noundef [[A:%.*]]) #[[ATTR0]] {17435// CHECK-NEXT:  [[ENTRY:.*:]]17436// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 017437// CHECK-NEXT:    [[VQABSB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqabs.v8i8(<8 x i8> [[TMP0]])17438// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQABSB_S8_I]], i64 017439// CHECK-NEXT:    ret i8 [[TMP1]]17440//17441int8_t test_vqabsb_s8(int8_t a) {17442  return (int8_t)vqabsb_s8(a);17443}17444 17445// CHECK-LABEL: define dso_local i16 @test_vqabsh_s16(17446// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {17447// CHECK-NEXT:  [[ENTRY:.*:]]17448// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 017449// CHECK-NEXT:    [[VQABSH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqabs.v4i16(<4 x i16> [[TMP0]])17450// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQABSH_S16_I]], i64 017451// CHECK-NEXT:    ret i16 [[TMP1]]17452//17453int16_t test_vqabsh_s16(int16_t a) {17454  return (int16_t)vqabsh_s16(a);17455}17456 17457// CHECK-LABEL: define dso_local i32 @test_vqabss_s32(17458// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {17459// CHECK-NEXT:  [[ENTRY:.*:]]17460// CHECK-NEXT:    [[VQABSS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqabs.i32(i32 [[A]])17461// CHECK-NEXT:    ret i32 [[VQABSS_S32_I]]17462//17463int32_t test_vqabss_s32(int32_t a) {17464  return (int32_t)vqabss_s32(a);17465}17466 17467// CHECK-LABEL: define dso_local i64 @test_vqabsd_s64(17468// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17469// CHECK-NEXT:  [[ENTRY:.*:]]17470// CHECK-NEXT:    [[VQABSD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sqabs.i64(i64 [[A]])17471// CHECK-NEXT:    ret i64 [[VQABSD_S64_I]]17472//17473int64_t test_vqabsd_s64(int64_t a) {17474  return (int64_t)vqabsd_s64(a);17475}17476 17477// CHECK-LABEL: define dso_local i64 @test_vnegd_s64(17478// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17479// CHECK-NEXT:  [[ENTRY:.*:]]17480// CHECK-NEXT:    [[VNEGD_I:%.*]] = sub i64 0, [[A]]17481// CHECK-NEXT:    ret i64 [[VNEGD_I]]17482//17483int64_t test_vnegd_s64(int64_t a) {17484  return (int64_t)vnegd_s64(a);17485}17486 17487// CHECK-LABEL: define dso_local i8 @test_vqnegb_s8(17488// CHECK-SAME: i8 noundef [[A:%.*]]) #[[ATTR0]] {17489// CHECK-NEXT:  [[ENTRY:.*:]]17490// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 017491// CHECK-NEXT:    [[VQNEGB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqneg.v8i8(<8 x i8> [[TMP0]])17492// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQNEGB_S8_I]], i64 017493// CHECK-NEXT:    ret i8 [[TMP1]]17494//17495int8_t test_vqnegb_s8(int8_t a) {17496  return (int8_t)vqnegb_s8(a);17497}17498 17499// CHECK-LABEL: define dso_local i16 @test_vqnegh_s16(17500// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {17501// CHECK-NEXT:  [[ENTRY:.*:]]17502// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 017503// CHECK-NEXT:    [[VQNEGH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqneg.v4i16(<4 x i16> [[TMP0]])17504// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQNEGH_S16_I]], i64 017505// CHECK-NEXT:    ret i16 [[TMP1]]17506//17507int16_t test_vqnegh_s16(int16_t a) {17508  return (int16_t)vqnegh_s16(a);17509}17510 17511// CHECK-LABEL: define dso_local i32 @test_vqnegs_s32(17512// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {17513// CHECK-NEXT:  [[ENTRY:.*:]]17514// CHECK-NEXT:    [[VQNEGS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqneg.i32(i32 [[A]])17515// CHECK-NEXT:    ret i32 [[VQNEGS_S32_I]]17516//17517int32_t test_vqnegs_s32(int32_t a) {17518  return (int32_t)vqnegs_s32(a);17519}17520 17521// CHECK-LABEL: define dso_local i64 @test_vqnegd_s64(17522// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17523// CHECK-NEXT:  [[ENTRY:.*:]]17524// CHECK-NEXT:    [[VQNEGD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sqneg.i64(i64 [[A]])17525// CHECK-NEXT:    ret i64 [[VQNEGD_S64_I]]17526//17527int64_t test_vqnegd_s64(int64_t a) {17528  return (int64_t)vqnegd_s64(a);17529}17530 17531// CHECK-LABEL: define dso_local i8 @test_vuqaddb_s8(17532// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {17533// CHECK-NEXT:  [[ENTRY:.*:]]17534// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 017535// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 017536// CHECK-NEXT:    [[VUQADDB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.suqadd.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])17537// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VUQADDB_S8_I]], i64 017538// CHECK-NEXT:    ret i8 [[TMP2]]17539//17540int8_t test_vuqaddb_s8(int8_t a, uint8_t b) {17541  return (int8_t)vuqaddb_s8(a, b);17542}17543 17544// CHECK-LABEL: define dso_local i16 @test_vuqaddh_s16(17545// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {17546// CHECK-NEXT:  [[ENTRY:.*:]]17547// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 017548// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 017549// CHECK-NEXT:    [[VUQADDH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.suqadd.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])17550// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VUQADDH_S16_I]], i64 017551// CHECK-NEXT:    ret i16 [[TMP2]]17552//17553int16_t test_vuqaddh_s16(int16_t a, uint16_t b) {17554  return (int16_t)vuqaddh_s16(a, b);17555}17556 17557// CHECK-LABEL: define dso_local i32 @test_vuqadds_s32(17558// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {17559// CHECK-NEXT:  [[ENTRY:.*:]]17560// CHECK-NEXT:    [[VUQADDS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.suqadd.i32(i32 [[A]], i32 [[B]])17561// CHECK-NEXT:    ret i32 [[VUQADDS_S32_I]]17562//17563int32_t test_vuqadds_s32(int32_t a, uint32_t b) {17564  return (int32_t)vuqadds_s32(a, b);17565}17566 17567// CHECK-LABEL: define dso_local i64 @test_vuqaddd_s64(17568// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17569// CHECK-NEXT:  [[ENTRY:.*:]]17570// CHECK-NEXT:    [[VUQADDD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.suqadd.i64(i64 [[A]], i64 [[B]])17571// CHECK-NEXT:    ret i64 [[VUQADDD_S64_I]]17572//17573int64_t test_vuqaddd_s64(int64_t a, uint64_t b) {17574  return (int64_t)vuqaddd_s64(a, b);17575}17576 17577// CHECK-LABEL: define dso_local i8 @test_vsqaddb_u8(17578// CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] {17579// CHECK-NEXT:  [[ENTRY:.*:]]17580// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 017581// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[B]], i64 017582// CHECK-NEXT:    [[VSQADDB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.usqadd.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])17583// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <8 x i8> [[VSQADDB_U8_I]], i64 017584// CHECK-NEXT:    ret i8 [[TMP2]]17585//17586uint8_t test_vsqaddb_u8(uint8_t a, int8_t b) {17587  return (uint8_t)vsqaddb_u8(a, b);17588}17589 17590// CHECK-LABEL: define dso_local i16 @test_vsqaddh_u16(17591// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {17592// CHECK-NEXT:  [[ENTRY:.*:]]17593// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 017594// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 017595// CHECK-NEXT:    [[VSQADDH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.usqadd.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])17596// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i16> [[VSQADDH_U16_I]], i64 017597// CHECK-NEXT:    ret i16 [[TMP2]]17598//17599uint16_t test_vsqaddh_u16(uint16_t a, int16_t b) {17600  return (uint16_t)vsqaddh_u16(a, b);17601}17602 17603// CHECK-LABEL: define dso_local i32 @test_vsqadds_u32(17604// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {17605// CHECK-NEXT:  [[ENTRY:.*:]]17606// CHECK-NEXT:    [[VSQADDS_U32_I:%.*]] = call i32 @llvm.aarch64.neon.usqadd.i32(i32 [[A]], i32 [[B]])17607// CHECK-NEXT:    ret i32 [[VSQADDS_U32_I]]17608//17609uint32_t test_vsqadds_u32(uint32_t a, int32_t b) {17610  return (uint32_t)vsqadds_u32(a, b);17611}17612 17613// CHECK-LABEL: define dso_local i64 @test_vsqaddd_u64(17614// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {17615// CHECK-NEXT:  [[ENTRY:.*:]]17616// CHECK-NEXT:    [[VSQADDD_U64_I:%.*]] = call i64 @llvm.aarch64.neon.usqadd.i64(i64 [[A]], i64 [[B]])17617// CHECK-NEXT:    ret i64 [[VSQADDD_U64_I]]17618//17619uint64_t test_vsqaddd_u64(uint64_t a, int64_t b) {17620  return (uint64_t)vsqaddd_u64(a, b);17621}17622 17623// CHECK-LABEL: define dso_local i32 @test_vqdmlalh_s16(17624// CHECK-SAME: i32 noundef [[A:%.*]], i16 noundef [[B:%.*]], i16 noundef [[C:%.*]]) #[[ATTR0]] {17625// CHECK-NEXT:  [[ENTRY:.*:]]17626// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 017627// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[C]], i64 017628// CHECK-NEXT:    [[VQDMLXL_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])17629// CHECK-NEXT:    [[LANE0_I:%.*]] = extractelement <4 x i32> [[VQDMLXL_I]], i64 017630// CHECK-NEXT:    [[VQDMLXL1_I:%.*]] = call i32 @llvm.aarch64.neon.sqadd.i32(i32 [[A]], i32 [[LANE0_I]])17631// CHECK-NEXT:    ret i32 [[VQDMLXL1_I]]17632//17633int32_t test_vqdmlalh_s16(int32_t a, int16_t b, int16_t c) {17634  return (int32_t)vqdmlalh_s16(a, b, c);17635}17636 17637// CHECK-LABEL: define dso_local i64 @test_vqdmlals_s32(17638// CHECK-SAME: i64 noundef [[A:%.*]], i32 noundef [[B:%.*]], i32 noundef [[C:%.*]]) #[[ATTR0]] {17639// CHECK-NEXT:  [[ENTRY:.*:]]17640// CHECK-NEXT:    [[VQDMLXL_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[B]], i32 [[C]])17641// CHECK-NEXT:    [[VQDMLXL1_I:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 [[A]], i64 [[VQDMLXL_I]])17642// CHECK-NEXT:    ret i64 [[VQDMLXL1_I]]17643//17644int64_t test_vqdmlals_s32(int64_t a, int32_t b, int32_t c) {17645  return (int64_t)vqdmlals_s32(a, b, c);17646}17647 17648// CHECK-LABEL: define dso_local i32 @test_vqdmlslh_s16(17649// CHECK-SAME: i32 noundef [[A:%.*]], i16 noundef [[B:%.*]], i16 noundef [[C:%.*]]) #[[ATTR0]] {17650// CHECK-NEXT:  [[ENTRY:.*:]]17651// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 017652// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[C]], i64 017653// CHECK-NEXT:    [[VQDMLXL_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])17654// CHECK-NEXT:    [[LANE0_I:%.*]] = extractelement <4 x i32> [[VQDMLXL_I]], i64 017655// CHECK-NEXT:    [[VQDMLXL1_I:%.*]] = call i32 @llvm.aarch64.neon.sqsub.i32(i32 [[A]], i32 [[LANE0_I]])17656// CHECK-NEXT:    ret i32 [[VQDMLXL1_I]]17657//17658int32_t test_vqdmlslh_s16(int32_t a, int16_t b, int16_t c) {17659  return (int32_t)vqdmlslh_s16(a, b, c);17660}17661 17662// CHECK-LABEL: define dso_local i64 @test_vqdmlsls_s32(17663// CHECK-SAME: i64 noundef [[A:%.*]], i32 noundef [[B:%.*]], i32 noundef [[C:%.*]]) #[[ATTR0]] {17664// CHECK-NEXT:  [[ENTRY:.*:]]17665// CHECK-NEXT:    [[VQDMLXL_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[B]], i32 [[C]])17666// CHECK-NEXT:    [[VQDMLXL1_I:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 [[A]], i64 [[VQDMLXL_I]])17667// CHECK-NEXT:    ret i64 [[VQDMLXL1_I]]17668//17669int64_t test_vqdmlsls_s32(int64_t a, int32_t b, int32_t c) {17670  return (int64_t)vqdmlsls_s32(a, b, c);17671}17672 17673// CHECK-LABEL: define dso_local i32 @test_vqdmullh_s16(17674// CHECK-SAME: i16 noundef [[A:%.*]], i16 noundef [[B:%.*]]) #[[ATTR0]] {17675// CHECK-NEXT:  [[ENTRY:.*:]]17676// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 017677// CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 017678// CHECK-NEXT:    [[VQDMULLH_S16_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])17679// CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i32> [[VQDMULLH_S16_I]], i64 017680// CHECK-NEXT:    ret i32 [[TMP2]]17681//17682int32_t test_vqdmullh_s16(int16_t a, int16_t b) {17683  return (int32_t)vqdmullh_s16(a, b);17684}17685 17686// CHECK-LABEL: define dso_local i64 @test_vqdmulls_s32(17687// CHECK-SAME: i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] {17688// CHECK-NEXT:  [[ENTRY:.*:]]17689// CHECK-NEXT:    [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[A]], i32 [[B]])17690// CHECK-NEXT:    ret i64 [[VQDMULLS_S32_I]]17691//17692int64_t test_vqdmulls_s32(int32_t a, int32_t b) {17693  return (int64_t)vqdmulls_s32(a, b);17694}17695 17696// CHECK-LABEL: define dso_local i8 @test_vqmovunh_s16(17697// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {17698// CHECK-NEXT:  [[ENTRY:.*:]]17699// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 017700// CHECK-NEXT:    [[VQMOVUNH_S16_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqxtun.v8i8(<8 x i16> [[TMP0]])17701// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQMOVUNH_S16_I]], i64 017702// CHECK-NEXT:    ret i8 [[TMP1]]17703//17704uint8_t test_vqmovunh_s16(int16_t a) {17705  return (uint8_t)vqmovunh_s16(a);17706}17707 17708// CHECK-LABEL: define dso_local i16 @test_vqmovuns_s32(17709// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {17710// CHECK-NEXT:  [[ENTRY:.*:]]17711// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 017712// CHECK-NEXT:    [[VQMOVUNS_S32_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqxtun.v4i16(<4 x i32> [[TMP0]])17713// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQMOVUNS_S32_I]], i64 017714// CHECK-NEXT:    ret i16 [[TMP1]]17715//17716uint16_t test_vqmovuns_s32(int32_t a) {17717  return (uint16_t)vqmovuns_s32(a);17718}17719 17720// CHECK-LABEL: define dso_local i32 @test_vqmovund_s64(17721// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17722// CHECK-NEXT:  [[ENTRY:.*:]]17723// CHECK-NEXT:    [[VQMOVUND_S64_I:%.*]] = call i32 @llvm.aarch64.neon.scalar.sqxtun.i32.i64(i64 [[A]])17724// CHECK-NEXT:    ret i32 [[VQMOVUND_S64_I]]17725//17726uint32_t test_vqmovund_s64(int64_t a) {17727  return (uint32_t)vqmovund_s64(a);17728}17729 17730// CHECK-LABEL: define dso_local i8 @test_vqmovnh_s16(17731// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {17732// CHECK-NEXT:  [[ENTRY:.*:]]17733// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 017734// CHECK-NEXT:    [[VQMOVNH_S16_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16> [[TMP0]])17735// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQMOVNH_S16_I]], i64 017736// CHECK-NEXT:    ret i8 [[TMP1]]17737//17738int8_t test_vqmovnh_s16(int16_t a) {17739  return (int8_t)vqmovnh_s16(a);17740}17741 17742// CHECK-LABEL: define dso_local i16 @test_vqmovns_s32(17743// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {17744// CHECK-NEXT:  [[ENTRY:.*:]]17745// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 017746// CHECK-NEXT:    [[VQMOVNS_S32_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> [[TMP0]])17747// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQMOVNS_S32_I]], i64 017748// CHECK-NEXT:    ret i16 [[TMP1]]17749//17750int16_t test_vqmovns_s32(int32_t a) {17751  return (int16_t)vqmovns_s32(a);17752}17753 17754// CHECK-LABEL: define dso_local i32 @test_vqmovnd_s64(17755// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17756// CHECK-NEXT:  [[ENTRY:.*:]]17757// CHECK-NEXT:    [[VQMOVND_S64_I:%.*]] = call i32 @llvm.aarch64.neon.scalar.sqxtn.i32.i64(i64 [[A]])17758// CHECK-NEXT:    ret i32 [[VQMOVND_S64_I]]17759//17760int32_t test_vqmovnd_s64(int64_t a) {17761  return (int32_t)vqmovnd_s64(a);17762}17763 17764// CHECK-LABEL: define dso_local i8 @test_vqmovnh_u16(17765// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {17766// CHECK-NEXT:  [[ENTRY:.*:]]17767// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 017768// CHECK-NEXT:    [[VQMOVNH_U16_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqxtn.v8i8(<8 x i16> [[TMP0]])17769// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQMOVNH_U16_I]], i64 017770// CHECK-NEXT:    ret i8 [[TMP1]]17771//17772int8_t test_vqmovnh_u16(int16_t a) {17773  return (int8_t)vqmovnh_u16(a);17774}17775 17776// CHECK-LABEL: define dso_local i16 @test_vqmovns_u32(17777// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {17778// CHECK-NEXT:  [[ENTRY:.*:]]17779// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 017780// CHECK-NEXT:    [[VQMOVNS_U32_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqxtn.v4i16(<4 x i32> [[TMP0]])17781// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQMOVNS_U32_I]], i64 017782// CHECK-NEXT:    ret i16 [[TMP1]]17783//17784int16_t test_vqmovns_u32(int32_t a) {17785  return (int16_t)vqmovns_u32(a);17786}17787 17788// CHECK-LABEL: define dso_local i32 @test_vqmovnd_u64(17789// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {17790// CHECK-NEXT:  [[ENTRY:.*:]]17791// CHECK-NEXT:    [[VQMOVND_U64_I:%.*]] = call i32 @llvm.aarch64.neon.scalar.uqxtn.i32.i64(i64 [[A]])17792// CHECK-NEXT:    ret i32 [[VQMOVND_U64_I]]17793//17794int32_t test_vqmovnd_u64(int64_t a) {17795  return (int32_t)vqmovnd_u64(a);17796}17797 17798// CHECK-LABEL: define dso_local i32 @test_vceqs_f32(17799// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {17800// CHECK-NEXT:  [[ENTRY:.*:]]17801// CHECK-NEXT:    [[TMP0:%.*]] = fcmp oeq float [[A]], [[B]]17802// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i3217803// CHECK-NEXT:    ret i32 [[VCMPD_I]]17804//17805uint32_t test_vceqs_f32(float32_t a, float32_t b) {17806  return (uint32_t)vceqs_f32(a, b);17807}17808 17809// CHECK-LABEL: define dso_local i64 @test_vceqd_f64(17810// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {17811// CHECK-NEXT:  [[ENTRY:.*:]]17812// CHECK-NEXT:    [[TMP0:%.*]] = fcmp oeq double [[A]], [[B]]17813// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i6417814// CHECK-NEXT:    ret i64 [[VCMPD_I]]17815//17816uint64_t test_vceqd_f64(float64_t a, float64_t b) {17817  return (uint64_t)vceqd_f64(a, b);17818}17819 17820// CHECK-LABEL: define dso_local i32 @test_vceqzs_f32(17821// CHECK-SAME: float noundef [[A:%.*]]) #[[ATTR0]] {17822// CHECK-NEXT:  [[ENTRY:.*:]]17823// CHECK-NEXT:    [[TMP0:%.*]] = fcmp oeq float [[A]], 0.000000e+0017824// CHECK-NEXT:    [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i3217825// CHECK-NEXT:    ret i32 [[VCEQZ_I]]17826//17827uint32_t test_vceqzs_f32(float32_t a) {17828  return (uint32_t)vceqzs_f32(a);17829}17830 17831// CHECK-LABEL: define dso_local i64 @test_vceqzd_f64(17832// CHECK-SAME: double noundef [[A:%.*]]) #[[ATTR0]] {17833// CHECK-NEXT:  [[ENTRY:.*:]]17834// CHECK-NEXT:    [[TMP0:%.*]] = fcmp oeq double [[A]], 0.000000e+0017835// CHECK-NEXT:    [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i6417836// CHECK-NEXT:    ret i64 [[VCEQZ_I]]17837//17838uint64_t test_vceqzd_f64(float64_t a) {17839  return (uint64_t)vceqzd_f64(a);17840}17841 17842// CHECK-LABEL: define dso_local i32 @test_vcges_f32(17843// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {17844// CHECK-NEXT:  [[ENTRY:.*:]]17845// CHECK-NEXT:    [[TMP0:%.*]] = fcmp oge float [[A]], [[B]]17846// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i3217847// CHECK-NEXT:    ret i32 [[VCMPD_I]]17848//17849uint32_t test_vcges_f32(float32_t a, float32_t b) {17850  return (uint32_t)vcges_f32(a, b);17851}17852 17853// CHECK-LABEL: define dso_local i64 @test_vcged_f64(17854// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {17855// CHECK-NEXT:  [[ENTRY:.*:]]17856// CHECK-NEXT:    [[TMP0:%.*]] = fcmp oge double [[A]], [[B]]17857// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i6417858// CHECK-NEXT:    ret i64 [[VCMPD_I]]17859//17860uint64_t test_vcged_f64(float64_t a, float64_t b) {17861  return (uint64_t)vcged_f64(a, b);17862}17863 17864// CHECK-LABEL: define dso_local i32 @test_vcgezs_f32(17865// CHECK-SAME: float noundef [[A:%.*]]) #[[ATTR0]] {17866// CHECK-NEXT:  [[ENTRY:.*:]]17867// CHECK-NEXT:    [[TMP0:%.*]] = fcmp oge float [[A]], 0.000000e+0017868// CHECK-NEXT:    [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i3217869// CHECK-NEXT:    ret i32 [[VCGEZ_I]]17870//17871uint32_t test_vcgezs_f32(float32_t a) {17872  return (uint32_t)vcgezs_f32(a);17873}17874 17875// CHECK-LABEL: define dso_local i64 @test_vcgezd_f64(17876// CHECK-SAME: double noundef [[A:%.*]]) #[[ATTR0]] {17877// CHECK-NEXT:  [[ENTRY:.*:]]17878// CHECK-NEXT:    [[TMP0:%.*]] = fcmp oge double [[A]], 0.000000e+0017879// CHECK-NEXT:    [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i6417880// CHECK-NEXT:    ret i64 [[VCGEZ_I]]17881//17882uint64_t test_vcgezd_f64(float64_t a) {17883  return (uint64_t)vcgezd_f64(a);17884}17885 17886// CHECK-LABEL: define dso_local i32 @test_vcgts_f32(17887// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {17888// CHECK-NEXT:  [[ENTRY:.*:]]17889// CHECK-NEXT:    [[TMP0:%.*]] = fcmp ogt float [[A]], [[B]]17890// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i3217891// CHECK-NEXT:    ret i32 [[VCMPD_I]]17892//17893uint32_t test_vcgts_f32(float32_t a, float32_t b) {17894  return (uint32_t)vcgts_f32(a, b);17895}17896 17897// CHECK-LABEL: define dso_local i64 @test_vcgtd_f64(17898// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {17899// CHECK-NEXT:  [[ENTRY:.*:]]17900// CHECK-NEXT:    [[TMP0:%.*]] = fcmp ogt double [[A]], [[B]]17901// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i6417902// CHECK-NEXT:    ret i64 [[VCMPD_I]]17903//17904uint64_t test_vcgtd_f64(float64_t a, float64_t b) {17905  return (uint64_t)vcgtd_f64(a, b);17906}17907 17908// CHECK-LABEL: define dso_local i32 @test_vcgtzs_f32(17909// CHECK-SAME: float noundef [[A:%.*]]) #[[ATTR0]] {17910// CHECK-NEXT:  [[ENTRY:.*:]]17911// CHECK-NEXT:    [[TMP0:%.*]] = fcmp ogt float [[A]], 0.000000e+0017912// CHECK-NEXT:    [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i3217913// CHECK-NEXT:    ret i32 [[VCGTZ_I]]17914//17915uint32_t test_vcgtzs_f32(float32_t a) {17916  return (uint32_t)vcgtzs_f32(a);17917}17918 17919// CHECK-LABEL: define dso_local i64 @test_vcgtzd_f64(17920// CHECK-SAME: double noundef [[A:%.*]]) #[[ATTR0]] {17921// CHECK-NEXT:  [[ENTRY:.*:]]17922// CHECK-NEXT:    [[TMP0:%.*]] = fcmp ogt double [[A]], 0.000000e+0017923// CHECK-NEXT:    [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i6417924// CHECK-NEXT:    ret i64 [[VCGTZ_I]]17925//17926uint64_t test_vcgtzd_f64(float64_t a) {17927  return (uint64_t)vcgtzd_f64(a);17928}17929 17930// CHECK-LABEL: define dso_local i32 @test_vcles_f32(17931// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {17932// CHECK-NEXT:  [[ENTRY:.*:]]17933// CHECK-NEXT:    [[TMP0:%.*]] = fcmp ole float [[A]], [[B]]17934// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i3217935// CHECK-NEXT:    ret i32 [[VCMPD_I]]17936//17937uint32_t test_vcles_f32(float32_t a, float32_t b) {17938  return (uint32_t)vcles_f32(a, b);17939}17940 17941// CHECK-LABEL: define dso_local i64 @test_vcled_f64(17942// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {17943// CHECK-NEXT:  [[ENTRY:.*:]]17944// CHECK-NEXT:    [[TMP0:%.*]] = fcmp ole double [[A]], [[B]]17945// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i6417946// CHECK-NEXT:    ret i64 [[VCMPD_I]]17947//17948uint64_t test_vcled_f64(float64_t a, float64_t b) {17949  return (uint64_t)vcled_f64(a, b);17950}17951 17952// CHECK-LABEL: define dso_local i32 @test_vclezs_f32(17953// CHECK-SAME: float noundef [[A:%.*]]) #[[ATTR0]] {17954// CHECK-NEXT:  [[ENTRY:.*:]]17955// CHECK-NEXT:    [[TMP0:%.*]] = fcmp ole float [[A]], 0.000000e+0017956// CHECK-NEXT:    [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i3217957// CHECK-NEXT:    ret i32 [[VCLEZ_I]]17958//17959uint32_t test_vclezs_f32(float32_t a) {17960  return (uint32_t)vclezs_f32(a);17961}17962 17963// CHECK-LABEL: define dso_local i64 @test_vclezd_f64(17964// CHECK-SAME: double noundef [[A:%.*]]) #[[ATTR0]] {17965// CHECK-NEXT:  [[ENTRY:.*:]]17966// CHECK-NEXT:    [[TMP0:%.*]] = fcmp ole double [[A]], 0.000000e+0017967// CHECK-NEXT:    [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i6417968// CHECK-NEXT:    ret i64 [[VCLEZ_I]]17969//17970uint64_t test_vclezd_f64(float64_t a) {17971  return (uint64_t)vclezd_f64(a);17972}17973 17974// CHECK-LABEL: define dso_local i32 @test_vclts_f32(17975// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {17976// CHECK-NEXT:  [[ENTRY:.*:]]17977// CHECK-NEXT:    [[TMP0:%.*]] = fcmp olt float [[A]], [[B]]17978// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i3217979// CHECK-NEXT:    ret i32 [[VCMPD_I]]17980//17981uint32_t test_vclts_f32(float32_t a, float32_t b) {17982  return (uint32_t)vclts_f32(a, b);17983}17984 17985// CHECK-LABEL: define dso_local i64 @test_vcltd_f64(17986// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {17987// CHECK-NEXT:  [[ENTRY:.*:]]17988// CHECK-NEXT:    [[TMP0:%.*]] = fcmp olt double [[A]], [[B]]17989// CHECK-NEXT:    [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i6417990// CHECK-NEXT:    ret i64 [[VCMPD_I]]17991//17992uint64_t test_vcltd_f64(float64_t a, float64_t b) {17993  return (uint64_t)vcltd_f64(a, b);17994}17995 17996// CHECK-LABEL: define dso_local i32 @test_vcltzs_f32(17997// CHECK-SAME: float noundef [[A:%.*]]) #[[ATTR0]] {17998// CHECK-NEXT:  [[ENTRY:.*:]]17999// CHECK-NEXT:    [[TMP0:%.*]] = fcmp olt float [[A]], 0.000000e+0018000// CHECK-NEXT:    [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i3218001// CHECK-NEXT:    ret i32 [[VCLTZ_I]]18002//18003uint32_t test_vcltzs_f32(float32_t a) {18004  return (uint32_t)vcltzs_f32(a);18005}18006 18007// CHECK-LABEL: define dso_local i64 @test_vcltzd_f64(18008// CHECK-SAME: double noundef [[A:%.*]]) #[[ATTR0]] {18009// CHECK-NEXT:  [[ENTRY:.*:]]18010// CHECK-NEXT:    [[TMP0:%.*]] = fcmp olt double [[A]], 0.000000e+0018011// CHECK-NEXT:    [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i6418012// CHECK-NEXT:    ret i64 [[VCLTZ_I]]18013//18014uint64_t test_vcltzd_f64(float64_t a) {18015  return (uint64_t)vcltzd_f64(a);18016}18017 18018// CHECK-LABEL: define dso_local i32 @test_vcages_f32(18019// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {18020// CHECK-NEXT:  [[ENTRY:.*:]]18021// CHECK-NEXT:    [[VCAGES_F32_I:%.*]] = call i32 @llvm.aarch64.neon.facge.i32.f32(float [[A]], float [[B]])18022// CHECK-NEXT:    ret i32 [[VCAGES_F32_I]]18023//18024uint32_t test_vcages_f32(float32_t a, float32_t b) {18025  return (uint32_t)vcages_f32(a, b);18026}18027 18028// CHECK-LABEL: define dso_local i64 @test_vcaged_f64(18029// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {18030// CHECK-NEXT:  [[ENTRY:.*:]]18031// CHECK-NEXT:    [[VCAGED_F64_I:%.*]] = call i64 @llvm.aarch64.neon.facge.i64.f64(double [[A]], double [[B]])18032// CHECK-NEXT:    ret i64 [[VCAGED_F64_I]]18033//18034uint64_t test_vcaged_f64(float64_t a, float64_t b) {18035  return (uint64_t)vcaged_f64(a, b);18036}18037 18038// CHECK-LABEL: define dso_local i32 @test_vcagts_f32(18039// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {18040// CHECK-NEXT:  [[ENTRY:.*:]]18041// CHECK-NEXT:    [[VCAGTS_F32_I:%.*]] = call i32 @llvm.aarch64.neon.facgt.i32.f32(float [[A]], float [[B]])18042// CHECK-NEXT:    ret i32 [[VCAGTS_F32_I]]18043//18044uint32_t test_vcagts_f32(float32_t a, float32_t b) {18045  return (uint32_t)vcagts_f32(a, b);18046}18047 18048// CHECK-LABEL: define dso_local i64 @test_vcagtd_f64(18049// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {18050// CHECK-NEXT:  [[ENTRY:.*:]]18051// CHECK-NEXT:    [[VCAGTD_F64_I:%.*]] = call i64 @llvm.aarch64.neon.facgt.i64.f64(double [[A]], double [[B]])18052// CHECK-NEXT:    ret i64 [[VCAGTD_F64_I]]18053//18054uint64_t test_vcagtd_f64(float64_t a, float64_t b) {18055  return (uint64_t)vcagtd_f64(a, b);18056}18057 18058// CHECK-LABEL: define dso_local i32 @test_vcales_f32(18059// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {18060// CHECK-NEXT:  [[ENTRY:.*:]]18061// CHECK-NEXT:    [[VCALES_F32_I:%.*]] = call i32 @llvm.aarch64.neon.facge.i32.f32(float [[B]], float [[A]])18062// CHECK-NEXT:    ret i32 [[VCALES_F32_I]]18063//18064uint32_t test_vcales_f32(float32_t a, float32_t b) {18065  return (uint32_t)vcales_f32(a, b);18066}18067 18068// CHECK-LABEL: define dso_local i64 @test_vcaled_f64(18069// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {18070// CHECK-NEXT:  [[ENTRY:.*:]]18071// CHECK-NEXT:    [[VCALED_F64_I:%.*]] = call i64 @llvm.aarch64.neon.facge.i64.f64(double [[B]], double [[A]])18072// CHECK-NEXT:    ret i64 [[VCALED_F64_I]]18073//18074uint64_t test_vcaled_f64(float64_t a, float64_t b) {18075  return (uint64_t)vcaled_f64(a, b);18076}18077 18078// CHECK-LABEL: define dso_local i32 @test_vcalts_f32(18079// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]]) #[[ATTR0]] {18080// CHECK-NEXT:  [[ENTRY:.*:]]18081// CHECK-NEXT:    [[VCALTS_F32_I:%.*]] = call i32 @llvm.aarch64.neon.facgt.i32.f32(float [[B]], float [[A]])18082// CHECK-NEXT:    ret i32 [[VCALTS_F32_I]]18083//18084uint32_t test_vcalts_f32(float32_t a, float32_t b) {18085  return (uint32_t)vcalts_f32(a, b);18086}18087 18088// CHECK-LABEL: define dso_local i64 @test_vcaltd_f64(18089// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {18090// CHECK-NEXT:  [[ENTRY:.*:]]18091// CHECK-NEXT:    [[VCALTD_F64_I:%.*]] = call i64 @llvm.aarch64.neon.facgt.i64.f64(double [[B]], double [[A]])18092// CHECK-NEXT:    ret i64 [[VCALTD_F64_I]]18093//18094uint64_t test_vcaltd_f64(float64_t a, float64_t b) {18095  return (uint64_t)vcaltd_f64(a, b);18096}18097 18098// CHECK-LABEL: define dso_local i64 @test_vshrd_n_s64(18099// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18100// CHECK-NEXT:  [[ENTRY:.*:]]18101// CHECK-NEXT:    [[SHRD_N:%.*]] = ashr i64 [[A]], 118102// CHECK-NEXT:    ret i64 [[SHRD_N]]18103//18104int64_t test_vshrd_n_s64(int64_t a) {18105  return (int64_t)vshrd_n_s64(a, 1);18106}18107 18108// CHECK-LABEL: define dso_local <1 x i64> @test_vshr_n_s64(18109// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18110// CHECK-NEXT:  [[ENTRY:.*:]]18111// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18112// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18113// CHECK-NEXT:    [[VSHR_N:%.*]] = ashr <1 x i64> [[TMP1]], splat (i64 1)18114// CHECK-NEXT:    ret <1 x i64> [[VSHR_N]]18115//18116int64x1_t test_vshr_n_s64(int64x1_t a) {18117  return vshr_n_s64(a, 1);18118}18119 18120// CHECK-LABEL: define dso_local i64 @test_vshrd_n_u64(18121// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18122// CHECK-NEXT:  [[ENTRY:.*:]]18123// CHECK-NEXT:    ret i64 018124//18125uint64_t test_vshrd_n_u64(uint64_t a) {18126  return (uint64_t)vshrd_n_u64(a, 64);18127}18128 18129// CHECK-LABEL: define dso_local i64 @test_vshrd_n_u64_2(18130// CHECK-SAME: ) #[[ATTR0]] {18131// CHECK-NEXT:  [[ENTRY:.*:]]18132// CHECK-NEXT:    ret i64 018133//18134uint64_t test_vshrd_n_u64_2() {18135  uint64_t a = UINT64_C(0xf000000000000000);18136  return vshrd_n_u64(a, 64);18137}18138 18139// CHECK-LABEL: define dso_local <1 x i64> @test_vshr_n_u64(18140// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18141// CHECK-NEXT:  [[ENTRY:.*:]]18142// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18143// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18144// CHECK-NEXT:    [[VSHR_N:%.*]] = lshr <1 x i64> [[TMP1]], splat (i64 1)18145// CHECK-NEXT:    ret <1 x i64> [[VSHR_N]]18146//18147uint64x1_t test_vshr_n_u64(uint64x1_t a) {18148  return vshr_n_u64(a, 1);18149}18150 18151// CHECK-LABEL: define dso_local i64 @test_vrshrd_n_s64(18152// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18153// CHECK-NEXT:  [[ENTRY:.*:]]18154// CHECK-NEXT:    [[VRSHR_N:%.*]] = call i64 @llvm.aarch64.neon.srshl.i64(i64 [[A]], i64 -63)18155// CHECK-NEXT:    ret i64 [[VRSHR_N]]18156//18157int64_t test_vrshrd_n_s64(int64_t a) {18158  return (int64_t)vrshrd_n_s64(a, 63);18159}18160 18161// CHECK-LABEL: define dso_local <1 x i64> @test_vrshr_n_s64(18162// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18163// CHECK-NEXT:  [[ENTRY:.*:]]18164// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18165// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18166// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <1 x i64> @llvm.aarch64.neon.srshl.v1i64(<1 x i64> [[VRSHR_N]], <1 x i64> splat (i64 -1))18167// CHECK-NEXT:    ret <1 x i64> [[VRSHR_N1]]18168//18169int64x1_t test_vrshr_n_s64(int64x1_t a) {18170  return vrshr_n_s64(a, 1);18171}18172 18173// CHECK-LABEL: define dso_local i64 @test_vrshrd_n_u64(18174// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18175// CHECK-NEXT:  [[ENTRY:.*:]]18176// CHECK-NEXT:    [[VRSHR_N:%.*]] = call i64 @llvm.aarch64.neon.urshl.i64(i64 [[A]], i64 -63)18177// CHECK-NEXT:    ret i64 [[VRSHR_N]]18178//18179uint64_t test_vrshrd_n_u64(uint64_t a) {18180  return (uint64_t)vrshrd_n_u64(a, 63);18181}18182 18183// CHECK-LABEL: define dso_local <1 x i64> @test_vrshr_n_u64(18184// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18185// CHECK-NEXT:  [[ENTRY:.*:]]18186// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18187// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18188// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <1 x i64> @llvm.aarch64.neon.urshl.v1i64(<1 x i64> [[VRSHR_N]], <1 x i64> splat (i64 -1))18189// CHECK-NEXT:    ret <1 x i64> [[VRSHR_N1]]18190//18191uint64x1_t test_vrshr_n_u64(uint64x1_t a) {18192  return vrshr_n_u64(a, 1);18193}18194 18195// CHECK-LABEL: define dso_local i64 @test_vsrad_n_s64(18196// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18197// CHECK-NEXT:  [[ENTRY:.*:]]18198// CHECK-NEXT:    [[SHRD_N:%.*]] = ashr i64 [[B]], 6318199// CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[A]], [[SHRD_N]]18200// CHECK-NEXT:    ret i64 [[TMP0]]18201//18202int64_t test_vsrad_n_s64(int64_t a, int64_t b) {18203  return (int64_t)vsrad_n_s64(a, b, 63);18204}18205 18206// CHECK-LABEL: define dso_local <1 x i64> @test_vsra_n_s64(18207// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {18208// CHECK-NEXT:  [[ENTRY:.*:]]18209// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18210// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>18211// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18212// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>18213// CHECK-NEXT:    [[VSRA_N:%.*]] = ashr <1 x i64> [[TMP3]], splat (i64 1)18214// CHECK-NEXT:    [[TMP4:%.*]] = add <1 x i64> [[TMP2]], [[VSRA_N]]18215// CHECK-NEXT:    ret <1 x i64> [[TMP4]]18216//18217int64x1_t test_vsra_n_s64(int64x1_t a, int64x1_t b) {18218  return vsra_n_s64(a, b, 1);18219}18220 18221// CHECK-LABEL: define dso_local i64 @test_vsrad_n_u64(18222// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18223// CHECK-NEXT:  [[ENTRY:.*:]]18224// CHECK-NEXT:    [[SHRD_N:%.*]] = lshr i64 [[B]], 6318225// CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[A]], [[SHRD_N]]18226// CHECK-NEXT:    ret i64 [[TMP0]]18227//18228uint64_t test_vsrad_n_u64(uint64_t a, uint64_t b) {18229  return (uint64_t)vsrad_n_u64(a, b, 63);18230}18231 18232// CHECK-LABEL: define dso_local i64 @test_vsrad_n_u64_2(18233// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18234// CHECK-NEXT:  [[ENTRY:.*:]]18235// CHECK-NEXT:    ret i64 [[A]]18236//18237uint64_t test_vsrad_n_u64_2(uint64_t a, uint64_t b) {18238  return (uint64_t)vsrad_n_u64(a, b, 64);18239}18240 18241// CHECK-LABEL: define dso_local <1 x i64> @test_vsra_n_u64(18242// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {18243// CHECK-NEXT:  [[ENTRY:.*:]]18244// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18245// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>18246// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18247// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>18248// CHECK-NEXT:    [[VSRA_N:%.*]] = lshr <1 x i64> [[TMP3]], splat (i64 1)18249// CHECK-NEXT:    [[TMP4:%.*]] = add <1 x i64> [[TMP2]], [[VSRA_N]]18250// CHECK-NEXT:    ret <1 x i64> [[TMP4]]18251//18252uint64x1_t test_vsra_n_u64(uint64x1_t a, uint64x1_t b) {18253  return vsra_n_u64(a, b, 1);18254}18255 18256// CHECK-LABEL: define dso_local i64 @test_vrsrad_n_s64(18257// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18258// CHECK-NEXT:  [[ENTRY:.*:]]18259// CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.aarch64.neon.srshl.i64(i64 [[B]], i64 -63)18260// CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[A]], [[TMP0]]18261// CHECK-NEXT:    ret i64 [[TMP1]]18262//18263int64_t test_vrsrad_n_s64(int64_t a, int64_t b) {18264  return (int64_t)vrsrad_n_s64(a, b, 63);18265}18266 18267// CHECK-LABEL: define dso_local <1 x i64> @test_vrsra_n_s64(18268// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {18269// CHECK-NEXT:  [[ENTRY:.*:]]18270// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18271// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>18272// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>18273// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <1 x i64> @llvm.aarch64.neon.srshl.v1i64(<1 x i64> [[VRSHR_N]], <1 x i64> splat (i64 -1))18274// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18275// CHECK-NEXT:    [[TMP3:%.*]] = add <1 x i64> [[TMP2]], [[VRSHR_N1]]18276// CHECK-NEXT:    ret <1 x i64> [[TMP3]]18277//18278int64x1_t test_vrsra_n_s64(int64x1_t a, int64x1_t b) {18279  return vrsra_n_s64(a, b, 1);18280}18281 18282// CHECK-LABEL: define dso_local i64 @test_vrsrad_n_u64(18283// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18284// CHECK-NEXT:  [[ENTRY:.*:]]18285// CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.aarch64.neon.urshl.i64(i64 [[B]], i64 -63)18286// CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[A]], [[TMP0]]18287// CHECK-NEXT:    ret i64 [[TMP1]]18288//18289uint64_t test_vrsrad_n_u64(uint64_t a, uint64_t b) {18290  return (uint64_t)vrsrad_n_u64(a, b, 63);18291}18292 18293// CHECK-LABEL: define dso_local <1 x i64> @test_vrsra_n_u64(18294// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {18295// CHECK-NEXT:  [[ENTRY:.*:]]18296// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18297// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>18298// CHECK-NEXT:    [[VRSHR_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>18299// CHECK-NEXT:    [[VRSHR_N1:%.*]] = call <1 x i64> @llvm.aarch64.neon.urshl.v1i64(<1 x i64> [[VRSHR_N]], <1 x i64> splat (i64 -1))18300// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18301// CHECK-NEXT:    [[TMP3:%.*]] = add <1 x i64> [[TMP2]], [[VRSHR_N1]]18302// CHECK-NEXT:    ret <1 x i64> [[TMP3]]18303//18304uint64x1_t test_vrsra_n_u64(uint64x1_t a, uint64x1_t b) {18305  return vrsra_n_u64(a, b, 1);18306}18307 18308// CHECK-LABEL: define dso_local i64 @test_vshld_n_s64(18309// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18310// CHECK-NEXT:  [[ENTRY:.*:]]18311// CHECK-NEXT:    [[SHLD_N:%.*]] = shl i64 [[A]], 118312// CHECK-NEXT:    ret i64 [[SHLD_N]]18313//18314int64_t test_vshld_n_s64(int64_t a) {18315  return (int64_t)vshld_n_s64(a, 1);18316}18317 18318// CHECK-LABEL: define dso_local <1 x i64> @test_vshl_n_s64(18319// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18320// CHECK-NEXT:  [[ENTRY:.*:]]18321// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18322// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18323// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <1 x i64> [[TMP1]], splat (i64 1)18324// CHECK-NEXT:    ret <1 x i64> [[VSHL_N]]18325//18326int64x1_t test_vshl_n_s64(int64x1_t a) {18327  return vshl_n_s64(a, 1);18328}18329 18330// CHECK-LABEL: define dso_local i64 @test_vshld_n_u64(18331// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18332// CHECK-NEXT:  [[ENTRY:.*:]]18333// CHECK-NEXT:    [[SHLD_N:%.*]] = shl i64 [[A]], 6318334// CHECK-NEXT:    ret i64 [[SHLD_N]]18335//18336uint64_t test_vshld_n_u64(uint64_t a) {18337  return (uint64_t)vshld_n_u64(a, 63);18338}18339 18340// CHECK-LABEL: define dso_local <1 x i64> @test_vshl_n_u64(18341// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18342// CHECK-NEXT:  [[ENTRY:.*:]]18343// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18344// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18345// CHECK-NEXT:    [[VSHL_N:%.*]] = shl <1 x i64> [[TMP1]], splat (i64 1)18346// CHECK-NEXT:    ret <1 x i64> [[VSHL_N]]18347//18348uint64x1_t test_vshl_n_u64(uint64x1_t a) {18349  return vshl_n_u64(a, 1);18350}18351 18352// CHECK-LABEL: define dso_local i8 @test_vqshlb_n_s8(18353// CHECK-SAME: i8 noundef [[A:%.*]]) #[[ATTR0]] {18354// CHECK-NEXT:  [[ENTRY:.*:]]18355// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 018356// CHECK-NEXT:    [[VQSHLB_N_S8:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>)18357// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHLB_N_S8]], i64 018358// CHECK-NEXT:    ret i8 [[TMP1]]18359//18360int8_t test_vqshlb_n_s8(int8_t a) {18361  return (int8_t)vqshlb_n_s8(a, 7);18362}18363 18364// CHECK-LABEL: define dso_local i16 @test_vqshlh_n_s16(18365// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18366// CHECK-NEXT:  [[ENTRY:.*:]]18367// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 018368// CHECK-NEXT:    [[VQSHLH_N_S16:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 poison, i16 poison, i16 poison>)18369// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHLH_N_S16]], i64 018370// CHECK-NEXT:    ret i16 [[TMP1]]18371//18372int16_t test_vqshlh_n_s16(int16_t a) {18373  return (int16_t)vqshlh_n_s16(a, 15);18374}18375 18376// CHECK-LABEL: define dso_local i32 @test_vqshls_n_s32(18377// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18378// CHECK-NEXT:  [[ENTRY:.*:]]18379// CHECK-NEXT:    [[VQSHLS_N_S32:%.*]] = call i32 @llvm.aarch64.neon.sqshl.i32(i32 [[A]], i32 31)18380// CHECK-NEXT:    ret i32 [[VQSHLS_N_S32]]18381//18382int32_t test_vqshls_n_s32(int32_t a) {18383  return (int32_t)vqshls_n_s32(a, 31);18384}18385 18386// CHECK-LABEL: define dso_local i64 @test_vqshld_n_s64(18387// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18388// CHECK-NEXT:  [[ENTRY:.*:]]18389// CHECK-NEXT:    [[VQSHL_N:%.*]] = call i64 @llvm.aarch64.neon.sqshl.i64(i64 [[A]], i64 63)18390// CHECK-NEXT:    ret i64 [[VQSHL_N]]18391//18392int64_t test_vqshld_n_s64(int64_t a) {18393  return (int64_t)vqshld_n_s64(a, 63);18394}18395 18396// CHECK-LABEL: define dso_local <8 x i8> @test_vqshl_n_s8(18397// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {18398// CHECK-NEXT:  [[ENTRY:.*:]]18399// CHECK-NEXT:    [[VQSHL_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[A]], <8 x i8> zeroinitializer)18400// CHECK-NEXT:    ret <8 x i8> [[VQSHL_N]]18401//18402int8x8_t test_vqshl_n_s8(int8x8_t a) {18403  return vqshl_n_s8(a, 0);18404}18405 18406// CHECK-LABEL: define dso_local <16 x i8> @test_vqshlq_n_s8(18407// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {18408// CHECK-NEXT:  [[ENTRY:.*:]]18409// CHECK-NEXT:    [[VQSHL_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.sqshl.v16i8(<16 x i8> [[A]], <16 x i8> zeroinitializer)18410// CHECK-NEXT:    ret <16 x i8> [[VQSHL_N]]18411//18412int8x16_t test_vqshlq_n_s8(int8x16_t a) {18413  return vqshlq_n_s8(a, 0);18414}18415 18416// CHECK-LABEL: define dso_local <4 x i16> @test_vqshl_n_s16(18417// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {18418// CHECK-NEXT:  [[ENTRY:.*:]]18419// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>18420// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>18421// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[VQSHL_N]], <4 x i16> zeroinitializer)18422// CHECK-NEXT:    ret <4 x i16> [[VQSHL_N1]]18423//18424int16x4_t test_vqshl_n_s16(int16x4_t a) {18425  return vqshl_n_s16(a, 0);18426}18427 18428// CHECK-LABEL: define dso_local <8 x i16> @test_vqshlq_n_s16(18429// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {18430// CHECK-NEXT:  [[ENTRY:.*:]]18431// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>18432// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>18433// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.sqshl.v8i16(<8 x i16> [[VQSHL_N]], <8 x i16> zeroinitializer)18434// CHECK-NEXT:    ret <8 x i16> [[VQSHL_N1]]18435//18436int16x8_t test_vqshlq_n_s16(int16x8_t a) {18437  return vqshlq_n_s16(a, 0);18438}18439 18440// CHECK-LABEL: define dso_local <2 x i32> @test_vqshl_n_s32(18441// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {18442// CHECK-NEXT:  [[ENTRY:.*:]]18443// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>18444// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>18445// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.sqshl.v2i32(<2 x i32> [[VQSHL_N]], <2 x i32> zeroinitializer)18446// CHECK-NEXT:    ret <2 x i32> [[VQSHL_N1]]18447//18448int32x2_t test_vqshl_n_s32(int32x2_t a) {18449  return vqshl_n_s32(a, 0);18450}18451 18452// CHECK-LABEL: define dso_local <4 x i32> @test_vqshlq_n_s32(18453// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {18454// CHECK-NEXT:  [[ENTRY:.*:]]18455// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>18456// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>18457// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqshl.v4i32(<4 x i32> [[VQSHL_N]], <4 x i32> zeroinitializer)18458// CHECK-NEXT:    ret <4 x i32> [[VQSHL_N1]]18459//18460int32x4_t test_vqshlq_n_s32(int32x4_t a) {18461  return vqshlq_n_s32(a, 0);18462}18463 18464// CHECK-LABEL: define dso_local <2 x i64> @test_vqshlq_n_s64(18465// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18466// CHECK-NEXT:  [[ENTRY:.*:]]18467// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>18468// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>18469// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.sqshl.v2i64(<2 x i64> [[VQSHL_N]], <2 x i64> zeroinitializer)18470// CHECK-NEXT:    ret <2 x i64> [[VQSHL_N1]]18471//18472int64x2_t test_vqshlq_n_s64(int64x2_t a) {18473  return vqshlq_n_s64(a, 0);18474}18475 18476// CHECK-LABEL: define dso_local <8 x i8> @test_vqshl_n_u8(18477// CHECK-SAME: <8 x i8> noundef [[A:%.*]]) #[[ATTR0]] {18478// CHECK-NEXT:  [[ENTRY:.*:]]18479// CHECK-NEXT:    [[VQSHL_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> [[A]], <8 x i8> zeroinitializer)18480// CHECK-NEXT:    ret <8 x i8> [[VQSHL_N]]18481//18482uint8x8_t test_vqshl_n_u8(uint8x8_t a) {18483  return vqshl_n_u8(a, 0);18484}18485 18486// CHECK-LABEL: define dso_local <16 x i8> @test_vqshlq_n_u8(18487// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {18488// CHECK-NEXT:  [[ENTRY:.*:]]18489// CHECK-NEXT:    [[VQSHL_N:%.*]] = call <16 x i8> @llvm.aarch64.neon.uqshl.v16i8(<16 x i8> [[A]], <16 x i8> zeroinitializer)18490// CHECK-NEXT:    ret <16 x i8> [[VQSHL_N]]18491//18492uint8x16_t test_vqshlq_n_u8(uint8x16_t a) {18493  return vqshlq_n_u8(a, 0);18494}18495 18496// CHECK-LABEL: define dso_local <4 x i16> @test_vqshl_n_u16(18497// CHECK-SAME: <4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {18498// CHECK-NEXT:  [[ENTRY:.*:]]18499// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>18500// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>18501// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> [[VQSHL_N]], <4 x i16> zeroinitializer)18502// CHECK-NEXT:    ret <4 x i16> [[VQSHL_N1]]18503//18504uint16x4_t test_vqshl_n_u16(uint16x4_t a) {18505  return vqshl_n_u16(a, 0);18506}18507 18508// CHECK-LABEL: define dso_local <8 x i16> @test_vqshlq_n_u16(18509// CHECK-SAME: <8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {18510// CHECK-NEXT:  [[ENTRY:.*:]]18511// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>18512// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>18513// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.uqshl.v8i16(<8 x i16> [[VQSHL_N]], <8 x i16> zeroinitializer)18514// CHECK-NEXT:    ret <8 x i16> [[VQSHL_N1]]18515//18516uint16x8_t test_vqshlq_n_u16(uint16x8_t a) {18517  return vqshlq_n_u16(a, 0);18518}18519 18520// CHECK-LABEL: define dso_local <2 x i32> @test_vqshl_n_u32(18521// CHECK-SAME: <2 x i32> noundef [[A:%.*]]) #[[ATTR0]] {18522// CHECK-NEXT:  [[ENTRY:.*:]]18523// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i32> [[A]] to <8 x i8>18524// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>18525// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <2 x i32> @llvm.aarch64.neon.uqshl.v2i32(<2 x i32> [[VQSHL_N]], <2 x i32> zeroinitializer)18526// CHECK-NEXT:    ret <2 x i32> [[VQSHL_N1]]18527//18528uint32x2_t test_vqshl_n_u32(uint32x2_t a) {18529  return vqshl_n_u32(a, 0);18530}18531 18532// CHECK-LABEL: define dso_local <4 x i32> @test_vqshlq_n_u32(18533// CHECK-SAME: <4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {18534// CHECK-NEXT:  [[ENTRY:.*:]]18535// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to <16 x i8>18536// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>18537// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <4 x i32> @llvm.aarch64.neon.uqshl.v4i32(<4 x i32> [[VQSHL_N]], <4 x i32> zeroinitializer)18538// CHECK-NEXT:    ret <4 x i32> [[VQSHL_N1]]18539//18540uint32x4_t test_vqshlq_n_u32(uint32x4_t a) {18541  return vqshlq_n_u32(a, 0);18542}18543 18544// CHECK-LABEL: define dso_local <2 x i64> @test_vqshlq_n_u64(18545// CHECK-SAME: <2 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18546// CHECK-NEXT:  [[ENTRY:.*:]]18547// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to <16 x i8>18548// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>18549// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <2 x i64> @llvm.aarch64.neon.uqshl.v2i64(<2 x i64> [[VQSHL_N]], <2 x i64> zeroinitializer)18550// CHECK-NEXT:    ret <2 x i64> [[VQSHL_N1]]18551//18552uint64x2_t test_vqshlq_n_u64(uint64x2_t a) {18553  return vqshlq_n_u64(a, 0);18554}18555 18556// CHECK-LABEL: define dso_local <1 x i64> @test_vqshl_n_s64(18557// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18558// CHECK-NEXT:  [[ENTRY:.*:]]18559// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18560// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18561// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <1 x i64> @llvm.aarch64.neon.sqshl.v1i64(<1 x i64> [[VQSHL_N]], <1 x i64> splat (i64 1))18562// CHECK-NEXT:    ret <1 x i64> [[VQSHL_N1]]18563//18564int64x1_t test_vqshl_n_s64(int64x1_t a) {18565  return vqshl_n_s64(a, 1);18566}18567 18568// CHECK-LABEL: define dso_local i8 @test_vqshlb_n_u8(18569// CHECK-SAME: i8 noundef [[A:%.*]]) #[[ATTR0]] {18570// CHECK-NEXT:  [[ENTRY:.*:]]18571// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 018572// CHECK-NEXT:    [[VQSHLB_N_U8:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>)18573// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHLB_N_U8]], i64 018574// CHECK-NEXT:    ret i8 [[TMP1]]18575//18576uint8_t test_vqshlb_n_u8(uint8_t a) {18577  return (uint8_t)vqshlb_n_u8(a, 7);18578}18579 18580// CHECK-LABEL: define dso_local i16 @test_vqshlh_n_u16(18581// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18582// CHECK-NEXT:  [[ENTRY:.*:]]18583// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 018584// CHECK-NEXT:    [[VQSHLH_N_U16:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 poison, i16 poison, i16 poison>)18585// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHLH_N_U16]], i64 018586// CHECK-NEXT:    ret i16 [[TMP1]]18587//18588uint16_t test_vqshlh_n_u16(uint16_t a) {18589  return (uint16_t)vqshlh_n_u16(a, 15);18590}18591 18592// CHECK-LABEL: define dso_local i32 @test_vqshls_n_u32(18593// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18594// CHECK-NEXT:  [[ENTRY:.*:]]18595// CHECK-NEXT:    [[VQSHLS_N_U32:%.*]] = call i32 @llvm.aarch64.neon.uqshl.i32(i32 [[A]], i32 31)18596// CHECK-NEXT:    ret i32 [[VQSHLS_N_U32]]18597//18598uint32_t test_vqshls_n_u32(uint32_t a) {18599  return (uint32_t)vqshls_n_u32(a, 31);18600}18601 18602// CHECK-LABEL: define dso_local i64 @test_vqshld_n_u64(18603// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18604// CHECK-NEXT:  [[ENTRY:.*:]]18605// CHECK-NEXT:    [[VQSHL_N:%.*]] = call i64 @llvm.aarch64.neon.uqshl.i64(i64 [[A]], i64 63)18606// CHECK-NEXT:    ret i64 [[VQSHL_N]]18607//18608uint64_t test_vqshld_n_u64(uint64_t a) {18609  return (uint64_t)vqshld_n_u64(a, 63);18610}18611 18612// CHECK-LABEL: define dso_local <1 x i64> @test_vqshl_n_u64(18613// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18614// CHECK-NEXT:  [[ENTRY:.*:]]18615// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18616// CHECK-NEXT:    [[VQSHL_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18617// CHECK-NEXT:    [[VQSHL_N1:%.*]] = call <1 x i64> @llvm.aarch64.neon.uqshl.v1i64(<1 x i64> [[VQSHL_N]], <1 x i64> splat (i64 1))18618// CHECK-NEXT:    ret <1 x i64> [[VQSHL_N1]]18619//18620uint64x1_t test_vqshl_n_u64(uint64x1_t a) {18621  return vqshl_n_u64(a, 1);18622}18623 18624// CHECK-LABEL: define dso_local i8 @test_vqshlub_n_s8(18625// CHECK-SAME: i8 noundef [[A:%.*]]) #[[ATTR0]] {18626// CHECK-NEXT:  [[ENTRY:.*:]]18627// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i8> poison, i8 [[A]], i64 018628// CHECK-NEXT:    [[VQSHLUB_N_S8:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshlu.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>)18629// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHLUB_N_S8]], i64 018630// CHECK-NEXT:    ret i8 [[TMP1]]18631//18632int8_t test_vqshlub_n_s8(int8_t a) {18633  return (int8_t)vqshlub_n_s8(a, 7);18634}18635 18636// CHECK-LABEL: define dso_local i16 @test_vqshluh_n_s16(18637// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18638// CHECK-NEXT:  [[ENTRY:.*:]]18639// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 018640// CHECK-NEXT:    [[VQSHLUH_N_S16:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshlu.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 poison, i16 poison, i16 poison>)18641// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHLUH_N_S16]], i64 018642// CHECK-NEXT:    ret i16 [[TMP1]]18643//18644int16_t test_vqshluh_n_s16(int16_t a) {18645  return (int16_t)vqshluh_n_s16(a, 15);18646}18647 18648// CHECK-LABEL: define dso_local i32 @test_vqshlus_n_s32(18649// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18650// CHECK-NEXT:  [[ENTRY:.*:]]18651// CHECK-NEXT:    [[VQSHLUS_N_S32:%.*]] = call i32 @llvm.aarch64.neon.sqshlu.i32(i32 [[A]], i32 31)18652// CHECK-NEXT:    ret i32 [[VQSHLUS_N_S32]]18653//18654int32_t test_vqshlus_n_s32(int32_t a) {18655  return (int32_t)vqshlus_n_s32(a, 31);18656}18657 18658// CHECK-LABEL: define dso_local i64 @test_vqshlud_n_s64(18659// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18660// CHECK-NEXT:  [[ENTRY:.*:]]18661// CHECK-NEXT:    [[VQSHLU_N:%.*]] = call i64 @llvm.aarch64.neon.sqshlu.i64(i64 [[A]], i64 63)18662// CHECK-NEXT:    ret i64 [[VQSHLU_N]]18663//18664int64_t test_vqshlud_n_s64(int64_t a) {18665  return (int64_t)vqshlud_n_s64(a, 63);18666}18667 18668// CHECK-LABEL: define dso_local <1 x i64> @test_vqshlu_n_s64(18669// CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] {18670// CHECK-NEXT:  [[ENTRY:.*:]]18671// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18672// CHECK-NEXT:    [[VQSHLU_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18673// CHECK-NEXT:    [[VQSHLU_N1:%.*]] = call <1 x i64> @llvm.aarch64.neon.sqshlu.v1i64(<1 x i64> [[VQSHLU_N]], <1 x i64> splat (i64 1))18674// CHECK-NEXT:    ret <1 x i64> [[VQSHLU_N1]]18675//18676uint64x1_t test_vqshlu_n_s64(int64x1_t a) {18677  return vqshlu_n_s64(a, 1);18678}18679 18680// CHECK-LABEL: define dso_local i64 @test_vsrid_n_s64(18681// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18682// CHECK-NEXT:  [[ENTRY:.*:]]18683// CHECK-NEXT:    [[VSRID_N_S64:%.*]] = bitcast i64 [[A]] to <1 x i64>18684// CHECK-NEXT:    [[VSRID_N_S641:%.*]] = bitcast i64 [[B]] to <1 x i64>18685// CHECK-NEXT:    [[VSRID_N_S642:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsri.v1i64(<1 x i64> [[VSRID_N_S64]], <1 x i64> [[VSRID_N_S641]], i32 63)18686// CHECK-NEXT:    [[VSRID_N_S643:%.*]] = bitcast <1 x i64> [[VSRID_N_S642]] to i6418687// CHECK-NEXT:    ret i64 [[VSRID_N_S643]]18688//18689int64_t test_vsrid_n_s64(int64_t a, int64_t b) {18690  return (int64_t)vsrid_n_s64(a, b, 63);18691}18692 18693// CHECK-LABEL: define dso_local <1 x i64> @test_vsri_n_s64(18694// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {18695// CHECK-NEXT:  [[ENTRY:.*:]]18696// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18697// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>18698// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18699// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>18700// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsri.v1i64(<1 x i64> [[VSRI_N]], <1 x i64> [[VSRI_N1]], i32 1)18701// CHECK-NEXT:    ret <1 x i64> [[VSRI_N2]]18702//18703int64x1_t test_vsri_n_s64(int64x1_t a, int64x1_t b) {18704  return vsri_n_s64(a, b, 1);18705}18706 18707// CHECK-LABEL: define dso_local i64 @test_vsrid_n_u64(18708// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18709// CHECK-NEXT:  [[ENTRY:.*:]]18710// CHECK-NEXT:    [[VSRID_N_U64:%.*]] = bitcast i64 [[A]] to <1 x i64>18711// CHECK-NEXT:    [[VSRID_N_U641:%.*]] = bitcast i64 [[B]] to <1 x i64>18712// CHECK-NEXT:    [[VSRID_N_U642:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsri.v1i64(<1 x i64> [[VSRID_N_U64]], <1 x i64> [[VSRID_N_U641]], i32 63)18713// CHECK-NEXT:    [[VSRID_N_U643:%.*]] = bitcast <1 x i64> [[VSRID_N_U642]] to i6418714// CHECK-NEXT:    ret i64 [[VSRID_N_U643]]18715//18716uint64_t test_vsrid_n_u64(uint64_t a, uint64_t b) {18717  return (uint64_t)vsrid_n_u64(a, b, 63);18718}18719 18720// CHECK-LABEL: define dso_local <1 x i64> @test_vsri_n_u64(18721// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {18722// CHECK-NEXT:  [[ENTRY:.*:]]18723// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18724// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>18725// CHECK-NEXT:    [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18726// CHECK-NEXT:    [[VSRI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>18727// CHECK-NEXT:    [[VSRI_N2:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsri.v1i64(<1 x i64> [[VSRI_N]], <1 x i64> [[VSRI_N1]], i32 1)18728// CHECK-NEXT:    ret <1 x i64> [[VSRI_N2]]18729//18730uint64x1_t test_vsri_n_u64(uint64x1_t a, uint64x1_t b) {18731  return vsri_n_u64(a, b, 1);18732}18733 18734// CHECK-LABEL: define dso_local i64 @test_vslid_n_s64(18735// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18736// CHECK-NEXT:  [[ENTRY:.*:]]18737// CHECK-NEXT:    [[VSLID_N_S64:%.*]] = bitcast i64 [[A]] to <1 x i64>18738// CHECK-NEXT:    [[VSLID_N_S641:%.*]] = bitcast i64 [[B]] to <1 x i64>18739// CHECK-NEXT:    [[VSLID_N_S642:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsli.v1i64(<1 x i64> [[VSLID_N_S64]], <1 x i64> [[VSLID_N_S641]], i32 63)18740// CHECK-NEXT:    [[VSLID_N_S643:%.*]] = bitcast <1 x i64> [[VSLID_N_S642]] to i6418741// CHECK-NEXT:    ret i64 [[VSLID_N_S643]]18742//18743int64_t test_vslid_n_s64(int64_t a, int64_t b) {18744  return (int64_t)vslid_n_s64(a, b, 63);18745}18746 18747// CHECK-LABEL: define dso_local <1 x i64> @test_vsli_n_s64(18748// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {18749// CHECK-NEXT:  [[ENTRY:.*:]]18750// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18751// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>18752// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18753// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>18754// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsli.v1i64(<1 x i64> [[VSLI_N]], <1 x i64> [[VSLI_N1]], i32 1)18755// CHECK-NEXT:    ret <1 x i64> [[VSLI_N2]]18756//18757int64x1_t test_vsli_n_s64(int64x1_t a, int64x1_t b) {18758  return vsli_n_s64(a, b, 1);18759}18760 18761// CHECK-LABEL: define dso_local i64 @test_vslid_n_u64(18762// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {18763// CHECK-NEXT:  [[ENTRY:.*:]]18764// CHECK-NEXT:    [[VSLID_N_U64:%.*]] = bitcast i64 [[A]] to <1 x i64>18765// CHECK-NEXT:    [[VSLID_N_U641:%.*]] = bitcast i64 [[B]] to <1 x i64>18766// CHECK-NEXT:    [[VSLID_N_U642:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsli.v1i64(<1 x i64> [[VSLID_N_U64]], <1 x i64> [[VSLID_N_U641]], i32 63)18767// CHECK-NEXT:    [[VSLID_N_U643:%.*]] = bitcast <1 x i64> [[VSLID_N_U642]] to i6418768// CHECK-NEXT:    ret i64 [[VSLID_N_U643]]18769//18770uint64_t test_vslid_n_u64(uint64_t a, uint64_t b) {18771  return (uint64_t)vslid_n_u64(a, b, 63);18772}18773 18774// CHECK-LABEL: define dso_local <1 x i64> @test_vsli_n_u64(18775// CHECK-SAME: <1 x i64> noundef [[A:%.*]], <1 x i64> noundef [[B:%.*]]) #[[ATTR0]] {18776// CHECK-NEXT:  [[ENTRY:.*:]]18777// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i64> [[A]] to <8 x i8>18778// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[B]] to <8 x i8>18779// CHECK-NEXT:    [[VSLI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>18780// CHECK-NEXT:    [[VSLI_N1:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>18781// CHECK-NEXT:    [[VSLI_N2:%.*]] = call <1 x i64> @llvm.aarch64.neon.vsli.v1i64(<1 x i64> [[VSLI_N]], <1 x i64> [[VSLI_N1]], i32 1)18782// CHECK-NEXT:    ret <1 x i64> [[VSLI_N2]]18783//18784uint64x1_t test_vsli_n_u64(uint64x1_t a, uint64x1_t b) {18785  return vsli_n_u64(a, b, 1);18786}18787 18788// CHECK-LABEL: define dso_local i8 @test_vqshrnh_n_s16(18789// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18790// CHECK-NEXT:  [[ENTRY:.*:]]18791// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 018792// CHECK-NEXT:    [[VQSHRNH_N_S16:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> [[TMP0]], i32 8)18793// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHRNH_N_S16]], i64 018794// CHECK-NEXT:    ret i8 [[TMP1]]18795//18796int8_t test_vqshrnh_n_s16(int16_t a) {18797  return (int8_t)vqshrnh_n_s16(a, 8);18798}18799 18800// CHECK-LABEL: define dso_local i16 @test_vqshrns_n_s32(18801// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18802// CHECK-NEXT:  [[ENTRY:.*:]]18803// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 018804// CHECK-NEXT:    [[VQSHRNS_N_S32:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> [[TMP0]], i32 16)18805// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHRNS_N_S32]], i64 018806// CHECK-NEXT:    ret i16 [[TMP1]]18807//18808int16_t test_vqshrns_n_s32(int32_t a) {18809  return (int16_t)vqshrns_n_s32(a, 16);18810}18811 18812// CHECK-LABEL: define dso_local i32 @test_vqshrnd_n_s64(18813// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18814// CHECK-NEXT:  [[ENTRY:.*:]]18815// CHECK-NEXT:    [[VQSHRND_N_S64:%.*]] = call i32 @llvm.aarch64.neon.sqshrn.i32(i64 [[A]], i32 32)18816// CHECK-NEXT:    ret i32 [[VQSHRND_N_S64]]18817//18818int32_t test_vqshrnd_n_s64(int64_t a) {18819  return (int32_t)vqshrnd_n_s64(a, 32);18820}18821 18822// CHECK-LABEL: define dso_local i8 @test_vqshrnh_n_u16(18823// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18824// CHECK-NEXT:  [[ENTRY:.*:]]18825// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 018826// CHECK-NEXT:    [[VQSHRNH_N_U16:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshrn.v8i8(<8 x i16> [[TMP0]], i32 8)18827// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHRNH_N_U16]], i64 018828// CHECK-NEXT:    ret i8 [[TMP1]]18829//18830uint8_t test_vqshrnh_n_u16(uint16_t a) {18831  return (uint8_t)vqshrnh_n_u16(a, 8);18832}18833 18834// CHECK-LABEL: define dso_local i16 @test_vqshrns_n_u32(18835// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18836// CHECK-NEXT:  [[ENTRY:.*:]]18837// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 018838// CHECK-NEXT:    [[VQSHRNS_N_U32:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> [[TMP0]], i32 16)18839// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHRNS_N_U32]], i64 018840// CHECK-NEXT:    ret i16 [[TMP1]]18841//18842uint16_t test_vqshrns_n_u32(uint32_t a) {18843  return (uint16_t)vqshrns_n_u32(a, 16);18844}18845 18846// CHECK-LABEL: define dso_local i32 @test_vqshrnd_n_u64(18847// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18848// CHECK-NEXT:  [[ENTRY:.*:]]18849// CHECK-NEXT:    [[VQSHRND_N_U64:%.*]] = call i32 @llvm.aarch64.neon.uqshrn.i32(i64 [[A]], i32 32)18850// CHECK-NEXT:    ret i32 [[VQSHRND_N_U64]]18851//18852uint32_t test_vqshrnd_n_u64(uint64_t a) {18853  return (uint32_t)vqshrnd_n_u64(a, 32);18854}18855 18856// CHECK-LABEL: define dso_local i8 @test_vqrshrnh_n_s16(18857// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18858// CHECK-NEXT:  [[ENTRY:.*:]]18859// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 018860// CHECK-NEXT:    [[VQRSHRNH_N_S16:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshrn.v8i8(<8 x i16> [[TMP0]], i32 8)18861// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQRSHRNH_N_S16]], i64 018862// CHECK-NEXT:    ret i8 [[TMP1]]18863//18864int8_t test_vqrshrnh_n_s16(int16_t a) {18865  return (int8_t)vqrshrnh_n_s16(a, 8);18866}18867 18868// CHECK-LABEL: define dso_local i16 @test_vqrshrns_n_s32(18869// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18870// CHECK-NEXT:  [[ENTRY:.*:]]18871// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 018872// CHECK-NEXT:    [[VQRSHRNS_N_S32:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrn.v4i16(<4 x i32> [[TMP0]], i32 16)18873// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQRSHRNS_N_S32]], i64 018874// CHECK-NEXT:    ret i16 [[TMP1]]18875//18876int16_t test_vqrshrns_n_s32(int32_t a) {18877  return (int16_t)vqrshrns_n_s32(a, 16);18878}18879 18880// CHECK-LABEL: define dso_local i32 @test_vqrshrnd_n_s64(18881// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18882// CHECK-NEXT:  [[ENTRY:.*:]]18883// CHECK-NEXT:    [[VQRSHRND_N_S64:%.*]] = call i32 @llvm.aarch64.neon.sqrshrn.i32(i64 [[A]], i32 32)18884// CHECK-NEXT:    ret i32 [[VQRSHRND_N_S64]]18885//18886int32_t test_vqrshrnd_n_s64(int64_t a) {18887  return (int32_t)vqrshrnd_n_s64(a, 32);18888}18889 18890// CHECK-LABEL: define dso_local i8 @test_vqrshrnh_n_u16(18891// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18892// CHECK-NEXT:  [[ENTRY:.*:]]18893// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 018894// CHECK-NEXT:    [[VQRSHRNH_N_U16:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqrshrn.v8i8(<8 x i16> [[TMP0]], i32 8)18895// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQRSHRNH_N_U16]], i64 018896// CHECK-NEXT:    ret i8 [[TMP1]]18897//18898uint8_t test_vqrshrnh_n_u16(uint16_t a) {18899  return (uint8_t)vqrshrnh_n_u16(a, 8);18900}18901 18902// CHECK-LABEL: define dso_local i16 @test_vqrshrns_n_u32(18903// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18904// CHECK-NEXT:  [[ENTRY:.*:]]18905// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 018906// CHECK-NEXT:    [[VQRSHRNS_N_U32:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqrshrn.v4i16(<4 x i32> [[TMP0]], i32 16)18907// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQRSHRNS_N_U32]], i64 018908// CHECK-NEXT:    ret i16 [[TMP1]]18909//18910uint16_t test_vqrshrns_n_u32(uint32_t a) {18911  return (uint16_t)vqrshrns_n_u32(a, 16);18912}18913 18914// CHECK-LABEL: define dso_local i32 @test_vqrshrnd_n_u64(18915// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18916// CHECK-NEXT:  [[ENTRY:.*:]]18917// CHECK-NEXT:    [[VQRSHRND_N_U64:%.*]] = call i32 @llvm.aarch64.neon.uqrshrn.i32(i64 [[A]], i32 32)18918// CHECK-NEXT:    ret i32 [[VQRSHRND_N_U64]]18919//18920uint32_t test_vqrshrnd_n_u64(uint64_t a) {18921  return (uint32_t)vqrshrnd_n_u64(a, 32);18922}18923 18924// CHECK-LABEL: define dso_local i8 @test_vqshrunh_n_s16(18925// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18926// CHECK-NEXT:  [[ENTRY:.*:]]18927// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 018928// CHECK-NEXT:    [[VQSHRUNH_N_S16:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshrun.v8i8(<8 x i16> [[TMP0]], i32 8)18929// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHRUNH_N_S16]], i64 018930// CHECK-NEXT:    ret i8 [[TMP1]]18931//18932int8_t test_vqshrunh_n_s16(int16_t a) {18933  return (int8_t)vqshrunh_n_s16(a, 8);18934}18935 18936// CHECK-LABEL: define dso_local i16 @test_vqshruns_n_s32(18937// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18938// CHECK-NEXT:  [[ENTRY:.*:]]18939// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 018940// CHECK-NEXT:    [[VQSHRUNS_N_S32:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32> [[TMP0]], i32 16)18941// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHRUNS_N_S32]], i64 018942// CHECK-NEXT:    ret i16 [[TMP1]]18943//18944int16_t test_vqshruns_n_s32(int32_t a) {18945  return (int16_t)vqshruns_n_s32(a, 16);18946}18947 18948// CHECK-LABEL: define dso_local i32 @test_vqshrund_n_s64(18949// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18950// CHECK-NEXT:  [[ENTRY:.*:]]18951// CHECK-NEXT:    [[VQSHRUND_N_S64:%.*]] = call i32 @llvm.aarch64.neon.sqshrun.i32(i64 [[A]], i32 32)18952// CHECK-NEXT:    ret i32 [[VQSHRUND_N_S64]]18953//18954int32_t test_vqshrund_n_s64(int64_t a) {18955  return (int32_t)vqshrund_n_s64(a, 32);18956}18957 18958// CHECK-LABEL: define dso_local i8 @test_vqrshrunh_n_s16(18959// CHECK-SAME: i16 noundef [[A:%.*]]) #[[ATTR0]] {18960// CHECK-NEXT:  [[ENTRY:.*:]]18961// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[A]], i64 018962// CHECK-NEXT:    [[VQRSHRUNH_N_S16:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshrun.v8i8(<8 x i16> [[TMP0]], i32 8)18963// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <8 x i8> [[VQRSHRUNH_N_S16]], i64 018964// CHECK-NEXT:    ret i8 [[TMP1]]18965//18966uint8_t test_vqrshrunh_n_s16(int16_t a) {18967  return (uint8_t)vqrshrunh_n_s16(a, 8);18968}18969 18970// CHECK-LABEL: define dso_local i16 @test_vqrshruns_n_s32(18971// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18972// CHECK-NEXT:  [[ENTRY:.*:]]18973// CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 018974// CHECK-NEXT:    [[VQRSHRUNS_N_S32:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrun.v4i16(<4 x i32> [[TMP0]], i32 16)18975// CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x i16> [[VQRSHRUNS_N_S32]], i64 018976// CHECK-NEXT:    ret i16 [[TMP1]]18977//18978uint16_t test_vqrshruns_n_s32(int32_t a) {18979  return (uint16_t)vqrshruns_n_s32(a, 16);18980}18981 18982// CHECK-LABEL: define dso_local i32 @test_vqrshrund_n_s64(18983// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {18984// CHECK-NEXT:  [[ENTRY:.*:]]18985// CHECK-NEXT:    [[VQRSHRUND_N_S64:%.*]] = call i32 @llvm.aarch64.neon.sqrshrun.i32(i64 [[A]], i32 32)18986// CHECK-NEXT:    ret i32 [[VQRSHRUND_N_S64]]18987//18988uint32_t test_vqrshrund_n_s64(int64_t a) {18989  return (uint32_t)vqrshrund_n_s64(a, 32);18990}18991 18992// CHECK-LABEL: define dso_local float @test_vcvts_n_f32_s32(18993// CHECK-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] {18994// CHECK-NEXT:  [[ENTRY:.*:]]18995// CHECK-NEXT:    [[VCVTS