208 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple aarch64 -target-feature +neon \3// RUN: -target-feature +rcpc3 -disable-O0-optnone -emit-llvm -o - %s \4// RUN: | opt -S -passes=mem2reg,sroa | FileCheck %s5 6// REQUIRES: aarch64-registered-target7 8#include <arm_neon.h>9 10 11// CHECK-LABEL: @test_vldap1q_lane_u64(12// CHECK-NEXT: entry:13// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B:%.*]] to <16 x i8>14// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>15// CHECK-NEXT: [[TMP2:%.*]] = load atomic i64, ptr [[A:%.*]] acquire, align 816// CHECK-NEXT: [[VLDAP1_LANE:%.*]] = insertelement <2 x i64> [[TMP1]], i64 [[TMP2]], i32 117// CHECK-NEXT: ret <2 x i64> [[VLDAP1_LANE]]18//19uint64x2_t test_vldap1q_lane_u64(uint64_t *a, uint64x2_t b) {20 return vldap1q_lane_u64(a, b, 1);21}22 23// CHECK-LABEL: @test_vldap1q_lane_s64(24// CHECK-NEXT: entry:25// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B:%.*]] to <16 x i8>26// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>27// CHECK-NEXT: [[TMP2:%.*]] = load atomic i64, ptr [[A:%.*]] acquire, align 828// CHECK-NEXT: [[VLDAP1_LANE:%.*]] = insertelement <2 x i64> [[TMP1]], i64 [[TMP2]], i32 129// CHECK-NEXT: ret <2 x i64> [[VLDAP1_LANE]]30//31int64x2_t test_vldap1q_lane_s64(int64_t *a, int64x2_t b) {32 return vldap1q_lane_s64(a, b, 1);33}34 35// CHECK-LABEL: @test_vldap1q_lane_f64(36// CHECK-NEXT: entry:37// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[B:%.*]] to <2 x i64>38// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>39// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>40// CHECK-NEXT: [[TMP3:%.*]] = load atomic double, ptr [[A:%.*]] acquire, align 841// CHECK-NEXT: [[VLDAP1_LANE:%.*]] = insertelement <2 x double> [[TMP2]], double [[TMP3]], i32 142// CHECK-NEXT: ret <2 x double> [[VLDAP1_LANE]]43//44float64x2_t test_vldap1q_lane_f64(float64_t *a, float64x2_t b) {45 return vldap1q_lane_f64(a, b, 1);46}47 48// CHECK-LABEL: @test_vldap1q_lane_p64(49// CHECK-NEXT: entry:50// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B:%.*]] to <16 x i8>51// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>52// CHECK-NEXT: [[TMP2:%.*]] = load atomic i64, ptr [[A:%.*]] acquire, align 853// CHECK-NEXT: [[VLDAP1_LANE:%.*]] = insertelement <2 x i64> [[TMP1]], i64 [[TMP2]], i32 154// CHECK-NEXT: ret <2 x i64> [[VLDAP1_LANE]]55//56poly64x2_t test_vldap1q_lane_p64(poly64_t *a, poly64x2_t b) {57 return vldap1q_lane_p64(a, b, 1);58}59 60// CHECK-LABEL: @test_vldap1_lane_u64(61// CHECK-NEXT: entry:62// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B:%.*]] to <8 x i8>63// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>64// CHECK-NEXT: [[TMP2:%.*]] = load atomic i64, ptr [[A:%.*]] acquire, align 865// CHECK-NEXT: [[VLDAP1_LANE:%.*]] = insertelement <1 x i64> [[TMP1]], i64 [[TMP2]], i32 066// CHECK-NEXT: ret <1 x i64> [[VLDAP1_LANE]]67//68uint64x1_t test_vldap1_lane_u64(uint64_t *a, uint64x1_t b) {69 return vldap1_lane_u64(a, b, 0);70}71 72// CHECK-LABEL: @test_vldap1_lane_s64(73// CHECK-NEXT: entry:74// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B:%.*]] to <8 x i8>75// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>76// CHECK-NEXT: [[TMP2:%.*]] = load atomic i64, ptr [[A:%.*]] acquire, align 877// CHECK-NEXT: [[VLDAP1_LANE:%.*]] = insertelement <1 x i64> [[TMP1]], i64 [[TMP2]], i32 078// CHECK-NEXT: ret <1 x i64> [[VLDAP1_LANE]]79//80int64x1_t test_vldap1_lane_s64(int64_t *a, int64x1_t b) {81 return vldap1_lane_s64(a, b, 0);82}83 84// CHECK-LABEL: @test_vldap1_lane_f64(85// CHECK-NEXT: entry:86// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[B:%.*]] to i6487// CHECK-NEXT: [[__S1_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 088// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[__S1_SROA_0_0_VEC_INSERT]] to <8 x i8>89// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double>90// CHECK-NEXT: [[TMP3:%.*]] = load atomic double, ptr [[A:%.*]] acquire, align 891// CHECK-NEXT: [[VLDAP1_LANE:%.*]] = insertelement <1 x double> [[TMP2]], double [[TMP3]], i32 092// CHECK-NEXT: ret <1 x double> [[VLDAP1_LANE]]93//94float64x1_t test_vldap1_lane_f64(float64_t *a, float64x1_t b) {95 return vldap1_lane_f64(a, b, 0);96}97 98// CHECK-LABEL: @test_vldap1_lane_p64(99// CHECK-NEXT: entry:100// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B:%.*]] to <8 x i8>101// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>102// CHECK-NEXT: [[TMP2:%.*]] = load atomic i64, ptr [[A:%.*]] acquire, align 8103// CHECK-NEXT: [[VLDAP1_LANE:%.*]] = insertelement <1 x i64> [[TMP1]], i64 [[TMP2]], i32 0104// CHECK-NEXT: ret <1 x i64> [[VLDAP1_LANE]]105//106poly64x1_t test_vldap1_lane_p64(poly64_t *a, poly64x1_t b) {107 return vldap1_lane_p64(a, b, 0);108}109 110// CHECK-LABEL: @test_vstl1q_lane_u64(111// CHECK-NEXT: entry:112// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B:%.*]] to <16 x i8>113// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>114// CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[TMP1]], i32 1115// CHECK-NEXT: store atomic i64 [[TMP2]], ptr [[A:%.*]] release, align 8116// CHECK-NEXT: ret void117//118void test_vstl1q_lane_u64(uint64_t *a, uint64x2_t b) {119 vstl1q_lane_u64(a, b, 1);120}121 122// CHECK-LABEL: @test_vstl1q_lane_s64(123// CHECK-NEXT: entry:124// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B:%.*]] to <16 x i8>125// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>126// CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[TMP1]], i32 1127// CHECK-NEXT: store atomic i64 [[TMP2]], ptr [[A:%.*]] release, align 8128// CHECK-NEXT: ret void129//130void test_vstl1q_lane_s64(int64_t *a, int64x2_t b) {131 vstl1q_lane_s64(a, b, 1);132}133 134// CHECK-LABEL: @test_vstl1q_lane_f64(135// CHECK-NEXT: entry:136// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[B:%.*]] to <2 x i64>137// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8>138// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>139// CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 1140// CHECK-NEXT: store atomic double [[TMP3]], ptr [[A:%.*]] release, align 8141// CHECK-NEXT: ret void142//143void test_vstl1q_lane_f64(float64_t *a, float64x2_t b) {144 vstl1q_lane_f64(a, b, 1);145}146 147// CHECK-LABEL: @test_vstl1q_lane_p64(148// CHECK-NEXT: entry:149// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[B:%.*]] to <16 x i8>150// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>151// CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[TMP1]], i32 1152// CHECK-NEXT: store atomic i64 [[TMP2]], ptr [[A:%.*]] release, align 8153// CHECK-NEXT: ret void154//155void test_vstl1q_lane_p64(poly64_t *a, poly64x2_t b) {156 vstl1q_lane_p64(a, b, 1);157}158 159// CHECK-LABEL: @test_vstl1_lane_u64(160// CHECK-NEXT: entry:161// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B:%.*]] to <8 x i8>162// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>163// CHECK-NEXT: [[TMP2:%.*]] = extractelement <1 x i64> [[TMP1]], i32 0164// CHECK-NEXT: store atomic i64 [[TMP2]], ptr [[A:%.*]] release, align 8165// CHECK-NEXT: ret void166//167void test_vstl1_lane_u64(uint64_t *a, uint64x1_t b) {168 vstl1_lane_u64(a, b, 0);169}170 171// CHECK-LABEL: @test_vstl1_lane_s64(172// CHECK-NEXT: entry:173// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B:%.*]] to <8 x i8>174// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>175// CHECK-NEXT: [[TMP2:%.*]] = extractelement <1 x i64> [[TMP1]], i32 0176// CHECK-NEXT: store atomic i64 [[TMP2]], ptr [[A:%.*]] release, align 8177// CHECK-NEXT: ret void178//179void test_vstl1_lane_s64(int64_t *a, int64x1_t b) {180 vstl1_lane_s64(a, b, 0);181}182 183// CHECK-LABEL: @test_vstl1_lane_f64(184// CHECK-NEXT: entry:185// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[B:%.*]] to i64186// CHECK-NEXT: [[__S1_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 0187// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[__S1_SROA_0_0_VEC_INSERT]] to <8 x i8>188// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double>189// CHECK-NEXT: [[TMP3:%.*]] = extractelement <1 x double> [[TMP2]], i32 0190// CHECK-NEXT: store atomic double [[TMP3]], ptr [[A:%.*]] release, align 8191// CHECK-NEXT: ret void192//193void test_vstl1_lane_f64(float64_t *a, float64x1_t b) {194 vstl1_lane_f64(a, b, 0);195}196 197// CHECK-LABEL: @test_vstl1_lane_p64(198// CHECK-NEXT: entry:199// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[B:%.*]] to <8 x i8>200// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>201// CHECK-NEXT: [[TMP2:%.*]] = extractelement <1 x i64> [[TMP1]], i32 0202// CHECK-NEXT: store atomic i64 [[TMP2]], ptr [[A:%.*]] release, align 8203// CHECK-NEXT: ret void204//205void test_vstl1_lane_p64(poly64_t *a, poly64x1_t b) {206 vstl1_lane_p64(a, b, 0);207}208