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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 52// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-cpu cyclone \3// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s4 5// REQUIRES: aarch64-registered-target || arm-registered-target6 7#include <arm_neon.h>8 9 10// CHECK-LABEL: define dso_local float @test_vmuls_lane_f32(11// CHECK-SAME: float noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-NEXT: [[ENTRY:.*:]]13// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <2 x float> [[B]], i32 114// CHECK-NEXT: [[MUL:%.*]] = fmul float [[A]], [[VGET_LANE]]15// CHECK-NEXT: ret float [[MUL]]16//17float32_t test_vmuls_lane_f32(float32_t a, float32x2_t b) {18 return vmuls_lane_f32(a, b, 1);19}20 21// CHECK-LABEL: define dso_local double @test_vmuld_lane_f64(22// CHECK-SAME: double noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {23// CHECK-NEXT: [[ENTRY:.*:]]24// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <1 x double> [[B]], i32 025// CHECK-NEXT: [[MUL:%.*]] = fmul double [[A]], [[VGET_LANE]]26// CHECK-NEXT: ret double [[MUL]]27//28float64_t test_vmuld_lane_f64(float64_t a, float64x1_t b) {29 return vmuld_lane_f64(a, b, 0);30}31 32// CHECK-LABEL: define dso_local float @test_vmuls_laneq_f32(33// CHECK-SAME: float noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {34// CHECK-NEXT: [[ENTRY:.*:]]35// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <4 x float> [[B]], i32 336// CHECK-NEXT: [[MUL:%.*]] = fmul float [[A]], [[VGETQ_LANE]]37// CHECK-NEXT: ret float [[MUL]]38//39float32_t test_vmuls_laneq_f32(float32_t a, float32x4_t b) {40 return vmuls_laneq_f32(a, b, 3);41}42 43// CHECK-LABEL: define dso_local double @test_vmuld_laneq_f64(44// CHECK-SAME: double noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {45// CHECK-NEXT: [[ENTRY:.*:]]46// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <2 x double> [[B]], i32 147// CHECK-NEXT: [[MUL:%.*]] = fmul double [[A]], [[VGETQ_LANE]]48// CHECK-NEXT: ret double [[MUL]]49//50float64_t test_vmuld_laneq_f64(float64_t a, float64x2_t b) {51 return vmuld_laneq_f64(a, b, 1);52}53 54// CHECK-LABEL: define dso_local <1 x double> @test_vmul_n_f64(55// CHECK-SAME: <1 x double> noundef [[A:%.*]], double noundef [[B:%.*]]) #[[ATTR0]] {56// CHECK-NEXT: [[ENTRY:.*:]]57// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to double58// CHECK-NEXT: [[TMP1:%.*]] = fmul double [[TMP0]], [[B]]59// CHECK-NEXT: [[TMP2:%.*]] = bitcast double [[TMP1]] to <1 x double>60// CHECK-NEXT: ret <1 x double> [[TMP2]]61//62float64x1_t test_vmul_n_f64(float64x1_t a, float64_t b) {63 return vmul_n_f64(a, b);64}65 66// CHECK-LABEL: define dso_local float @test_vmulxs_lane_f32(67// CHECK-SAME: float noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {68// CHECK-NEXT: [[ENTRY:.*:]]69// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <2 x float> [[B]], i32 170// CHECK-NEXT: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float [[A]], float [[VGET_LANE]])71// CHECK-NEXT: ret float [[VMULXS_F32_I]]72//73float32_t test_vmulxs_lane_f32(float32_t a, float32x2_t b) {74 return vmulxs_lane_f32(a, b, 1);75}76 77// CHECK-LABEL: define dso_local float @test_vmulxs_laneq_f32(78// CHECK-SAME: float noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {79// CHECK-NEXT: [[ENTRY:.*:]]80// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <4 x float> [[B]], i32 381// CHECK-NEXT: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float [[A]], float [[VGETQ_LANE]])82// CHECK-NEXT: ret float [[VMULXS_F32_I]]83//84float32_t test_vmulxs_laneq_f32(float32_t a, float32x4_t b) {85 return vmulxs_laneq_f32(a, b, 3);86}87 88// CHECK-LABEL: define dso_local double @test_vmulxd_lane_f64(89// CHECK-SAME: double noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {90// CHECK-NEXT: [[ENTRY:.*:]]91// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <1 x double> [[B]], i32 092// CHECK-NEXT: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[A]], double [[VGET_LANE]])93// CHECK-NEXT: ret double [[VMULXD_F64_I]]94//95float64_t test_vmulxd_lane_f64(float64_t a, float64x1_t b) {96 return vmulxd_lane_f64(a, b, 0);97}98 99// CHECK-LABEL: define dso_local double @test_vmulxd_laneq_f64(100// CHECK-SAME: double noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {101// CHECK-NEXT: [[ENTRY:.*:]]102// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <2 x double> [[B]], i32 1103// CHECK-NEXT: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[A]], double [[VGETQ_LANE]])104// CHECK-NEXT: ret double [[VMULXD_F64_I]]105//106float64_t test_vmulxd_laneq_f64(float64_t a, float64x2_t b) {107 return vmulxd_laneq_f64(a, b, 1);108}109 110// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_lane_f64(111// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {112// CHECK-NEXT: [[ENTRY:.*:]]113// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <1 x double> [[A]], i32 0114// CHECK-NEXT: [[VGET_LANE4:%.*]] = extractelement <1 x double> [[B]], i32 0115// CHECK-NEXT: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE4]])116// CHECK-NEXT: [[VSET_LANE:%.*]] = insertelement <1 x double> [[A]], double [[VMULXD_F64_I]], i32 0117// CHECK-NEXT: ret <1 x double> [[VSET_LANE]]118//119float64x1_t test_vmulx_lane_f64(float64x1_t a, float64x1_t b) {120 return vmulx_lane_f64(a, b, 0);121}122 123 124// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_laneq_f64_0(125// CHECK-SAME: <1 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {126// CHECK-NEXT: [[ENTRY:.*:]]127// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <1 x double> [[A]], i32 0128// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <2 x double> [[B]], i32 0129// CHECK-NEXT: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])130// CHECK-NEXT: [[VSET_LANE:%.*]] = insertelement <1 x double> [[A]], double [[VMULXD_F64_I]], i32 0131// CHECK-NEXT: ret <1 x double> [[VSET_LANE]]132//133float64x1_t test_vmulx_laneq_f64_0(float64x1_t a, float64x2_t b) {134 return vmulx_laneq_f64(a, b, 0);135}136 137// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_laneq_f64_1(138// CHECK-SAME: <1 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {139// CHECK-NEXT: [[ENTRY:.*:]]140// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <1 x double> [[A]], i32 0141// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <2 x double> [[B]], i32 1142// CHECK-NEXT: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])143// CHECK-NEXT: [[VSET_LANE:%.*]] = insertelement <1 x double> [[A]], double [[VMULXD_F64_I]], i32 0144// CHECK-NEXT: ret <1 x double> [[VSET_LANE]]145//146float64x1_t test_vmulx_laneq_f64_1(float64x1_t a, float64x2_t b) {147 return vmulx_laneq_f64(a, b, 1);148}149 150 151// CHECK-LABEL: define dso_local float @test_vfmas_lane_f32(152// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]], <2 x float> noundef [[C:%.*]]) #[[ATTR0]] {153// CHECK-NEXT: [[ENTRY:.*:]]154// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <2 x float> [[C]], i32 1155// CHECK-NEXT: [[TMP0:%.*]] = call float @llvm.fma.f32(float [[B]], float [[EXTRACT]], float [[A]])156// CHECK-NEXT: ret float [[TMP0]]157//158float32_t test_vfmas_lane_f32(float32_t a, float32_t b, float32x2_t c) {159 return vfmas_lane_f32(a, b, c, 1);160}161 162// CHECK-LABEL: define dso_local double @test_vfmad_lane_f64(163// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]], <1 x double> noundef [[C:%.*]]) #[[ATTR0]] {164// CHECK-NEXT: [[ENTRY:.*:]]165// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <1 x double> [[C]], i32 0166// CHECK-NEXT: [[TMP0:%.*]] = call double @llvm.fma.f64(double [[B]], double [[EXTRACT]], double [[A]])167// CHECK-NEXT: ret double [[TMP0]]168//169float64_t test_vfmad_lane_f64(float64_t a, float64_t b, float64x1_t c) {170 return vfmad_lane_f64(a, b, c, 0);171}172 173// CHECK-LABEL: define dso_local double @test_vfmad_laneq_f64(174// CHECK-SAME: double noundef [[A:%.*]], double noundef [[B:%.*]], <2 x double> noundef [[C:%.*]]) #[[ATTR0]] {175// CHECK-NEXT: [[ENTRY:.*:]]176// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <2 x double> [[C]], i32 1177// CHECK-NEXT: [[TMP0:%.*]] = call double @llvm.fma.f64(double [[B]], double [[EXTRACT]], double [[A]])178// CHECK-NEXT: ret double [[TMP0]]179//180float64_t test_vfmad_laneq_f64(float64_t a, float64_t b, float64x2_t c) {181 return vfmad_laneq_f64(a, b, c, 1);182}183 184// CHECK-LABEL: define dso_local float @test_vfmss_lane_f32(185// CHECK-SAME: float noundef [[A:%.*]], float noundef [[B:%.*]], <2 x float> noundef [[C:%.*]]) #[[ATTR0]] {186// CHECK-NEXT: [[ENTRY:.*:]]187// CHECK-NEXT: [[FNEG:%.*]] = fneg float [[B]]188// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <2 x float> [[C]], i32 1189// CHECK-NEXT: [[TMP0:%.*]] = call float @llvm.fma.f32(float [[FNEG]], float [[EXTRACT]], float [[A]])190// CHECK-NEXT: ret float [[TMP0]]191//192float32_t test_vfmss_lane_f32(float32_t a, float32_t b, float32x2_t c) {193 return vfmss_lane_f32(a, b, c, 1);194}195 196// CHECK-LABEL: define dso_local <1 x double> @test_vfma_lane_f64(197// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]], <1 x double> noundef [[V:%.*]]) #[[ATTR0]] {198// CHECK-NEXT: [[ENTRY:.*:]]199// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64200// CHECK-NEXT: [[__S0_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 0201// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x double> [[B]] to i64202// CHECK-NEXT: [[__S1_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 0203// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x double> [[V]] to i64204// CHECK-NEXT: [[__S2_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 0205// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[__S0_SROA_0_0_VEC_INSERT]] to <8 x i8>206// CHECK-NEXT: [[TMP4:%.*]] = bitcast <1 x i64> [[__S1_SROA_0_0_VEC_INSERT]] to <8 x i8>207// CHECK-NEXT: [[TMP5:%.*]] = bitcast <1 x i64> [[__S2_SROA_0_0_VEC_INSERT]] to <8 x i8>208// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double>209// CHECK-NEXT: [[LANE:%.*]] = shufflevector <1 x double> [[TMP6]], <1 x double> [[TMP6]], <1 x i32> zeroinitializer210// CHECK-NEXT: [[FMLA:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double>211// CHECK-NEXT: [[FMLA1:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>212// CHECK-NEXT: [[FMLA2:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> [[FMLA]], <1 x double> [[LANE]], <1 x double> [[FMLA1]])213// CHECK-NEXT: ret <1 x double> [[FMLA2]]214//215float64x1_t test_vfma_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) {216 return vfma_lane_f64(a, b, v, 0);217}218 219// CHECK-LABEL: define dso_local <1 x double> @test_vfms_lane_f64(220// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]], <1 x double> noundef [[V:%.*]]) #[[ATTR0]] {221// CHECK-NEXT: [[ENTRY:.*:]]222// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64223// CHECK-NEXT: [[__S0_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 0224// CHECK-NEXT: [[FNEG:%.*]] = fneg <1 x double> [[B]]225// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x double> [[FNEG]] to i64226// CHECK-NEXT: [[__S1_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 0227// CHECK-NEXT: [[TMP2:%.*]] = bitcast <1 x double> [[V]] to i64228// CHECK-NEXT: [[__S2_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i32 0229// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[__S0_SROA_0_0_VEC_INSERT]] to <8 x i8>230// CHECK-NEXT: [[TMP4:%.*]] = bitcast <1 x i64> [[__S1_SROA_0_0_VEC_INSERT]] to <8 x i8>231// CHECK-NEXT: [[TMP5:%.*]] = bitcast <1 x i64> [[__S2_SROA_0_0_VEC_INSERT]] to <8 x i8>232// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double>233// CHECK-NEXT: [[LANE:%.*]] = shufflevector <1 x double> [[TMP6]], <1 x double> [[TMP6]], <1 x i32> zeroinitializer234// CHECK-NEXT: [[FMLA:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double>235// CHECK-NEXT: [[FMLA1:%.*]] = bitcast <8 x i8> [[TMP3]] to <1 x double>236// CHECK-NEXT: [[FMLA2:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> [[FMLA]], <1 x double> [[LANE]], <1 x double> [[FMLA1]])237// CHECK-NEXT: ret <1 x double> [[FMLA2]]238//239float64x1_t test_vfms_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) {240 return vfms_lane_f64(a, b, v, 0);241}242 243// CHECK-LABEL: define dso_local <1 x double> @test_vfma_laneq_f64(244// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]], <2 x double> noundef [[V:%.*]]) #[[ATTR0]] {245// CHECK-NEXT: [[ENTRY:.*:]]246// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64247// CHECK-NEXT: [[__S0_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 0248// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x double> [[B]] to i64249// CHECK-NEXT: [[__S1_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 0250// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[V]] to <2 x i64>251// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[__S0_SROA_0_0_VEC_INSERT]] to <8 x i8>252// CHECK-NEXT: [[TMP4:%.*]] = bitcast <1 x i64> [[__S1_SROA_0_0_VEC_INSERT]] to <8 x i8>253// CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>254// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to double255// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to double256// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>257// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <2 x double> [[TMP8]], i32 0258// CHECK-NEXT: [[TMP9:%.*]] = call double @llvm.fma.f64(double [[TMP7]], double [[EXTRACT]], double [[TMP6]])259// CHECK-NEXT: [[TMP10:%.*]] = bitcast double [[TMP9]] to <1 x double>260// CHECK-NEXT: ret <1 x double> [[TMP10]]261//262float64x1_t test_vfma_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) {263 return vfma_laneq_f64(a, b, v, 0);264}265 266// CHECK-LABEL: define dso_local <1 x double> @test_vfms_laneq_f64(267// CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]], <2 x double> noundef [[V:%.*]]) #[[ATTR0]] {268// CHECK-NEXT: [[ENTRY:.*:]]269// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64270// CHECK-NEXT: [[__S0_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 0271// CHECK-NEXT: [[FNEG:%.*]] = fneg <1 x double> [[B]]272// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x double> [[FNEG]] to i64273// CHECK-NEXT: [[__S1_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 0274// CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[V]] to <2 x i64>275// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[__S0_SROA_0_0_VEC_INSERT]] to <8 x i8>276// CHECK-NEXT: [[TMP4:%.*]] = bitcast <1 x i64> [[__S1_SROA_0_0_VEC_INSERT]] to <8 x i8>277// CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to <16 x i8>278// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to double279// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to double280// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double>281// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <2 x double> [[TMP8]], i32 0282// CHECK-NEXT: [[TMP9:%.*]] = call double @llvm.fma.f64(double [[TMP7]], double [[EXTRACT]], double [[TMP6]])283// CHECK-NEXT: [[TMP10:%.*]] = bitcast double [[TMP9]] to <1 x double>284// CHECK-NEXT: ret <1 x double> [[TMP10]]285//286float64x1_t test_vfms_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) {287 return vfms_laneq_f64(a, b, v, 0);288}289 290// CHECK-LABEL: define dso_local i32 @test_vqdmullh_lane_s16(291// CHECK-SAME: i16 noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {292// CHECK-NEXT: [[ENTRY:.*:]]293// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <4 x i16> [[B]], i32 3294// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 0295// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[VGET_LANE]], i64 0296// CHECK-NEXT: [[VQDMULLH_S16_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])297// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[VQDMULLH_S16_I]], i64 0298// CHECK-NEXT: ret i32 [[TMP2]]299//300int32_t test_vqdmullh_lane_s16(int16_t a, int16x4_t b) {301 return vqdmullh_lane_s16(a, b, 3);302}303 304// CHECK-LABEL: define dso_local i64 @test_vqdmulls_lane_s32(305// CHECK-SAME: i32 noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {306// CHECK-NEXT: [[ENTRY:.*:]]307// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <2 x i32> [[B]], i32 1308// CHECK-NEXT: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[A]], i32 [[VGET_LANE]])309// CHECK-NEXT: ret i64 [[VQDMULLS_S32_I]]310//311int64_t test_vqdmulls_lane_s32(int32_t a, int32x2_t b) {312 return vqdmulls_lane_s32(a, b, 1);313}314 315// CHECK-LABEL: define dso_local i32 @test_vqdmullh_laneq_s16(316// CHECK-SAME: i16 noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {317// CHECK-NEXT: [[ENTRY:.*:]]318// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> [[B]], i32 7319// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 0320// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[VGETQ_LANE]], i64 0321// CHECK-NEXT: [[VQDMULLH_S16_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])322// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[VQDMULLH_S16_I]], i64 0323// CHECK-NEXT: ret i32 [[TMP2]]324//325int32_t test_vqdmullh_laneq_s16(int16_t a, int16x8_t b) {326 return vqdmullh_laneq_s16(a, b, 7);327}328 329// CHECK-LABEL: define dso_local i64 @test_vqdmulls_laneq_s32(330// CHECK-SAME: i32 noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {331// CHECK-NEXT: [[ENTRY:.*:]]332// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> [[B]], i32 3333// CHECK-NEXT: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[A]], i32 [[VGETQ_LANE]])334// CHECK-NEXT: ret i64 [[VQDMULLS_S32_I]]335//336int64_t test_vqdmulls_laneq_s32(int32_t a, int32x4_t b) {337 return vqdmulls_laneq_s32(a, b, 3);338}339 340// CHECK-LABEL: define dso_local i16 @test_vqdmulhh_lane_s16(341// CHECK-SAME: i16 noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {342// CHECK-NEXT: [[ENTRY:.*:]]343// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <4 x i16> [[B]], i32 3344// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 0345// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[VGET_LANE]], i64 0346// CHECK-NEXT: [[VQDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqdmulh.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])347// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i16> [[VQDMULHH_S16_I]], i64 0348// CHECK-NEXT: ret i16 [[TMP2]]349//350int16_t test_vqdmulhh_lane_s16(int16_t a, int16x4_t b) {351 return vqdmulhh_lane_s16(a, b, 3);352}353 354// CHECK-LABEL: define dso_local i32 @test_vqdmulhs_lane_s32(355// CHECK-SAME: i32 noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {356// CHECK-NEXT: [[ENTRY:.*:]]357// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <2 x i32> [[B]], i32 1358// CHECK-NEXT: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 [[A]], i32 [[VGET_LANE]])359// CHECK-NEXT: ret i32 [[VQDMULHS_S32_I]]360//361int32_t test_vqdmulhs_lane_s32(int32_t a, int32x2_t b) {362 return vqdmulhs_lane_s32(a, b, 1);363}364 365 366// CHECK-LABEL: define dso_local i16 @test_vqdmulhh_laneq_s16(367// CHECK-SAME: i16 noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {368// CHECK-NEXT: [[ENTRY:.*:]]369// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> [[B]], i32 7370// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 0371// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[VGETQ_LANE]], i64 0372// CHECK-NEXT: [[VQDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqdmulh.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])373// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i16> [[VQDMULHH_S16_I]], i64 0374// CHECK-NEXT: ret i16 [[TMP2]]375//376int16_t test_vqdmulhh_laneq_s16(int16_t a, int16x8_t b) {377 return vqdmulhh_laneq_s16(a, b, 7);378}379 380 381// CHECK-LABEL: define dso_local i32 @test_vqdmulhs_laneq_s32(382// CHECK-SAME: i32 noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {383// CHECK-NEXT: [[ENTRY:.*:]]384// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> [[B]], i32 3385// CHECK-NEXT: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 [[A]], i32 [[VGETQ_LANE]])386// CHECK-NEXT: ret i32 [[VQDMULHS_S32_I]]387//388int32_t test_vqdmulhs_laneq_s32(int32_t a, int32x4_t b) {389 return vqdmulhs_laneq_s32(a, b, 3);390}391 392// CHECK-LABEL: define dso_local i16 @test_vqrdmulhh_lane_s16(393// CHECK-SAME: i16 noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {394// CHECK-NEXT: [[ENTRY:.*:]]395// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <4 x i16> [[B]], i32 3396// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 0397// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[VGET_LANE]], i64 0398// CHECK-NEXT: [[VQRDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])399// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i16> [[VQRDMULHH_S16_I]], i64 0400// CHECK-NEXT: ret i16 [[TMP2]]401//402int16_t test_vqrdmulhh_lane_s16(int16_t a, int16x4_t b) {403 return vqrdmulhh_lane_s16(a, b, 3);404}405 406// CHECK-LABEL: define dso_local i32 @test_vqrdmulhs_lane_s32(407// CHECK-SAME: i32 noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {408// CHECK-NEXT: [[ENTRY:.*:]]409// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <2 x i32> [[B]], i32 1410// CHECK-NEXT: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 [[A]], i32 [[VGET_LANE]])411// CHECK-NEXT: ret i32 [[VQRDMULHS_S32_I]]412//413int32_t test_vqrdmulhs_lane_s32(int32_t a, int32x2_t b) {414 return vqrdmulhs_lane_s32(a, b, 1);415}416 417 418// CHECK-LABEL: define dso_local i16 @test_vqrdmulhh_laneq_s16(419// CHECK-SAME: i16 noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {420// CHECK-NEXT: [[ENTRY:.*:]]421// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> [[B]], i32 7422// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i64 0423// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[VGETQ_LANE]], i64 0424// CHECK-NEXT: [[VQRDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])425// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i16> [[VQRDMULHH_S16_I]], i64 0426// CHECK-NEXT: ret i16 [[TMP2]]427//428int16_t test_vqrdmulhh_laneq_s16(int16_t a, int16x8_t b) {429 return vqrdmulhh_laneq_s16(a, b, 7);430}431 432 433// CHECK-LABEL: define dso_local i32 @test_vqrdmulhs_laneq_s32(434// CHECK-SAME: i32 noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {435// CHECK-NEXT: [[ENTRY:.*:]]436// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> [[B]], i32 3437// CHECK-NEXT: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 [[A]], i32 [[VGETQ_LANE]])438// CHECK-NEXT: ret i32 [[VQRDMULHS_S32_I]]439//440int32_t test_vqrdmulhs_laneq_s32(int32_t a, int32x4_t b) {441 return vqrdmulhs_laneq_s32(a, b, 3);442}443 444// CHECK-LABEL: define dso_local i32 @test_vqdmlalh_lane_s16(445// CHECK-SAME: i32 noundef [[A:%.*]], i16 noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {446// CHECK-NEXT: [[ENTRY:.*:]]447// CHECK-NEXT: [[LANE:%.*]] = extractelement <4 x i16> [[C]], i32 3448// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 0449// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[LANE]], i64 0450// CHECK-NEXT: [[VQDMLXL:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])451// CHECK-NEXT: [[LANE0:%.*]] = extractelement <4 x i32> [[VQDMLXL]], i64 0452// CHECK-NEXT: [[VQDMLXL1:%.*]] = call i32 @llvm.aarch64.neon.sqadd.i32(i32 [[A]], i32 [[LANE0]])453// CHECK-NEXT: ret i32 [[VQDMLXL1]]454//455int32_t test_vqdmlalh_lane_s16(int32_t a, int16_t b, int16x4_t c) {456 return vqdmlalh_lane_s16(a, b, c, 3);457}458 459// CHECK-LABEL: define dso_local i64 @test_vqdmlals_lane_s32(460// CHECK-SAME: i64 noundef [[A:%.*]], i32 noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {461// CHECK-NEXT: [[ENTRY:.*:]]462// CHECK-NEXT: [[LANE:%.*]] = extractelement <2 x i32> [[C]], i32 1463// CHECK-NEXT: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[B]], i32 [[LANE]])464// CHECK-NEXT: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 [[A]], i64 [[VQDMLXL]])465// CHECK-NEXT: ret i64 [[VQDMLXL1]]466//467int64_t test_vqdmlals_lane_s32(int64_t a, int32_t b, int32x2_t c) {468 return vqdmlals_lane_s32(a, b, c, 1);469}470 471// CHECK-LABEL: define dso_local i32 @test_vqdmlalh_laneq_s16(472// CHECK-SAME: i32 noundef [[A:%.*]], i16 noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {473// CHECK-NEXT: [[ENTRY:.*:]]474// CHECK-NEXT: [[LANE:%.*]] = extractelement <8 x i16> [[C]], i32 7475// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 0476// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[LANE]], i64 0477// CHECK-NEXT: [[VQDMLXL:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])478// CHECK-NEXT: [[LANE0:%.*]] = extractelement <4 x i32> [[VQDMLXL]], i64 0479// CHECK-NEXT: [[VQDMLXL1:%.*]] = call i32 @llvm.aarch64.neon.sqadd.i32(i32 [[A]], i32 [[LANE0]])480// CHECK-NEXT: ret i32 [[VQDMLXL1]]481//482int32_t test_vqdmlalh_laneq_s16(int32_t a, int16_t b, int16x8_t c) {483 return vqdmlalh_laneq_s16(a, b, c, 7);484}485 486// CHECK-LABEL: define dso_local i64 @test_vqdmlals_laneq_s32(487// CHECK-SAME: i64 noundef [[A:%.*]], i32 noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {488// CHECK-NEXT: [[ENTRY:.*:]]489// CHECK-NEXT: [[LANE:%.*]] = extractelement <4 x i32> [[C]], i32 3490// CHECK-NEXT: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[B]], i32 [[LANE]])491// CHECK-NEXT: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 [[A]], i64 [[VQDMLXL]])492// CHECK-NEXT: ret i64 [[VQDMLXL1]]493//494int64_t test_vqdmlals_laneq_s32(int64_t a, int32_t b, int32x4_t c) {495 return vqdmlals_laneq_s32(a, b, c, 3);496}497 498// CHECK-LABEL: define dso_local i32 @test_vqdmlslh_lane_s16(499// CHECK-SAME: i32 noundef [[A:%.*]], i16 noundef [[B:%.*]], <4 x i16> noundef [[C:%.*]]) #[[ATTR0]] {500// CHECK-NEXT: [[ENTRY:.*:]]501// CHECK-NEXT: [[LANE:%.*]] = extractelement <4 x i16> [[C]], i32 3502// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 0503// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[LANE]], i64 0504// CHECK-NEXT: [[VQDMLXL:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])505// CHECK-NEXT: [[LANE0:%.*]] = extractelement <4 x i32> [[VQDMLXL]], i64 0506// CHECK-NEXT: [[VQDMLXL1:%.*]] = call i32 @llvm.aarch64.neon.sqsub.i32(i32 [[A]], i32 [[LANE0]])507// CHECK-NEXT: ret i32 [[VQDMLXL1]]508//509int32_t test_vqdmlslh_lane_s16(int32_t a, int16_t b, int16x4_t c) {510 return vqdmlslh_lane_s16(a, b, c, 3);511}512 513// CHECK-LABEL: define dso_local i64 @test_vqdmlsls_lane_s32(514// CHECK-SAME: i64 noundef [[A:%.*]], i32 noundef [[B:%.*]], <2 x i32> noundef [[C:%.*]]) #[[ATTR0]] {515// CHECK-NEXT: [[ENTRY:.*:]]516// CHECK-NEXT: [[LANE:%.*]] = extractelement <2 x i32> [[C]], i32 1517// CHECK-NEXT: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[B]], i32 [[LANE]])518// CHECK-NEXT: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 [[A]], i64 [[VQDMLXL]])519// CHECK-NEXT: ret i64 [[VQDMLXL1]]520//521int64_t test_vqdmlsls_lane_s32(int64_t a, int32_t b, int32x2_t c) {522 return vqdmlsls_lane_s32(a, b, c, 1);523}524 525// CHECK-LABEL: define dso_local i32 @test_vqdmlslh_laneq_s16(526// CHECK-SAME: i32 noundef [[A:%.*]], i16 noundef [[B:%.*]], <8 x i16> noundef [[C:%.*]]) #[[ATTR0]] {527// CHECK-NEXT: [[ENTRY:.*:]]528// CHECK-NEXT: [[LANE:%.*]] = extractelement <8 x i16> [[C]], i32 7529// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> poison, i16 [[B]], i64 0530// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[LANE]], i64 0531// CHECK-NEXT: [[VQDMLXL:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])532// CHECK-NEXT: [[LANE0:%.*]] = extractelement <4 x i32> [[VQDMLXL]], i64 0533// CHECK-NEXT: [[VQDMLXL1:%.*]] = call i32 @llvm.aarch64.neon.sqsub.i32(i32 [[A]], i32 [[LANE0]])534// CHECK-NEXT: ret i32 [[VQDMLXL1]]535//536int32_t test_vqdmlslh_laneq_s16(int32_t a, int16_t b, int16x8_t c) {537 return vqdmlslh_laneq_s16(a, b, c, 7);538}539 540// CHECK-LABEL: define dso_local i64 @test_vqdmlsls_laneq_s32(541// CHECK-SAME: i64 noundef [[A:%.*]], i32 noundef [[B:%.*]], <4 x i32> noundef [[C:%.*]]) #[[ATTR0]] {542// CHECK-NEXT: [[ENTRY:.*:]]543// CHECK-NEXT: [[LANE:%.*]] = extractelement <4 x i32> [[C]], i32 3544// CHECK-NEXT: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 [[B]], i32 [[LANE]])545// CHECK-NEXT: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 [[A]], i64 [[VQDMLXL]])546// CHECK-NEXT: ret i64 [[VQDMLXL1]]547//548int64_t test_vqdmlsls_laneq_s32(int64_t a, int32_t b, int32x4_t c) {549 return vqdmlsls_laneq_s32(a, b, c, 3);550}551 552// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_lane_f64_0(553// CHECK-SAME: ) #[[ATTR0]] {554// CHECK-NEXT: [[ENTRY:.*:]]555// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double>556// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double>557// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0558// CHECK-NEXT: [[VGET_LANE9:%.*]] = extractelement <1 x double> [[TMP1]], i32 0559// CHECK-NEXT: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE9]])560// CHECK-NEXT: [[VSET_LANE:%.*]] = insertelement <1 x double> [[TMP0]], double [[VMULXD_F64_I]], i32 0561// CHECK-NEXT: ret <1 x double> [[VSET_LANE]]562//563float64x1_t test_vmulx_lane_f64_0() {564 float64x1_t arg1;565 float64x1_t arg2;566 float64x1_t result;567 float64_t sarg1, sarg2, sres;568 arg1 = vcreate_f64(UINT64_C(0x3fd6304bc43ab5c2));569 arg2 = vcreate_f64(UINT64_C(0x3fee211e215aeef3));570 result = vmulx_lane_f64(arg1, arg2, 0);571 return result;572}573 574// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_laneq_f64_2(575// CHECK-SAME: ) #[[ATTR0]] {576// CHECK-NEXT: [[ENTRY:.*:]]577// CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double>578// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double>579// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> [[TMP0]], <1 x double> [[TMP1]], <2 x i32> <i32 0, i32 1>580// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0581// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <2 x double> [[SHUFFLE_I]], i32 1582// CHECK-NEXT: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])583// CHECK-NEXT: [[VSET_LANE:%.*]] = insertelement <1 x double> [[TMP0]], double [[VMULXD_F64_I]], i32 0584// CHECK-NEXT: ret <1 x double> [[VSET_LANE]]585//586float64x1_t test_vmulx_laneq_f64_2() {587 float64x1_t arg1;588 float64x1_t arg2;589 float64x2_t arg3;590 float64x1_t result;591 float64_t sarg1, sarg2, sres;592 arg1 = vcreate_f64(UINT64_C(0x3fd6304bc43ab5c2));593 arg2 = vcreate_f64(UINT64_C(0x3fee211e215aeef3));594 arg3 = vcombine_f64(arg1, arg2);595 result = vmulx_laneq_f64(arg1, arg3, 1);596 return result;597}598