379 lines · c
1// RUN: %clang_cc1 -triple arm64-apple-darwin -target-feature +neon -flax-vector-conversions=none \2// RUN: -disable-O0-optnone -emit-llvm -o - %s \3// RUN: | opt -S -passes=mem2reg | FileCheck %s4 5// REQUIRES: aarch64-registered-target || arm-registered-target6 7#include <arm_neon.h>8 9// CHECK-LABEL: define{{.*}} i8 @test_vget_lane_u8(<8 x i8> noundef %a) #0 {10// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 711// CHECK: ret i8 [[VGET_LANE]]12uint8_t test_vget_lane_u8(uint8x8_t a) {13 return vget_lane_u8(a, 7);14}15 16// CHECK-LABEL: define{{.*}} i16 @test_vget_lane_u16(<4 x i16> noundef %a) #0 {17// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 318// CHECK: ret i16 [[VGET_LANE]]19uint16_t test_vget_lane_u16(uint16x4_t a) {20 return vget_lane_u16(a, 3);21}22 23// CHECK-LABEL: define{{.*}} i32 @test_vget_lane_u32(<2 x i32> noundef %a) #0 {24// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 125// CHECK: ret i32 [[VGET_LANE]]26uint32_t test_vget_lane_u32(uint32x2_t a) {27 return vget_lane_u32(a, 1);28}29 30// CHECK-LABEL: define{{.*}} i8 @test_vget_lane_s8(<8 x i8> noundef %a) #0 {31// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 732// CHECK: ret i8 [[VGET_LANE]]33int8_t test_vget_lane_s8(int8x8_t a) {34 return vget_lane_s8(a, 7);35}36 37// CHECK-LABEL: define{{.*}} i16 @test_vget_lane_s16(<4 x i16> noundef %a) #0 {38// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 339// CHECK: ret i16 [[VGET_LANE]]40int16_t test_vget_lane_s16(int16x4_t a) {41 return vget_lane_s16(a, 3);42}43 44// CHECK-LABEL: define{{.*}} i32 @test_vget_lane_s32(<2 x i32> noundef %a) #0 {45// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 146// CHECK: ret i32 [[VGET_LANE]]47int32_t test_vget_lane_s32(int32x2_t a) {48 return vget_lane_s32(a, 1);49}50 51// CHECK-LABEL: define{{.*}} i8 @test_vget_lane_p8(<8 x i8> noundef %a) #0 {52// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 753// CHECK: ret i8 [[VGET_LANE]]54poly8_t test_vget_lane_p8(poly8x8_t a) {55 return vget_lane_p8(a, 7);56}57 58// CHECK-LABEL: define{{.*}} i16 @test_vget_lane_p16(<4 x i16> noundef %a) #0 {59// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 360// CHECK: ret i16 [[VGET_LANE]]61poly16_t test_vget_lane_p16(poly16x4_t a) {62 return vget_lane_p16(a, 3);63}64 65// CHECK-LABEL: define{{.*}} float @test_vget_lane_f32(<2 x float> noundef %a) #0 {66// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %a, i32 167// CHECK: ret float [[VGET_LANE]]68float32_t test_vget_lane_f32(float32x2_t a) {69 return vget_lane_f32(a, 1);70}71 72// CHECK-LABEL: define{{.*}} float @test_vget_lane_f16(<4 x half> noundef %a) #0 {73// CHECK: [[__REINT_242:%.*]] = alloca <4 x half>, align 874// CHECK: [[__REINT1_242:%.*]] = alloca i16, align 275// CHECK: store <4 x half> %a, ptr [[__REINT_242]], align 876// CHECK: [[TMP1:%.*]] = load <4 x i16>, ptr [[__REINT_242]], align 877// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> [[TMP1]], i32 178// CHECK: store i16 [[VGET_LANE]], ptr [[__REINT1_242]], align 279// CHECK: [[TMP5:%.*]] = load half, ptr [[__REINT1_242]], align 280// CHECK: [[CONV:%.*]] = fpext half [[TMP5]] to float81// CHECK: ret float [[CONV]]82float32_t test_vget_lane_f16(float16x4_t a) {83 return vget_lane_f16(a, 1);84}85 86// CHECK-LABEL: define{{.*}} i8 @test_vgetq_lane_u8(<16 x i8> noundef %a) #0 {87// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 1588// CHECK: ret i8 [[VGETQ_LANE]]89uint8_t test_vgetq_lane_u8(uint8x16_t a) {90 return vgetq_lane_u8(a, 15);91}92 93// CHECK-LABEL: define{{.*}} i16 @test_vgetq_lane_u16(<8 x i16> noundef %a) #0 {94// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 795// CHECK: ret i16 [[VGETQ_LANE]]96uint16_t test_vgetq_lane_u16(uint16x8_t a) {97 return vgetq_lane_u16(a, 7);98}99 100// CHECK-LABEL: define{{.*}} i32 @test_vgetq_lane_u32(<4 x i32> noundef %a) #0 {101// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3102// CHECK: ret i32 [[VGETQ_LANE]]103uint32_t test_vgetq_lane_u32(uint32x4_t a) {104 return vgetq_lane_u32(a, 3);105}106 107// CHECK-LABEL: define{{.*}} i8 @test_vgetq_lane_s8(<16 x i8> noundef %a) #0 {108// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15109// CHECK: ret i8 [[VGETQ_LANE]]110int8_t test_vgetq_lane_s8(int8x16_t a) {111 return vgetq_lane_s8(a, 15);112}113 114// CHECK-LABEL: define{{.*}} i16 @test_vgetq_lane_s16(<8 x i16> noundef %a) #0 {115// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7116// CHECK: ret i16 [[VGETQ_LANE]]117int16_t test_vgetq_lane_s16(int16x8_t a) {118 return vgetq_lane_s16(a, 7);119}120 121// CHECK-LABEL: define{{.*}} i32 @test_vgetq_lane_s32(<4 x i32> noundef %a) #0 {122// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3123// CHECK: ret i32 [[VGETQ_LANE]]124int32_t test_vgetq_lane_s32(int32x4_t a) {125 return vgetq_lane_s32(a, 3);126}127 128// CHECK-LABEL: define{{.*}} i8 @test_vgetq_lane_p8(<16 x i8> noundef %a) #0 {129// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15130// CHECK: ret i8 [[VGETQ_LANE]]131poly8_t test_vgetq_lane_p8(poly8x16_t a) {132 return vgetq_lane_p8(a, 15);133}134 135// CHECK-LABEL: define{{.*}} i16 @test_vgetq_lane_p16(<8 x i16> noundef %a) #0 {136// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7137// CHECK: ret i16 [[VGETQ_LANE]]138poly16_t test_vgetq_lane_p16(poly16x8_t a) {139 return vgetq_lane_p16(a, 7);140}141 142// CHECK-LABEL: define{{.*}} float @test_vgetq_lane_f32(<4 x float> noundef %a) #0 {143// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3144// CHECK: ret float [[VGETQ_LANE]]145float32_t test_vgetq_lane_f32(float32x4_t a) {146 return vgetq_lane_f32(a, 3);147}148 149// CHECK-LABEL: define{{.*}} float @test_vgetq_lane_f16(<8 x half> noundef %a) #0 {150// CHECK: [[__REINT_244:%.*]] = alloca <8 x half>, align 16151// CHECK: [[__REINT1_244:%.*]] = alloca i16, align 2152// CHECK: store <8 x half> %a, ptr [[__REINT_244]], align 16153// CHECK: [[TMP1:%.*]] = load <8 x i16>, ptr [[__REINT_244]], align 16154// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> [[TMP1]], i32 3155// CHECK: store i16 [[VGETQ_LANE]], ptr [[__REINT1_244]], align 2156// CHECK: [[TMP5:%.*]] = load half, ptr [[__REINT1_244]], align 2157// CHECK: [[CONV:%.*]] = fpext half [[TMP5]] to float158// CHECK: ret float [[CONV]]159float32_t test_vgetq_lane_f16(float16x8_t a) {160 return vgetq_lane_f16(a, 3);161}162 163// CHECK-LABEL: define{{.*}} i64 @test_vget_lane_s64(<1 x i64> noundef %a) #0 {164// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0165// CHECK: ret i64 [[VGET_LANE]]166int64_t test_vget_lane_s64(int64x1_t a) {167 return vget_lane_s64(a, 0);168}169 170// CHECK-LABEL: define{{.*}} i64 @test_vget_lane_u64(<1 x i64> noundef %a) #0 {171// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0172// CHECK: ret i64 [[VGET_LANE]]173uint64_t test_vget_lane_u64(uint64x1_t a) {174 return vget_lane_u64(a, 0);175}176 177// CHECK-LABEL: define{{.*}} i64 @test_vgetq_lane_s64(<2 x i64> noundef %a) #0 {178// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1179// CHECK: ret i64 [[VGETQ_LANE]]180int64_t test_vgetq_lane_s64(int64x2_t a) {181 return vgetq_lane_s64(a, 1);182}183 184// CHECK-LABEL: define{{.*}} i64 @test_vgetq_lane_u64(<2 x i64> noundef %a) #0 {185// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1186// CHECK: ret i64 [[VGETQ_LANE]]187uint64_t test_vgetq_lane_u64(uint64x2_t a) {188 return vgetq_lane_u64(a, 1);189}190 191 192// CHECK-LABEL: define{{.*}} <8 x i8> @test_vset_lane_u8(i8 noundef %a, <8 x i8> noundef %b) #0 {193// CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7194// CHECK: ret <8 x i8> [[VSET_LANE]]195uint8x8_t test_vset_lane_u8(uint8_t a, uint8x8_t b) {196 return vset_lane_u8(a, b, 7);197}198 199// CHECK-LABEL: define{{.*}} <4 x i16> @test_vset_lane_u16(i16 noundef %a, <4 x i16> noundef %b) #0 {200// CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3201// CHECK: ret <4 x i16> [[VSET_LANE]]202uint16x4_t test_vset_lane_u16(uint16_t a, uint16x4_t b) {203 return vset_lane_u16(a, b, 3);204}205 206// CHECK-LABEL: define{{.*}} <2 x i32> @test_vset_lane_u32(i32 noundef %a, <2 x i32> noundef %b) #0 {207// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i32> %b, i32 %a, i32 1208// CHECK: ret <2 x i32> [[VSET_LANE]]209uint32x2_t test_vset_lane_u32(uint32_t a, uint32x2_t b) {210 return vset_lane_u32(a, b, 1);211}212 213// CHECK-LABEL: define{{.*}} <8 x i8> @test_vset_lane_s8(i8 noundef %a, <8 x i8> noundef %b) #0 {214// CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7215// CHECK: ret <8 x i8> [[VSET_LANE]]216int8x8_t test_vset_lane_s8(int8_t a, int8x8_t b) {217 return vset_lane_s8(a, b, 7);218}219 220// CHECK-LABEL: define{{.*}} <4 x i16> @test_vset_lane_s16(i16 noundef %a, <4 x i16> noundef %b) #0 {221// CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3222// CHECK: ret <4 x i16> [[VSET_LANE]]223int16x4_t test_vset_lane_s16(int16_t a, int16x4_t b) {224 return vset_lane_s16(a, b, 3);225}226 227// CHECK-LABEL: define{{.*}} <2 x i32> @test_vset_lane_s32(i32 noundef %a, <2 x i32> noundef %b) #0 {228// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i32> %b, i32 %a, i32 1229// CHECK: ret <2 x i32> [[VSET_LANE]]230int32x2_t test_vset_lane_s32(int32_t a, int32x2_t b) {231 return vset_lane_s32(a, b, 1);232}233 234// CHECK-LABEL: define{{.*}} <8 x i8> @test_vset_lane_p8(i8 noundef %a, <8 x i8> noundef %b) #0 {235// CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7236// CHECK: ret <8 x i8> [[VSET_LANE]]237poly8x8_t test_vset_lane_p8(poly8_t a, poly8x8_t b) {238 return vset_lane_p8(a, b, 7);239}240 241// CHECK-LABEL: define{{.*}} <4 x i16> @test_vset_lane_p16(i16 noundef %a, <4 x i16> noundef %b) #0 {242// CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3243// CHECK: ret <4 x i16> [[VSET_LANE]]244poly16x4_t test_vset_lane_p16(poly16_t a, poly16x4_t b) {245 return vset_lane_p16(a, b, 3);246}247 248// CHECK-LABEL: define{{.*}} <2 x float> @test_vset_lane_f32(float noundef %a, <2 x float> noundef %b) #0 {249// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x float> %b, float %a, i32 1250// CHECK: ret <2 x float> [[VSET_LANE]]251float32x2_t test_vset_lane_f32(float32_t a, float32x2_t b) {252 return vset_lane_f32(a, b, 1);253}254 255// CHECK-LABEL: define{{.*}} <4 x half> @test_vset_lane_f16(ptr noundef %a, <4 x half> noundef %b) #0 {256// CHECK: [[__REINT_246:%.*]] = alloca half, align 2257// CHECK: [[__REINT1_246:%.*]] = alloca <4 x half>, align 8258// CHECK: [[__REINT2_246:%.*]] = alloca <4 x i16>, align 8259// CHECK: [[TMP0:%.*]] = load half, ptr %a, align 2260// CHECK: store half [[TMP0]], ptr [[__REINT_246]], align 2261// CHECK: store <4 x half> %b, ptr [[__REINT1_246]], align 8262// CHECK: [[TMP2:%.*]] = load i16, ptr [[__REINT_246]], align 2263// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[__REINT1_246]], align 8264// CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> [[TMP4]], i16 [[TMP2]], i32 3265// CHECK: store <4 x i16> [[VSET_LANE]], ptr [[__REINT2_246]], align 8266// CHECK: [[TMP8:%.*]] = load <4 x half>, ptr [[__REINT2_246]], align 8267// CHECK: ret <4 x half> [[TMP8]]268float16x4_t test_vset_lane_f16(float16_t *a, float16x4_t b) {269 return vset_lane_f16(*a, b, 3);270}271 272// CHECK-LABEL: define{{.*}} <16 x i8> @test_vsetq_lane_u8(i8 noundef %a, <16 x i8> noundef %b) #0 {273// CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15274// CHECK: ret <16 x i8> [[VSET_LANE]]275uint8x16_t test_vsetq_lane_u8(uint8_t a, uint8x16_t b) {276 return vsetq_lane_u8(a, b, 15);277}278 279// CHECK-LABEL: define{{.*}} <8 x i16> @test_vsetq_lane_u16(i16 noundef %a, <8 x i16> noundef %b) #0 {280// CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7281// CHECK: ret <8 x i16> [[VSET_LANE]]282uint16x8_t test_vsetq_lane_u16(uint16_t a, uint16x8_t b) {283 return vsetq_lane_u16(a, b, 7);284}285 286// CHECK-LABEL: define{{.*}} <4 x i32> @test_vsetq_lane_u32(i32 noundef %a, <4 x i32> noundef %b) #0 {287// CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %b, i32 %a, i32 3288// CHECK: ret <4 x i32> [[VSET_LANE]]289uint32x4_t test_vsetq_lane_u32(uint32_t a, uint32x4_t b) {290 return vsetq_lane_u32(a, b, 3);291}292 293// CHECK-LABEL: define{{.*}} <16 x i8> @test_vsetq_lane_s8(i8 noundef %a, <16 x i8> noundef %b) #0 {294// CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15295// CHECK: ret <16 x i8> [[VSET_LANE]]296int8x16_t test_vsetq_lane_s8(int8_t a, int8x16_t b) {297 return vsetq_lane_s8(a, b, 15);298}299 300// CHECK-LABEL: define{{.*}} <8 x i16> @test_vsetq_lane_s16(i16 noundef %a, <8 x i16> noundef %b) #0 {301// CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7302// CHECK: ret <8 x i16> [[VSET_LANE]]303int16x8_t test_vsetq_lane_s16(int16_t a, int16x8_t b) {304 return vsetq_lane_s16(a, b, 7);305}306 307// CHECK-LABEL: define{{.*}} <4 x i32> @test_vsetq_lane_s32(i32 noundef %a, <4 x i32> noundef %b) #0 {308// CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %b, i32 %a, i32 3309// CHECK: ret <4 x i32> [[VSET_LANE]]310int32x4_t test_vsetq_lane_s32(int32_t a, int32x4_t b) {311 return vsetq_lane_s32(a, b, 3);312}313 314// CHECK-LABEL: define{{.*}} <16 x i8> @test_vsetq_lane_p8(i8 noundef %a, <16 x i8> noundef %b) #0 {315// CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15316// CHECK: ret <16 x i8> [[VSET_LANE]]317poly8x16_t test_vsetq_lane_p8(poly8_t a, poly8x16_t b) {318 return vsetq_lane_p8(a, b, 15);319}320 321// CHECK-LABEL: define{{.*}} <8 x i16> @test_vsetq_lane_p16(i16 noundef %a, <8 x i16> noundef %b) #0 {322// CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7323// CHECK: ret <8 x i16> [[VSET_LANE]]324poly16x8_t test_vsetq_lane_p16(poly16_t a, poly16x8_t b) {325 return vsetq_lane_p16(a, b, 7);326}327 328// CHECK-LABEL: define{{.*}} <4 x float> @test_vsetq_lane_f32(float noundef %a, <4 x float> noundef %b) #0 {329// CHECK: [[VSET_LANE:%.*]] = insertelement <4 x float> %b, float %a, i32 3330// CHECK: ret <4 x float> [[VSET_LANE]]331float32x4_t test_vsetq_lane_f32(float32_t a, float32x4_t b) {332 return vsetq_lane_f32(a, b, 3);333}334 335// CHECK-LABEL: define{{.*}} <8 x half> @test_vsetq_lane_f16(ptr noundef %a, <8 x half> noundef %b) #0 {336// CHECK: [[__REINT_248:%.*]] = alloca half, align 2337// CHECK: [[__REINT1_248:%.*]] = alloca <8 x half>, align 16338// CHECK: [[__REINT2_248:%.*]] = alloca <8 x i16>, align 16339// CHECK: [[TMP0:%.*]] = load half, ptr %a, align 2340// CHECK: store half [[TMP0]], ptr [[__REINT_248]], align 2341// CHECK: store <8 x half> %b, ptr [[__REINT1_248]], align 16342// CHECK: [[TMP2:%.*]] = load i16, ptr [[__REINT_248]], align 2343// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[__REINT1_248]], align 16344// CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[TMP2]], i32 7345// CHECK: store <8 x i16> [[VSET_LANE]], ptr [[__REINT2_248]], align 16346// CHECK: [[TMP8:%.*]] = load <8 x half>, ptr [[__REINT2_248]], align 16347// CHECK: ret <8 x half> [[TMP8]]348float16x8_t test_vsetq_lane_f16(float16_t *a, float16x8_t b) {349 return vsetq_lane_f16(*a, b, 7);350}351 352// CHECK-LABEL: define{{.*}} <1 x i64> @test_vset_lane_s64(i64 noundef %a, <1 x i64> noundef %b) #0 {353// CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %b, i64 %a, i32 0354// CHECK: ret <1 x i64> [[VSET_LANE]]355int64x1_t test_vset_lane_s64(int64_t a, int64x1_t b) {356 return vset_lane_s64(a, b, 0);357}358 359// CHECK-LABEL: define{{.*}} <1 x i64> @test_vset_lane_u64(i64 noundef %a, <1 x i64> noundef %b) #0 {360// CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %b, i64 %a, i32 0361// CHECK: ret <1 x i64> [[VSET_LANE]]362uint64x1_t test_vset_lane_u64(uint64_t a, uint64x1_t b) {363 return vset_lane_u64(a, b, 0);364}365 366// CHECK-LABEL: define{{.*}} <2 x i64> @test_vsetq_lane_s64(i64 noundef %a, <2 x i64> noundef %b) #0 {367// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %b, i64 %a, i32 1368// CHECK: ret <2 x i64> [[VSET_LANE]]369int64x2_t test_vsetq_lane_s64(int64_t a, int64x2_t b) {370 return vsetq_lane_s64(a, b, 1);371}372 373// CHECK-LABEL: define{{.*}} <2 x i64> @test_vsetq_lane_u64(i64 noundef %a, <2 x i64> noundef %b) #0 {374// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %b, i64 %a, i32 1375// CHECK: ret <2 x i64> [[VSET_LANE]]376uint64x2_t test_vsetq_lane_u64(uint64_t a, uint64x2_t b) {377 return vsetq_lane_u64(a, b, 1);378}379