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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 32// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C4// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX5// RUN: %clang_cc1 -fclang-abi-compat=latest -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +sme -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C6// RUN: %clang_cc1 -fclang-abi-compat=latest -DSME_OVERLOADED_FORMS -triple aarch64 -target-feature +sme -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX7// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -S -O1 -Werror -o /dev/null %s8 9#include <arm_sme.h>10 11#ifdef SME_OVERLOADED_FORMS12#define SME_ACLE_FUNC(A1,A2_UNUSED,A3) A1##A313#else14#define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A315#endif16 17// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za8_s8(18// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {19// CHECK-C-NEXT:  entry:20// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])21// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]22//23// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z22test_svread_hor_za8_s8u10__SVInt8_tu10__SVBool_tj(24// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {25// CHECK-CXX-NEXT:  entry:26// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])27// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]28//29svint8_t test_svread_hor_za8_s8(svint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {30    return SME_ACLE_FUNC(svread_hor_za8, _s8, _m)(zd, pg, 0, slice_base);31}32 33// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za8_s8_1(34// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {35// CHECK-C-NEXT:  entry:36// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1537// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])38// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]39//40// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z24test_svread_hor_za8_s8_1u10__SVInt8_tu10__SVBool_tj(41// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {42// CHECK-CXX-NEXT:  entry:43// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1544// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])45// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]46//47svint8_t test_svread_hor_za8_s8_1(svint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {48    uint32_t slice = slice_base + 15;49    return SME_ACLE_FUNC(svread_hor_za8, _s8, _m)(zd, pg, 0, slice);50}51 52// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_hor_za16_s16(53// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {54// CHECK-C-NEXT:  entry:55// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])56// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])57// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]58//59// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z24test_svread_hor_za16_s16u11__SVInt16_tu10__SVBool_tj(60// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {61// CHECK-CXX-NEXT:  entry:62// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])63// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])64// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]65//66svint16_t test_svread_hor_za16_s16(svint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {67     return SME_ACLE_FUNC(svread_hor_za16, _s16, _m)(zd, pg, 0, slice_base);68}69 70// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_hor_za16_s16_1(71// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {72// CHECK-C-NEXT:  entry:73// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 774// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])75// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])76// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]77//78// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z26test_svread_hor_za16_s16_1u11__SVInt16_tu10__SVBool_tj(79// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {80// CHECK-CXX-NEXT:  entry:81// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 782// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])83// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])84// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]85//86svint16_t test_svread_hor_za16_s16_1(svint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {87     uint32_t slice = slice_base + 7;88     return SME_ACLE_FUNC(svread_hor_za16, _s16, _m)(zd, pg, 1, slice);89}90 91// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_hor_za32_s32(92// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {93// CHECK-C-NEXT:  entry:94// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])95// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])96// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]97//98// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z24test_svread_hor_za32_s32u11__SVInt32_tu10__SVBool_tj(99// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {100// CHECK-CXX-NEXT:  entry:101// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])102// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])103// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]104//105svint32_t test_svread_hor_za32_s32(svint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {106    return SME_ACLE_FUNC(svread_hor_za32, _s32, _m)(zd, pg, 0, slice_base);107}108 109// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_hor_za32_s32_1(110// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {111// CHECK-C-NEXT:  entry:112// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3113// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])114// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])115// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]116//117// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z26test_svread_hor_za32_s32_1u11__SVInt32_tu10__SVBool_tj(118// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {119// CHECK-CXX-NEXT:  entry:120// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3121// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])122// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])123// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]124//125svint32_t test_svread_hor_za32_s32_1(svint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {126    uint32_t slice = slice_base + 3;127    return SME_ACLE_FUNC(svread_hor_za32, _s32, _m)(zd, pg, 3, slice);128}129 130// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_hor_za64_s64(131// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {132// CHECK-C-NEXT:  entry:133// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])134// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])135// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]136//137// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z24test_svread_hor_za64_s64u11__SVInt64_tu10__SVBool_tj(138// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {139// CHECK-CXX-NEXT:  entry:140// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])141// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])142// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]143//144svint64_t test_svread_hor_za64_s64(svint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {145    return SME_ACLE_FUNC(svread_hor_za64, _s64, _m)(zd, pg, 0, slice_base);146}147 148// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_hor_za64_s64_1(149// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {150// CHECK-C-NEXT:  entry:151// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1152// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])153// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])154// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]155//156// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z26test_svread_hor_za64_s64_1u11__SVInt64_tu10__SVBool_tj(157// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {158// CHECK-CXX-NEXT:  entry:159// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1160// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])161// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])162// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]163//164svint64_t test_svread_hor_za64_s64_1(svint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {165    uint32_t slice = slice_base + 1;166    return SME_ACLE_FUNC(svread_hor_za64, _s64, _m)(zd, pg, 7, slice);167}168 169// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za8_u8(170// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {171// CHECK-C-NEXT:  entry:172// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])173// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]174//175// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z22test_svread_hor_za8_u8u11__SVUint8_tu10__SVBool_tj(176// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {177// CHECK-CXX-NEXT:  entry:178// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])179// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]180//181svuint8_t test_svread_hor_za8_u8(svuint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {182    return SME_ACLE_FUNC(svread_hor_za8, _u8, _m)(zd, pg, 0, slice_base);183}184 185// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za8_u8_1(186// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {187// CHECK-C-NEXT:  entry:188// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15189// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])190// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]191//192// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z24test_svread_hor_za8_u8_1u11__SVUint8_tu10__SVBool_tj(193// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {194// CHECK-CXX-NEXT:  entry:195// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15196// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])197// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]198//199svuint8_t test_svread_hor_za8_u8_1(svuint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {200    uint32_t slice = slice_base + 15;201    return SME_ACLE_FUNC(svread_hor_za8, _u8, _m)(zd, pg, 0, slice);202}203 204// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_hor_za16_u16(205// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {206// CHECK-C-NEXT:  entry:207// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])208// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])209// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]210//211// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z24test_svread_hor_za16_u16u12__SVUint16_tu10__SVBool_tj(212// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {213// CHECK-CXX-NEXT:  entry:214// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])215// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])216// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]217//218svuint16_t test_svread_hor_za16_u16(svuint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {219    return SME_ACLE_FUNC(svread_hor_za16, _u16, _m)(zd, pg, 0, slice_base);220}221 222// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_hor_za16_u16_1(223// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {224// CHECK-C-NEXT:  entry:225// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7226// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])227// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])228// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]229//230// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z26test_svread_hor_za16_u16_1u12__SVUint16_tu10__SVBool_tj(231// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {232// CHECK-CXX-NEXT:  entry:233// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7234// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])235// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])236// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]237//238svuint16_t test_svread_hor_za16_u16_1(svuint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {239    uint32_t slice = slice_base + 7;240    return SME_ACLE_FUNC(svread_hor_za16, _u16, _m)(zd, pg, 1, slice);241}242 243// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_hor_za32_u32(244// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {245// CHECK-C-NEXT:  entry:246// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])247// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])248// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]249//250// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z24test_svread_hor_za32_u32u12__SVUint32_tu10__SVBool_tj(251// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {252// CHECK-CXX-NEXT:  entry:253// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])254// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])255// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]256//257svuint32_t test_svread_hor_za32_u32(svuint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {258    return SME_ACLE_FUNC(svread_hor_za32, _u32, _m)(zd, pg, 0, slice_base);259}260 261// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_hor_za32_u32_1(262// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {263// CHECK-C-NEXT:  entry:264// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3265// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])266// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])267// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]268//269// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z26test_svread_hor_za32_u32_1u12__SVUint32_tu10__SVBool_tj(270// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {271// CHECK-CXX-NEXT:  entry:272// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3273// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])274// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])275// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]276//277svuint32_t test_svread_hor_za32_u32_1(svuint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {278    uint32_t slice = slice_base + 3;279    return SME_ACLE_FUNC(svread_hor_za32, _u32, _m)(zd, pg, 3, slice);280}281 282// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_hor_za64_u64(283// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {284// CHECK-C-NEXT:  entry:285// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])286// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])287// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]288//289// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z24test_svread_hor_za64_u64u12__SVUint64_tu10__SVBool_tj(290// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {291// CHECK-CXX-NEXT:  entry:292// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])293// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])294// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]295//296svuint64_t test_svread_hor_za64_u64(svuint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {297    return SME_ACLE_FUNC(svread_hor_za64, _u64, _m)(zd, pg, 0, slice_base);298}299 300// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_hor_za64_u64_1(301// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {302// CHECK-C-NEXT:  entry:303// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1304// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])305// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])306// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]307//308// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z26test_svread_hor_za64_u64_1u12__SVUint64_tu10__SVBool_tj(309// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {310// CHECK-CXX-NEXT:  entry:311// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1312// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])313// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])314// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]315//316svuint64_t test_svread_hor_za64_u64_1(svuint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {317    uint32_t slice = slice_base + 1;318    return SME_ACLE_FUNC(svread_hor_za64, _u64, _m)(zd, pg, 7, slice);319}320 321// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za8_mf8(322// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {323// CHECK-C-NEXT:  entry:324// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])325// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]326//327// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z23test_svread_hor_za8_mf8u13__SVMfloat8_tu10__SVBool_tj(328// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {329// CHECK-CXX-NEXT:  entry:330// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])331// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]332//333svmfloat8_t test_svread_hor_za8_mf8(svmfloat8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {334    return SME_ACLE_FUNC(svread_hor_za8, _mf8, _m)(zd, pg, 0, slice_base);335}336 337// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za8_mf8_1(338// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {339// CHECK-C-NEXT:  entry:340// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15341// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])342// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]343//344// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z25test_svread_hor_za8_mf8_1u13__SVMfloat8_tu10__SVBool_tj(345// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {346// CHECK-CXX-NEXT:  entry:347// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15348// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])349// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]350//351svmfloat8_t test_svread_hor_za8_mf8_1(svmfloat8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {352    uint32_t slice = slice_base + 15;353    return SME_ACLE_FUNC(svread_hor_za8, _mf8, _m)(zd, pg, 0, slice);354}355 356// CHECK-C-LABEL: define dso_local <vscale x 8 x half> @test_svread_hor_za16_f16(357// CHECK-C-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {358// CHECK-C-NEXT:  entry:359// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])360// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.read.horiz.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])361// CHECK-C-NEXT:    ret <vscale x 8 x half> [[TMP1]]362//363// CHECK-CXX-LABEL: define dso_local <vscale x 8 x half> @_Z24test_svread_hor_za16_f16u13__SVFloat16_tu10__SVBool_tj(364// CHECK-CXX-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {365// CHECK-CXX-NEXT:  entry:366// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])367// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.read.horiz.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])368// CHECK-CXX-NEXT:    ret <vscale x 8 x half> [[TMP1]]369//370svfloat16_t test_svread_hor_za16_f16(svfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {371    return SME_ACLE_FUNC(svread_hor_za16, _f16, _m)(zd, pg, 0, slice_base);372}373 374// CHECK-C-LABEL: define dso_local <vscale x 8 x half> @test_svread_hor_za16_f16_1(375// CHECK-C-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {376// CHECK-C-NEXT:  entry:377// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7378// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])379// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.read.horiz.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])380// CHECK-C-NEXT:    ret <vscale x 8 x half> [[TMP1]]381//382// CHECK-CXX-LABEL: define dso_local <vscale x 8 x half> @_Z26test_svread_hor_za16_f16_1u13__SVFloat16_tu10__SVBool_tj(383// CHECK-CXX-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {384// CHECK-CXX-NEXT:  entry:385// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7386// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])387// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.read.horiz.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])388// CHECK-CXX-NEXT:    ret <vscale x 8 x half> [[TMP1]]389//390svfloat16_t test_svread_hor_za16_f16_1(svfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {391    uint32_t slice = slice_base + 7;392    return SME_ACLE_FUNC(svread_hor_za16, _f16, _m)(zd, pg, 1, slice);393}394 395// CHECK-C-LABEL: define dso_local <vscale x 8 x bfloat> @test_svread_hor_za16_bf16(396// CHECK-C-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {397// CHECK-C-NEXT:  entry:398// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])399// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.horiz.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])400// CHECK-C-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]401//402// CHECK-CXX-LABEL: define dso_local <vscale x 8 x bfloat> @_Z25test_svread_hor_za16_bf16u14__SVBfloat16_tu10__SVBool_tj(403// CHECK-CXX-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {404// CHECK-CXX-NEXT:  entry:405// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])406// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.horiz.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])407// CHECK-CXX-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]408//409svbfloat16_t test_svread_hor_za16_bf16(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {410    return SME_ACLE_FUNC(svread_hor_za16, _bf16, _m)(zd, pg, 0, slice_base);411}412 413// CHECK-C-LABEL: define dso_local <vscale x 8 x bfloat> @test_svread_hor_za16_bf16_1(414// CHECK-C-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {415// CHECK-C-NEXT:  entry:416// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7417// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])418// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.horiz.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])419// CHECK-C-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]420//421// CHECK-CXX-LABEL: define dso_local <vscale x 8 x bfloat> @_Z27test_svread_hor_za16_bf16_1u14__SVBfloat16_tu10__SVBool_tj(422// CHECK-CXX-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {423// CHECK-CXX-NEXT:  entry:424// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7425// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])426// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.horiz.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])427// CHECK-CXX-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]428//429svbfloat16_t test_svread_hor_za16_bf16_1(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {430    uint32_t slice = slice_base + 7;431    return SME_ACLE_FUNC(svread_hor_za16, _bf16, _m)(zd, pg, 1, slice);432}433 434// CHECK-C-LABEL: define dso_local <vscale x 4 x float> @test_svread_hor_za32_f32(435// CHECK-C-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {436// CHECK-C-NEXT:  entry:437// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])438// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.read.horiz.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])439// CHECK-C-NEXT:    ret <vscale x 4 x float> [[TMP1]]440//441// CHECK-CXX-LABEL: define dso_local <vscale x 4 x float> @_Z24test_svread_hor_za32_f32u13__SVFloat32_tu10__SVBool_tj(442// CHECK-CXX-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {443// CHECK-CXX-NEXT:  entry:444// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])445// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.read.horiz.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])446// CHECK-CXX-NEXT:    ret <vscale x 4 x float> [[TMP1]]447//448svfloat32_t test_svread_hor_za32_f32(svfloat32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {449    return SME_ACLE_FUNC(svread_hor_za32, _f32, _m)(zd, pg, 0, slice_base);450}451 452// CHECK-C-LABEL: define dso_local <vscale x 4 x float> @test_svread_hor_za32_f32_1(453// CHECK-C-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {454// CHECK-C-NEXT:  entry:455// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3456// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])457// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.read.horiz.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])458// CHECK-C-NEXT:    ret <vscale x 4 x float> [[TMP1]]459//460// CHECK-CXX-LABEL: define dso_local <vscale x 4 x float> @_Z26test_svread_hor_za32_f32_1u13__SVFloat32_tu10__SVBool_tj(461// CHECK-CXX-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {462// CHECK-CXX-NEXT:  entry:463// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3464// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])465// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.read.horiz.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])466// CHECK-CXX-NEXT:    ret <vscale x 4 x float> [[TMP1]]467//468svfloat32_t test_svread_hor_za32_f32_1(svfloat32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {469    uint32_t slice = slice_base + 3;470    return SME_ACLE_FUNC(svread_hor_za32, _f32, _m)(zd, pg, 3, slice);471}472 473// CHECK-C-LABEL: define dso_local <vscale x 2 x double> @test_svread_hor_za64_f64(474// CHECK-C-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {475// CHECK-C-NEXT:  entry:476// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])477// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.read.horiz.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])478// CHECK-C-NEXT:    ret <vscale x 2 x double> [[TMP1]]479//480// CHECK-CXX-LABEL: define dso_local <vscale x 2 x double> @_Z24test_svread_hor_za64_f64u13__SVFloat64_tu10__SVBool_tj(481// CHECK-CXX-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {482// CHECK-CXX-NEXT:  entry:483// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])484// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.read.horiz.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])485// CHECK-CXX-NEXT:    ret <vscale x 2 x double> [[TMP1]]486//487svfloat64_t test_svread_hor_za64_f64(svfloat64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {488    return SME_ACLE_FUNC(svread_hor_za64, _f64, _m)(zd, pg, 0, slice_base);489}490 491// CHECK-C-LABEL: define dso_local <vscale x 2 x double> @test_svread_hor_za64_f64_1(492// CHECK-C-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {493// CHECK-C-NEXT:  entry:494// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1495// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])496// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.read.horiz.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])497// CHECK-C-NEXT:    ret <vscale x 2 x double> [[TMP1]]498//499// CHECK-CXX-LABEL: define dso_local <vscale x 2 x double> @_Z26test_svread_hor_za64_f64_1u13__SVFloat64_tu10__SVBool_tj(500// CHECK-CXX-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {501// CHECK-CXX-NEXT:  entry:502// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1503// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])504// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.read.horiz.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])505// CHECK-CXX-NEXT:    ret <vscale x 2 x double> [[TMP1]]506//507svfloat64_t test_svread_hor_za64_f64_1(svfloat64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {508    uint32_t slice = slice_base + 1;509    return SME_ACLE_FUNC(svread_hor_za64, _f64, _m)(zd, pg, 7, slice);510}511 512// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za128_s8(513// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {514// CHECK-C-NEXT:  entry:515// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])516// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]517//518// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z24test_svread_hor_za128_s8u10__SVInt8_tu10__SVBool_tj(519// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {520// CHECK-CXX-NEXT:  entry:521// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])522// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]523//524svint8_t test_svread_hor_za128_s8(svint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {525    return SME_ACLE_FUNC(svread_hor_za128, _s8, _m)(zd, pg, 0, slice_base);526}527 528// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za128_s8_1(529// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {530// CHECK-C-NEXT:  entry:531// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])532// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]533//534// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z26test_svread_hor_za128_s8_1u10__SVInt8_tu10__SVBool_tj(535// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {536// CHECK-CXX-NEXT:  entry:537// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])538// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]539//540svint8_t test_svread_hor_za128_s8_1(svint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {541    return SME_ACLE_FUNC(svread_hor_za128, _s8, _m)(zd, pg, 15, slice_base);542}543 544// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_hor_za128_s16(545// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {546// CHECK-C-NEXT:  entry:547// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])548// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])549// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]550//551// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z25test_svread_hor_za128_s16u11__SVInt16_tu10__SVBool_tj(552// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {553// CHECK-CXX-NEXT:  entry:554// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])555// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])556// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]557//558svint16_t test_svread_hor_za128_s16(svint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {559    return SME_ACLE_FUNC(svread_hor_za128, _s16, _m)(zd, pg, 0, slice_base);560}561 562// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_hor_za128_s16_1(563// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {564// CHECK-C-NEXT:  entry:565// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])566// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])567// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]568//569// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z27test_svread_hor_za128_s16_1u11__SVInt16_tu10__SVBool_tj(570// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {571// CHECK-CXX-NEXT:  entry:572// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])573// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])574// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]575//576svint16_t test_svread_hor_za128_s16_1(svint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {577    return SME_ACLE_FUNC(svread_hor_za128, _s16, _m)(zd, pg, 15, slice_base);578}579 580// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_hor_za128_s32(581// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {582// CHECK-C-NEXT:  entry:583// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])584// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])585// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]586//587// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z25test_svread_hor_za128_s32u11__SVInt32_tu10__SVBool_tj(588// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {589// CHECK-CXX-NEXT:  entry:590// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])591// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])592// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]593//594svint32_t test_svread_hor_za128_s32(svint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {595    return SME_ACLE_FUNC(svread_hor_za128, _s32, _m)(zd, pg, 0, slice_base);596}597 598// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_hor_za128_s32_1(599// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {600// CHECK-C-NEXT:  entry:601// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])602// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])603// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]604//605// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z27test_svread_hor_za128_s32_1u11__SVInt32_tu10__SVBool_tj(606// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {607// CHECK-CXX-NEXT:  entry:608// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])609// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])610// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]611//612svint32_t test_svread_hor_za128_s32_1(svint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {613    return SME_ACLE_FUNC(svread_hor_za128, _s32, _m)(zd, pg, 15, slice_base);614}615 616// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_hor_za128_s64(617// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {618// CHECK-C-NEXT:  entry:619// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])620// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])621// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]622//623// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z25test_svread_hor_za128_s64u11__SVInt64_tu10__SVBool_tj(624// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {625// CHECK-CXX-NEXT:  entry:626// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])627// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])628// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]629//630svint64_t test_svread_hor_za128_s64(svint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {631    return SME_ACLE_FUNC(svread_hor_za128, _s64, _m)(zd, pg, 0, slice_base);632}633 634// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_hor_za128_s64_1(635// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {636// CHECK-C-NEXT:  entry:637// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])638// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])639// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]640//641// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z27test_svread_hor_za128_s64_1u11__SVInt64_tu10__SVBool_tj(642// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {643// CHECK-CXX-NEXT:  entry:644// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])645// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])646// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]647//648svint64_t test_svread_hor_za128_s64_1(svint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {649    return SME_ACLE_FUNC(svread_hor_za128, _s64, _m)(zd, pg, 15, slice_base);650}651 652// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za128_u8(653// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {654// CHECK-C-NEXT:  entry:655// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])656// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]657//658// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z24test_svread_hor_za128_u8u11__SVUint8_tu10__SVBool_tj(659// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {660// CHECK-CXX-NEXT:  entry:661// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])662// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]663//664svuint8_t test_svread_hor_za128_u8(svuint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {665    return SME_ACLE_FUNC(svread_hor_za128, _u8, _m)(zd, pg, 0, slice_base);666}667 668// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za128_u8_1(669// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {670// CHECK-C-NEXT:  entry:671// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])672// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]673//674// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z26test_svread_hor_za128_u8_1u11__SVUint8_tu10__SVBool_tj(675// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {676// CHECK-CXX-NEXT:  entry:677// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])678// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]679//680svuint8_t test_svread_hor_za128_u8_1(svuint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {681    return SME_ACLE_FUNC(svread_hor_za128, _u8, _m)(zd, pg, 15, slice_base);682}683 684// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_hor_za128_u16(685// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {686// CHECK-C-NEXT:  entry:687// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])688// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])689// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]690//691// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z25test_svread_hor_za128_u16u12__SVUint16_tu10__SVBool_tj(692// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {693// CHECK-CXX-NEXT:  entry:694// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])695// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])696// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]697//698svuint16_t test_svread_hor_za128_u16(svuint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {699    return SME_ACLE_FUNC(svread_hor_za128, _u16, _m)(zd, pg, 0, slice_base);700}701 702// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_hor_za128_u16_1(703// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {704// CHECK-C-NEXT:  entry:705// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])706// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])707// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]708//709// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z27test_svread_hor_za128_u16_1u12__SVUint16_tu10__SVBool_tj(710// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {711// CHECK-CXX-NEXT:  entry:712// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])713// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.horiz.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])714// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]715//716svuint16_t test_svread_hor_za128_u16_1(svuint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {717    return SME_ACLE_FUNC(svread_hor_za128, _u16, _m)(zd, pg, 15, slice_base);718}719 720// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_hor_za128_u32(721// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {722// CHECK-C-NEXT:  entry:723// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])724// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])725// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]726//727// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z25test_svread_hor_za128_u32u12__SVUint32_tu10__SVBool_tj(728// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {729// CHECK-CXX-NEXT:  entry:730// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])731// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])732// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]733//734svuint32_t test_svread_hor_za128_u32(svuint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {735    return SME_ACLE_FUNC(svread_hor_za128, _u32, _m)(zd, pg, 0, slice_base);736}737 738// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_hor_za128_u32_1(739// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {740// CHECK-C-NEXT:  entry:741// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])742// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])743// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]744//745// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z27test_svread_hor_za128_u32_1u12__SVUint32_tu10__SVBool_tj(746// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {747// CHECK-CXX-NEXT:  entry:748// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])749// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.horiz.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])750// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]751//752svuint32_t test_svread_hor_za128_u32_1(svuint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {753    return SME_ACLE_FUNC(svread_hor_za128, _u32, _m)(zd, pg, 15, slice_base);754}755 756// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_hor_za128_u64(757// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {758// CHECK-C-NEXT:  entry:759// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])760// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])761// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]762//763// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z25test_svread_hor_za128_u64u12__SVUint64_tu10__SVBool_tj(764// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {765// CHECK-CXX-NEXT:  entry:766// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])767// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])768// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]769//770svuint64_t test_svread_hor_za128_u64(svuint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {771    return SME_ACLE_FUNC(svread_hor_za128, _u64, _m)(zd, pg, 0, slice_base);772}773 774// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_hor_za128_u64_1(775// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {776// CHECK-C-NEXT:  entry:777// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])778// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])779// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]780//781// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z27test_svread_hor_za128_u64_1u12__SVUint64_tu10__SVBool_tj(782// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {783// CHECK-CXX-NEXT:  entry:784// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])785// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.horiz.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])786// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]787//788svuint64_t test_svread_hor_za128_u64_1(svuint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {789    return SME_ACLE_FUNC(svread_hor_za128, _u64, _m)(zd, pg, 15, slice_base);790}791 792// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za128_mf8(793// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {794// CHECK-C-NEXT:  entry:795// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])796// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]797//798// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z25test_svread_hor_za128_mf8u13__SVMfloat8_tu10__SVBool_tj(799// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {800// CHECK-CXX-NEXT:  entry:801// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])802// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]803//804svmfloat8_t test_svread_hor_za128_mf8(svmfloat8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {805    return SME_ACLE_FUNC(svread_hor_za128, _mf8, _m)(zd, pg, 0, slice_base);806}807 808// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_hor_za128_mf8_1(809// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {810// CHECK-C-NEXT:  entry:811// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])812// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]813//814// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z27test_svread_hor_za128_mf8_1u13__SVMfloat8_tu10__SVBool_tj(815// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {816// CHECK-CXX-NEXT:  entry:817// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.horiz.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])818// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]819//820svmfloat8_t test_svread_hor_za128_mf8_1(svmfloat8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {821    return SME_ACLE_FUNC(svread_hor_za128, _mf8, _m)(zd, pg, 15, slice_base);822}823 824// CHECK-C-LABEL: define dso_local <vscale x 8 x half> @test_svread_hor_za128_f16(825// CHECK-C-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {826// CHECK-C-NEXT:  entry:827// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])828// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.readq.horiz.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])829// CHECK-C-NEXT:    ret <vscale x 8 x half> [[TMP1]]830//831// CHECK-CXX-LABEL: define dso_local <vscale x 8 x half> @_Z25test_svread_hor_za128_f16u13__SVFloat16_tu10__SVBool_tj(832// CHECK-CXX-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {833// CHECK-CXX-NEXT:  entry:834// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])835// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.readq.horiz.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])836// CHECK-CXX-NEXT:    ret <vscale x 8 x half> [[TMP1]]837//838svfloat16_t test_svread_hor_za128_f16(svfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {839    return SME_ACLE_FUNC(svread_hor_za128, _f16, _m)(zd, pg, 0, slice_base);840}841 842// CHECK-C-LABEL: define dso_local <vscale x 8 x half> @test_svread_hor_za128_f16_1(843// CHECK-C-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {844// CHECK-C-NEXT:  entry:845// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])846// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.readq.horiz.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])847// CHECK-C-NEXT:    ret <vscale x 8 x half> [[TMP1]]848//849// CHECK-CXX-LABEL: define dso_local <vscale x 8 x half> @_Z27test_svread_hor_za128_f16_1u13__SVFloat16_tu10__SVBool_tj(850// CHECK-CXX-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {851// CHECK-CXX-NEXT:  entry:852// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])853// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.readq.horiz.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])854// CHECK-CXX-NEXT:    ret <vscale x 8 x half> [[TMP1]]855//856svfloat16_t test_svread_hor_za128_f16_1(svfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {857    return SME_ACLE_FUNC(svread_hor_za128, _f16, _m)(zd, pg, 15, slice_base);858}859 860// CHECK-C-LABEL: define dso_local <vscale x 8 x bfloat> @test_svread_hor_za128_bf16(861// CHECK-C-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {862// CHECK-C-NEXT:  entry:863// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])864// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.readq.horiz.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])865// CHECK-C-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]866//867// CHECK-CXX-LABEL: define dso_local <vscale x 8 x bfloat> @_Z26test_svread_hor_za128_bf16u14__SVBfloat16_tu10__SVBool_tj(868// CHECK-CXX-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {869// CHECK-CXX-NEXT:  entry:870// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])871// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.readq.horiz.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])872// CHECK-CXX-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]873//874svbfloat16_t test_svread_hor_za128_bf16(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {875    return SME_ACLE_FUNC(svread_hor_za128, _bf16, _m)(zd, pg, 0, slice_base);876}877 878// CHECK-C-LABEL: define dso_local <vscale x 8 x bfloat> @test_svread_hor_za128_bf16_1(879// CHECK-C-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {880// CHECK-C-NEXT:  entry:881// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])882// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.readq.horiz.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])883// CHECK-C-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]884//885// CHECK-CXX-LABEL: define dso_local <vscale x 8 x bfloat> @_Z28test_svread_hor_za128_bf16_1u14__SVBfloat16_tu10__SVBool_tj(886// CHECK-CXX-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {887// CHECK-CXX-NEXT:  entry:888// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])889// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.readq.horiz.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])890// CHECK-CXX-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]891//892svbfloat16_t test_svread_hor_za128_bf16_1(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {893    return SME_ACLE_FUNC(svread_hor_za128, _bf16, _m)(zd, pg, 15, slice_base);894}895 896// CHECK-C-LABEL: define dso_local <vscale x 4 x float> @test_svread_hor_za128_f32(897// CHECK-C-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {898// CHECK-C-NEXT:  entry:899// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])900// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.readq.horiz.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])901// CHECK-C-NEXT:    ret <vscale x 4 x float> [[TMP1]]902//903// CHECK-CXX-LABEL: define dso_local <vscale x 4 x float> @_Z25test_svread_hor_za128_f32u13__SVFloat32_tu10__SVBool_tj(904// CHECK-CXX-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {905// CHECK-CXX-NEXT:  entry:906// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])907// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.readq.horiz.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])908// CHECK-CXX-NEXT:    ret <vscale x 4 x float> [[TMP1]]909//910svfloat32_t test_svread_hor_za128_f32(svfloat32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {911    return SME_ACLE_FUNC(svread_hor_za128, _f32, _m)(zd, pg, 0, slice_base);912}913 914// CHECK-C-LABEL: define dso_local <vscale x 4 x float> @test_svread_hor_za128_f32_1(915// CHECK-C-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {916// CHECK-C-NEXT:  entry:917// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])918// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.readq.horiz.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])919// CHECK-C-NEXT:    ret <vscale x 4 x float> [[TMP1]]920//921// CHECK-CXX-LABEL: define dso_local <vscale x 4 x float> @_Z27test_svread_hor_za128_f32_1u13__SVFloat32_tu10__SVBool_tj(922// CHECK-CXX-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {923// CHECK-CXX-NEXT:  entry:924// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])925// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.readq.horiz.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])926// CHECK-CXX-NEXT:    ret <vscale x 4 x float> [[TMP1]]927//928svfloat32_t test_svread_hor_za128_f32_1(svfloat32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {929    return SME_ACLE_FUNC(svread_hor_za128, _f32, _m)(zd, pg, 15, slice_base);930}931 932// CHECK-C-LABEL: define dso_local <vscale x 2 x double> @test_svread_hor_za128_f64(933// CHECK-C-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {934// CHECK-C-NEXT:  entry:935// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])936// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.readq.horiz.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])937// CHECK-C-NEXT:    ret <vscale x 2 x double> [[TMP1]]938//939// CHECK-CXX-LABEL: define dso_local <vscale x 2 x double> @_Z25test_svread_hor_za128_f64u13__SVFloat64_tu10__SVBool_tj(940// CHECK-CXX-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {941// CHECK-CXX-NEXT:  entry:942// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])943// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.readq.horiz.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])944// CHECK-CXX-NEXT:    ret <vscale x 2 x double> [[TMP1]]945//946svfloat64_t test_svread_hor_za128_f64(svfloat64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {947    return SME_ACLE_FUNC(svread_hor_za128, _f64, _m)(zd, pg, 0, slice_base);948}949 950// CHECK-C-LABEL: define dso_local <vscale x 2 x double> @test_svread_hor_za128_f64_1(951// CHECK-C-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {952// CHECK-C-NEXT:  entry:953// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])954// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.readq.horiz.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])955// CHECK-C-NEXT:    ret <vscale x 2 x double> [[TMP1]]956//957// CHECK-CXX-LABEL: define dso_local <vscale x 2 x double> @_Z27test_svread_hor_za128_f64_1u13__SVFloat64_tu10__SVBool_tj(958// CHECK-CXX-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {959// CHECK-CXX-NEXT:  entry:960// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])961// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.readq.horiz.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])962// CHECK-CXX-NEXT:    ret <vscale x 2 x double> [[TMP1]]963//964svfloat64_t test_svread_hor_za128_f64_1(svfloat64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {965    return SME_ACLE_FUNC(svread_hor_za128, _f64, _m)(zd, pg, 15, slice_base);966}967 968// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za8_s8(969// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {970// CHECK-C-NEXT:  entry:971// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])972// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]973//974// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z22test_svread_ver_za8_s8u10__SVInt8_tu10__SVBool_tj(975// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {976// CHECK-CXX-NEXT:  entry:977// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])978// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]979//980svint8_t test_svread_ver_za8_s8(svint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {981    return SME_ACLE_FUNC(svread_ver_za8, _s8, _m)(zd, pg, 0, slice_base);982}983 984// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za8_s8_1(985// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {986// CHECK-C-NEXT:  entry:987// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15988// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])989// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]990//991// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z24test_svread_ver_za8_s8_1u10__SVInt8_tu10__SVBool_tj(992// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {993// CHECK-CXX-NEXT:  entry:994// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15995// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])996// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]997//998svint8_t test_svread_ver_za8_s8_1(svint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {999    uint32_t slice = slice_base + 15;1000    return SME_ACLE_FUNC(svread_ver_za8, _s8, _m)(zd, pg, 0, slice);1001}1002 1003// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_ver_za16_s16(1004// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1005// CHECK-C-NEXT:  entry:1006// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1007// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1008// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1009//1010// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z24test_svread_ver_za16_s16u11__SVInt16_tu10__SVBool_tj(1011// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1012// CHECK-CXX-NEXT:  entry:1013// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1014// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1015// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1016//1017svint16_t test_svread_ver_za16_s16(svint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1018     return SME_ACLE_FUNC(svread_ver_za16, _s16, _m)(zd, pg, 0, slice_base);1019}1020 1021// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_ver_za16_s16_1(1022// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1023// CHECK-C-NEXT:  entry:1024// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 71025// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1026// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])1027// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1028//1029// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z26test_svread_ver_za16_s16_1u11__SVInt16_tu10__SVBool_tj(1030// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1031// CHECK-CXX-NEXT:  entry:1032// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 71033// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1034// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])1035// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1036//1037svint16_t test_svread_ver_za16_s16_1(svint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1038     uint32_t slice = slice_base + 7;1039     return SME_ACLE_FUNC(svread_ver_za16, _s16, _m)(zd, pg, 1, slice);1040}1041 1042// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_ver_za32_s32(1043// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1044// CHECK-C-NEXT:  entry:1045// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1046// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1047// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1048//1049// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z24test_svread_ver_za32_s32u11__SVInt32_tu10__SVBool_tj(1050// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1051// CHECK-CXX-NEXT:  entry:1052// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1053// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1054// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1055//1056svint32_t test_svread_ver_za32_s32(svint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1057    return SME_ACLE_FUNC(svread_ver_za32, _s32, _m)(zd, pg, 0, slice_base);1058}1059 1060// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_ver_za32_s32_1(1061// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1062// CHECK-C-NEXT:  entry:1063// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 31064// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1065// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])1066// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1067//1068// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z26test_svread_ver_za32_s32_1u11__SVInt32_tu10__SVBool_tj(1069// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1070// CHECK-CXX-NEXT:  entry:1071// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 31072// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1073// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])1074// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1075//1076svint32_t test_svread_ver_za32_s32_1(svint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1077    uint32_t slice = slice_base + 3;1078    return SME_ACLE_FUNC(svread_ver_za32, _s32, _m)(zd, pg, 3, slice);1079}1080 1081// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_ver_za64_s64(1082// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1083// CHECK-C-NEXT:  entry:1084// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1085// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1086// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1087//1088// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z24test_svread_ver_za64_s64u11__SVInt64_tu10__SVBool_tj(1089// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1090// CHECK-CXX-NEXT:  entry:1091// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1092// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1093// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1094//1095svint64_t test_svread_ver_za64_s64(svint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1096    return SME_ACLE_FUNC(svread_ver_za64, _s64, _m)(zd, pg, 0, slice_base);1097}1098 1099// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_ver_za64_s64_1(1100// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1101// CHECK-C-NEXT:  entry:1102// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 11103// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1104// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])1105// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1106//1107// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z26test_svread_ver_za64_s64_1u11__SVInt64_tu10__SVBool_tj(1108// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1109// CHECK-CXX-NEXT:  entry:1110// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 11111// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1112// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])1113// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1114//1115svint64_t test_svread_ver_za64_s64_1(svint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1116    uint32_t slice = slice_base + 1;1117    return SME_ACLE_FUNC(svread_ver_za64, _s64, _m)(zd, pg, 7, slice);1118}1119 1120// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za8_u8(1121// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1122// CHECK-C-NEXT:  entry:1123// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1124// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1125//1126// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z22test_svread_ver_za8_u8u11__SVUint8_tu10__SVBool_tj(1127// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1128// CHECK-CXX-NEXT:  entry:1129// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1130// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1131//1132svuint8_t test_svread_ver_za8_u8(svuint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1133    return SME_ACLE_FUNC(svread_ver_za8, _u8, _m)(zd, pg, 0, slice_base);1134}1135 1136// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za8_u8_1(1137// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1138// CHECK-C-NEXT:  entry:1139// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 151140// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])1141// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1142//1143// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z24test_svread_ver_za8_u8_1u11__SVUint8_tu10__SVBool_tj(1144// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1145// CHECK-CXX-NEXT:  entry:1146// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 151147// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])1148// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1149//1150svuint8_t test_svread_ver_za8_u8_1(svuint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1151    uint32_t slice = slice_base + 15;1152    return SME_ACLE_FUNC(svread_ver_za8, _u8, _m)(zd, pg, 0, slice);1153}1154 1155// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_ver_za16_u16(1156// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1157// CHECK-C-NEXT:  entry:1158// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1159// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1160// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1161//1162// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z24test_svread_ver_za16_u16u12__SVUint16_tu10__SVBool_tj(1163// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1164// CHECK-CXX-NEXT:  entry:1165// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1166// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1167// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1168//1169svuint16_t test_svread_ver_za16_u16(svuint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1170    return SME_ACLE_FUNC(svread_ver_za16, _u16, _m)(zd, pg, 0, slice_base);1171}1172 1173// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_ver_za16_u16_1(1174// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1175// CHECK-C-NEXT:  entry:1176// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 71177// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1178// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])1179// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1180//1181// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z26test_svread_ver_za16_u16_1u12__SVUint16_tu10__SVBool_tj(1182// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1183// CHECK-CXX-NEXT:  entry:1184// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 71185// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1186// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])1187// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1188//1189svuint16_t test_svread_ver_za16_u16_1(svuint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1190    uint32_t slice = slice_base + 7;1191    return SME_ACLE_FUNC(svread_ver_za16, _u16, _m)(zd, pg, 1, slice);1192}1193 1194// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_ver_za32_u32(1195// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1196// CHECK-C-NEXT:  entry:1197// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1198// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1199// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1200//1201// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z24test_svread_ver_za32_u32u12__SVUint32_tu10__SVBool_tj(1202// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1203// CHECK-CXX-NEXT:  entry:1204// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1205// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1206// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1207//1208svuint32_t test_svread_ver_za32_u32(svuint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1209    return SME_ACLE_FUNC(svread_ver_za32, _u32, _m)(zd, pg, 0, slice_base);1210}1211 1212// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_ver_za32_u32_1(1213// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1214// CHECK-C-NEXT:  entry:1215// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 31216// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1217// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])1218// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1219//1220// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z26test_svread_ver_za32_u32_1u12__SVUint32_tu10__SVBool_tj(1221// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1222// CHECK-CXX-NEXT:  entry:1223// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 31224// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1225// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])1226// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1227//1228svuint32_t test_svread_ver_za32_u32_1(svuint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1229    uint32_t slice = slice_base + 3;1230    return SME_ACLE_FUNC(svread_ver_za32, _u32, _m)(zd, pg, 3, slice);1231}1232 1233// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_ver_za64_u64(1234// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1235// CHECK-C-NEXT:  entry:1236// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1237// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1238// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1239//1240// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z24test_svread_ver_za64_u64u12__SVUint64_tu10__SVBool_tj(1241// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1242// CHECK-CXX-NEXT:  entry:1243// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1244// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1245// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1246//1247svuint64_t test_svread_ver_za64_u64(svuint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1248    return SME_ACLE_FUNC(svread_ver_za64, _u64, _m)(zd, pg, 0, slice_base);1249}1250 1251// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_ver_za64_u64_1(1252// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1253// CHECK-C-NEXT:  entry:1254// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 11255// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1256// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])1257// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1258//1259// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z26test_svread_ver_za64_u64_1u12__SVUint64_tu10__SVBool_tj(1260// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1261// CHECK-CXX-NEXT:  entry:1262// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 11263// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1264// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])1265// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1266//1267svuint64_t test_svread_ver_za64_u64_1(svuint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1268    uint32_t slice = slice_base + 1;1269    return SME_ACLE_FUNC(svread_ver_za64, _u64, _m)(zd, pg, 7, slice);1270}1271 1272// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za8_mf8(1273// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1274// CHECK-C-NEXT:  entry:1275// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1276// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1277//1278// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z23test_svread_ver_za8_mf8u13__SVMfloat8_tu10__SVBool_tj(1279// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1280// CHECK-CXX-NEXT:  entry:1281// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1282// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1283//1284svmfloat8_t test_svread_ver_za8_mf8(svmfloat8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1285    return SME_ACLE_FUNC(svread_ver_za8, _mf8, _m)(zd, pg, 0, slice_base);1286}1287 1288// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za8_mf8_1(1289// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1290// CHECK-C-NEXT:  entry:1291// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 151292// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])1293// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1294//1295// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z25test_svread_ver_za8_mf8_1u13__SVMfloat8_tu10__SVBool_tj(1296// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1297// CHECK-CXX-NEXT:  entry:1298// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 151299// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[ADD]])1300// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1301//1302svmfloat8_t test_svread_ver_za8_mf8_1(svmfloat8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1303    uint32_t slice = slice_base + 15;1304    return SME_ACLE_FUNC(svread_ver_za8, _mf8, _m)(zd, pg, 0, slice);1305}1306 1307// CHECK-C-LABEL: define dso_local <vscale x 8 x half> @test_svread_ver_za16_f16(1308// CHECK-C-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1309// CHECK-C-NEXT:  entry:1310// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1311// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.read.vert.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1312// CHECK-C-NEXT:    ret <vscale x 8 x half> [[TMP1]]1313//1314// CHECK-CXX-LABEL: define dso_local <vscale x 8 x half> @_Z24test_svread_ver_za16_f16u13__SVFloat16_tu10__SVBool_tj(1315// CHECK-CXX-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1316// CHECK-CXX-NEXT:  entry:1317// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1318// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.read.vert.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1319// CHECK-CXX-NEXT:    ret <vscale x 8 x half> [[TMP1]]1320//1321svfloat16_t test_svread_ver_za16_f16(svfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1322    return SME_ACLE_FUNC(svread_ver_za16, _f16, _m)(zd, pg, 0, slice_base);1323}1324 1325// CHECK-C-LABEL: define dso_local <vscale x 8 x half> @test_svread_ver_za16_f16_1(1326// CHECK-C-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1327// CHECK-C-NEXT:  entry:1328// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 71329// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1330// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.read.vert.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])1331// CHECK-C-NEXT:    ret <vscale x 8 x half> [[TMP1]]1332//1333// CHECK-CXX-LABEL: define dso_local <vscale x 8 x half> @_Z26test_svread_ver_za16_f16_1u13__SVFloat16_tu10__SVBool_tj(1334// CHECK-CXX-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1335// CHECK-CXX-NEXT:  entry:1336// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 71337// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1338// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.read.vert.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])1339// CHECK-CXX-NEXT:    ret <vscale x 8 x half> [[TMP1]]1340//1341svfloat16_t test_svread_ver_za16_f16_1(svfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1342    uint32_t slice = slice_base + 7;1343    return SME_ACLE_FUNC(svread_ver_za16, _f16, _m)(zd, pg, 1, slice);1344}1345 1346// CHECK-C-LABEL: define dso_local <vscale x 8 x bfloat> @test_svread_ver_za16_bf16(1347// CHECK-C-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1348// CHECK-C-NEXT:  entry:1349// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1350// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.vert.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1351// CHECK-C-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]1352//1353// CHECK-CXX-LABEL: define dso_local <vscale x 8 x bfloat> @_Z25test_svread_ver_za16_bf16u14__SVBfloat16_tu10__SVBool_tj(1354// CHECK-CXX-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1355// CHECK-CXX-NEXT:  entry:1356// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1357// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.vert.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1358// CHECK-CXX-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]1359//1360svbfloat16_t test_svread_ver_za16_bf16(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1361    return SME_ACLE_FUNC(svread_ver_za16, _bf16, _m)(zd, pg, 0, slice_base);1362}1363 1364// CHECK-C-LABEL: define dso_local <vscale x 8 x bfloat> @test_svread_ver_za16_bf16_1(1365// CHECK-C-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1366// CHECK-C-NEXT:  entry:1367// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 71368// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1369// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.vert.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])1370// CHECK-C-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]1371//1372// CHECK-CXX-LABEL: define dso_local <vscale x 8 x bfloat> @_Z27test_svread_ver_za16_bf16_1u14__SVBfloat16_tu10__SVBool_tj(1373// CHECK-CXX-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1374// CHECK-CXX-NEXT:  entry:1375// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 71376// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1377// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.vert.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 1, i32 [[ADD]])1378// CHECK-CXX-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]1379//1380svbfloat16_t test_svread_ver_za16_bf16_1(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1381    uint32_t slice = slice_base + 7;1382    return SME_ACLE_FUNC(svread_ver_za16, _bf16, _m)(zd, pg, 1, slice);1383}1384 1385// CHECK-C-LABEL: define dso_local <vscale x 4 x float> @test_svread_ver_za32_f32(1386// CHECK-C-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1387// CHECK-C-NEXT:  entry:1388// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1389// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.read.vert.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1390// CHECK-C-NEXT:    ret <vscale x 4 x float> [[TMP1]]1391//1392// CHECK-CXX-LABEL: define dso_local <vscale x 4 x float> @_Z24test_svread_ver_za32_f32u13__SVFloat32_tu10__SVBool_tj(1393// CHECK-CXX-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1394// CHECK-CXX-NEXT:  entry:1395// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1396// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.read.vert.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1397// CHECK-CXX-NEXT:    ret <vscale x 4 x float> [[TMP1]]1398//1399svfloat32_t test_svread_ver_za32_f32(svfloat32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1400    return SME_ACLE_FUNC(svread_ver_za32, _f32, _m)(zd, pg, 0, slice_base);1401}1402 1403// CHECK-C-LABEL: define dso_local <vscale x 4 x float> @test_svread_ver_za32_f32_1(1404// CHECK-C-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1405// CHECK-C-NEXT:  entry:1406// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 31407// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1408// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.read.vert.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])1409// CHECK-C-NEXT:    ret <vscale x 4 x float> [[TMP1]]1410//1411// CHECK-CXX-LABEL: define dso_local <vscale x 4 x float> @_Z26test_svread_ver_za32_f32_1u13__SVFloat32_tu10__SVBool_tj(1412// CHECK-CXX-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1413// CHECK-CXX-NEXT:  entry:1414// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 31415// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1416// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.read.vert.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 3, i32 [[ADD]])1417// CHECK-CXX-NEXT:    ret <vscale x 4 x float> [[TMP1]]1418//1419svfloat32_t test_svread_ver_za32_f32_1(svfloat32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1420    uint32_t slice = slice_base + 3;1421    return SME_ACLE_FUNC(svread_ver_za32, _f32, _m)(zd, pg, 3, slice);1422}1423 1424// CHECK-C-LABEL: define dso_local <vscale x 2 x double> @test_svread_ver_za64_f64(1425// CHECK-C-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1426// CHECK-C-NEXT:  entry:1427// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1428// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.read.vert.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1429// CHECK-C-NEXT:    ret <vscale x 2 x double> [[TMP1]]1430//1431// CHECK-CXX-LABEL: define dso_local <vscale x 2 x double> @_Z24test_svread_ver_za64_f64u13__SVFloat64_tu10__SVBool_tj(1432// CHECK-CXX-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1433// CHECK-CXX-NEXT:  entry:1434// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1435// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.read.vert.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1436// CHECK-CXX-NEXT:    ret <vscale x 2 x double> [[TMP1]]1437//1438svfloat64_t test_svread_ver_za64_f64(svfloat64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1439    return SME_ACLE_FUNC(svread_ver_za64, _f64, _m)(zd, pg, 0, slice_base);1440}1441 1442// CHECK-C-LABEL: define dso_local <vscale x 2 x double> @test_svread_ver_za64_f64_1(1443// CHECK-C-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1444// CHECK-C-NEXT:  entry:1445// CHECK-C-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 11446// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1447// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.read.vert.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])1448// CHECK-C-NEXT:    ret <vscale x 2 x double> [[TMP1]]1449//1450// CHECK-CXX-LABEL: define dso_local <vscale x 2 x double> @_Z26test_svread_ver_za64_f64_1u13__SVFloat64_tu10__SVBool_tj(1451// CHECK-CXX-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1452// CHECK-CXX-NEXT:  entry:1453// CHECK-CXX-NEXT:    [[ADD:%.*]] = add i32 [[SLICE_BASE]], 11454// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1455// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.read.vert.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 7, i32 [[ADD]])1456// CHECK-CXX-NEXT:    ret <vscale x 2 x double> [[TMP1]]1457//1458svfloat64_t test_svread_ver_za64_f64_1(svfloat64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1459    uint32_t slice = slice_base + 1;1460    return SME_ACLE_FUNC(svread_ver_za64, _f64, _m)(zd, pg, 7, slice);1461}1462 1463// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za128_s8(1464// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1465// CHECK-C-NEXT:  entry:1466// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1467// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1468//1469// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z24test_svread_ver_za128_s8u10__SVInt8_tu10__SVBool_tj(1470// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1471// CHECK-CXX-NEXT:  entry:1472// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1473// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1474//1475svint8_t test_svread_ver_za128_s8(svint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1476    return SME_ACLE_FUNC(svread_ver_za128, _s8, _m)(zd, pg, 0, slice_base);1477}1478 1479// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za128_s8_1(1480// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1481// CHECK-C-NEXT:  entry:1482// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])1483// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1484//1485// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z26test_svread_ver_za128_s8_1u10__SVInt8_tu10__SVBool_tj(1486// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1487// CHECK-CXX-NEXT:  entry:1488// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])1489// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1490//1491svint8_t test_svread_ver_za128_s8_1(svint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1492    return SME_ACLE_FUNC(svread_ver_za128, _s8, _m)(zd, pg, 15, slice_base);1493}1494 1495// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_ver_za128_s16(1496// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1497// CHECK-C-NEXT:  entry:1498// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1499// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1500// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1501//1502// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z25test_svread_ver_za128_s16u11__SVInt16_tu10__SVBool_tj(1503// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1504// CHECK-CXX-NEXT:  entry:1505// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1506// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1507// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1508//1509svint16_t test_svread_ver_za128_s16(svint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1510    return SME_ACLE_FUNC(svread_ver_za128, _s16, _m)(zd, pg, 0, slice_base);1511}1512 1513// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_ver_za128_s16_1(1514// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1515// CHECK-C-NEXT:  entry:1516// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1517// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1518// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1519//1520// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z27test_svread_ver_za128_s16_1u11__SVInt16_tu10__SVBool_tj(1521// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1522// CHECK-CXX-NEXT:  entry:1523// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1524// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1525// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1526//1527svint16_t test_svread_ver_za128_s16_1(svint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1528    return SME_ACLE_FUNC(svread_ver_za128, _s16, _m)(zd, pg, 15, slice_base);1529}1530 1531// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_ver_za128_s32(1532// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1533// CHECK-C-NEXT:  entry:1534// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1535// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1536// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1537//1538// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z25test_svread_ver_za128_s32u11__SVInt32_tu10__SVBool_tj(1539// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1540// CHECK-CXX-NEXT:  entry:1541// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1542// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1543// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1544//1545svint32_t test_svread_ver_za128_s32(svint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1546    return SME_ACLE_FUNC(svread_ver_za128, _s32, _m)(zd, pg, 0, slice_base);1547}1548 1549// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_ver_za128_s32_1(1550// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1551// CHECK-C-NEXT:  entry:1552// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1553// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1554// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1555//1556// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z27test_svread_ver_za128_s32_1u11__SVInt32_tu10__SVBool_tj(1557// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1558// CHECK-CXX-NEXT:  entry:1559// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1560// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1561// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1562//1563svint32_t test_svread_ver_za128_s32_1(svint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1564    return SME_ACLE_FUNC(svread_ver_za128, _s32, _m)(zd, pg, 15, slice_base);1565}1566 1567// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_ver_za128_s64(1568// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1569// CHECK-C-NEXT:  entry:1570// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1571// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1572// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1573//1574// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z25test_svread_ver_za128_s64u11__SVInt64_tu10__SVBool_tj(1575// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1576// CHECK-CXX-NEXT:  entry:1577// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1578// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1579// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1580//1581svint64_t test_svread_ver_za128_s64(svint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1582    return SME_ACLE_FUNC(svread_ver_za128, _s64, _m)(zd, pg, 0, slice_base);1583}1584 1585// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_ver_za128_s64_1(1586// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1587// CHECK-C-NEXT:  entry:1588// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1589// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1590// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1591//1592// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z27test_svread_ver_za128_s64_1u11__SVInt64_tu10__SVBool_tj(1593// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1594// CHECK-CXX-NEXT:  entry:1595// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1596// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1597// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1598//1599svint64_t test_svread_ver_za128_s64_1(svint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1600    return SME_ACLE_FUNC(svread_ver_za128, _s64, _m)(zd, pg, 15, slice_base);1601}1602 1603// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za128_u8(1604// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1605// CHECK-C-NEXT:  entry:1606// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1607// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1608//1609// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z24test_svread_ver_za128_u8u11__SVUint8_tu10__SVBool_tj(1610// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1611// CHECK-CXX-NEXT:  entry:1612// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1613// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1614//1615svuint8_t test_svread_ver_za128_u8(svuint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1616    return SME_ACLE_FUNC(svread_ver_za128, _u8, _m)(zd, pg, 0, slice_base);1617}1618 1619// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za128_u8_1(1620// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1621// CHECK-C-NEXT:  entry:1622// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])1623// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1624//1625// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z26test_svread_ver_za128_u8_1u11__SVUint8_tu10__SVBool_tj(1626// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1627// CHECK-CXX-NEXT:  entry:1628// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])1629// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1630//1631svuint8_t test_svread_ver_za128_u8_1(svuint8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1632    return SME_ACLE_FUNC(svread_ver_za128, _u8, _m)(zd, pg, 15, slice_base);1633}1634 1635// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_ver_za128_u16(1636// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1637// CHECK-C-NEXT:  entry:1638// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1639// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1640// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1641//1642// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z25test_svread_ver_za128_u16u12__SVUint16_tu10__SVBool_tj(1643// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1644// CHECK-CXX-NEXT:  entry:1645// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1646// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1647// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1648//1649svuint16_t test_svread_ver_za128_u16(svuint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1650    return SME_ACLE_FUNC(svread_ver_za128, _u16, _m)(zd, pg, 0, slice_base);1651}1652 1653// CHECK-C-LABEL: define dso_local <vscale x 8 x i16> @test_svread_ver_za128_u16_1(1654// CHECK-C-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1655// CHECK-C-NEXT:  entry:1656// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1657// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1658// CHECK-C-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1659//1660// CHECK-CXX-LABEL: define dso_local <vscale x 8 x i16> @_Z27test_svread_ver_za128_u16_1u12__SVUint16_tu10__SVBool_tj(1661// CHECK-CXX-SAME: <vscale x 8 x i16> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1662// CHECK-CXX-NEXT:  entry:1663// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1664// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sme.readq.vert.nxv8i16(<vscale x 8 x i16> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1665// CHECK-CXX-NEXT:    ret <vscale x 8 x i16> [[TMP1]]1666//1667svuint16_t test_svread_ver_za128_u16_1(svuint16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1668    return SME_ACLE_FUNC(svread_ver_za128, _u16, _m)(zd, pg, 15, slice_base);1669}1670 1671// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_ver_za128_u32(1672// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1673// CHECK-C-NEXT:  entry:1674// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1675// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1676// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1677//1678// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z25test_svread_ver_za128_u32u12__SVUint32_tu10__SVBool_tj(1679// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1680// CHECK-CXX-NEXT:  entry:1681// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1682// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1683// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1684//1685svuint32_t test_svread_ver_za128_u32(svuint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1686    return SME_ACLE_FUNC(svread_ver_za128, _u32, _m)(zd, pg, 0, slice_base);1687}1688 1689// CHECK-C-LABEL: define dso_local <vscale x 4 x i32> @test_svread_ver_za128_u32_1(1690// CHECK-C-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1691// CHECK-C-NEXT:  entry:1692// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1693// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1694// CHECK-C-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1695//1696// CHECK-CXX-LABEL: define dso_local <vscale x 4 x i32> @_Z27test_svread_ver_za128_u32_1u12__SVUint32_tu10__SVBool_tj(1697// CHECK-CXX-SAME: <vscale x 4 x i32> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1698// CHECK-CXX-NEXT:  entry:1699// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1700// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sme.readq.vert.nxv4i32(<vscale x 4 x i32> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1701// CHECK-CXX-NEXT:    ret <vscale x 4 x i32> [[TMP1]]1702//1703svuint32_t test_svread_ver_za128_u32_1(svuint32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1704    return SME_ACLE_FUNC(svread_ver_za128, _u32, _m)(zd, pg, 15, slice_base);1705}1706 1707// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_ver_za128_u64(1708// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1709// CHECK-C-NEXT:  entry:1710// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1711// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1712// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1713//1714// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z25test_svread_ver_za128_u64u12__SVUint64_tu10__SVBool_tj(1715// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1716// CHECK-CXX-NEXT:  entry:1717// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1718// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1719// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1720//1721svuint64_t test_svread_ver_za128_u64(svuint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1722    return SME_ACLE_FUNC(svread_ver_za128, _u64, _m)(zd, pg, 0, slice_base);1723}1724 1725// CHECK-C-LABEL: define dso_local <vscale x 2 x i64> @test_svread_ver_za128_u64_1(1726// CHECK-C-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1727// CHECK-C-NEXT:  entry:1728// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1729// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1730// CHECK-C-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1731//1732// CHECK-CXX-LABEL: define dso_local <vscale x 2 x i64> @_Z27test_svread_ver_za128_u64_1u12__SVUint64_tu10__SVBool_tj(1733// CHECK-CXX-SAME: <vscale x 2 x i64> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1734// CHECK-CXX-NEXT:  entry:1735// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1736// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sme.readq.vert.nxv2i64(<vscale x 2 x i64> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1737// CHECK-CXX-NEXT:    ret <vscale x 2 x i64> [[TMP1]]1738//1739svuint64_t test_svread_ver_za128_u64_1(svuint64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1740    return SME_ACLE_FUNC(svread_ver_za128, _u64, _m)(zd, pg, 15, slice_base);1741}1742 1743// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za128_mf8(1744// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1745// CHECK-C-NEXT:  entry:1746// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1747// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1748//1749// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z25test_svread_ver_za128_mf8u13__SVMfloat8_tu10__SVBool_tj(1750// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1751// CHECK-CXX-NEXT:  entry:1752// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 0, i32 [[SLICE_BASE]])1753// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1754//1755svmfloat8_t test_svread_ver_za128_mf8(svmfloat8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1756    return SME_ACLE_FUNC(svread_ver_za128, _mf8, _m)(zd, pg, 0, slice_base);1757}1758 1759// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_svread_ver_za128_mf8_1(1760// CHECK-C-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1761// CHECK-C-NEXT:  entry:1762// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])1763// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1764//1765// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z27test_svread_ver_za128_mf8_1u13__SVMfloat8_tu10__SVBool_tj(1766// CHECK-CXX-SAME: <vscale x 16 x i8> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1767// CHECK-CXX-NEXT:  entry:1768// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sme.readq.vert.nxv16i8(<vscale x 16 x i8> [[ZD]], <vscale x 16 x i1> [[PG]], i32 15, i32 [[SLICE_BASE]])1769// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1770//1771svmfloat8_t test_svread_ver_za128_mf8_1(svmfloat8_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1772    return SME_ACLE_FUNC(svread_ver_za128, _mf8, _m)(zd, pg, 15, slice_base);1773}1774 1775// CHECK-C-LABEL: define dso_local <vscale x 8 x half> @test_svread_ver_za128_f16(1776// CHECK-C-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1777// CHECK-C-NEXT:  entry:1778// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1779// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.readq.vert.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1780// CHECK-C-NEXT:    ret <vscale x 8 x half> [[TMP1]]1781//1782// CHECK-CXX-LABEL: define dso_local <vscale x 8 x half> @_Z25test_svread_ver_za128_f16u13__SVFloat16_tu10__SVBool_tj(1783// CHECK-CXX-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1784// CHECK-CXX-NEXT:  entry:1785// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1786// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.readq.vert.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1787// CHECK-CXX-NEXT:    ret <vscale x 8 x half> [[TMP1]]1788//1789svfloat16_t test_svread_ver_za128_f16(svfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1790    return SME_ACLE_FUNC(svread_ver_za128, _f16, _m)(zd, pg, 0, slice_base);1791}1792 1793// CHECK-C-LABEL: define dso_local <vscale x 8 x half> @test_svread_ver_za128_f16_1(1794// CHECK-C-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1795// CHECK-C-NEXT:  entry:1796// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1797// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.readq.vert.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1798// CHECK-C-NEXT:    ret <vscale x 8 x half> [[TMP1]]1799//1800// CHECK-CXX-LABEL: define dso_local <vscale x 8 x half> @_Z27test_svread_ver_za128_f16_1u13__SVFloat16_tu10__SVBool_tj(1801// CHECK-CXX-SAME: <vscale x 8 x half> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1802// CHECK-CXX-NEXT:  entry:1803// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1804// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sme.readq.vert.nxv8f16(<vscale x 8 x half> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1805// CHECK-CXX-NEXT:    ret <vscale x 8 x half> [[TMP1]]1806//1807svfloat16_t test_svread_ver_za128_f16_1(svfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1808    return SME_ACLE_FUNC(svread_ver_za128, _f16, _m)(zd, pg, 15, slice_base);1809}1810 1811// CHECK-C-LABEL: define dso_local <vscale x 8 x bfloat> @test_svread_ver_za128_bf16(1812// CHECK-C-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1813// CHECK-C-NEXT:  entry:1814// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1815// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.readq.vert.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1816// CHECK-C-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]1817//1818// CHECK-CXX-LABEL: define dso_local <vscale x 8 x bfloat> @_Z26test_svread_ver_za128_bf16u14__SVBfloat16_tu10__SVBool_tj(1819// CHECK-CXX-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1820// CHECK-CXX-NEXT:  entry:1821// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1822// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.readq.vert.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1823// CHECK-CXX-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]1824//1825svbfloat16_t test_svread_ver_za128_bf16(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1826    return SME_ACLE_FUNC(svread_ver_za128, _bf16, _m)(zd, pg, 0, slice_base);1827}1828 1829// CHECK-C-LABEL: define dso_local <vscale x 8 x bfloat> @test_svread_ver_za128_bf16_1(1830// CHECK-C-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1831// CHECK-C-NEXT:  entry:1832// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1833// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.readq.vert.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1834// CHECK-C-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]1835//1836// CHECK-CXX-LABEL: define dso_local <vscale x 8 x bfloat> @_Z28test_svread_ver_za128_bf16_1u14__SVBfloat16_tu10__SVBool_tj(1837// CHECK-CXX-SAME: <vscale x 8 x bfloat> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1838// CHECK-CXX-NEXT:  entry:1839// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG]])1840// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sme.readq.vert.nxv8bf16(<vscale x 8 x bfloat> [[ZD]], <vscale x 8 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1841// CHECK-CXX-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]1842//1843svbfloat16_t test_svread_ver_za128_bf16_1(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1844    return SME_ACLE_FUNC(svread_ver_za128, _bf16, _m)(zd, pg, 15, slice_base);1845}1846 1847// CHECK-C-LABEL: define dso_local <vscale x 4 x float> @test_svread_ver_za128_f32(1848// CHECK-C-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1849// CHECK-C-NEXT:  entry:1850// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1851// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.readq.vert.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1852// CHECK-C-NEXT:    ret <vscale x 4 x float> [[TMP1]]1853//1854// CHECK-CXX-LABEL: define dso_local <vscale x 4 x float> @_Z25test_svread_ver_za128_f32u13__SVFloat32_tu10__SVBool_tj(1855// CHECK-CXX-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1856// CHECK-CXX-NEXT:  entry:1857// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1858// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.readq.vert.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1859// CHECK-CXX-NEXT:    ret <vscale x 4 x float> [[TMP1]]1860//1861svfloat32_t test_svread_ver_za128_f32(svfloat32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1862    return SME_ACLE_FUNC(svread_ver_za128, _f32, _m)(zd, pg, 0, slice_base);1863}1864 1865// CHECK-C-LABEL: define dso_local <vscale x 4 x float> @test_svread_ver_za128_f32_1(1866// CHECK-C-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1867// CHECK-C-NEXT:  entry:1868// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1869// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.readq.vert.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1870// CHECK-C-NEXT:    ret <vscale x 4 x float> [[TMP1]]1871//1872// CHECK-CXX-LABEL: define dso_local <vscale x 4 x float> @_Z27test_svread_ver_za128_f32_1u13__SVFloat32_tu10__SVBool_tj(1873// CHECK-CXX-SAME: <vscale x 4 x float> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1874// CHECK-CXX-NEXT:  entry:1875// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG]])1876// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sme.readq.vert.nxv4f32(<vscale x 4 x float> [[ZD]], <vscale x 4 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1877// CHECK-CXX-NEXT:    ret <vscale x 4 x float> [[TMP1]]1878//1879svfloat32_t test_svread_ver_za128_f32_1(svfloat32_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1880    return SME_ACLE_FUNC(svread_ver_za128, _f32, _m)(zd, pg, 15, slice_base);1881}1882 1883// CHECK-C-LABEL: define dso_local <vscale x 2 x double> @test_svread_ver_za128_f64(1884// CHECK-C-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1885// CHECK-C-NEXT:  entry:1886// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1887// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.readq.vert.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1888// CHECK-C-NEXT:    ret <vscale x 2 x double> [[TMP1]]1889//1890// CHECK-CXX-LABEL: define dso_local <vscale x 2 x double> @_Z25test_svread_ver_za128_f64u13__SVFloat64_tu10__SVBool_tj(1891// CHECK-CXX-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1892// CHECK-CXX-NEXT:  entry:1893// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1894// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.readq.vert.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 0, i32 [[SLICE_BASE]])1895// CHECK-CXX-NEXT:    ret <vscale x 2 x double> [[TMP1]]1896//1897svfloat64_t test_svread_ver_za128_f64(svfloat64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1898    return SME_ACLE_FUNC(svread_ver_za128, _f64, _m)(zd, pg, 0, slice_base);1899}1900 1901// CHECK-C-LABEL: define dso_local <vscale x 2 x double> @test_svread_ver_za128_f64_1(1902// CHECK-C-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1903// CHECK-C-NEXT:  entry:1904// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1905// CHECK-C-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.readq.vert.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1906// CHECK-C-NEXT:    ret <vscale x 2 x double> [[TMP1]]1907//1908// CHECK-CXX-LABEL: define dso_local <vscale x 2 x double> @_Z27test_svread_ver_za128_f64_1u13__SVFloat64_tu10__SVBool_tj(1909// CHECK-CXX-SAME: <vscale x 2 x double> [[ZD:%.*]], <vscale x 16 x i1> [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] {1910// CHECK-CXX-NEXT:  entry:1911// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])1912// CHECK-CXX-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sme.readq.vert.nxv2f64(<vscale x 2 x double> [[ZD]], <vscale x 2 x i1> [[TMP0]], i32 15, i32 [[SLICE_BASE]])1913// CHECK-CXX-NEXT:    ret <vscale x 2 x double> [[TMP1]]1914//1915svfloat64_t test_svread_ver_za128_f64_1(svfloat64_t zd, svbool_t pg, uint32_t slice_base) __arm_streaming __arm_in("za") {1916    return SME_ACLE_FUNC(svread_ver_za128, _f64, _m)(zd, pg, 15, slice_base);1917}1918//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:1919// CHECK: {{.*}}1920