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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 32// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C4// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX5// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -O1 -Werror -o /dev/null %s6 7#include <arm_sme.h>8 9// CHECK-C-LABEL: @test_svstr_vnum_za(10// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv(11// CHECK-NEXT: entry:12// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]], i32 0)13// CHECK-NEXT: ret void14//15void test_svstr_vnum_za(uint32_t slice_base, void *ptr) __arm_in("za") {16 svstr_vnum_za(slice_base, ptr, 0);17}18 19// CHECK-C-LABEL: @test_svstr_vnum_za_1(20// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv(21// CHECK-NEXT: entry:22// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]], i32 15)23// CHECK-NEXT: ret void24//25void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) __arm_in("za") {26 svstr_vnum_za(slice_base, ptr, 15);27}28 29// CHECK-C-LABEL: @test_svstr_za(30// CHECK-CXX-LABEL: @_Z13test_svstr_zajPv(31// CHECK-NEXT: entry:32// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]], i32 0)33// CHECK-NEXT: ret void34//35void test_svstr_za(uint32_t slice_base, void *ptr) __arm_in("za") {36 svstr_za(slice_base, ptr);37}38 39// CHECK-C-LABEL: @test_svstr_vnum_za_var(40// CHECK-CXX-LABEL: @_Z22test_svstr_vnum_za_varjPvl(41// CHECK-NEXT: entry:42// CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[VNUM:%.*]] to i3243// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]], i32 [[TMP0:%.*]])44// CHECK-NEXT: ret void45//46void test_svstr_vnum_za_var(uint32_t slice_base, void *ptr, int64_t vnum) __arm_in("za") {47 svstr_vnum_za(slice_base, ptr, vnum);48}49 50// CHECK-C-LABEL: @test_svstr_vnum_za_2(51// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_2jPv(52// CHECK-NEXT: entry:53// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]], i32 16)54// CHECK-NEXT: ret void55//56void test_svstr_vnum_za_2(uint32_t slice_base, void *ptr) __arm_in("za") {57 svstr_vnum_za(slice_base, ptr, 16);58}59