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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3 4// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s5// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK6// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s7// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK8// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sme.h>11 12#ifdef SVE_OVERLOADED_FORMS13// A simple used,unused... macro, long enough to represent any SVE builtin.14#define SVE_ACLE_FUNC(A1,A2_UNUSED) A115#else16#define SVE_ACLE_FUNC(A1,A2) A1##A217#endif18 19// 8-bit UZPs20 21// CHECK-LABEL: @test_svuzp_s8_x2(22// CHECK-NEXT: entry:23// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzp.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])24// CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]25//26// CPP-CHECK-LABEL: @_Z16test_svuzp_s8_x210svint8x2_t(27// CPP-CHECK-NEXT: entry:28// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzp.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])29// CPP-CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]30//31svint8x2_t test_svuzp_s8_x2(svint8x2_t zn) __arm_streaming {32 return SVE_ACLE_FUNC(svuzp,_s8_x2)(zn);33}34 35// CHECK-LABEL: @test_svuzp_u8_x2(36// CHECK-NEXT: entry:37// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzp.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])38// CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]39//40// CPP-CHECK-LABEL: @_Z16test_svuzp_u8_x211svuint8x2_t(41// CPP-CHECK-NEXT: entry:42// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzp.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])43// CPP-CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]44//45svuint8x2_t test_svuzp_u8_x2(svuint8x2_t zn) __arm_streaming {46 return SVE_ACLE_FUNC(svuzp,_u8_x2)(zn);47}48 49// CHECK-LABEL: @test_svuzp_mf8_x2(50// CHECK-NEXT: entry:51// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzp.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])52// CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]53//54// CPP-CHECK-LABEL: @_Z17test_svuzp_mf8_x213svmfloat8x2_t(55// CPP-CHECK-NEXT: entry:56// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzp.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])57// CPP-CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]58//59svmfloat8x2_t test_svuzp_mf8_x2(svmfloat8x2_t zn) __arm_streaming {60 return SVE_ACLE_FUNC(svuzp,_mf8_x2)(zn);61}62 63// 16-bit UZPs64 65// CHECK-LABEL: @test_svuzp_s16_x2(66// CHECK-NEXT: entry:67// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.uzp.x2.nxv8i16(<vscale x 8 x i16> [[ZN_COERCE0:%.*]], <vscale x 8 x i16> [[ZN_COERCE1:%.*]])68// CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[TMP0]]69//70// CPP-CHECK-LABEL: @_Z17test_svuzp_s16_x211svint16x2_t(71// CPP-CHECK-NEXT: entry:72// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.uzp.x2.nxv8i16(<vscale x 8 x i16> [[ZN_COERCE0:%.*]], <vscale x 8 x i16> [[ZN_COERCE1:%.*]])73// CPP-CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[TMP0]]74//75svint16x2_t test_svuzp_s16_x2(svint16x2_t zn) __arm_streaming {76 return SVE_ACLE_FUNC(svuzp,_s16_x2)(zn);77}78 79// CHECK-LABEL: @test_svuzp_u16_x2(80// CHECK-NEXT: entry:81// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.uzp.x2.nxv8i16(<vscale x 8 x i16> [[ZN_COERCE0:%.*]], <vscale x 8 x i16> [[ZN_COERCE1:%.*]])82// CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[TMP0]]83//84// CPP-CHECK-LABEL: @_Z17test_svuzp_u16_x212svuint16x2_t(85// CPP-CHECK-NEXT: entry:86// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.uzp.x2.nxv8i16(<vscale x 8 x i16> [[ZN_COERCE0:%.*]], <vscale x 8 x i16> [[ZN_COERCE1:%.*]])87// CPP-CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[TMP0]]88//89svuint16x2_t test_svuzp_u16_x2(svuint16x2_t zn) __arm_streaming {90 return SVE_ACLE_FUNC(svuzp,_u16_x2)(zn);91}92 93// CHECK-LABEL: @test_svuzp_f16_x2(94// CHECK-NEXT: entry:95// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x half>, <vscale x 8 x half> } @llvm.aarch64.sve.uzp.x2.nxv8f16(<vscale x 8 x half> [[ZN_COERCE0:%.*]], <vscale x 8 x half> [[ZN_COERCE1:%.*]])96// CHECK-NEXT: ret { <vscale x 8 x half>, <vscale x 8 x half> } [[TMP0]]97//98// CPP-CHECK-LABEL: @_Z17test_svuzp_f16_x213svfloat16x2_t(99// CPP-CHECK-NEXT: entry:100// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x half>, <vscale x 8 x half> } @llvm.aarch64.sve.uzp.x2.nxv8f16(<vscale x 8 x half> [[ZN_COERCE0:%.*]], <vscale x 8 x half> [[ZN_COERCE1:%.*]])101// CPP-CHECK-NEXT: ret { <vscale x 8 x half>, <vscale x 8 x half> } [[TMP0]]102//103svfloat16x2_t test_svuzp_f16_x2(svfloat16x2_t zn) __arm_streaming {104 return SVE_ACLE_FUNC(svuzp,_f16_x2)(zn);105}106 107// CHECK-LABEL: @test_svuzp_bf16_x2(108// CHECK-NEXT: entry:109// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } @llvm.aarch64.sve.uzp.x2.nxv8bf16(<vscale x 8 x bfloat> [[ZN_COERCE0:%.*]], <vscale x 8 x bfloat> [[ZN_COERCE1:%.*]])110// CHECK-NEXT: ret { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP0]]111//112// CPP-CHECK-LABEL: @_Z18test_svuzp_bf16_x214svbfloat16x2_t(113// CPP-CHECK-NEXT: entry:114// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } @llvm.aarch64.sve.uzp.x2.nxv8bf16(<vscale x 8 x bfloat> [[ZN_COERCE0:%.*]], <vscale x 8 x bfloat> [[ZN_COERCE1:%.*]])115// CPP-CHECK-NEXT: ret { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP0]]116//117svbfloat16x2_t test_svuzp_bf16_x2(svbfloat16x2_t zn) __arm_streaming {118 return SVE_ACLE_FUNC(svuzp,_bf16_x2)(zn);119}120 121// 32-bit UZPs122 123// CHECK-LABEL: @test_svuzp_s32_x2(124// CHECK-NEXT: entry:125// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.uzp.x2.nxv4i32(<vscale x 4 x i32> [[ZN_COERCE0:%.*]], <vscale x 4 x i32> [[ZN_COERCE1:%.*]])126// CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[TMP0]]127//128// CPP-CHECK-LABEL: @_Z17test_svuzp_s32_x211svint32x2_t(129// CPP-CHECK-NEXT: entry:130// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.uzp.x2.nxv4i32(<vscale x 4 x i32> [[ZN_COERCE0:%.*]], <vscale x 4 x i32> [[ZN_COERCE1:%.*]])131// CPP-CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[TMP0]]132//133svint32x2_t test_svuzp_s32_x2(svint32x2_t zn) __arm_streaming {134 return SVE_ACLE_FUNC(svuzp,_s32_x2)(zn);135}136 137// CHECK-LABEL: @test_svuzp_u32_x2(138// CHECK-NEXT: entry:139// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.uzp.x2.nxv4i32(<vscale x 4 x i32> [[ZN_COERCE0:%.*]], <vscale x 4 x i32> [[ZN_COERCE1:%.*]])140// CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[TMP0]]141//142// CPP-CHECK-LABEL: @_Z17test_svuzp_u32_x212svuint32x2_t(143// CPP-CHECK-NEXT: entry:144// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.uzp.x2.nxv4i32(<vscale x 4 x i32> [[ZN_COERCE0:%.*]], <vscale x 4 x i32> [[ZN_COERCE1:%.*]])145// CPP-CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[TMP0]]146//147svuint32x2_t test_svuzp_u32_x2(svuint32x2_t zn) __arm_streaming {148 return SVE_ACLE_FUNC(svuzp,_u32_x2)(zn);149}150 151// CHECK-LABEL: @test_svuzp_f32_x2(152// CHECK-NEXT: entry:153// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.uzp.x2.nxv4f32(<vscale x 4 x float> [[ZN_COERCE0:%.*]], <vscale x 4 x float> [[ZN_COERCE1:%.*]])154// CHECK-NEXT: ret { <vscale x 4 x float>, <vscale x 4 x float> } [[TMP0]]155//156// CPP-CHECK-LABEL: @_Z17test_svuzp_f32_x213svfloat32x2_t(157// CPP-CHECK-NEXT: entry:158// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.uzp.x2.nxv4f32(<vscale x 4 x float> [[ZN_COERCE0:%.*]], <vscale x 4 x float> [[ZN_COERCE1:%.*]])159// CPP-CHECK-NEXT: ret { <vscale x 4 x float>, <vscale x 4 x float> } [[TMP0]]160//161svfloat32x2_t test_svuzp_f32_x2(svfloat32x2_t zn) __arm_streaming {162 return SVE_ACLE_FUNC(svuzp,_f32_x2)(zn);163}164 165// 64-bit UZPs166 167// CHECK-LABEL: @test_svuzp_s64_x2(168// CHECK-NEXT: entry:169// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.uzp.x2.nxv2i64(<vscale x 2 x i64> [[ZN_COERCE0:%.*]], <vscale x 2 x i64> [[ZN_COERCE1:%.*]])170// CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP0]]171//172// CPP-CHECK-LABEL: @_Z17test_svuzp_s64_x211svint64x2_t(173// CPP-CHECK-NEXT: entry:174// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.uzp.x2.nxv2i64(<vscale x 2 x i64> [[ZN_COERCE0:%.*]], <vscale x 2 x i64> [[ZN_COERCE1:%.*]])175// CPP-CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP0]]176//177svint64x2_t test_svuzp_s64_x2(svint64x2_t zn) __arm_streaming {178 return SVE_ACLE_FUNC(svuzp,_s64_x2)(zn);179}180 181// CHECK-LABEL: @test_svuzp_u64_x2(182// CHECK-NEXT: entry:183// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.uzp.x2.nxv2i64(<vscale x 2 x i64> [[ZN_COERCE0:%.*]], <vscale x 2 x i64> [[ZN_COERCE1:%.*]])184// CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP0]]185//186// CPP-CHECK-LABEL: @_Z17test_svuzp_u64_x212svuint64x2_t(187// CPP-CHECK-NEXT: entry:188// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.uzp.x2.nxv2i64(<vscale x 2 x i64> [[ZN_COERCE0:%.*]], <vscale x 2 x i64> [[ZN_COERCE1:%.*]])189// CPP-CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP0]]190//191svuint64x2_t test_svuzp_u64_x2(svuint64x2_t zn) __arm_streaming {192 return SVE_ACLE_FUNC(svuzp,_u64_x2)(zn);193}194 195// CHECK-LABEL: @test_svuzp_f64_x2(196// CHECK-NEXT: entry:197// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x double>, <vscale x 2 x double> } @llvm.aarch64.sve.uzp.x2.nxv2f64(<vscale x 2 x double> [[ZN_COERCE0:%.*]], <vscale x 2 x double> [[ZN_COERCE1:%.*]])198// CHECK-NEXT: ret { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP0]]199//200// CPP-CHECK-LABEL: @_Z17test_svuzp_f64_x213svfloat64x2_t(201// CPP-CHECK-NEXT: entry:202// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x double>, <vscale x 2 x double> } @llvm.aarch64.sve.uzp.x2.nxv2f64(<vscale x 2 x double> [[ZN_COERCE0:%.*]], <vscale x 2 x double> [[ZN_COERCE1:%.*]])203// CPP-CHECK-NEXT: ret { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP0]]204//205svfloat64x2_t test_svuzp_f64_x2(svfloat64x2_t zn) __arm_streaming {206 return SVE_ACLE_FUNC(svuzp,_f64_x2)(zn);207}208 209// 128-bit UZPs210 211// CHECK-LABEL: @test_svuzpq_s8_x2(212// CHECK-NEXT: entry:213// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzpq.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])214// CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]215//216// CPP-CHECK-LABEL: @_Z17test_svuzpq_s8_x210svint8x2_t(217// CPP-CHECK-NEXT: entry:218// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzpq.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])219// CPP-CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]220//221svint8x2_t test_svuzpq_s8_x2(svint8x2_t zn) __arm_streaming {222 return SVE_ACLE_FUNC(svuzpq,_s8_x2)(zn);223}224 225// CHECK-LABEL: @test_svuzpq_u8_x2(226// CHECK-NEXT: entry:227// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzpq.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])228// CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]229//230// CPP-CHECK-LABEL: @_Z17test_svuzpq_u8_x211svuint8x2_t(231// CPP-CHECK-NEXT: entry:232// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzpq.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])233// CPP-CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]234//235svuint8x2_t test_svuzpq_u8_x2(svuint8x2_t zn) __arm_streaming {236 return SVE_ACLE_FUNC(svuzpq,_u8_x2)(zn);237}238 239// CHECK-LABEL: @test_svuzpq_mf8_x2(240// CHECK-NEXT: entry:241// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzpq.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])242// CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]243//244// CPP-CHECK-LABEL: @_Z18test_svuzpq_mf8_x213svmfloat8x2_t(245// CPP-CHECK-NEXT: entry:246// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sve.uzpq.x2.nxv16i8(<vscale x 16 x i8> [[ZN_COERCE0:%.*]], <vscale x 16 x i8> [[ZN_COERCE1:%.*]])247// CPP-CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP0]]248//249svmfloat8x2_t test_svuzpq_mf8_x2(svmfloat8x2_t zn) __arm_streaming {250 return SVE_ACLE_FUNC(svuzpq,_mf8_x2)(zn);251}252 253// CHECK-LABEL: @test_svuzpq_s16_x2(254// CHECK-NEXT: entry:255// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.uzpq.x2.nxv8i16(<vscale x 8 x i16> [[ZN_COERCE0:%.*]], <vscale x 8 x i16> [[ZN_COERCE1:%.*]])256// CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[TMP0]]257//258// CPP-CHECK-LABEL: @_Z18test_svuzpq_s16_x211svint16x2_t(259// CPP-CHECK-NEXT: entry:260// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.uzpq.x2.nxv8i16(<vscale x 8 x i16> [[ZN_COERCE0:%.*]], <vscale x 8 x i16> [[ZN_COERCE1:%.*]])261// CPP-CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[TMP0]]262//263svint16x2_t test_svuzpq_s16_x2(svint16x2_t zn) __arm_streaming {264 return SVE_ACLE_FUNC(svuzpq,_s16_x2)(zn);265}266 267// CHECK-LABEL: @test_svuzpq_u16_x2(268// CHECK-NEXT: entry:269// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.uzpq.x2.nxv8i16(<vscale x 8 x i16> [[ZN_COERCE0:%.*]], <vscale x 8 x i16> [[ZN_COERCE1:%.*]])270// CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[TMP0]]271//272// CPP-CHECK-LABEL: @_Z18test_svuzpq_u16_x212svuint16x2_t(273// CPP-CHECK-NEXT: entry:274// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.uzpq.x2.nxv8i16(<vscale x 8 x i16> [[ZN_COERCE0:%.*]], <vscale x 8 x i16> [[ZN_COERCE1:%.*]])275// CPP-CHECK-NEXT: ret { <vscale x 8 x i16>, <vscale x 8 x i16> } [[TMP0]]276//277svuint16x2_t test_svuzpq_u16_x2(svuint16x2_t zn) __arm_streaming {278 return SVE_ACLE_FUNC(svuzpq,_u16_x2)(zn);279}280 281// CHECK-LABEL: @test_svuzpq_f16_x2(282// CHECK-NEXT: entry:283// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x half>, <vscale x 8 x half> } @llvm.aarch64.sve.uzpq.x2.nxv8f16(<vscale x 8 x half> [[ZN_COERCE0:%.*]], <vscale x 8 x half> [[ZN_COERCE1:%.*]])284// CHECK-NEXT: ret { <vscale x 8 x half>, <vscale x 8 x half> } [[TMP0]]285//286// CPP-CHECK-LABEL: @_Z18test_svuzpq_f16_x213svfloat16x2_t(287// CPP-CHECK-NEXT: entry:288// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x half>, <vscale x 8 x half> } @llvm.aarch64.sve.uzpq.x2.nxv8f16(<vscale x 8 x half> [[ZN_COERCE0:%.*]], <vscale x 8 x half> [[ZN_COERCE1:%.*]])289// CPP-CHECK-NEXT: ret { <vscale x 8 x half>, <vscale x 8 x half> } [[TMP0]]290//291svfloat16x2_t test_svuzpq_f16_x2(svfloat16x2_t zn) __arm_streaming {292 return SVE_ACLE_FUNC(svuzpq,_f16_x2)(zn);293}294 295// CHECK-LABEL: @test_svuzpq_bf16_x2(296// CHECK-NEXT: entry:297// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } @llvm.aarch64.sve.uzpq.x2.nxv8bf16(<vscale x 8 x bfloat> [[ZN_COERCE0:%.*]], <vscale x 8 x bfloat> [[ZN_COERCE1:%.*]])298// CHECK-NEXT: ret { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP0]]299//300// CPP-CHECK-LABEL: @_Z19test_svuzpq_bf16_x214svbfloat16x2_t(301// CPP-CHECK-NEXT: entry:302// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } @llvm.aarch64.sve.uzpq.x2.nxv8bf16(<vscale x 8 x bfloat> [[ZN_COERCE0:%.*]], <vscale x 8 x bfloat> [[ZN_COERCE1:%.*]])303// CPP-CHECK-NEXT: ret { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP0]]304//305svbfloat16x2_t test_svuzpq_bf16_x2(svbfloat16x2_t zn) __arm_streaming {306 return SVE_ACLE_FUNC(svuzpq,_bf16_x2)(zn);307}308 309// CHECK-LABEL: @test_svuzpq_s32_x2(310// CHECK-NEXT: entry:311// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.uzpq.x2.nxv4i32(<vscale x 4 x i32> [[ZN_COERCE0:%.*]], <vscale x 4 x i32> [[ZN_COERCE1:%.*]])312// CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[TMP0]]313//314// CPP-CHECK-LABEL: @_Z18test_svuzpq_s32_x211svint32x2_t(315// CPP-CHECK-NEXT: entry:316// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.uzpq.x2.nxv4i32(<vscale x 4 x i32> [[ZN_COERCE0:%.*]], <vscale x 4 x i32> [[ZN_COERCE1:%.*]])317// CPP-CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[TMP0]]318//319svint32x2_t test_svuzpq_s32_x2(svint32x2_t zn) __arm_streaming {320 return SVE_ACLE_FUNC(svuzpq,_s32_x2)(zn);321}322 323// CHECK-LABEL: @test_svuzpq_u32_x2(324// CHECK-NEXT: entry:325// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.uzpq.x2.nxv4i32(<vscale x 4 x i32> [[ZN_COERCE0:%.*]], <vscale x 4 x i32> [[ZN_COERCE1:%.*]])326// CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[TMP0]]327//328// CPP-CHECK-LABEL: @_Z18test_svuzpq_u32_x212svuint32x2_t(329// CPP-CHECK-NEXT: entry:330// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.uzpq.x2.nxv4i32(<vscale x 4 x i32> [[ZN_COERCE0:%.*]], <vscale x 4 x i32> [[ZN_COERCE1:%.*]])331// CPP-CHECK-NEXT: ret { <vscale x 4 x i32>, <vscale x 4 x i32> } [[TMP0]]332//333svuint32x2_t test_svuzpq_u32_x2(svuint32x2_t zn) __arm_streaming {334 return SVE_ACLE_FUNC(svuzpq,_u32_x2)(zn);335}336 337// CHECK-LABEL: @test_svuzpq_f32_x2(338// CHECK-NEXT: entry:339// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.uzpq.x2.nxv4f32(<vscale x 4 x float> [[ZN_COERCE0:%.*]], <vscale x 4 x float> [[ZN_COERCE1:%.*]])340// CHECK-NEXT: ret { <vscale x 4 x float>, <vscale x 4 x float> } [[TMP0]]341//342// CPP-CHECK-LABEL: @_Z18test_svuzpq_f32_x213svfloat32x2_t(343// CPP-CHECK-NEXT: entry:344// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.uzpq.x2.nxv4f32(<vscale x 4 x float> [[ZN_COERCE0:%.*]], <vscale x 4 x float> [[ZN_COERCE1:%.*]])345// CPP-CHECK-NEXT: ret { <vscale x 4 x float>, <vscale x 4 x float> } [[TMP0]]346//347svfloat32x2_t test_svuzpq_f32_x2(svfloat32x2_t zn) __arm_streaming {348 return SVE_ACLE_FUNC(svuzpq,_f32_x2)(zn);349}350 351// CHECK-LABEL: @test_svuzpq_s64_x2(352// CHECK-NEXT: entry:353// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.uzpq.x2.nxv2i64(<vscale x 2 x i64> [[ZN_COERCE0:%.*]], <vscale x 2 x i64> [[ZN_COERCE1:%.*]])354// CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP0]]355//356// CPP-CHECK-LABEL: @_Z18test_svuzpq_s64_x211svint64x2_t(357// CPP-CHECK-NEXT: entry:358// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.uzpq.x2.nxv2i64(<vscale x 2 x i64> [[ZN_COERCE0:%.*]], <vscale x 2 x i64> [[ZN_COERCE1:%.*]])359// CPP-CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP0]]360//361svint64x2_t test_svuzpq_s64_x2(svint64x2_t zn) __arm_streaming {362 return SVE_ACLE_FUNC(svuzpq,_s64_x2)(zn);363}364 365// CHECK-LABEL: @test_svuzpq_u64_x2(366// CHECK-NEXT: entry:367// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.uzpq.x2.nxv2i64(<vscale x 2 x i64> [[ZN_COERCE0:%.*]], <vscale x 2 x i64> [[ZN_COERCE1:%.*]])368// CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP0]]369//370// CPP-CHECK-LABEL: @_Z18test_svuzpq_u64_x212svuint64x2_t(371// CPP-CHECK-NEXT: entry:372// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.aarch64.sve.uzpq.x2.nxv2i64(<vscale x 2 x i64> [[ZN_COERCE0:%.*]], <vscale x 2 x i64> [[ZN_COERCE1:%.*]])373// CPP-CHECK-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP0]]374//375svuint64x2_t test_svuzpq_u64_x2(svuint64x2_t zn) __arm_streaming {376 return SVE_ACLE_FUNC(svuzpq,_u64_x2)(zn);377}378 379// CHECK-LABEL: @test_svuzpq_f64_x2(380// CHECK-NEXT: entry:381// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x double>, <vscale x 2 x double> } @llvm.aarch64.sve.uzpq.x2.nxv2f64(<vscale x 2 x double> [[ZN_COERCE0:%.*]], <vscale x 2 x double> [[ZN_COERCE1:%.*]])382// CHECK-NEXT: ret { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP0]]383//384// CPP-CHECK-LABEL: @_Z18test_svuzpq_f64_x213svfloat64x2_t(385// CPP-CHECK-NEXT: entry:386// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 2 x double>, <vscale x 2 x double> } @llvm.aarch64.sve.uzpq.x2.nxv2f64(<vscale x 2 x double> [[ZN_COERCE0:%.*]], <vscale x 2 x double> [[ZN_COERCE1:%.*]])387// CPP-CHECK-NEXT: ret { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP0]]388//389svfloat64x2_t test_svuzpq_f64_x2(svfloat64x2_t zn) __arm_streaming {390 return SVE_ACLE_FUNC(svuzpq,_f64_x2)(zn);391}392