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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sve.h>11 12#if defined __ARM_FEATURE_SME13#define MODE_ATTR __arm_streaming14#else15#define MODE_ATTR16#endif17 18#ifdef SVE_OVERLOADED_FORMS19// A simple used,unused... macro, long enough to represent any SVE builtin.20#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A321#else22#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A423#endif24 25// CHECK-LABEL: @test_svcls_s8_z(26// CHECK-NEXT: entry:27// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])28// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]29//30// CPP-CHECK-LABEL: @_Z15test_svcls_s8_zu10__SVBool_tu10__SVInt8_t(31// CPP-CHECK-NEXT: entry:32// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])33// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]34//35svuint8_t test_svcls_s8_z(svbool_t pg, svint8_t op) MODE_ATTR36{37 return SVE_ACLE_FUNC(svcls,_s8,_z,)(pg, op);38}39 40// CHECK-LABEL: @test_svcls_s16_z(41// CHECK-NEXT: entry:42// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])43// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])44// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]45//46// CPP-CHECK-LABEL: @_Z16test_svcls_s16_zu10__SVBool_tu11__SVInt16_t(47// CPP-CHECK-NEXT: entry:48// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])49// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])50// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]51//52svuint16_t test_svcls_s16_z(svbool_t pg, svint16_t op) MODE_ATTR53{54 return SVE_ACLE_FUNC(svcls,_s16,_z,)(pg, op);55}56 57// CHECK-LABEL: @test_svcls_s32_z(58// CHECK-NEXT: entry:59// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])60// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])61// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]62//63// CPP-CHECK-LABEL: @_Z16test_svcls_s32_zu10__SVBool_tu11__SVInt32_t(64// CPP-CHECK-NEXT: entry:65// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])66// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])67// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]68//69svuint32_t test_svcls_s32_z(svbool_t pg, svint32_t op) MODE_ATTR70{71 return SVE_ACLE_FUNC(svcls,_s32,_z,)(pg, op);72}73 74// CHECK-LABEL: @test_svcls_s64_z(75// CHECK-NEXT: entry:76// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])77// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])78// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]79//80// CPP-CHECK-LABEL: @_Z16test_svcls_s64_zu10__SVBool_tu11__SVInt64_t(81// CPP-CHECK-NEXT: entry:82// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])83// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])84// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]85//86svuint64_t test_svcls_s64_z(svbool_t pg, svint64_t op) MODE_ATTR87{88 return SVE_ACLE_FUNC(svcls,_s64,_z,)(pg, op);89}90 91// CHECK-LABEL: @test_svcls_s8_m(92// CHECK-NEXT: entry:93// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])94// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]95//96// CPP-CHECK-LABEL: @_Z15test_svcls_s8_mu11__SVUint8_tu10__SVBool_tu10__SVInt8_t(97// CPP-CHECK-NEXT: entry:98// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])99// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]100//101svuint8_t test_svcls_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op) MODE_ATTR102{103 return SVE_ACLE_FUNC(svcls,_s8,_m,)(inactive, pg, op);104}105 106// CHECK-LABEL: @test_svcls_s16_m(107// CHECK-NEXT: entry:108// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])109// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])110// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]111//112// CPP-CHECK-LABEL: @_Z16test_svcls_s16_mu12__SVUint16_tu10__SVBool_tu11__SVInt16_t(113// CPP-CHECK-NEXT: entry:114// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])115// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])116// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]117//118svuint16_t test_svcls_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op) MODE_ATTR119{120 return SVE_ACLE_FUNC(svcls,_s16,_m,)(inactive, pg, op);121}122 123// CHECK-LABEL: @test_svcls_s32_m(124// CHECK-NEXT: entry:125// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])126// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])127// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]128//129// CPP-CHECK-LABEL: @_Z16test_svcls_s32_mu12__SVUint32_tu10__SVBool_tu11__SVInt32_t(130// CPP-CHECK-NEXT: entry:131// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])132// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])133// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]134//135svuint32_t test_svcls_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op) MODE_ATTR136{137 return SVE_ACLE_FUNC(svcls,_s32,_m,)(inactive, pg, op);138}139 140// CHECK-LABEL: @test_svcls_s64_m(141// CHECK-NEXT: entry:142// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])143// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])144// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]145//146// CPP-CHECK-LABEL: @_Z16test_svcls_s64_mu12__SVUint64_tu10__SVBool_tu11__SVInt64_t(147// CPP-CHECK-NEXT: entry:148// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])149// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])150// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]151//152svuint64_t test_svcls_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op) MODE_ATTR153{154 return SVE_ACLE_FUNC(svcls,_s64,_m,)(inactive, pg, op);155}156 157// CHECK-LABEL: @test_svcls_s8_x(158// CHECK-NEXT: entry:159// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])160// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]161//162// CPP-CHECK-LABEL: @_Z15test_svcls_s8_xu10__SVBool_tu10__SVInt8_t(163// CPP-CHECK-NEXT: entry:164// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.cls.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])165// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]166//167svuint8_t test_svcls_s8_x(svbool_t pg, svint8_t op) MODE_ATTR168{169 return SVE_ACLE_FUNC(svcls,_s8,_x,)(pg, op);170}171 172// CHECK-LABEL: @test_svcls_s16_x(173// CHECK-NEXT: entry:174// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])175// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])176// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]177//178// CPP-CHECK-LABEL: @_Z16test_svcls_s16_xu10__SVBool_tu11__SVInt16_t(179// CPP-CHECK-NEXT: entry:180// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])181// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.cls.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])182// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]183//184svuint16_t test_svcls_s16_x(svbool_t pg, svint16_t op) MODE_ATTR185{186 return SVE_ACLE_FUNC(svcls,_s16,_x,)(pg, op);187}188 189// CHECK-LABEL: @test_svcls_s32_x(190// CHECK-NEXT: entry:191// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])192// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])193// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]194//195// CPP-CHECK-LABEL: @_Z16test_svcls_s32_xu10__SVBool_tu11__SVInt32_t(196// CPP-CHECK-NEXT: entry:197// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])198// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.cls.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])199// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]200//201svuint32_t test_svcls_s32_x(svbool_t pg, svint32_t op) MODE_ATTR202{203 return SVE_ACLE_FUNC(svcls,_s32,_x,)(pg, op);204}205 206// CHECK-LABEL: @test_svcls_s64_x(207// CHECK-NEXT: entry:208// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])209// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])210// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]211//212// CPP-CHECK-LABEL: @_Z16test_svcls_s64_xu10__SVBool_tu11__SVInt64_t(213// CPP-CHECK-NEXT: entry:214// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])215// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.cls.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])216// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]217//218svuint64_t test_svcls_s64_x(svbool_t pg, svint64_t op) MODE_ATTR219{220 return SVE_ACLE_FUNC(svcls,_s64,_x,)(pg, op);221}222