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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sve.h>11 12#if defined __ARM_FEATURE_SME13#define MODE_ATTR __arm_streaming14#else15#define MODE_ATTR16#endif17 18#ifdef SVE_OVERLOADED_FORMS19// A simple used,unused... macro, long enough to represent any SVE builtin.20#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A321#else22#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A423#endif24 25// CHECK-LABEL: @test_svdot_s32(26// CHECK-NEXT: entry:27// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])28// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]29//30// CPP-CHECK-LABEL: @_Z14test_svdot_s32u11__SVInt32_tu10__SVInt8_tS0_(31// CPP-CHECK-NEXT: entry:32// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])33// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]34//35svint32_t test_svdot_s32(svint32_t op1, svint8_t op2, svint8_t op3) MODE_ATTR36{37 return SVE_ACLE_FUNC(svdot,_s32,,)(op1, op2, op3);38}39 40// CHECK-LABEL: @test_svdot_s64(41// CHECK-NEXT: entry:42// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])43// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]44//45// CPP-CHECK-LABEL: @_Z14test_svdot_s64u11__SVInt64_tu11__SVInt16_tS0_(46// CPP-CHECK-NEXT: entry:47// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])48// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]49//50svint64_t test_svdot_s64(svint64_t op1, svint16_t op2, svint16_t op3) MODE_ATTR51{52 return SVE_ACLE_FUNC(svdot,_s64,,)(op1, op2, op3);53}54 55// CHECK-LABEL: @test_svdot_u32(56// CHECK-NEXT: entry:57// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.udot.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])58// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]59//60// CPP-CHECK-LABEL: @_Z14test_svdot_u32u12__SVUint32_tu11__SVUint8_tS0_(61// CPP-CHECK-NEXT: entry:62// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.udot.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])63// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]64//65svuint32_t test_svdot_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) MODE_ATTR66{67 return SVE_ACLE_FUNC(svdot,_u32,,)(op1, op2, op3);68}69 70// CHECK-LABEL: @test_svdot_u64(71// CHECK-NEXT: entry:72// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.udot.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])73// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]74//75// CPP-CHECK-LABEL: @_Z14test_svdot_u64u12__SVUint64_tu12__SVUint16_tS0_(76// CPP-CHECK-NEXT: entry:77// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.udot.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])78// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]79//80svuint64_t test_svdot_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) MODE_ATTR81{82 return SVE_ACLE_FUNC(svdot,_u64,,)(op1, op2, op3);83}84 85// CHECK-LABEL: @test_svdot_n_s32(86// CHECK-NEXT: entry:87// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP3:%.*]], i64 088// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer89// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])90// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]91//92// CPP-CHECK-LABEL: @_Z16test_svdot_n_s32u11__SVInt32_tu10__SVInt8_ta(93// CPP-CHECK-NEXT: entry:94// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP3:%.*]], i64 095// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer96// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])97// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]98//99svint32_t test_svdot_n_s32(svint32_t op1, svint8_t op2, int8_t op3) MODE_ATTR100{101 return SVE_ACLE_FUNC(svdot,_n_s32,,)(op1, op2, op3);102}103 104// CHECK-LABEL: @test_svdot_n_s64(105// CHECK-NEXT: entry:106// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP3:%.*]], i64 0107// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer108// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])109// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]110//111// CPP-CHECK-LABEL: @_Z16test_svdot_n_s64u11__SVInt64_tu11__SVInt16_ts(112// CPP-CHECK-NEXT: entry:113// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP3:%.*]], i64 0114// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer115// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])116// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]117//118svint64_t test_svdot_n_s64(svint64_t op1, svint16_t op2, int16_t op3) MODE_ATTR119{120 return SVE_ACLE_FUNC(svdot,_n_s64,,)(op1, op2, op3);121}122 123// CHECK-LABEL: @test_svdot_n_u32(124// CHECK-NEXT: entry:125// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP3:%.*]], i64 0126// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer127// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.udot.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])128// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]129//130// CPP-CHECK-LABEL: @_Z16test_svdot_n_u32u12__SVUint32_tu11__SVUint8_th(131// CPP-CHECK-NEXT: entry:132// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP3:%.*]], i64 0133// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer134// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.udot.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])135// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]136//137svuint32_t test_svdot_n_u32(svuint32_t op1, svuint8_t op2, uint8_t op3) MODE_ATTR138{139 return SVE_ACLE_FUNC(svdot,_n_u32,,)(op1, op2, op3);140}141 142// CHECK-LABEL: @test_svdot_n_u64(143// CHECK-NEXT: entry:144// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP3:%.*]], i64 0145// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer146// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.udot.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])147// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]148//149// CPP-CHECK-LABEL: @_Z16test_svdot_n_u64u12__SVUint64_tu12__SVUint16_tt(150// CPP-CHECK-NEXT: entry:151// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP3:%.*]], i64 0152// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer153// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.udot.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])154// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]155//156svuint64_t test_svdot_n_u64(svuint64_t op1, svuint16_t op2, uint16_t op3) MODE_ATTR157{158 return SVE_ACLE_FUNC(svdot,_n_u64,,)(op1, op2, op3);159}160 161// CHECK-LABEL: @test_svdot_lane_s32(162// CHECK-NEXT: entry:163// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]], i32 0)164// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]165//166// CPP-CHECK-LABEL: @_Z19test_svdot_lane_s32u11__SVInt32_tu10__SVInt8_tS0_(167// CPP-CHECK-NEXT: entry:168// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]], i32 0)169// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]170//171svint32_t test_svdot_lane_s32(svint32_t op1, svint8_t op2, svint8_t op3) MODE_ATTR172{173 return SVE_ACLE_FUNC(svdot_lane,_s32,,)(op1, op2, op3, 0);174}175 176// CHECK-LABEL: @test_svdot_lane_s32_1(177// CHECK-NEXT: entry:178// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]], i32 3)179// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]180//181// CPP-CHECK-LABEL: @_Z21test_svdot_lane_s32_1u11__SVInt32_tu10__SVInt8_tS0_(182// CPP-CHECK-NEXT: entry:183// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]], i32 3)184// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]185//186svint32_t test_svdot_lane_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) MODE_ATTR187{188 return SVE_ACLE_FUNC(svdot_lane,_s32,,)(op1, op2, op3, 3);189}190 191// CHECK-LABEL: @test_svdot_lane_s64(192// CHECK-NEXT: entry:193// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 0)194// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]195//196// CPP-CHECK-LABEL: @_Z19test_svdot_lane_s64u11__SVInt64_tu11__SVInt16_tS0_(197// CPP-CHECK-NEXT: entry:198// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 0)199// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]200//201svint64_t test_svdot_lane_s64(svint64_t op1, svint16_t op2, svint16_t op3) MODE_ATTR202{203 return SVE_ACLE_FUNC(svdot_lane,_s64,,)(op1, op2, op3, 0);204}205 206// CHECK-LABEL: @test_svdot_lane_s64_1(207// CHECK-NEXT: entry:208// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 1)209// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]210//211// CPP-CHECK-LABEL: @_Z21test_svdot_lane_s64_1u11__SVInt64_tu11__SVInt16_tS0_(212// CPP-CHECK-NEXT: entry:213// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 1)214// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]215//216svint64_t test_svdot_lane_s64_1(svint64_t op1, svint16_t op2, svint16_t op3) MODE_ATTR217{218 return SVE_ACLE_FUNC(svdot_lane,_s64,,)(op1, op2, op3, 1);219}220 221// CHECK-LABEL: @test_svdot_lane_u32(222// CHECK-NEXT: entry:223// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.udot.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]], i32 3)224// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]225//226// CPP-CHECK-LABEL: @_Z19test_svdot_lane_u32u12__SVUint32_tu11__SVUint8_tS0_(227// CPP-CHECK-NEXT: entry:228// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.udot.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]], i32 3)229// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]230//231svuint32_t test_svdot_lane_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) MODE_ATTR232{233 return SVE_ACLE_FUNC(svdot_lane,_u32,,)(op1, op2, op3, 3);234}235 236// CHECK-LABEL: @test_svdot_lane_u64(237// CHECK-NEXT: entry:238// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.udot.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 1)239// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]240//241// CPP-CHECK-LABEL: @_Z19test_svdot_lane_u64u12__SVUint64_tu12__SVUint16_tS0_(242// CPP-CHECK-NEXT: entry:243// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.udot.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 1)244// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]245//246svuint64_t test_svdot_lane_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) MODE_ATTR247{248 return SVE_ACLE_FUNC(svdot_lane,_u64,,)(op1, op2, op3, 1);249}250