1131 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s8// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -o /dev/null %s9 10#include <arm_sve.h>11 12#if defined __ARM_FEATURE_SME13#define MODE_ATTR __arm_streaming14#else15#define MODE_ATTR16#endif17 18#ifdef SVE_OVERLOADED_FORMS19// A simple used,unused... macro, long enough to represent any SVE builtin.20#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A321#else22#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A423#endif24 25// CHECK-LABEL: @test_svdup_n_s8(26// CHECK-NEXT: entry:27// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP:%.*]], i64 028// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer29// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]30//31// CPP-CHECK-LABEL: @_Z15test_svdup_n_s8a(32// CPP-CHECK-NEXT: entry:33// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP:%.*]], i64 034// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer35// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]36//37svint8_t test_svdup_n_s8(int8_t op) MODE_ATTR38{39 return SVE_ACLE_FUNC(svdup,_n,_s8,)(op);40}41 42// CHECK-LABEL: @test_svdup_n_s16(43// CHECK-NEXT: entry:44// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP:%.*]], i64 045// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer46// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]47//48// CPP-CHECK-LABEL: @_Z16test_svdup_n_s16s(49// CPP-CHECK-NEXT: entry:50// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP:%.*]], i64 051// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer52// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]53//54svint16_t test_svdup_n_s16(int16_t op) MODE_ATTR55{56 return SVE_ACLE_FUNC(svdup,_n,_s16,)(op);57}58 59// CHECK-LABEL: @test_svdup_n_s32(60// CHECK-NEXT: entry:61// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP:%.*]], i64 062// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer63// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]64//65// CPP-CHECK-LABEL: @_Z16test_svdup_n_s32i(66// CPP-CHECK-NEXT: entry:67// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP:%.*]], i64 068// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer69// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]70//71svint32_t test_svdup_n_s32(int32_t op) MODE_ATTR72{73 return SVE_ACLE_FUNC(svdup,_n,_s32,)(op);74}75 76// CHECK-LABEL: @test_svdup_n_s64(77// CHECK-NEXT: entry:78// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP:%.*]], i64 079// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer80// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]81//82// CPP-CHECK-LABEL: @_Z16test_svdup_n_s64l(83// CPP-CHECK-NEXT: entry:84// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP:%.*]], i64 085// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer86// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]87//88svint64_t test_svdup_n_s64(int64_t op) MODE_ATTR89{90 return SVE_ACLE_FUNC(svdup,_n,_s64,)(op);91}92 93// CHECK-LABEL: @test_svdup_n_u8(94// CHECK-NEXT: entry:95// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP:%.*]], i64 096// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer97// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]98//99// CPP-CHECK-LABEL: @_Z15test_svdup_n_u8h(100// CPP-CHECK-NEXT: entry:101// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP:%.*]], i64 0102// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer103// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]104//105svuint8_t test_svdup_n_u8(uint8_t op) MODE_ATTR106{107 return SVE_ACLE_FUNC(svdup,_n,_u8,)(op);108}109 110// CHECK-LABEL: @test_svdup_n_u16(111// CHECK-NEXT: entry:112// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP:%.*]], i64 0113// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer114// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]115//116// CPP-CHECK-LABEL: @_Z16test_svdup_n_u16t(117// CPP-CHECK-NEXT: entry:118// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP:%.*]], i64 0119// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer120// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]121//122svuint16_t test_svdup_n_u16(uint16_t op) MODE_ATTR123{124 return SVE_ACLE_FUNC(svdup,_n,_u16,)(op);125}126 127// CHECK-LABEL: @test_svdup_n_u32(128// CHECK-NEXT: entry:129// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP:%.*]], i64 0130// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer131// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]132//133// CPP-CHECK-LABEL: @_Z16test_svdup_n_u32j(134// CPP-CHECK-NEXT: entry:135// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP:%.*]], i64 0136// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer137// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]138//139svuint32_t test_svdup_n_u32(uint32_t op) MODE_ATTR140{141 return SVE_ACLE_FUNC(svdup,_n,_u32,)(op);142}143 144// CHECK-LABEL: @test_svdup_n_u64(145// CHECK-NEXT: entry:146// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP:%.*]], i64 0147// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer148// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]149//150// CPP-CHECK-LABEL: @_Z16test_svdup_n_u64m(151// CPP-CHECK-NEXT: entry:152// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP:%.*]], i64 0153// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer154// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]155//156svuint64_t test_svdup_n_u64(uint64_t op) MODE_ATTR157{158 return SVE_ACLE_FUNC(svdup,_n,_u64,)(op);159}160 161// CHECK-LABEL: @test_svdup_n_f16(162// CHECK-NEXT: entry:163// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x half> poison, half [[OP:%.*]], i64 0164// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x half> [[DOTSPLATINSERT]], <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer165// CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]166//167// CPP-CHECK-LABEL: @_Z16test_svdup_n_f16Dh(168// CPP-CHECK-NEXT: entry:169// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x half> poison, half [[OP:%.*]], i64 0170// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x half> [[DOTSPLATINSERT]], <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer171// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]172//173svfloat16_t test_svdup_n_f16(float16_t op) MODE_ATTR174{175 return SVE_ACLE_FUNC(svdup,_n,_f16,)(op);176}177 178// CHECK-LABEL: @test_svdup_n_f32(179// CHECK-NEXT: entry:180// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[OP:%.*]], i64 0181// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x float> [[DOTSPLATINSERT]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer182// CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]183//184// CPP-CHECK-LABEL: @_Z16test_svdup_n_f32f(185// CPP-CHECK-NEXT: entry:186// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[OP:%.*]], i64 0187// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x float> [[DOTSPLATINSERT]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer188// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]189//190svfloat32_t test_svdup_n_f32(float32_t op) MODE_ATTR191{192 return SVE_ACLE_FUNC(svdup,_n,_f32,)(op);193}194 195// CHECK-LABEL: @test_svdup_n_f64(196// CHECK-NEXT: entry:197// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x double> poison, double [[OP:%.*]], i64 0198// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x double> [[DOTSPLATINSERT]], <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer199// CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]200//201// CPP-CHECK-LABEL: @_Z16test_svdup_n_f64d(202// CPP-CHECK-NEXT: entry:203// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x double> poison, double [[OP:%.*]], i64 0204// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x double> [[DOTSPLATINSERT]], <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer205// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]206//207svfloat64_t test_svdup_n_f64(float64_t op) MODE_ATTR208{209 return SVE_ACLE_FUNC(svdup,_n,_f64,)(op);210}211 212// CHECK-LABEL: @test_svdup_n_s8_z(213// CHECK-NEXT: entry:214// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])215// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]216//217// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_zu10__SVBool_ta(218// CPP-CHECK-NEXT: entry:219// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])220// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]221//222svint8_t test_svdup_n_s8_z(svbool_t pg, int8_t op) MODE_ATTR223{224 return SVE_ACLE_FUNC(svdup,_n,_s8_z,)(pg, op);225}226 227// CHECK-LABEL: @test_svdup_n_s16_z(228// CHECK-NEXT: entry:229// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])230// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])231// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]232//233// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_zu10__SVBool_ts(234// CPP-CHECK-NEXT: entry:235// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])236// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])237// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]238//239svint16_t test_svdup_n_s16_z(svbool_t pg, int16_t op) MODE_ATTR240{241 return SVE_ACLE_FUNC(svdup,_n,_s16_z,)(pg, op);242}243 244// CHECK-LABEL: @test_svdup_n_s32_z(245// CHECK-NEXT: entry:246// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])247// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])248// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]249//250// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_zu10__SVBool_ti(251// CPP-CHECK-NEXT: entry:252// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])253// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])254// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]255//256svint32_t test_svdup_n_s32_z(svbool_t pg, int32_t op) MODE_ATTR257{258 return SVE_ACLE_FUNC(svdup,_n,_s32_z,)(pg, op);259}260 261// CHECK-LABEL: @test_svdup_n_s64_z(262// CHECK-NEXT: entry:263// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])264// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])265// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]266//267// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_zu10__SVBool_tl(268// CPP-CHECK-NEXT: entry:269// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])270// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])271// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]272//273svint64_t test_svdup_n_s64_z(svbool_t pg, int64_t op) MODE_ATTR274{275 return SVE_ACLE_FUNC(svdup,_n,_s64_z,)(pg, op);276}277 278// CHECK-LABEL: @test_svdup_n_u8_z(279// CHECK-NEXT: entry:280// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])281// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]282//283// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_zu10__SVBool_th(284// CPP-CHECK-NEXT: entry:285// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])286// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]287//288svuint8_t test_svdup_n_u8_z(svbool_t pg, uint8_t op) MODE_ATTR289{290 return SVE_ACLE_FUNC(svdup,_n,_u8_z,)(pg, op);291}292 293// CHECK-LABEL: @test_svdup_n_u16_z(294// CHECK-NEXT: entry:295// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])296// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])297// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]298//299// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_zu10__SVBool_tt(300// CPP-CHECK-NEXT: entry:301// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])302// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])303// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]304//305svuint16_t test_svdup_n_u16_z(svbool_t pg, uint16_t op) MODE_ATTR306{307 return SVE_ACLE_FUNC(svdup,_n,_u16_z,)(pg, op);308}309 310// CHECK-LABEL: @test_svdup_n_u32_z(311// CHECK-NEXT: entry:312// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])313// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])314// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]315//316// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_zu10__SVBool_tj(317// CPP-CHECK-NEXT: entry:318// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])319// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])320// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]321//322svuint32_t test_svdup_n_u32_z(svbool_t pg, uint32_t op) MODE_ATTR323{324 return SVE_ACLE_FUNC(svdup,_n,_u32_z,)(pg, op);325}326 327// CHECK-LABEL: @test_svdup_n_u64_z(328// CHECK-NEXT: entry:329// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])330// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])331// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]332//333// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_zu10__SVBool_tm(334// CPP-CHECK-NEXT: entry:335// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])336// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])337// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]338//339svuint64_t test_svdup_n_u64_z(svbool_t pg, uint64_t op) MODE_ATTR340{341 return SVE_ACLE_FUNC(svdup,_n,_u64_z,)(pg, op);342}343 344// CHECK-LABEL: @test_svdup_n_f16_z(345// CHECK-NEXT: entry:346// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])347// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]])348// CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]349//350// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_zu10__SVBool_tDh(351// CPP-CHECK-NEXT: entry:352// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])353// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]])354// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]355//356svfloat16_t test_svdup_n_f16_z(svbool_t pg, float16_t op) MODE_ATTR357{358 return SVE_ACLE_FUNC(svdup,_n,_f16_z,)(pg, op);359}360 361// CHECK-LABEL: @test_svdup_n_f32_z(362// CHECK-NEXT: entry:363// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])364// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]])365// CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]366//367// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_zu10__SVBool_tf(368// CPP-CHECK-NEXT: entry:369// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])370// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]])371// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]372//373svfloat32_t test_svdup_n_f32_z(svbool_t pg, float32_t op) MODE_ATTR374{375 return SVE_ACLE_FUNC(svdup,_n,_f32_z,)(pg, op);376}377 378// CHECK-LABEL: @test_svdup_n_f64_z(379// CHECK-NEXT: entry:380// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])381// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]])382// CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]383//384// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_zu10__SVBool_td(385// CPP-CHECK-NEXT: entry:386// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])387// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]])388// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]389//390svfloat64_t test_svdup_n_f64_z(svbool_t pg, float64_t op) MODE_ATTR391{392 return SVE_ACLE_FUNC(svdup,_n,_f64_z,)(pg, op);393}394 395// CHECK-LABEL: @test_svdup_n_s8_m(396// CHECK-NEXT: entry:397// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])398// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]399//400// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_mu10__SVInt8_tu10__SVBool_ta(401// CPP-CHECK-NEXT: entry:402// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])403// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]404//405svint8_t test_svdup_n_s8_m(svint8_t inactive, svbool_t pg, int8_t op) MODE_ATTR406{407 return SVE_ACLE_FUNC(svdup,_n,_s8_m,)(inactive, pg, op);408}409 410// CHECK-LABEL: @test_svdup_n_s16_m(411// CHECK-NEXT: entry:412// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])413// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])414// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]415//416// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_mu11__SVInt16_tu10__SVBool_ts(417// CPP-CHECK-NEXT: entry:418// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])419// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])420// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]421//422svint16_t test_svdup_n_s16_m(svint16_t inactive, svbool_t pg, int16_t op) MODE_ATTR423{424 return SVE_ACLE_FUNC(svdup,_n,_s16_m,)(inactive, pg, op);425}426 427// CHECK-LABEL: @test_svdup_n_s32_m(428// CHECK-NEXT: entry:429// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])430// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])431// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]432//433// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_mu11__SVInt32_tu10__SVBool_ti(434// CPP-CHECK-NEXT: entry:435// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])436// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])437// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]438//439svint32_t test_svdup_n_s32_m(svint32_t inactive, svbool_t pg, int32_t op) MODE_ATTR440{441 return SVE_ACLE_FUNC(svdup,_n,_s32_m,)(inactive, pg, op);442}443 444// CHECK-LABEL: @test_svdup_n_s64_m(445// CHECK-NEXT: entry:446// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])447// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])448// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]449//450// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_mu11__SVInt64_tu10__SVBool_tl(451// CPP-CHECK-NEXT: entry:452// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])453// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])454// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]455//456svint64_t test_svdup_n_s64_m(svint64_t inactive, svbool_t pg, int64_t op) MODE_ATTR457{458 return SVE_ACLE_FUNC(svdup,_n,_s64_m,)(inactive, pg, op);459}460 461// CHECK-LABEL: @test_svdup_n_u8_m(462// CHECK-NEXT: entry:463// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])464// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]465//466// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_mu11__SVUint8_tu10__SVBool_th(467// CPP-CHECK-NEXT: entry:468// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])469// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]470//471svuint8_t test_svdup_n_u8_m(svuint8_t inactive, svbool_t pg, uint8_t op) MODE_ATTR472{473 return SVE_ACLE_FUNC(svdup,_n,_u8_m,)(inactive, pg, op);474}475 476// CHECK-LABEL: @test_svdup_n_u16_m(477// CHECK-NEXT: entry:478// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])479// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])480// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]481//482// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_mu12__SVUint16_tu10__SVBool_tt(483// CPP-CHECK-NEXT: entry:484// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])485// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])486// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]487//488svuint16_t test_svdup_n_u16_m(svuint16_t inactive, svbool_t pg, uint16_t op) MODE_ATTR489{490 return SVE_ACLE_FUNC(svdup,_n,_u16_m,)(inactive, pg, op);491}492 493// CHECK-LABEL: @test_svdup_n_u32_m(494// CHECK-NEXT: entry:495// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])496// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])497// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]498//499// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_mu12__SVUint32_tu10__SVBool_tj(500// CPP-CHECK-NEXT: entry:501// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])502// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])503// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]504//505svuint32_t test_svdup_n_u32_m(svuint32_t inactive, svbool_t pg, uint32_t op) MODE_ATTR506{507 return SVE_ACLE_FUNC(svdup,_n,_u32_m,)(inactive, pg, op);508}509 510// CHECK-LABEL: @test_svdup_n_u64_m(511// CHECK-NEXT: entry:512// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])513// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])514// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]515//516// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_mu12__SVUint64_tu10__SVBool_tm(517// CPP-CHECK-NEXT: entry:518// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])519// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])520// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]521//522svuint64_t test_svdup_n_u64_m(svuint64_t inactive, svbool_t pg, uint64_t op) MODE_ATTR523{524 return SVE_ACLE_FUNC(svdup,_n,_u64_m,)(inactive, pg, op);525}526 527// CHECK-LABEL: @test_svdup_n_f16_m(528// CHECK-NEXT: entry:529// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])530// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]])531// CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]532//533// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_mu13__SVFloat16_tu10__SVBool_tDh(534// CPP-CHECK-NEXT: entry:535// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])536// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]])537// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]538//539svfloat16_t test_svdup_n_f16_m(svfloat16_t inactive, svbool_t pg, float16_t op) MODE_ATTR540{541 return SVE_ACLE_FUNC(svdup,_n,_f16_m,)(inactive, pg, op);542}543 544// CHECK-LABEL: @test_svdup_n_f32_m(545// CHECK-NEXT: entry:546// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])547// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]])548// CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]549//550// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_mu13__SVFloat32_tu10__SVBool_tf(551// CPP-CHECK-NEXT: entry:552// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])553// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]])554// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]555//556svfloat32_t test_svdup_n_f32_m(svfloat32_t inactive, svbool_t pg, float32_t op) MODE_ATTR557{558 return SVE_ACLE_FUNC(svdup,_n,_f32_m,)(inactive, pg, op);559}560 561// CHECK-LABEL: @test_svdup_n_f64_m(562// CHECK-NEXT: entry:563// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])564// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]])565// CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]566//567// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_mu13__SVFloat64_tu10__SVBool_td(568// CPP-CHECK-NEXT: entry:569// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])570// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]])571// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]572//573svfloat64_t test_svdup_n_f64_m(svfloat64_t inactive, svbool_t pg, float64_t op) MODE_ATTR574{575 return SVE_ACLE_FUNC(svdup,_n,_f64_m,)(inactive, pg, op);576}577 578// CHECK-LABEL: @test_svdup_n_s8_x(579// CHECK-NEXT: entry:580// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])581// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]582//583// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_xu10__SVBool_ta(584// CPP-CHECK-NEXT: entry:585// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])586// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]587//588svint8_t test_svdup_n_s8_x(svbool_t pg, int8_t op) MODE_ATTR589{590 return SVE_ACLE_FUNC(svdup,_n,_s8_x,)(pg, op);591}592 593// CHECK-LABEL: @test_svdup_n_s16_x(594// CHECK-NEXT: entry:595// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])596// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])597// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]598//599// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_xu10__SVBool_ts(600// CPP-CHECK-NEXT: entry:601// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])602// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])603// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]604//605svint16_t test_svdup_n_s16_x(svbool_t pg, int16_t op) MODE_ATTR606{607 return SVE_ACLE_FUNC(svdup,_n,_s16_x,)(pg, op);608}609 610// CHECK-LABEL: @test_svdup_n_s32_x(611// CHECK-NEXT: entry:612// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])613// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])614// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]615//616// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_xu10__SVBool_ti(617// CPP-CHECK-NEXT: entry:618// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])619// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])620// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]621//622svint32_t test_svdup_n_s32_x(svbool_t pg, int32_t op) MODE_ATTR623{624 return SVE_ACLE_FUNC(svdup,_n,_s32_x,)(pg, op);625}626 627// CHECK-LABEL: @test_svdup_n_s64_x(628// CHECK-NEXT: entry:629// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])630// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])631// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]632//633// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_xu10__SVBool_tl(634// CPP-CHECK-NEXT: entry:635// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])636// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])637// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]638//639svint64_t test_svdup_n_s64_x(svbool_t pg, int64_t op) MODE_ATTR640{641 return SVE_ACLE_FUNC(svdup,_n,_s64_x,)(pg, op);642}643 644// CHECK-LABEL: @test_svdup_n_u8_x(645// CHECK-NEXT: entry:646// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])647// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]648//649// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_xu10__SVBool_th(650// CPP-CHECK-NEXT: entry:651// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]])652// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]653//654svuint8_t test_svdup_n_u8_x(svbool_t pg, uint8_t op) MODE_ATTR655{656 return SVE_ACLE_FUNC(svdup,_n,_u8_x,)(pg, op);657}658 659// CHECK-LABEL: @test_svdup_n_u16_x(660// CHECK-NEXT: entry:661// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])662// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])663// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]664//665// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_xu10__SVBool_tt(666// CPP-CHECK-NEXT: entry:667// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])668// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]])669// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]670//671svuint16_t test_svdup_n_u16_x(svbool_t pg, uint16_t op) MODE_ATTR672{673 return SVE_ACLE_FUNC(svdup,_n,_u16_x,)(pg, op);674}675 676// CHECK-LABEL: @test_svdup_n_u32_x(677// CHECK-NEXT: entry:678// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])679// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])680// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]681//682// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_xu10__SVBool_tj(683// CPP-CHECK-NEXT: entry:684// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])685// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]])686// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]687//688svuint32_t test_svdup_n_u32_x(svbool_t pg, uint32_t op) MODE_ATTR689{690 return SVE_ACLE_FUNC(svdup,_n,_u32_x,)(pg, op);691}692 693// CHECK-LABEL: @test_svdup_n_u64_x(694// CHECK-NEXT: entry:695// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])696// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])697// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]698//699// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_xu10__SVBool_tm(700// CPP-CHECK-NEXT: entry:701// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])702// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]])703// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]704//705svuint64_t test_svdup_n_u64_x(svbool_t pg, uint64_t op) MODE_ATTR706{707 return SVE_ACLE_FUNC(svdup,_n,_u64_x,)(pg, op);708}709 710// CHECK-LABEL: @test_svdup_n_f16_x(711// CHECK-NEXT: entry:712// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])713// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]])714// CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]715//716// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_xu10__SVBool_tDh(717// CPP-CHECK-NEXT: entry:718// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])719// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]])720// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]721//722svfloat16_t test_svdup_n_f16_x(svbool_t pg, float16_t op) MODE_ATTR723{724 return SVE_ACLE_FUNC(svdup,_n,_f16_x,)(pg, op);725}726 727// CHECK-LABEL: @test_svdup_n_f32_x(728// CHECK-NEXT: entry:729// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])730// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]])731// CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]732//733// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_xu10__SVBool_tf(734// CPP-CHECK-NEXT: entry:735// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])736// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]])737// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]738//739svfloat32_t test_svdup_n_f32_x(svbool_t pg, float32_t op) MODE_ATTR740{741 return SVE_ACLE_FUNC(svdup,_n,_f32_x,)(pg, op);742}743 744// CHECK-LABEL: @test_svdup_n_f64_x(745// CHECK-NEXT: entry:746// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])747// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]])748// CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]749//750// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_xu10__SVBool_td(751// CPP-CHECK-NEXT: entry:752// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])753// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]])754// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]755//756svfloat64_t test_svdup_n_f64_x(svbool_t pg, float64_t op) MODE_ATTR757{758 return SVE_ACLE_FUNC(svdup,_n,_f64_x,)(pg, op);759}760 761// CHECK-LABEL: @test_svdup_lane_s8(762// CHECK-NEXT: entry:763// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[INDEX:%.*]], i64 0764// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer765// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8> [[DATA:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])766// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]767//768// CPP-CHECK-LABEL: @_Z18test_svdup_lane_s8u10__SVInt8_th(769// CPP-CHECK-NEXT: entry:770// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[INDEX:%.*]], i64 0771// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer772// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8> [[DATA:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])773// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]774//775svint8_t test_svdup_lane_s8(svint8_t data, uint8_t index) MODE_ATTR776{777 return SVE_ACLE_FUNC(svdup_lane,_s8,,)(data, index);778}779 780// CHECK-LABEL: @test_svdup_lane_s16(781// CHECK-NEXT: entry:782// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0783// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer784// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])785// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]786//787// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s16u11__SVInt16_tt(788// CPP-CHECK-NEXT: entry:789// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0790// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer791// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])792// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]793//794svint16_t test_svdup_lane_s16(svint16_t data, uint16_t index) MODE_ATTR795{796 return SVE_ACLE_FUNC(svdup_lane,_s16,,)(data, index);797}798 799// CHECK-LABEL: @test_svdup_lane_s32(800// CHECK-NEXT: entry:801// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i64 0802// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer803// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32> [[DATA:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])804// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]805//806// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s32u11__SVInt32_tj(807// CPP-CHECK-NEXT: entry:808// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i64 0809// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer810// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32> [[DATA:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])811// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]812//813svint32_t test_svdup_lane_s32(svint32_t data, uint32_t index) MODE_ATTR814{815 return SVE_ACLE_FUNC(svdup_lane,_s32,,)(data, index);816}817 818// CHECK-LABEL: @test_svdup_lane_s64(819// CHECK-NEXT: entry:820// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i64 0821// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer822// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64> [[DATA:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])823// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]824//825// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s64u11__SVInt64_tm(826// CPP-CHECK-NEXT: entry:827// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i64 0828// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer829// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64> [[DATA:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])830// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]831//832svint64_t test_svdup_lane_s64(svint64_t data, uint64_t index) MODE_ATTR833{834 return SVE_ACLE_FUNC(svdup_lane,_s64,,)(data, index);835}836 837// CHECK-LABEL: @test_svdup_lane_u8(838// CHECK-NEXT: entry:839// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[INDEX:%.*]], i64 0840// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer841// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8> [[DATA:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])842// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]843//844// CPP-CHECK-LABEL: @_Z18test_svdup_lane_u8u11__SVUint8_th(845// CPP-CHECK-NEXT: entry:846// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[INDEX:%.*]], i64 0847// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer848// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8> [[DATA:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])849// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]850//851svuint8_t test_svdup_lane_u8(svuint8_t data, uint8_t index) MODE_ATTR852{853 return SVE_ACLE_FUNC(svdup_lane,_u8,,)(data, index);854}855 856// CHECK-LABEL: @test_svdup_lane_u16(857// CHECK-NEXT: entry:858// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0859// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer860// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])861// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]862//863// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u16u12__SVUint16_tt(864// CPP-CHECK-NEXT: entry:865// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0866// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer867// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])868// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]869//870svuint16_t test_svdup_lane_u16(svuint16_t data, uint16_t index) MODE_ATTR871{872 return SVE_ACLE_FUNC(svdup_lane,_u16,,)(data, index);873}874 875// CHECK-LABEL: @test_svdup_lane_u32(876// CHECK-NEXT: entry:877// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i64 0878// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer879// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32> [[DATA:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])880// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]881//882// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u32u12__SVUint32_tj(883// CPP-CHECK-NEXT: entry:884// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i64 0885// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer886// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32> [[DATA:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])887// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]888//889svuint32_t test_svdup_lane_u32(svuint32_t data, uint32_t index) MODE_ATTR890{891 return SVE_ACLE_FUNC(svdup_lane,_u32,,)(data, index);892}893 894// CHECK-LABEL: @test_svdup_lane_u64(895// CHECK-NEXT: entry:896// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i64 0897// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer898// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64> [[DATA:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])899// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]900//901// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u64u12__SVUint64_tm(902// CPP-CHECK-NEXT: entry:903// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i64 0904// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer905// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64> [[DATA:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])906// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]907//908svuint64_t test_svdup_lane_u64(svuint64_t data, uint64_t index) MODE_ATTR909{910 return SVE_ACLE_FUNC(svdup_lane,_u64,,)(data, index);911}912 913// CHECK-LABEL: @test_svdup_lane_f16(914// CHECK-NEXT: entry:915// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0916// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer917// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.tbl.nxv8f16(<vscale x 8 x half> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])918// CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]919//920// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f16u13__SVFloat16_tt(921// CPP-CHECK-NEXT: entry:922// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0923// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer924// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.tbl.nxv8f16(<vscale x 8 x half> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])925// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]926//927svfloat16_t test_svdup_lane_f16(svfloat16_t data, uint16_t index) MODE_ATTR928{929 return SVE_ACLE_FUNC(svdup_lane,_f16,,)(data, index);930}931 932// CHECK-LABEL: @test_svdup_lane_f32(933// CHECK-NEXT: entry:934// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i64 0935// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer936// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.tbl.nxv4f32(<vscale x 4 x float> [[DATA:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])937// CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]938//939// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f32u13__SVFloat32_tj(940// CPP-CHECK-NEXT: entry:941// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i64 0942// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer943// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.tbl.nxv4f32(<vscale x 4 x float> [[DATA:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])944// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]945//946svfloat32_t test_svdup_lane_f32(svfloat32_t data, uint32_t index) MODE_ATTR947{948 return SVE_ACLE_FUNC(svdup_lane,_f32,,)(data, index);949}950 951// CHECK-LABEL: @test_svdup_lane_f64(952// CHECK-NEXT: entry:953// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i64 0954// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer955// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.tbl.nxv2f64(<vscale x 2 x double> [[DATA:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])956// CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]957//958// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f64u13__SVFloat64_tm(959// CPP-CHECK-NEXT: entry:960// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i64 0961// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer962// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.tbl.nxv2f64(<vscale x 2 x double> [[DATA:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])963// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]964//965svfloat64_t test_svdup_lane_f64(svfloat64_t data, uint64_t index) MODE_ATTR966{967 return SVE_ACLE_FUNC(svdup_lane,_f64,,)(data, index);968}969 970// CHECK-LABEL: @test_svdup_n_b8(971// CHECK-NEXT: entry:972// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i1> poison, i1 [[OP:%.*]], i64 0973// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i1> [[DOTSPLATINSERT]], <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer974// CHECK-NEXT: ret <vscale x 16 x i1> [[DOTSPLAT]]975//976// CPP-CHECK-LABEL: @_Z15test_svdup_n_b8b(977// CPP-CHECK-NEXT: entry:978// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i1> poison, i1 [[OP:%.*]], i64 0979// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i1> [[DOTSPLATINSERT]], <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer980// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[DOTSPLAT]]981//982svbool_t test_svdup_n_b8(bool op) MODE_ATTR983{984 return SVE_ACLE_FUNC(svdup,_n,_b8,)(op);985}986 987// CHECK-LABEL: @test_svdup_n_b16(988// CHECK-NEXT: entry:989// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i1> poison, i1 [[OP:%.*]], i64 0990// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i1> [[DOTSPLATINSERT]], <vscale x 8 x i1> poison, <vscale x 8 x i32> zeroinitializer991// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[DOTSPLAT]])992// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]993//994// CPP-CHECK-LABEL: @_Z16test_svdup_n_b16b(995// CPP-CHECK-NEXT: entry:996// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i1> poison, i1 [[OP:%.*]], i64 0997// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i1> [[DOTSPLATINSERT]], <vscale x 8 x i1> poison, <vscale x 8 x i32> zeroinitializer998// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[DOTSPLAT]])999// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]1000//1001svbool_t test_svdup_n_b16(bool op) MODE_ATTR1002{1003 return SVE_ACLE_FUNC(svdup,_n,_b16,)(op);1004}1005 1006// CHECK-LABEL: @test_svdup_n_b32(1007// CHECK-NEXT: entry:1008// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i1> poison, i1 [[OP:%.*]], i64 01009// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i1> [[DOTSPLATINSERT]], <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer1010// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[DOTSPLAT]])1011// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]1012//1013// CPP-CHECK-LABEL: @_Z16test_svdup_n_b32b(1014// CPP-CHECK-NEXT: entry:1015// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i1> poison, i1 [[OP:%.*]], i64 01016// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i1> [[DOTSPLATINSERT]], <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer1017// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[DOTSPLAT]])1018// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]1019//1020svbool_t test_svdup_n_b32(bool op) MODE_ATTR1021{1022 return SVE_ACLE_FUNC(svdup,_n,_b32,)(op);1023}1024 1025// CHECK-LABEL: @test_svdup_n_b64(1026// CHECK-NEXT: entry:1027// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i1> poison, i1 [[OP:%.*]], i64 01028// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i1> [[DOTSPLATINSERT]], <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer1029// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[DOTSPLAT]])1030// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]1031//1032// CPP-CHECK-LABEL: @_Z16test_svdup_n_b64b(1033// CPP-CHECK-NEXT: entry:1034// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i1> poison, i1 [[OP:%.*]], i64 01035// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i1> [[DOTSPLATINSERT]], <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer1036// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[DOTSPLAT]])1037// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]1038//1039svbool_t test_svdup_n_b64(bool op) MODE_ATTR1040{1041 return SVE_ACLE_FUNC(svdup,_n,_b64,)(op);1042}1043 1044// CHECK-LABEL: @test_svdup_n_bf16(1045// CHECK-NEXT: entry:1046// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x bfloat> poison, bfloat [[OP:%.*]], i64 01047// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x bfloat> [[DOTSPLATINSERT]], <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer1048// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]1049//1050// CPP-CHECK-LABEL: @_Z17test_svdup_n_bf16u6__bf16(1051// CPP-CHECK-NEXT: entry:1052// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x bfloat> poison, bfloat [[OP:%.*]], i64 01053// CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x bfloat> [[DOTSPLATINSERT]], <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer1054// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]1055//1056svbfloat16_t test_svdup_n_bf16(bfloat16_t op) MODE_ATTR {1057 // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16'}}1058 return SVE_ACLE_FUNC(svdup, _n, _bf16, )(op);1059}1060 1061// CHECK-LABEL: @test_svdup_n_bf16_z(1062// CHECK-NEXT: entry:1063// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])1064// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])1065// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]1066//1067// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_zu10__SVBool_tu6__bf16(1068// CPP-CHECK-NEXT: entry:1069// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])1070// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])1071// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]1072//1073svbfloat16_t test_svdup_n_bf16_z(svbool_t pg, bfloat16_t op) MODE_ATTR {1074 // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_z'}}1075 return SVE_ACLE_FUNC(svdup, _n, _bf16_z, )(pg, op);1076}1077 1078// CHECK-LABEL: @test_svdup_n_bf16_m(1079// CHECK-NEXT: entry:1080// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])1081// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])1082// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]1083//1084// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_mu14__SVBfloat16_tu10__SVBool_tu6__bf16(1085// CPP-CHECK-NEXT: entry:1086// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])1087// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])1088// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]1089//1090svbfloat16_t test_svdup_n_bf16_m(svbfloat16_t inactive, svbool_t pg, bfloat16_t op) MODE_ATTR {1091 // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_m'}}1092 return SVE_ACLE_FUNC(svdup, _n, _bf16_m, )(inactive, pg, op);1093}1094 1095// CHECK-LABEL: @test_svdup_n_bf16_x(1096// CHECK-NEXT: entry:1097// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])1098// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])1099// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]1100//1101// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_xu10__SVBool_tu6__bf16(1102// CPP-CHECK-NEXT: entry:1103// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])1104// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])1105// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]1106//1107svbfloat16_t test_svdup_n_bf16_x(svbool_t pg, bfloat16_t op) MODE_ATTR {1108 // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_x'}}1109 return SVE_ACLE_FUNC(svdup, _n, _bf16_x, )(pg, op);1110}1111 1112// CHECK-LABEL: @test_svdup_lane_bf16(1113// CHECK-NEXT: entry:1114// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 01115// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer1116// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.tbl.nxv8bf16(<vscale x 8 x bfloat> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])1117// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]1118//1119// CPP-CHECK-LABEL: @_Z20test_svdup_lane_bf16u14__SVBfloat16_tt(1120// CPP-CHECK-NEXT: entry:1121// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 01122// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer1123// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.tbl.nxv8bf16(<vscale x 8 x bfloat> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])1124// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]1125//1126svbfloat16_t test_svdup_lane_bf16(svbfloat16_t data, uint16_t index) MODE_ATTR1127{1128 // expected-warning@+1 {{implicit declaration of function 'svdup_lane_bf16'}}1129 return SVE_ACLE_FUNC(svdup_lane,_bf16,,)(data, index);1130}1131