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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +f64mm -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +f64mm -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK4// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +f64mm -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +f64mm -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK6// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +f64mm -S -disable-O0-optnone -Werror -Wall -o /dev/null %s7 8// REQUIRES: aarch64-registered-target9 10#include <arm_sve.h>11 12#ifdef SVE_OVERLOADED_FORMS13// A simple used,unused... macro, long enough to represent any SVE builtin.14#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A315#else16#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A417#endif18 19// CHECK-LABEL: @test_svld1ro_mf8(20// CHECK-NEXT: entry:21// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])22// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]23//24// CPP-CHECK-LABEL: @_Z16test_svld1ro_mf8u10__SVBool_tPKu6__mfp8(25// CPP-CHECK-NEXT: entry:26// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])27// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]28//29svmfloat8_t test_svld1ro_mf8(svbool_t pg, mfloat8_t const *base) {30 return SVE_ACLE_FUNC(svld1ro, _mf8, , )(pg, base);31}32 33// CHECK-LABEL: @test_svld1ro_s8(34// CHECK-NEXT: entry:35// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])36// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]37//38// CPP-CHECK-LABEL: @_Z15test_svld1ro_s8u10__SVBool_tPKa(39// CPP-CHECK-NEXT: entry:40// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])41// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]42//43svint8_t test_svld1ro_s8(svbool_t pg, const int8_t *base) {44 return SVE_ACLE_FUNC(svld1ro, _s8, , )(pg, base);45}46 47// CHECK-LABEL: @test_svld1ro_s16(48// CHECK-NEXT: entry:49// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])50// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1ro.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])51// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]52//53// CPP-CHECK-LABEL: @_Z16test_svld1ro_s16u10__SVBool_tPKs(54// CPP-CHECK-NEXT: entry:55// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])56// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1ro.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])57// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]58//59svint16_t test_svld1ro_s16(svbool_t pg, const int16_t *base) {60 return SVE_ACLE_FUNC(svld1ro, _s16, , )(pg, base);61}62 63// CHECK-LABEL: @test_svld1ro_s32(64// CHECK-NEXT: entry:65// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])66// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1ro.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])67// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]68//69// CPP-CHECK-LABEL: @_Z16test_svld1ro_s32u10__SVBool_tPKi(70// CPP-CHECK-NEXT: entry:71// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])72// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1ro.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])73// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]74//75svint32_t test_svld1ro_s32(svbool_t pg, const int32_t *base) {76 return SVE_ACLE_FUNC(svld1ro, _s32, , )(pg, base);77}78 79// CHECK-LABEL: @test_svld1ro_s64(80// CHECK-NEXT: entry:81// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])82// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1ro.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])83// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]84//85// CPP-CHECK-LABEL: @_Z16test_svld1ro_s64u10__SVBool_tPKl(86// CPP-CHECK-NEXT: entry:87// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])88// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1ro.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])89// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]90//91svint64_t test_svld1ro_s64(svbool_t pg, const int64_t *base) {92 return SVE_ACLE_FUNC(svld1ro, _s64, , )(pg, base);93}94 95// CHECK-LABEL: @test_svld1ro_u8(96// CHECK-NEXT: entry:97// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])98// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]99//100// CPP-CHECK-LABEL: @_Z15test_svld1ro_u8u10__SVBool_tPKh(101// CPP-CHECK-NEXT: entry:102// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])103// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]104//105svuint8_t test_svld1ro_u8(svbool_t pg, const uint8_t *base) {106 return SVE_ACLE_FUNC(svld1ro, _u8, , )(pg, base);107}108 109// CHECK-LABEL: @test_svld1ro_u16(110// CHECK-NEXT: entry:111// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])112// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1ro.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])113// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]114//115// CPP-CHECK-LABEL: @_Z16test_svld1ro_u16u10__SVBool_tPKt(116// CPP-CHECK-NEXT: entry:117// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])118// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1ro.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])119// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]120//121svuint16_t test_svld1ro_u16(svbool_t pg, const uint16_t *base) {122 return SVE_ACLE_FUNC(svld1ro, _u16, , )(pg, base);123}124 125// CHECK-LABEL: @test_svld1ro_u32(126// CHECK-NEXT: entry:127// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])128// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1ro.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])129// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]130//131// CPP-CHECK-LABEL: @_Z16test_svld1ro_u32u10__SVBool_tPKj(132// CPP-CHECK-NEXT: entry:133// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])134// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1ro.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])135// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]136//137svuint32_t test_svld1ro_u32(svbool_t pg, const uint32_t *base) {138 return SVE_ACLE_FUNC(svld1ro, _u32, , )(pg, base);139}140 141// CHECK-LABEL: @test_svld1ro_u64(142// CHECK-NEXT: entry:143// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])144// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1ro.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])145// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]146//147// CPP-CHECK-LABEL: @_Z16test_svld1ro_u64u10__SVBool_tPKm(148// CPP-CHECK-NEXT: entry:149// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])150// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1ro.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])151// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]152//153svuint64_t test_svld1ro_u64(svbool_t pg, const uint64_t *base) {154 return SVE_ACLE_FUNC(svld1ro, _u64, , )(pg, base);155}156 157// CHECK-LABEL: @test_svld1ro_f16(158// CHECK-NEXT: entry:159// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])160// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ld1ro.nxv8f16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])161// CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]162//163// CPP-CHECK-LABEL: @_Z16test_svld1ro_f16u10__SVBool_tPKDh(164// CPP-CHECK-NEXT: entry:165// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])166// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ld1ro.nxv8f16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])167// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]168//169svfloat16_t test_svld1ro_f16(svbool_t pg, const float16_t *base) {170 return SVE_ACLE_FUNC(svld1ro, _f16, , )(pg, base);171}172 173// CHECK-LABEL: @test_svld1ro_f32(174// CHECK-NEXT: entry:175// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])176// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.ld1ro.nxv4f32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])177// CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]178//179// CPP-CHECK-LABEL: @_Z16test_svld1ro_f32u10__SVBool_tPKf(180// CPP-CHECK-NEXT: entry:181// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])182// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.ld1ro.nxv4f32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])183// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]184//185svfloat32_t test_svld1ro_f32(svbool_t pg, const float32_t *base) {186 return SVE_ACLE_FUNC(svld1ro, _f32, , )(pg, base);187}188 189// CHECK-LABEL: @test_svld1ro_f64(190// CHECK-NEXT: entry:191// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])192// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.ld1ro.nxv2f64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])193// CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]194//195// CPP-CHECK-LABEL: @_Z16test_svld1ro_f64u10__SVBool_tPKd(196// CPP-CHECK-NEXT: entry:197// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])198// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.ld1ro.nxv2f64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])199// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]200//201svfloat64_t test_svld1ro_f64(svbool_t pg, const float64_t *base) {202 return SVE_ACLE_FUNC(svld1ro, _f64, , )(pg, base);203}204 205// CHECK-LABEL: @test_svld1ro_bf16(206// CHECK-NEXT: entry:207// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])208// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.ld1ro.nxv8bf16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])209// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]210//211// CPP-CHECK-LABEL: @_Z17test_svld1ro_bf16u10__SVBool_tPKu6__bf16(212// CPP-CHECK-NEXT: entry:213// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])214// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.ld1ro.nxv8bf16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])215// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]216//217svbfloat16_t test_svld1ro_bf16(svbool_t pg, const bfloat16_t *base) {218 return SVE_ACLE_FUNC(svld1ro, _bf16, , )(pg, base);219}220