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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sve.h>11 12 13#if defined __ARM_FEATURE_SME14#define MODE_ATTR __arm_streaming15#else16#define MODE_ATTR17#endif18 19#ifdef SVE_OVERLOADED_FORMS20// A simple used,unused... macro, long enough to represent any SVE builtin.21#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A322#else23#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A424#endif25 26// CHECK-LABEL: @test_svld1rq_mf8(27// CHECK-NEXT:  entry:28// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1rq.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])29// CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]30//31// CPP-CHECK-LABEL: @_Z16test_svld1rq_mf8u10__SVBool_tPKu6__mfp8(32// CPP-CHECK-NEXT:  entry:33// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1rq.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])34// CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]35//36svmfloat8_t test_svld1rq_mf8(svbool_t pg, mfloat8_t const *base) MODE_ATTR37{38  return SVE_ACLE_FUNC(svld1rq,_mf8,,)(pg, base);39}40 41// CHECK-LABEL: @test_svld1rq_s8(42// CHECK-NEXT:  entry:43// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1rq.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])44// CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]45//46// CPP-CHECK-LABEL: @_Z15test_svld1rq_s8u10__SVBool_tPKa(47// CPP-CHECK-NEXT:  entry:48// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1rq.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])49// CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]50//51svint8_t test_svld1rq_s8(svbool_t pg, const int8_t *base) MODE_ATTR52{53  return SVE_ACLE_FUNC(svld1rq,_s8,,)(pg, base);54}55 56// CHECK-LABEL: @test_svld1rq_s16(57// CHECK-NEXT:  entry:58// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])59// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1rq.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])60// CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]61//62// CPP-CHECK-LABEL: @_Z16test_svld1rq_s16u10__SVBool_tPKs(63// CPP-CHECK-NEXT:  entry:64// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])65// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1rq.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])66// CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]67//68svint16_t test_svld1rq_s16(svbool_t pg, const int16_t *base) MODE_ATTR69{70  return SVE_ACLE_FUNC(svld1rq,_s16,,)(pg, base);71}72 73// CHECK-LABEL: @test_svld1rq_s32(74// CHECK-NEXT:  entry:75// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])76// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1rq.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])77// CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]78//79// CPP-CHECK-LABEL: @_Z16test_svld1rq_s32u10__SVBool_tPKi(80// CPP-CHECK-NEXT:  entry:81// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])82// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1rq.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])83// CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]84//85svint32_t test_svld1rq_s32(svbool_t pg, const int32_t *base) MODE_ATTR86{87  return SVE_ACLE_FUNC(svld1rq,_s32,,)(pg, base);88}89 90// CHECK-LABEL: @test_svld1rq_s64(91// CHECK-NEXT:  entry:92// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])93// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1rq.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])94// CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]95//96// CPP-CHECK-LABEL: @_Z16test_svld1rq_s64u10__SVBool_tPKl(97// CPP-CHECK-NEXT:  entry:98// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])99// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1rq.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])100// CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]101//102svint64_t test_svld1rq_s64(svbool_t pg, const int64_t *base) MODE_ATTR103{104  return SVE_ACLE_FUNC(svld1rq,_s64,,)(pg, base);105}106 107// CHECK-LABEL: @test_svld1rq_u8(108// CHECK-NEXT:  entry:109// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1rq.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])110// CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]111//112// CPP-CHECK-LABEL: @_Z15test_svld1rq_u8u10__SVBool_tPKh(113// CPP-CHECK-NEXT:  entry:114// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1rq.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])115// CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]116//117svuint8_t test_svld1rq_u8(svbool_t pg, const uint8_t *base) MODE_ATTR118{119  return SVE_ACLE_FUNC(svld1rq,_u8,,)(pg, base);120}121 122// CHECK-LABEL: @test_svld1rq_u16(123// CHECK-NEXT:  entry:124// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])125// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1rq.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])126// CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]127//128// CPP-CHECK-LABEL: @_Z16test_svld1rq_u16u10__SVBool_tPKt(129// CPP-CHECK-NEXT:  entry:130// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])131// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1rq.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])132// CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]133//134svuint16_t test_svld1rq_u16(svbool_t pg, const uint16_t *base) MODE_ATTR135{136  return SVE_ACLE_FUNC(svld1rq,_u16,,)(pg, base);137}138 139// CHECK-LABEL: @test_svld1rq_u32(140// CHECK-NEXT:  entry:141// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])142// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1rq.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])143// CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]144//145// CPP-CHECK-LABEL: @_Z16test_svld1rq_u32u10__SVBool_tPKj(146// CPP-CHECK-NEXT:  entry:147// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])148// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1rq.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])149// CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]150//151svuint32_t test_svld1rq_u32(svbool_t pg, const uint32_t *base) MODE_ATTR152{153  return SVE_ACLE_FUNC(svld1rq,_u32,,)(pg, base);154}155 156// CHECK-LABEL: @test_svld1rq_u64(157// CHECK-NEXT:  entry:158// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])159// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1rq.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])160// CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]161//162// CPP-CHECK-LABEL: @_Z16test_svld1rq_u64u10__SVBool_tPKm(163// CPP-CHECK-NEXT:  entry:164// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])165// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1rq.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])166// CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]167//168svuint64_t test_svld1rq_u64(svbool_t pg, const uint64_t *base) MODE_ATTR169{170  return SVE_ACLE_FUNC(svld1rq,_u64,,)(pg, base);171}172 173// CHECK-LABEL: @test_svld1rq_f16(174// CHECK-NEXT:  entry:175// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])176// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ld1rq.nxv8f16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])177// CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]178//179// CPP-CHECK-LABEL: @_Z16test_svld1rq_f16u10__SVBool_tPKDh(180// CPP-CHECK-NEXT:  entry:181// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])182// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ld1rq.nxv8f16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])183// CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]184//185svfloat16_t test_svld1rq_f16(svbool_t pg, const float16_t *base) MODE_ATTR186{187  return SVE_ACLE_FUNC(svld1rq,_f16,,)(pg, base);188}189 190// CHECK-LABEL: @test_svld1rq_f32(191// CHECK-NEXT:  entry:192// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])193// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.ld1rq.nxv4f32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])194// CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]195//196// CPP-CHECK-LABEL: @_Z16test_svld1rq_f32u10__SVBool_tPKf(197// CPP-CHECK-NEXT:  entry:198// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])199// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.ld1rq.nxv4f32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])200// CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]201//202svfloat32_t test_svld1rq_f32(svbool_t pg, const float32_t *base) MODE_ATTR203{204  return SVE_ACLE_FUNC(svld1rq,_f32,,)(pg, base);205}206 207// CHECK-LABEL: @test_svld1rq_f64(208// CHECK-NEXT:  entry:209// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])210// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.ld1rq.nxv2f64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])211// CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]212//213// CPP-CHECK-LABEL: @_Z16test_svld1rq_f64u10__SVBool_tPKd(214// CPP-CHECK-NEXT:  entry:215// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])216// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.ld1rq.nxv2f64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])217// CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]218//219svfloat64_t test_svld1rq_f64(svbool_t pg, const float64_t *base) MODE_ATTR220{221  return SVE_ACLE_FUNC(svld1rq,_f64,,)(pg, base);222}223 224// CHECK-LABEL: @test_svld1rq_bf16(225// CHECK-NEXT:  entry:226// CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])227// CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.ld1rq.nxv8bf16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])228// CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]229//230// CPP-CHECK-LABEL: @_Z17test_svld1rq_bf16u10__SVBool_tPKu6__bf16(231// CPP-CHECK-NEXT:  entry:232// CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])233// CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.ld1rq.nxv8bf16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])234// CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]235//236svbfloat16_t test_svld1rq_bf16(svbool_t pg, const bfloat16_t *base) MODE_ATTR237{238  return SVE_ACLE_FUNC(svld1rq,_bf16,,)(pg, base);239}240