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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sve.h>11 12#if defined __ARM_FEATURE_SME13#define MODE_ATTR __arm_streaming14#else15#define MODE_ATTR16#endif17 18#ifdef SVE_OVERLOADED_FORMS19// A simple used,unused... macro, long enough to represent any SVE builtin.20#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A321#else22#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A423#endif24 25// CHECK-LABEL: @test_svlen_s8(26// CHECK-NEXT: entry:27// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()28// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 429// CHECK-NEXT: ret i64 [[TMP1]]30//31// CPP-CHECK-LABEL: @_Z13test_svlen_s8u10__SVInt8_t(32// CPP-CHECK-NEXT: entry:33// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()34// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 435// CPP-CHECK-NEXT: ret i64 [[TMP1]]36//37uint64_t test_svlen_s8(svint8_t op) MODE_ATTR38{39 return SVE_ACLE_FUNC(svlen,_s8,,)(op);40}41 42// CHECK-LABEL: @test_svlen_s16(43// CHECK-NEXT: entry:44// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()45// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 346// CHECK-NEXT: ret i64 [[TMP1]]47//48// CPP-CHECK-LABEL: @_Z14test_svlen_s16u11__SVInt16_t(49// CPP-CHECK-NEXT: entry:50// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()51// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 352// CPP-CHECK-NEXT: ret i64 [[TMP1]]53//54uint64_t test_svlen_s16(svint16_t op) MODE_ATTR55{56 return SVE_ACLE_FUNC(svlen,_s16,,)(op);57}58 59// CHECK-LABEL: @test_svlen_s32(60// CHECK-NEXT: entry:61// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()62// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 263// CHECK-NEXT: ret i64 [[TMP1]]64//65// CPP-CHECK-LABEL: @_Z14test_svlen_s32u11__SVInt32_t(66// CPP-CHECK-NEXT: entry:67// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()68// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 269// CPP-CHECK-NEXT: ret i64 [[TMP1]]70//71uint64_t test_svlen_s32(svint32_t op) MODE_ATTR72{73 return SVE_ACLE_FUNC(svlen,_s32,,)(op);74}75 76// CHECK-LABEL: @test_svlen_s64(77// CHECK-NEXT: entry:78// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()79// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 180// CHECK-NEXT: ret i64 [[TMP1]]81//82// CPP-CHECK-LABEL: @_Z14test_svlen_s64u11__SVInt64_t(83// CPP-CHECK-NEXT: entry:84// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()85// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 186// CPP-CHECK-NEXT: ret i64 [[TMP1]]87//88uint64_t test_svlen_s64(svint64_t op) MODE_ATTR89{90 return SVE_ACLE_FUNC(svlen,_s64,,)(op);91}92 93// CHECK-LABEL: @test_svlen_u8(94// CHECK-NEXT: entry:95// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()96// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 497// CHECK-NEXT: ret i64 [[TMP1]]98//99// CPP-CHECK-LABEL: @_Z13test_svlen_u8u11__SVUint8_t(100// CPP-CHECK-NEXT: entry:101// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()102// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4103// CPP-CHECK-NEXT: ret i64 [[TMP1]]104//105uint64_t test_svlen_u8(svuint8_t op) MODE_ATTR106{107 return SVE_ACLE_FUNC(svlen,_u8,,)(op);108}109 110// CHECK-LABEL: @test_svlen_u16(111// CHECK-NEXT: entry:112// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()113// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3114// CHECK-NEXT: ret i64 [[TMP1]]115//116// CPP-CHECK-LABEL: @_Z14test_svlen_u16u12__SVUint16_t(117// CPP-CHECK-NEXT: entry:118// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()119// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3120// CPP-CHECK-NEXT: ret i64 [[TMP1]]121//122uint64_t test_svlen_u16(svuint16_t op) MODE_ATTR123{124 return SVE_ACLE_FUNC(svlen,_u16,,)(op);125}126 127// CHECK-LABEL: @test_svlen_u32(128// CHECK-NEXT: entry:129// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()130// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2131// CHECK-NEXT: ret i64 [[TMP1]]132//133// CPP-CHECK-LABEL: @_Z14test_svlen_u32u12__SVUint32_t(134// CPP-CHECK-NEXT: entry:135// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()136// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2137// CPP-CHECK-NEXT: ret i64 [[TMP1]]138//139uint64_t test_svlen_u32(svuint32_t op) MODE_ATTR140{141 return SVE_ACLE_FUNC(svlen,_u32,,)(op);142}143 144// CHECK-LABEL: @test_svlen_u64(145// CHECK-NEXT: entry:146// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()147// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1148// CHECK-NEXT: ret i64 [[TMP1]]149//150// CPP-CHECK-LABEL: @_Z14test_svlen_u64u12__SVUint64_t(151// CPP-CHECK-NEXT: entry:152// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()153// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1154// CPP-CHECK-NEXT: ret i64 [[TMP1]]155//156uint64_t test_svlen_u64(svuint64_t op) MODE_ATTR157{158 return SVE_ACLE_FUNC(svlen,_u64,,)(op);159}160 161// CHECK-LABEL: @test_svlen_f16(162// CHECK-NEXT: entry:163// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()164// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3165// CHECK-NEXT: ret i64 [[TMP1]]166//167// CPP-CHECK-LABEL: @_Z14test_svlen_f16u13__SVFloat16_t(168// CPP-CHECK-NEXT: entry:169// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()170// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3171// CPP-CHECK-NEXT: ret i64 [[TMP1]]172//173uint64_t test_svlen_f16(svfloat16_t op) MODE_ATTR174{175 return SVE_ACLE_FUNC(svlen,_f16,,)(op);176}177 178// CHECK-LABEL: @test_svlen_f32(179// CHECK-NEXT: entry:180// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()181// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2182// CHECK-NEXT: ret i64 [[TMP1]]183//184// CPP-CHECK-LABEL: @_Z14test_svlen_f32u13__SVFloat32_t(185// CPP-CHECK-NEXT: entry:186// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()187// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2188// CPP-CHECK-NEXT: ret i64 [[TMP1]]189//190uint64_t test_svlen_f32(svfloat32_t op) MODE_ATTR191{192 return SVE_ACLE_FUNC(svlen,_f32,,)(op);193}194 195// CHECK-LABEL: @test_svlen_f64(196// CHECK-NEXT: entry:197// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()198// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1199// CHECK-NEXT: ret i64 [[TMP1]]200//201// CPP-CHECK-LABEL: @_Z14test_svlen_f64u13__SVFloat64_t(202// CPP-CHECK-NEXT: entry:203// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()204// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1205// CPP-CHECK-NEXT: ret i64 [[TMP1]]206//207uint64_t test_svlen_f64(svfloat64_t op) MODE_ATTR208{209 return SVE_ACLE_FUNC(svlen,_f64,,)(op);210}211 212// CHECK-LABEL: @test_svlen_bf16(213// CHECK-NEXT: entry:214// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()215// CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3216// CHECK-NEXT: ret i64 [[TMP1]]217//218// CPP-CHECK-LABEL: @_Z15test_svlen_bf16u14__SVBfloat16_t(219// CPP-CHECK-NEXT: entry:220// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()221// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3222// CPP-CHECK-NEXT: ret i64 [[TMP1]]223//224uint64_t test_svlen_bf16(svbfloat16_t op) MODE_ATTR225{226 // expected-warning@+1 {{implicit declaration of function 'svlen_bf16'}}227 return SVE_ACLE_FUNC(svlen,_bf16,,)(op);228}229