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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sve.h>11 12 13#if defined __ARM_FEATURE_SME14#define MODE_ATTR __arm_streaming15#else16#define MODE_ATTR17#endif18 19#ifdef SVE_OVERLOADED_FORMS20// A simple used,unused... macro, long enough to represent any SVE builtin.21#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A322#else23#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A424#endif25 26// CHECK-LABEL: @test_svmaxv_s8(27// CHECK-NEXT: entry:28// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.smaxv.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])29// CHECK-NEXT: ret i8 [[TMP0]]30//31// CPP-CHECK-LABEL: @_Z14test_svmaxv_s8u10__SVBool_tu10__SVInt8_t(32// CPP-CHECK-NEXT: entry:33// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.smaxv.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])34// CPP-CHECK-NEXT: ret i8 [[TMP0]]35//36int8_t test_svmaxv_s8(svbool_t pg, svint8_t op) MODE_ATTR37{38 return SVE_ACLE_FUNC(svmaxv,_s8,,)(pg, op);39}40 41// CHECK-LABEL: @test_svmaxv_s16(42// CHECK-NEXT: entry:43// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])44// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.smaxv.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])45// CHECK-NEXT: ret i16 [[TMP1]]46//47// CPP-CHECK-LABEL: @_Z15test_svmaxv_s16u10__SVBool_tu11__SVInt16_t(48// CPP-CHECK-NEXT: entry:49// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])50// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.smaxv.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])51// CPP-CHECK-NEXT: ret i16 [[TMP1]]52//53int16_t test_svmaxv_s16(svbool_t pg, svint16_t op) MODE_ATTR54{55 return SVE_ACLE_FUNC(svmaxv,_s16,,)(pg, op);56}57 58// CHECK-LABEL: @test_svmaxv_s32(59// CHECK-NEXT: entry:60// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])61// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.smaxv.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])62// CHECK-NEXT: ret i32 [[TMP1]]63//64// CPP-CHECK-LABEL: @_Z15test_svmaxv_s32u10__SVBool_tu11__SVInt32_t(65// CPP-CHECK-NEXT: entry:66// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])67// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.smaxv.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])68// CPP-CHECK-NEXT: ret i32 [[TMP1]]69//70int32_t test_svmaxv_s32(svbool_t pg, svint32_t op) MODE_ATTR71{72 return SVE_ACLE_FUNC(svmaxv,_s32,,)(pg, op);73}74 75// CHECK-LABEL: @test_svmaxv_s64(76// CHECK-NEXT: entry:77// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])78// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.smaxv.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])79// CHECK-NEXT: ret i64 [[TMP1]]80//81// CPP-CHECK-LABEL: @_Z15test_svmaxv_s64u10__SVBool_tu11__SVInt64_t(82// CPP-CHECK-NEXT: entry:83// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])84// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.smaxv.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])85// CPP-CHECK-NEXT: ret i64 [[TMP1]]86//87int64_t test_svmaxv_s64(svbool_t pg, svint64_t op) MODE_ATTR88{89 return SVE_ACLE_FUNC(svmaxv,_s64,,)(pg, op);90}91 92// CHECK-LABEL: @test_svmaxv_u8(93// CHECK-NEXT: entry:94// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.umaxv.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])95// CHECK-NEXT: ret i8 [[TMP0]]96//97// CPP-CHECK-LABEL: @_Z14test_svmaxv_u8u10__SVBool_tu11__SVUint8_t(98// CPP-CHECK-NEXT: entry:99// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.umaxv.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])100// CPP-CHECK-NEXT: ret i8 [[TMP0]]101//102uint8_t test_svmaxv_u8(svbool_t pg, svuint8_t op) MODE_ATTR103{104 return SVE_ACLE_FUNC(svmaxv,_u8,,)(pg, op);105}106 107// CHECK-LABEL: @test_svmaxv_u16(108// CHECK-NEXT: entry:109// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])110// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.umaxv.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])111// CHECK-NEXT: ret i16 [[TMP1]]112//113// CPP-CHECK-LABEL: @_Z15test_svmaxv_u16u10__SVBool_tu12__SVUint16_t(114// CPP-CHECK-NEXT: entry:115// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])116// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.umaxv.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])117// CPP-CHECK-NEXT: ret i16 [[TMP1]]118//119uint16_t test_svmaxv_u16(svbool_t pg, svuint16_t op) MODE_ATTR120{121 return SVE_ACLE_FUNC(svmaxv,_u16,,)(pg, op);122}123 124// CHECK-LABEL: @test_svmaxv_u32(125// CHECK-NEXT: entry:126// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])127// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.umaxv.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])128// CHECK-NEXT: ret i32 [[TMP1]]129//130// CPP-CHECK-LABEL: @_Z15test_svmaxv_u32u10__SVBool_tu12__SVUint32_t(131// CPP-CHECK-NEXT: entry:132// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])133// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.umaxv.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])134// CPP-CHECK-NEXT: ret i32 [[TMP1]]135//136uint32_t test_svmaxv_u32(svbool_t pg, svuint32_t op) MODE_ATTR137{138 return SVE_ACLE_FUNC(svmaxv,_u32,,)(pg, op);139}140 141// CHECK-LABEL: @test_svmaxv_u64(142// CHECK-NEXT: entry:143// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])144// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.umaxv.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])145// CHECK-NEXT: ret i64 [[TMP1]]146//147// CPP-CHECK-LABEL: @_Z15test_svmaxv_u64u10__SVBool_tu12__SVUint64_t(148// CPP-CHECK-NEXT: entry:149// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])150// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.umaxv.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])151// CPP-CHECK-NEXT: ret i64 [[TMP1]]152//153uint64_t test_svmaxv_u64(svbool_t pg, svuint64_t op) MODE_ATTR154{155 return SVE_ACLE_FUNC(svmaxv,_u64,,)(pg, op);156}157 158// CHECK-LABEL: @test_svmaxv_f16(159// CHECK-NEXT: entry:160// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])161// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fmaxv.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])162// CHECK-NEXT: ret half [[TMP1]]163//164// CPP-CHECK-LABEL: @_Z15test_svmaxv_f16u10__SVBool_tu13__SVFloat16_t(165// CPP-CHECK-NEXT: entry:166// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])167// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fmaxv.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])168// CPP-CHECK-NEXT: ret half [[TMP1]]169//170float16_t test_svmaxv_f16(svbool_t pg, svfloat16_t op) MODE_ATTR171{172 return SVE_ACLE_FUNC(svmaxv,_f16,,)(pg, op);173}174 175// CHECK-LABEL: @test_svmaxv_f32(176// CHECK-NEXT: entry:177// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])178// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fmaxv.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])179// CHECK-NEXT: ret float [[TMP1]]180//181// CPP-CHECK-LABEL: @_Z15test_svmaxv_f32u10__SVBool_tu13__SVFloat32_t(182// CPP-CHECK-NEXT: entry:183// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])184// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fmaxv.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])185// CPP-CHECK-NEXT: ret float [[TMP1]]186//187float32_t test_svmaxv_f32(svbool_t pg, svfloat32_t op) MODE_ATTR188{189 return SVE_ACLE_FUNC(svmaxv,_f32,,)(pg, op);190}191 192// CHECK-LABEL: @test_svmaxv_f64(193// CHECK-NEXT: entry:194// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])195// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fmaxv.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])196// CHECK-NEXT: ret double [[TMP1]]197//198// CPP-CHECK-LABEL: @_Z15test_svmaxv_f64u10__SVBool_tu13__SVFloat64_t(199// CPP-CHECK-NEXT: entry:200// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])201// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fmaxv.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])202// CPP-CHECK-NEXT: ret double [[TMP1]]203//204float64_t test_svmaxv_f64(svbool_t pg, svfloat64_t op) MODE_ATTR205{206 return SVE_ACLE_FUNC(svmaxv,_f64,,)(pg, op);207}208