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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sve.h>11 12#if defined __ARM_FEATURE_SME13#define MODE_ATTR __arm_streaming14#else15#define MODE_ATTR16#endif17 18#ifdef SVE_OVERLOADED_FORMS19// A simple used,unused... macro, long enough to represent any SVE builtin.20#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A321#else22#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A423#endif24 25// CHECK-LABEL: @test_svqadd_s8(26// CHECK-NEXT: entry:27// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])28// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]29//30// CPP-CHECK-LABEL: @_Z14test_svqadd_s8u10__SVInt8_tS_(31// CPP-CHECK-NEXT: entry:32// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])33// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]34//35svint8_t test_svqadd_s8(svint8_t op1, svint8_t op2) MODE_ATTR36{37 return SVE_ACLE_FUNC(svqadd,_s8,,)(op1, op2);38}39 40// CHECK-LABEL: @test_svqadd_s16(41// CHECK-NEXT: entry:42// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])43// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]44//45// CPP-CHECK-LABEL: @_Z15test_svqadd_s16u11__SVInt16_tS_(46// CPP-CHECK-NEXT: entry:47// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])48// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]49//50svint16_t test_svqadd_s16(svint16_t op1, svint16_t op2) MODE_ATTR51{52 return SVE_ACLE_FUNC(svqadd,_s16,,)(op1, op2);53}54 55// CHECK-LABEL: @test_svqadd_s32(56// CHECK-NEXT: entry:57// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])58// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]59//60// CPP-CHECK-LABEL: @_Z15test_svqadd_s32u11__SVInt32_tS_(61// CPP-CHECK-NEXT: entry:62// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])63// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]64//65svint32_t test_svqadd_s32(svint32_t op1, svint32_t op2) MODE_ATTR66{67 return SVE_ACLE_FUNC(svqadd,_s32,,)(op1, op2);68}69 70// CHECK-LABEL: @test_svqadd_s64(71// CHECK-NEXT: entry:72// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])73// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]74//75// CPP-CHECK-LABEL: @_Z15test_svqadd_s64u11__SVInt64_tS_(76// CPP-CHECK-NEXT: entry:77// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])78// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]79//80svint64_t test_svqadd_s64(svint64_t op1, svint64_t op2) MODE_ATTR81{82 return SVE_ACLE_FUNC(svqadd,_s64,,)(op1, op2);83}84 85// CHECK-LABEL: @test_svqadd_u8(86// CHECK-NEXT: entry:87// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])88// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]89//90// CPP-CHECK-LABEL: @_Z14test_svqadd_u8u11__SVUint8_tS_(91// CPP-CHECK-NEXT: entry:92// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])93// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]94//95svuint8_t test_svqadd_u8(svuint8_t op1, svuint8_t op2) MODE_ATTR96{97 return SVE_ACLE_FUNC(svqadd,_u8,,)(op1, op2);98}99 100// CHECK-LABEL: @test_svqadd_u16(101// CHECK-NEXT: entry:102// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])103// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]104//105// CPP-CHECK-LABEL: @_Z15test_svqadd_u16u12__SVUint16_tS_(106// CPP-CHECK-NEXT: entry:107// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])108// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]109//110svuint16_t test_svqadd_u16(svuint16_t op1, svuint16_t op2) MODE_ATTR111{112 return SVE_ACLE_FUNC(svqadd,_u16,,)(op1, op2);113}114 115// CHECK-LABEL: @test_svqadd_u32(116// CHECK-NEXT: entry:117// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])118// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]119//120// CPP-CHECK-LABEL: @_Z15test_svqadd_u32u12__SVUint32_tS_(121// CPP-CHECK-NEXT: entry:122// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])123// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]124//125svuint32_t test_svqadd_u32(svuint32_t op1, svuint32_t op2) MODE_ATTR126{127 return SVE_ACLE_FUNC(svqadd,_u32,,)(op1, op2);128}129 130// CHECK-LABEL: @test_svqadd_u64(131// CHECK-NEXT: entry:132// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])133// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]134//135// CPP-CHECK-LABEL: @_Z15test_svqadd_u64u12__SVUint64_tS_(136// CPP-CHECK-NEXT: entry:137// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])138// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]139//140svuint64_t test_svqadd_u64(svuint64_t op1, svuint64_t op2) MODE_ATTR141{142 return SVE_ACLE_FUNC(svqadd,_u64,,)(op1, op2);143}144 145// CHECK-LABEL: @test_svqadd_n_s8(146// CHECK-NEXT: entry:147// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0148// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer149// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])150// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]151//152// CPP-CHECK-LABEL: @_Z16test_svqadd_n_s8u10__SVInt8_ta(153// CPP-CHECK-NEXT: entry:154// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0155// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer156// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])157// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]158//159svint8_t test_svqadd_n_s8(svint8_t op1, int8_t op2) MODE_ATTR160{161 return SVE_ACLE_FUNC(svqadd,_n_s8,,)(op1, op2);162}163 164// CHECK-LABEL: @test_svqadd_n_s16(165// CHECK-NEXT: entry:166// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0167// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer168// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])169// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]170//171// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s16u11__SVInt16_ts(172// CPP-CHECK-NEXT: entry:173// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0174// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer175// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])176// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]177//178svint16_t test_svqadd_n_s16(svint16_t op1, int16_t op2) MODE_ATTR179{180 return SVE_ACLE_FUNC(svqadd,_n_s16,,)(op1, op2);181}182 183// CHECK-LABEL: @test_svqadd_n_s32(184// CHECK-NEXT: entry:185// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0186// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer187// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])188// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]189//190// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s32u11__SVInt32_ti(191// CPP-CHECK-NEXT: entry:192// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0193// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer194// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])195// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]196//197svint32_t test_svqadd_n_s32(svint32_t op1, int32_t op2) MODE_ATTR198{199 return SVE_ACLE_FUNC(svqadd,_n_s32,,)(op1, op2);200}201 202// CHECK-LABEL: @test_svqadd_n_s64(203// CHECK-NEXT: entry:204// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP2:%.*]], i64 0205// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer206// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])207// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]208//209// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s64u11__SVInt64_tl(210// CPP-CHECK-NEXT: entry:211// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP2:%.*]], i64 0212// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer213// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])214// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]215//216svint64_t test_svqadd_n_s64(svint64_t op1, int64_t op2) MODE_ATTR217{218 return SVE_ACLE_FUNC(svqadd,_n_s64,,)(op1, op2);219}220 221// CHECK-LABEL: @test_svqadd_n_u8(222// CHECK-NEXT: entry:223// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0224// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer225// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])226// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]227//228// CPP-CHECK-LABEL: @_Z16test_svqadd_n_u8u11__SVUint8_th(229// CPP-CHECK-NEXT: entry:230// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0231// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer232// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])233// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]234//235svuint8_t test_svqadd_n_u8(svuint8_t op1, uint8_t op2) MODE_ATTR236{237 return SVE_ACLE_FUNC(svqadd,_n_u8,,)(op1, op2);238}239 240// CHECK-LABEL: @test_svqadd_n_u16(241// CHECK-NEXT: entry:242// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0243// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer244// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])245// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]246//247// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u16u12__SVUint16_tt(248// CPP-CHECK-NEXT: entry:249// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0250// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer251// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])252// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]253//254svuint16_t test_svqadd_n_u16(svuint16_t op1, uint16_t op2) MODE_ATTR255{256 return SVE_ACLE_FUNC(svqadd,_n_u16,,)(op1, op2);257}258 259// CHECK-LABEL: @test_svqadd_n_u32(260// CHECK-NEXT: entry:261// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0262// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer263// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])264// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]265//266// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u32u12__SVUint32_tj(267// CPP-CHECK-NEXT: entry:268// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0269// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer270// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])271// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]272//273svuint32_t test_svqadd_n_u32(svuint32_t op1, uint32_t op2) MODE_ATTR274{275 return SVE_ACLE_FUNC(svqadd,_n_u32,,)(op1, op2);276}277 278// CHECK-LABEL: @test_svqadd_n_u64(279// CHECK-NEXT: entry:280// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP2:%.*]], i64 0281// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer282// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])283// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]284//285// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u64u12__SVUint64_tm(286// CPP-CHECK-NEXT: entry:287// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP2:%.*]], i64 0288// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer289// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])290// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]291//292svuint64_t test_svqadd_n_u64(svuint64_t op1, uint64_t op2) MODE_ATTR293{294 return SVE_ACLE_FUNC(svqadd,_n_u64,,)(op1, op2);295}296