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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sve.h>11 12#if defined __ARM_FEATURE_SME13#define MODE_ATTR __arm_streaming14#else15#define MODE_ATTR16#endif17 18#ifdef SVE_OVERLOADED_FORMS19// A simple used,unused... macro, long enough to represent any SVE builtin.20#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A321#else22#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A423#endif24 25// CHECK-LABEL: @test_svqdecp_n_s32_b8(26// CHECK-NEXT: entry:27// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 [[OP:%.*]], <vscale x 16 x i1> [[PG:%.*]])28// CHECK-NEXT: ret i32 [[TMP0]]29//30// CPP-CHECK-LABEL: @_Z21test_svqdecp_n_s32_b8iu10__SVBool_t(31// CPP-CHECK-NEXT: entry:32// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 [[OP:%.*]], <vscale x 16 x i1> [[PG:%.*]])33// CPP-CHECK-NEXT: ret i32 [[TMP0]]34//35int32_t test_svqdecp_n_s32_b8(int32_t op, svbool_t pg) MODE_ATTR36{37 return SVE_ACLE_FUNC(svqdecp,_n_s32,_b8,)(op, pg);38}39 40// CHECK-LABEL: @test_svqdecp_n_s32_b16(41// CHECK-NEXT: entry:42// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])43// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])44// CHECK-NEXT: ret i32 [[TMP1]]45//46// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b16iu10__SVBool_t(47// CPP-CHECK-NEXT: entry:48// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])49// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])50// CPP-CHECK-NEXT: ret i32 [[TMP1]]51//52int32_t test_svqdecp_n_s32_b16(int32_t op, svbool_t pg) MODE_ATTR53{54 return SVE_ACLE_FUNC(svqdecp,_n_s32,_b16,)(op, pg);55}56 57// CHECK-LABEL: @test_svqdecp_n_s32_b32(58// CHECK-NEXT: entry:59// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])60// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])61// CHECK-NEXT: ret i32 [[TMP1]]62//63// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b32iu10__SVBool_t(64// CPP-CHECK-NEXT: entry:65// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])66// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])67// CPP-CHECK-NEXT: ret i32 [[TMP1]]68//69int32_t test_svqdecp_n_s32_b32(int32_t op, svbool_t pg) MODE_ATTR70{71 return SVE_ACLE_FUNC(svqdecp,_n_s32,_b32,)(op, pg);72}73 74// CHECK-LABEL: @test_svqdecp_n_s32_b64(75// CHECK-NEXT: entry:76// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])77// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])78// CHECK-NEXT: ret i32 [[TMP1]]79//80// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b64iu10__SVBool_t(81// CPP-CHECK-NEXT: entry:82// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])83// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])84// CPP-CHECK-NEXT: ret i32 [[TMP1]]85//86int32_t test_svqdecp_n_s32_b64(int32_t op, svbool_t pg) MODE_ATTR87{88 return SVE_ACLE_FUNC(svqdecp,_n_s32,_b64,)(op, pg);89}90 91// CHECK-LABEL: @test_svqdecp_n_s64_b8(92// CHECK-NEXT: entry:93// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 [[OP:%.*]], <vscale x 16 x i1> [[PG:%.*]])94// CHECK-NEXT: ret i64 [[TMP0]]95//96// CPP-CHECK-LABEL: @_Z21test_svqdecp_n_s64_b8lu10__SVBool_t(97// CPP-CHECK-NEXT: entry:98// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 [[OP:%.*]], <vscale x 16 x i1> [[PG:%.*]])99// CPP-CHECK-NEXT: ret i64 [[TMP0]]100//101int64_t test_svqdecp_n_s64_b8(int64_t op, svbool_t pg) MODE_ATTR102{103 return SVE_ACLE_FUNC(svqdecp,_n_s64,_b8,)(op, pg);104}105 106// CHECK-LABEL: @test_svqdecp_n_s64_b16(107// CHECK-NEXT: entry:108// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])109// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])110// CHECK-NEXT: ret i64 [[TMP1]]111//112// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b16lu10__SVBool_t(113// CPP-CHECK-NEXT: entry:114// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])115// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])116// CPP-CHECK-NEXT: ret i64 [[TMP1]]117//118int64_t test_svqdecp_n_s64_b16(int64_t op, svbool_t pg) MODE_ATTR119{120 return SVE_ACLE_FUNC(svqdecp,_n_s64,_b16,)(op, pg);121}122 123// CHECK-LABEL: @test_svqdecp_n_s64_b32(124// CHECK-NEXT: entry:125// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])126// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])127// CHECK-NEXT: ret i64 [[TMP1]]128//129// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b32lu10__SVBool_t(130// CPP-CHECK-NEXT: entry:131// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])132// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])133// CPP-CHECK-NEXT: ret i64 [[TMP1]]134//135int64_t test_svqdecp_n_s64_b32(int64_t op, svbool_t pg) MODE_ATTR136{137 return SVE_ACLE_FUNC(svqdecp,_n_s64,_b32,)(op, pg);138}139 140// CHECK-LABEL: @test_svqdecp_n_s64_b64(141// CHECK-NEXT: entry:142// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])143// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])144// CHECK-NEXT: ret i64 [[TMP1]]145//146// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b64lu10__SVBool_t(147// CPP-CHECK-NEXT: entry:148// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])149// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])150// CPP-CHECK-NEXT: ret i64 [[TMP1]]151//152int64_t test_svqdecp_n_s64_b64(int64_t op, svbool_t pg) MODE_ATTR153{154 return SVE_ACLE_FUNC(svqdecp,_n_s64,_b64,)(op, pg);155}156 157// CHECK-LABEL: @test_svqdecp_n_u32_b8(158// CHECK-NEXT: entry:159// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 [[OP:%.*]], <vscale x 16 x i1> [[PG:%.*]])160// CHECK-NEXT: ret i32 [[TMP0]]161//162// CPP-CHECK-LABEL: @_Z21test_svqdecp_n_u32_b8ju10__SVBool_t(163// CPP-CHECK-NEXT: entry:164// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 [[OP:%.*]], <vscale x 16 x i1> [[PG:%.*]])165// CPP-CHECK-NEXT: ret i32 [[TMP0]]166//167uint32_t test_svqdecp_n_u32_b8(uint32_t op, svbool_t pg) MODE_ATTR168{169 return SVE_ACLE_FUNC(svqdecp,_n_u32,_b8,)(op, pg);170}171 172// CHECK-LABEL: @test_svqdecp_n_u32_b16(173// CHECK-NEXT: entry:174// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])175// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])176// CHECK-NEXT: ret i32 [[TMP1]]177//178// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b16ju10__SVBool_t(179// CPP-CHECK-NEXT: entry:180// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])181// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])182// CPP-CHECK-NEXT: ret i32 [[TMP1]]183//184uint32_t test_svqdecp_n_u32_b16(uint32_t op, svbool_t pg) MODE_ATTR185{186 return SVE_ACLE_FUNC(svqdecp,_n_u32,_b16,)(op, pg);187}188 189// CHECK-LABEL: @test_svqdecp_n_u32_b32(190// CHECK-NEXT: entry:191// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])192// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])193// CHECK-NEXT: ret i32 [[TMP1]]194//195// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b32ju10__SVBool_t(196// CPP-CHECK-NEXT: entry:197// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])198// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])199// CPP-CHECK-NEXT: ret i32 [[TMP1]]200//201uint32_t test_svqdecp_n_u32_b32(uint32_t op, svbool_t pg) MODE_ATTR202{203 return SVE_ACLE_FUNC(svqdecp,_n_u32,_b32,)(op, pg);204}205 206// CHECK-LABEL: @test_svqdecp_n_u32_b64(207// CHECK-NEXT: entry:208// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])209// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])210// CHECK-NEXT: ret i32 [[TMP1]]211//212// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b64ju10__SVBool_t(213// CPP-CHECK-NEXT: entry:214// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])215// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])216// CPP-CHECK-NEXT: ret i32 [[TMP1]]217//218uint32_t test_svqdecp_n_u32_b64(uint32_t op, svbool_t pg) MODE_ATTR219{220 return SVE_ACLE_FUNC(svqdecp,_n_u32,_b64,)(op, pg);221}222 223// CHECK-LABEL: @test_svqdecp_n_u64_b8(224// CHECK-NEXT: entry:225// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 [[OP:%.*]], <vscale x 16 x i1> [[PG:%.*]])226// CHECK-NEXT: ret i64 [[TMP0]]227//228// CPP-CHECK-LABEL: @_Z21test_svqdecp_n_u64_b8mu10__SVBool_t(229// CPP-CHECK-NEXT: entry:230// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 [[OP:%.*]], <vscale x 16 x i1> [[PG:%.*]])231// CPP-CHECK-NEXT: ret i64 [[TMP0]]232//233uint64_t test_svqdecp_n_u64_b8(uint64_t op, svbool_t pg) MODE_ATTR234{235 return SVE_ACLE_FUNC(svqdecp,_n_u64,_b8,)(op, pg);236}237 238// CHECK-LABEL: @test_svqdecp_n_u64_b16(239// CHECK-NEXT: entry:240// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])241// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])242// CHECK-NEXT: ret i64 [[TMP1]]243//244// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b16mu10__SVBool_t(245// CPP-CHECK-NEXT: entry:246// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])247// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])248// CPP-CHECK-NEXT: ret i64 [[TMP1]]249//250uint64_t test_svqdecp_n_u64_b16(uint64_t op, svbool_t pg) MODE_ATTR251{252 return SVE_ACLE_FUNC(svqdecp,_n_u64,_b16,)(op, pg);253}254 255// CHECK-LABEL: @test_svqdecp_n_u64_b32(256// CHECK-NEXT: entry:257// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])258// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])259// CHECK-NEXT: ret i64 [[TMP1]]260//261// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b32mu10__SVBool_t(262// CPP-CHECK-NEXT: entry:263// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])264// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])265// CPP-CHECK-NEXT: ret i64 [[TMP1]]266//267uint64_t test_svqdecp_n_u64_b32(uint64_t op, svbool_t pg) MODE_ATTR268{269 return SVE_ACLE_FUNC(svqdecp,_n_u64,_b32,)(op, pg);270}271 272// CHECK-LABEL: @test_svqdecp_n_u64_b64(273// CHECK-NEXT: entry:274// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])275// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])276// CHECK-NEXT: ret i64 [[TMP1]]277//278// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b64mu10__SVBool_t(279// CPP-CHECK-NEXT: entry:280// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])281// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])282// CPP-CHECK-NEXT: ret i64 [[TMP1]]283//284uint64_t test_svqdecp_n_u64_b64(uint64_t op, svbool_t pg) MODE_ATTR285{286 return SVE_ACLE_FUNC(svqdecp,_n_u64,_b64,)(op, pg);287}288 289// CHECK-LABEL: @test_svqdecp_s16(290// CHECK-NEXT: entry:291// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])292// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqdecp.nxv8i16(<vscale x 8 x i16> [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])293// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]294//295// CPP-CHECK-LABEL: @_Z16test_svqdecp_s16u11__SVInt16_tu10__SVBool_t(296// CPP-CHECK-NEXT: entry:297// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])298// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqdecp.nxv8i16(<vscale x 8 x i16> [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])299// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]300//301svint16_t test_svqdecp_s16(svint16_t op, svbool_t pg) MODE_ATTR302{303 return SVE_ACLE_FUNC(svqdecp,_s16,,)(op, pg);304}305 306// CHECK-LABEL: @test_svqdecp_s32(307// CHECK-NEXT: entry:308// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])309// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqdecp.nxv4i32(<vscale x 4 x i32> [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])310// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]311//312// CPP-CHECK-LABEL: @_Z16test_svqdecp_s32u11__SVInt32_tu10__SVBool_t(313// CPP-CHECK-NEXT: entry:314// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])315// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqdecp.nxv4i32(<vscale x 4 x i32> [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])316// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]317//318svint32_t test_svqdecp_s32(svint32_t op, svbool_t pg) MODE_ATTR319{320 return SVE_ACLE_FUNC(svqdecp,_s32,,)(op, pg);321}322 323// CHECK-LABEL: @test_svqdecp_s64(324// CHECK-NEXT: entry:325// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])326// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqdecp.nxv2i64(<vscale x 2 x i64> [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])327// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]328//329// CPP-CHECK-LABEL: @_Z16test_svqdecp_s64u11__SVInt64_tu10__SVBool_t(330// CPP-CHECK-NEXT: entry:331// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])332// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqdecp.nxv2i64(<vscale x 2 x i64> [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])333// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]334//335svint64_t test_svqdecp_s64(svint64_t op, svbool_t pg) MODE_ATTR336{337 return SVE_ACLE_FUNC(svqdecp,_s64,,)(op, pg);338}339 340// CHECK-LABEL: @test_svqdecp_u16(341// CHECK-NEXT: entry:342// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])343// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqdecp.nxv8i16(<vscale x 8 x i16> [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])344// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]345//346// CPP-CHECK-LABEL: @_Z16test_svqdecp_u16u12__SVUint16_tu10__SVBool_t(347// CPP-CHECK-NEXT: entry:348// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])349// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqdecp.nxv8i16(<vscale x 8 x i16> [[OP:%.*]], <vscale x 8 x i1> [[TMP0]])350// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]351//352svuint16_t test_svqdecp_u16(svuint16_t op, svbool_t pg) MODE_ATTR353{354 return SVE_ACLE_FUNC(svqdecp,_u16,,)(op, pg);355}356 357// CHECK-LABEL: @test_svqdecp_u32(358// CHECK-NEXT: entry:359// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])360// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqdecp.nxv4i32(<vscale x 4 x i32> [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])361// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]362//363// CPP-CHECK-LABEL: @_Z16test_svqdecp_u32u12__SVUint32_tu10__SVBool_t(364// CPP-CHECK-NEXT: entry:365// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])366// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqdecp.nxv4i32(<vscale x 4 x i32> [[OP:%.*]], <vscale x 4 x i1> [[TMP0]])367// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]368//369svuint32_t test_svqdecp_u32(svuint32_t op, svbool_t pg) MODE_ATTR370{371 return SVE_ACLE_FUNC(svqdecp,_u32,,)(op, pg);372}373 374// CHECK-LABEL: @test_svqdecp_u64(375// CHECK-NEXT: entry:376// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])377// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqdecp.nxv2i64(<vscale x 2 x i64> [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])378// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]379//380// CPP-CHECK-LABEL: @_Z16test_svqdecp_u64u12__SVUint64_tu10__SVBool_t(381// CPP-CHECK-NEXT: entry:382// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])383// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqdecp.nxv2i64(<vscale x 2 x i64> [[OP:%.*]], <vscale x 2 x i1> [[TMP0]])384// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]385//386svuint64_t test_svqdecp_u64(svuint64_t op, svbool_t pg) MODE_ATTR387{388 return SVE_ACLE_FUNC(svqdecp,_u64,,)(op, pg);389}390