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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s6#include <arm_sve.h>7 8// CHECK-LABEL: @test_svrdffr(9// CHECK-NEXT: entry:10// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.rdffr.z(<vscale x 16 x i1> splat (i1 true))11// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]12//13// CPP-CHECK-LABEL: @_Z12test_svrdffrv(14// CPP-CHECK-NEXT: entry:15// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.rdffr.z(<vscale x 16 x i1> splat (i1 true))16// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]17//18svbool_t test_svrdffr()19{20 return svrdffr();21}22 23// CHECK-LABEL: @test_svrdffr_z(24// CHECK-NEXT: entry:25// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.rdffr.z(<vscale x 16 x i1> [[PG:%.*]])26// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]27//28// CPP-CHECK-LABEL: @_Z14test_svrdffr_zu10__SVBool_t(29// CPP-CHECK-NEXT: entry:30// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.rdffr.z(<vscale x 16 x i1> [[PG:%.*]])31// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]32//33svbool_t test_svrdffr_z(svbool_t pg)34{35 return svrdffr_z(pg);36}37