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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +i8mm -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -target-feature +i8mm -S -disable-O0-optnone -Werror -Wall -o /dev/null %s9 10#include <arm_sve.h>11 12#if defined __ARM_FEATURE_SME13#define MODE_ATTR __arm_streaming14#else15#define MODE_ATTR16#endif17 18 19#ifdef SVE_OVERLOADED_FORMS20// A simple used,unused... macro, long enough to represent any SVE builtin.21#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A322#else23#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A424#endif25 26// CHECK-LABEL: @test_svsudot_s32(27// CHECK-NEXT: entry:28// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Z:%.*]], <vscale x 16 x i8> [[Y:%.*]])29// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]30//31// CPP-CHECK-LABEL: @_Z16test_svsudot_s32u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t(32// CPP-CHECK-NEXT: entry:33// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Z:%.*]], <vscale x 16 x i8> [[Y:%.*]])34// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]35//36svint32_t test_svsudot_s32(svint32_t x, svint8_t y, svuint8_t z) MODE_ATTR {37 return SVE_ACLE_FUNC(svsudot, _s32, , )(x, y, z);38}39 40// CHECK-LABEL: @test_svsudot_n_s32(41// CHECK-NEXT: entry:42// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[Z:%.*]], i64 043// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer44// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[DOTSPLAT]], <vscale x 16 x i8> [[Y:%.*]])45// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]46//47// CPP-CHECK-LABEL: @_Z18test_svsudot_n_s32u11__SVInt32_tu10__SVInt8_th(48// CPP-CHECK-NEXT: entry:49// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[Z:%.*]], i64 050// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer51// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[DOTSPLAT]], <vscale x 16 x i8> [[Y:%.*]])52// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]53//54svint32_t test_svsudot_n_s32(svint32_t x, svint8_t y, uint8_t z) MODE_ATTR {55 return SVE_ACLE_FUNC(svsudot, _n_s32, , )(x, y, z);56}57 58// CHECK-LABEL: @test_svsudot_lane_s32_0(59// CHECK-NEXT: entry:60// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Y:%.*]], <vscale x 16 x i8> [[Z:%.*]], i32 0)61// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]62//63// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_0u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t(64// CPP-CHECK-NEXT: entry:65// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Y:%.*]], <vscale x 16 x i8> [[Z:%.*]], i32 0)66// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]67//68svint32_t test_svsudot_lane_s32_0(svint32_t x, svint8_t y, svuint8_t z) MODE_ATTR {69 return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 0);70}71 72// CHECK-LABEL: @test_svsudot_lane_s32_1(73// CHECK-NEXT: entry:74// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Y:%.*]], <vscale x 16 x i8> [[Z:%.*]], i32 1)75// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]76//77// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t(78// CPP-CHECK-NEXT: entry:79// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Y:%.*]], <vscale x 16 x i8> [[Z:%.*]], i32 1)80// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]81//82svint32_t test_svsudot_lane_s32_1(svint32_t x, svint8_t y, svuint8_t z) MODE_ATTR {83 return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 1);84}85 86// CHECK-LABEL: @test_svsudot_lane_s32_2(87// CHECK-NEXT: entry:88// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Y:%.*]], <vscale x 16 x i8> [[Z:%.*]], i32 2)89// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]90//91// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_2u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t(92// CPP-CHECK-NEXT: entry:93// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Y:%.*]], <vscale x 16 x i8> [[Z:%.*]], i32 2)94// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]95//96svint32_t test_svsudot_lane_s32_2(svint32_t x, svint8_t y, svuint8_t z) MODE_ATTR {97 return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 2);98}99 100// CHECK-LABEL: @test_svsudot_lane_s32_3(101// CHECK-NEXT: entry:102// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Y:%.*]], <vscale x 16 x i8> [[Z:%.*]], i32 3)103// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]104//105// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_3u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t(106// CPP-CHECK-NEXT: entry:107// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> [[X:%.*]], <vscale x 16 x i8> [[Y:%.*]], <vscale x 16 x i8> [[Z:%.*]], i32 3)108// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]109//110svint32_t test_svsudot_lane_s32_3(svint32_t x, svint8_t y, svuint8_t z) MODE_ATTR {111 return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 3);112}113