76 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s8#include <arm_sve.h>9 10#ifdef SVE_OVERLOADED_FORMS11// A simple used,unused... macro, long enough to represent any SVE builtin.12#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A313#else14#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A415#endif16 17// CHECK-LABEL: @test_svtmad_f16(18// CHECK-NEXT: entry:19// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ftmad.x.nxv8f16(<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], i32 0)20// CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]21//22// CPP-CHECK-LABEL: @_Z15test_svtmad_f16u13__SVFloat16_tS_(23// CPP-CHECK-NEXT: entry:24// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ftmad.x.nxv8f16(<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], i32 0)25// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]26//27svfloat16_t test_svtmad_f16(svfloat16_t op1, svfloat16_t op2)28{29 return SVE_ACLE_FUNC(svtmad,_f16,,)(op1, op2, 0);30}31 32// CHECK-LABEL: @test_svtmad_f16_1(33// CHECK-NEXT: entry:34// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ftmad.x.nxv8f16(<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], i32 7)35// CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]36//37// CPP-CHECK-LABEL: @_Z17test_svtmad_f16_1u13__SVFloat16_tS_(38// CPP-CHECK-NEXT: entry:39// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ftmad.x.nxv8f16(<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], i32 7)40// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]41//42svfloat16_t test_svtmad_f16_1(svfloat16_t op1, svfloat16_t op2)43{44 return SVE_ACLE_FUNC(svtmad,_f16,,)(op1, op2, 7);45}46 47// CHECK-LABEL: @test_svtmad_f32(48// CHECK-NEXT: entry:49// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.ftmad.x.nxv4f32(<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]], i32 0)50// CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]51//52// CPP-CHECK-LABEL: @_Z15test_svtmad_f32u13__SVFloat32_tS_(53// CPP-CHECK-NEXT: entry:54// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.ftmad.x.nxv4f32(<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]], i32 0)55// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]56//57svfloat32_t test_svtmad_f32(svfloat32_t op1, svfloat32_t op2)58{59 return SVE_ACLE_FUNC(svtmad,_f32,,)(op1, op2, 0);60}61 62// CHECK-LABEL: @test_svtmad_f64(63// CHECK-NEXT: entry:64// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.ftmad.x.nxv2f64(<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]], i32 0)65// CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]66//67// CPP-CHECK-LABEL: @_Z15test_svtmad_f64u13__SVFloat64_tS_(68// CPP-CHECK-NEXT: entry:69// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.ftmad.x.nxv2f64(<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]], i32 0)70// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]71//72svfloat64_t test_svtmad_f64(svfloat64_t op1, svfloat64_t op2)73{74 return SVE_ACLE_FUNC(svtmad,_f64,,)(op1, op2, 0);75}76