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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s6// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s8// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -o /dev/null %s9 10#include <arm_sve.h>11 12#if defined __ARM_FEATURE_SME13#define MODE_ATTR __arm_streaming14#else15#define MODE_ATTR16#endif17 18#ifdef SVE_OVERLOADED_FORMS19// A simple used,unused... macro, long enough to represent any SVE builtin.20#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A321#else22#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A423#endif24 25// CHECK-LABEL: @test_svunpklo_s16(26// CHECK-NEXT: entry:27// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sunpklo.nxv8i16(<vscale x 16 x i8> [[OP:%.*]])28// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]29//30// CPP-CHECK-LABEL: @_Z17test_svunpklo_s16u10__SVInt8_t(31// CPP-CHECK-NEXT: entry:32// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sunpklo.nxv8i16(<vscale x 16 x i8> [[OP:%.*]])33// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]34//35svint16_t test_svunpklo_s16(svint8_t op) MODE_ATTR36{37 return SVE_ACLE_FUNC(svunpklo,_s16,,)(op);38}39 40// CHECK-LABEL: @test_svunpklo_s32(41// CHECK-NEXT: entry:42// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sunpklo.nxv4i32(<vscale x 8 x i16> [[OP:%.*]])43// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]44//45// CPP-CHECK-LABEL: @_Z17test_svunpklo_s32u11__SVInt16_t(46// CPP-CHECK-NEXT: entry:47// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sunpklo.nxv4i32(<vscale x 8 x i16> [[OP:%.*]])48// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]49//50svint32_t test_svunpklo_s32(svint16_t op) MODE_ATTR51{52 return SVE_ACLE_FUNC(svunpklo,_s32,,)(op);53}54 55// CHECK-LABEL: @test_svunpklo_s64(56// CHECK-NEXT: entry:57// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sunpklo.nxv2i64(<vscale x 4 x i32> [[OP:%.*]])58// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]59//60// CPP-CHECK-LABEL: @_Z17test_svunpklo_s64u11__SVInt32_t(61// CPP-CHECK-NEXT: entry:62// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sunpklo.nxv2i64(<vscale x 4 x i32> [[OP:%.*]])63// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]64//65svint64_t test_svunpklo_s64(svint32_t op) MODE_ATTR66{67 return SVE_ACLE_FUNC(svunpklo,_s64,,)(op);68}69 70// CHECK-LABEL: @test_svunpklo_u16(71// CHECK-NEXT: entry:72// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uunpklo.nxv8i16(<vscale x 16 x i8> [[OP:%.*]])73// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]74//75// CPP-CHECK-LABEL: @_Z17test_svunpklo_u16u11__SVUint8_t(76// CPP-CHECK-NEXT: entry:77// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uunpklo.nxv8i16(<vscale x 16 x i8> [[OP:%.*]])78// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]79//80svuint16_t test_svunpklo_u16(svuint8_t op) MODE_ATTR81{82 return SVE_ACLE_FUNC(svunpklo,_u16,,)(op);83}84 85// CHECK-LABEL: @test_svunpklo_u32(86// CHECK-NEXT: entry:87// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uunpklo.nxv4i32(<vscale x 8 x i16> [[OP:%.*]])88// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]89//90// CPP-CHECK-LABEL: @_Z17test_svunpklo_u32u12__SVUint16_t(91// CPP-CHECK-NEXT: entry:92// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uunpklo.nxv4i32(<vscale x 8 x i16> [[OP:%.*]])93// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]94//95svuint32_t test_svunpklo_u32(svuint16_t op) MODE_ATTR96{97 return SVE_ACLE_FUNC(svunpklo,_u32,,)(op);98}99 100// CHECK-LABEL: @test_svunpklo_u64(101// CHECK-NEXT: entry:102// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uunpklo.nxv2i64(<vscale x 4 x i32> [[OP:%.*]])103// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]104//105// CPP-CHECK-LABEL: @_Z17test_svunpklo_u64u12__SVUint32_t(106// CPP-CHECK-NEXT: entry:107// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uunpklo.nxv2i64(<vscale x 4 x i32> [[OP:%.*]])108// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]109//110svuint64_t test_svunpklo_u64(svuint32_t op) MODE_ATTR111{112 return SVE_ACLE_FUNC(svunpklo,_u64,,)(op);113}114 115// CHECK-LABEL: @test_svunpklo_b(116// CHECK-NEXT: entry:117// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.punpklo.nxv16i1(<vscale x 16 x i1> [[OP:%.*]])118// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])119// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]120//121// CPP-CHECK-LABEL: @_Z15test_svunpklo_bu10__SVBool_t(122// CPP-CHECK-NEXT: entry:123// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.punpklo.nxv16i1(<vscale x 16 x i1> [[OP:%.*]])124// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])125// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]126//127svbool_t test_svunpklo_b(svbool_t op) MODE_ATTR128{129 return SVE_ACLE_FUNC(svunpklo,_b,,)(op);130}131