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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3 4// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK6// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s7// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK8 9#include <arm_sve.h>10 11#ifdef SVE_OVERLOADED_FORMS12// A simple used,unused... macro, long enough to represent any SVE builtin.13#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A314#else15#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A416#endif17 18// CHECK-LABEL: @test_svaddlb_s16(19// CHECK-NEXT: entry:20// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.saddlb.nxv8i16(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])21// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]22//23// CPP-CHECK-LABEL: @_Z16test_svaddlb_s16u10__SVInt8_tS_(24// CPP-CHECK-NEXT: entry:25// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.saddlb.nxv8i16(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])26// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]27//28svint16_t test_svaddlb_s16(svint8_t op1, svint8_t op2)29{30 return SVE_ACLE_FUNC(svaddlb,_s16,,)(op1, op2);31}32 33// CHECK-LABEL: @test_svaddlb_s32(34// CHECK-NEXT: entry:35// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.saddlb.nxv4i32(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])36// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]37//38// CPP-CHECK-LABEL: @_Z16test_svaddlb_s32u11__SVInt16_tS_(39// CPP-CHECK-NEXT: entry:40// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.saddlb.nxv4i32(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])41// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]42//43svint32_t test_svaddlb_s32(svint16_t op1, svint16_t op2)44{45 return SVE_ACLE_FUNC(svaddlb,_s32,,)(op1, op2);46}47 48// CHECK-LABEL: @test_svaddlb_s64(49// CHECK-NEXT: entry:50// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.saddlb.nxv2i64(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])51// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]52//53// CPP-CHECK-LABEL: @_Z16test_svaddlb_s64u11__SVInt32_tS_(54// CPP-CHECK-NEXT: entry:55// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.saddlb.nxv2i64(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])56// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]57//58svint64_t test_svaddlb_s64(svint32_t op1, svint32_t op2)59{60 return SVE_ACLE_FUNC(svaddlb,_s64,,)(op1, op2);61}62 63// CHECK-LABEL: @test_svaddlb_u16(64// CHECK-NEXT: entry:65// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uaddlb.nxv8i16(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])66// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]67//68// CPP-CHECK-LABEL: @_Z16test_svaddlb_u16u11__SVUint8_tS_(69// CPP-CHECK-NEXT: entry:70// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uaddlb.nxv8i16(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])71// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]72//73svuint16_t test_svaddlb_u16(svuint8_t op1, svuint8_t op2)74{75 return SVE_ACLE_FUNC(svaddlb,_u16,,)(op1, op2);76}77 78// CHECK-LABEL: @test_svaddlb_u32(79// CHECK-NEXT: entry:80// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uaddlb.nxv4i32(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])81// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]82//83// CPP-CHECK-LABEL: @_Z16test_svaddlb_u32u12__SVUint16_tS_(84// CPP-CHECK-NEXT: entry:85// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uaddlb.nxv4i32(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])86// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]87//88svuint32_t test_svaddlb_u32(svuint16_t op1, svuint16_t op2)89{90 return SVE_ACLE_FUNC(svaddlb,_u32,,)(op1, op2);91}92 93// CHECK-LABEL: @test_svaddlb_u64(94// CHECK-NEXT: entry:95// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uaddlb.nxv2i64(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])96// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]97//98// CPP-CHECK-LABEL: @_Z16test_svaddlb_u64u12__SVUint32_tS_(99// CPP-CHECK-NEXT: entry:100// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uaddlb.nxv2i64(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])101// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]102//103svuint64_t test_svaddlb_u64(svuint32_t op1, svuint32_t op2)104{105 return SVE_ACLE_FUNC(svaddlb,_u64,,)(op1, op2);106}107 108// CHECK-LABEL: @test_svaddlb_n_s16(109// CHECK-NEXT: entry:110// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0111// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer112// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.saddlb.nxv8i16(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])113// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]114//115// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s16u10__SVInt8_ta(116// CPP-CHECK-NEXT: entry:117// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0118// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer119// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.saddlb.nxv8i16(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])120// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]121//122svint16_t test_svaddlb_n_s16(svint8_t op1, int8_t op2)123{124 return SVE_ACLE_FUNC(svaddlb,_n_s16,,)(op1, op2);125}126 127// CHECK-LABEL: @test_svaddlb_n_s32(128// CHECK-NEXT: entry:129// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0130// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer131// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.saddlb.nxv4i32(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])132// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]133//134// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s32u11__SVInt16_ts(135// CPP-CHECK-NEXT: entry:136// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0137// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer138// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.saddlb.nxv4i32(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])139// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]140//141svint32_t test_svaddlb_n_s32(svint16_t op1, int16_t op2)142{143 return SVE_ACLE_FUNC(svaddlb,_n_s32,,)(op1, op2);144}145 146// CHECK-LABEL: @test_svaddlb_n_s64(147// CHECK-NEXT: entry:148// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0149// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer150// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.saddlb.nxv2i64(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])151// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]152//153// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s64u11__SVInt32_ti(154// CPP-CHECK-NEXT: entry:155// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0156// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer157// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.saddlb.nxv2i64(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])158// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]159//160svint64_t test_svaddlb_n_s64(svint32_t op1, int32_t op2)161{162 return SVE_ACLE_FUNC(svaddlb,_n_s64,,)(op1, op2);163}164 165// CHECK-LABEL: @test_svaddlb_n_u16(166// CHECK-NEXT: entry:167// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0168// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer169// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uaddlb.nxv8i16(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])170// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]171//172// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u16u11__SVUint8_th(173// CPP-CHECK-NEXT: entry:174// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0175// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer176// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uaddlb.nxv8i16(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])177// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]178//179svuint16_t test_svaddlb_n_u16(svuint8_t op1, uint8_t op2)180{181 return SVE_ACLE_FUNC(svaddlb,_n_u16,,)(op1, op2);182}183 184// CHECK-LABEL: @test_svaddlb_n_u32(185// CHECK-NEXT: entry:186// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0187// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer188// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uaddlb.nxv4i32(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])189// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]190//191// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u32u12__SVUint16_tt(192// CPP-CHECK-NEXT: entry:193// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0194// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer195// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uaddlb.nxv4i32(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])196// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]197//198svuint32_t test_svaddlb_n_u32(svuint16_t op1, uint16_t op2)199{200 return SVE_ACLE_FUNC(svaddlb,_n_u32,,)(op1, op2);201}202 203// CHECK-LABEL: @test_svaddlb_n_u64(204// CHECK-NEXT: entry:205// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0206// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer207// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uaddlb.nxv2i64(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])208// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]209//210// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u64u12__SVUint32_tj(211// CPP-CHECK-NEXT: entry:212// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0213// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer214// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uaddlb.nxv2i64(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])215// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]216//217svuint64_t test_svaddlb_n_u64(svuint32_t op1, uint32_t op2)218{219 return SVE_ACLE_FUNC(svaddlb,_n_u64,,)(op1, op2);220}221