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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3 4// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK6// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s7// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK8 9#include <arm_sve.h>10 11#ifdef SVE_OVERLOADED_FORMS12// A simple used,unused... macro, long enough to represent any SVE builtin.13#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A314#else15#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A416#endif17 18// CHECK-LABEL: @test_svbsl1n_s8(19// CHECK-NEXT: entry:20// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.bsl1n.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])21// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]22//23// CPP-CHECK-LABEL: @_Z15test_svbsl1n_s8u10__SVInt8_tS_S_(24// CPP-CHECK-NEXT: entry:25// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.bsl1n.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])26// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]27//28svint8_t test_svbsl1n_s8(svint8_t op1, svint8_t op2, svint8_t op3)29{30 return SVE_ACLE_FUNC(svbsl1n,_s8,,)(op1, op2, op3);31}32 33// CHECK-LABEL: @test_svbsl1n_s16(34// CHECK-NEXT: entry:35// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.bsl1n.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])36// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]37//38// CPP-CHECK-LABEL: @_Z16test_svbsl1n_s16u11__SVInt16_tS_S_(39// CPP-CHECK-NEXT: entry:40// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.bsl1n.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])41// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]42//43svint16_t test_svbsl1n_s16(svint16_t op1, svint16_t op2, svint16_t op3)44{45 return SVE_ACLE_FUNC(svbsl1n,_s16,,)(op1, op2, op3);46}47 48// CHECK-LABEL: @test_svbsl1n_s32(49// CHECK-NEXT: entry:50// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.bsl1n.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])51// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]52//53// CPP-CHECK-LABEL: @_Z16test_svbsl1n_s32u11__SVInt32_tS_S_(54// CPP-CHECK-NEXT: entry:55// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.bsl1n.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])56// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]57//58svint32_t test_svbsl1n_s32(svint32_t op1, svint32_t op2, svint32_t op3)59{60 return SVE_ACLE_FUNC(svbsl1n,_s32,,)(op1, op2, op3);61}62 63// CHECK-LABEL: @test_svbsl1n_s64(64// CHECK-NEXT: entry:65// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.bsl1n.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])66// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]67//68// CPP-CHECK-LABEL: @_Z16test_svbsl1n_s64u11__SVInt64_tS_S_(69// CPP-CHECK-NEXT: entry:70// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.bsl1n.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])71// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]72//73svint64_t test_svbsl1n_s64(svint64_t op1, svint64_t op2, svint64_t op3)74{75 return SVE_ACLE_FUNC(svbsl1n,_s64,,)(op1, op2, op3);76}77 78// CHECK-LABEL: @test_svbsl1n_u8(79// CHECK-NEXT: entry:80// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.bsl1n.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])81// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]82//83// CPP-CHECK-LABEL: @_Z15test_svbsl1n_u8u11__SVUint8_tS_S_(84// CPP-CHECK-NEXT: entry:85// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.bsl1n.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])86// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]87//88svuint8_t test_svbsl1n_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3)89{90 return SVE_ACLE_FUNC(svbsl1n,_u8,,)(op1, op2, op3);91}92 93// CHECK-LABEL: @test_svbsl1n_u16(94// CHECK-NEXT: entry:95// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.bsl1n.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])96// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]97//98// CPP-CHECK-LABEL: @_Z16test_svbsl1n_u16u12__SVUint16_tS_S_(99// CPP-CHECK-NEXT: entry:100// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.bsl1n.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])101// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]102//103svuint16_t test_svbsl1n_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3)104{105 return SVE_ACLE_FUNC(svbsl1n,_u16,,)(op1, op2, op3);106}107 108// CHECK-LABEL: @test_svbsl1n_u32(109// CHECK-NEXT: entry:110// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.bsl1n.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])111// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]112//113// CPP-CHECK-LABEL: @_Z16test_svbsl1n_u32u12__SVUint32_tS_S_(114// CPP-CHECK-NEXT: entry:115// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.bsl1n.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])116// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]117//118svuint32_t test_svbsl1n_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3)119{120 return SVE_ACLE_FUNC(svbsl1n,_u32,,)(op1, op2, op3);121}122 123// CHECK-LABEL: @test_svbsl1n_u64(124// CHECK-NEXT: entry:125// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.bsl1n.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])126// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]127//128// CPP-CHECK-LABEL: @_Z16test_svbsl1n_u64u12__SVUint64_tS_S_(129// CPP-CHECK-NEXT: entry:130// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.bsl1n.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])131// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]132//133svuint64_t test_svbsl1n_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3)134{135 return SVE_ACLE_FUNC(svbsl1n,_u64,,)(op1, op2, op3);136}137 138// CHECK-LABEL: @test_svbsl1n_n_s8(139// CHECK-NEXT: entry:140// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP3:%.*]], i64 0141// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer142// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.bsl1n.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])143// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]144//145// CPP-CHECK-LABEL: @_Z17test_svbsl1n_n_s8u10__SVInt8_tS_a(146// CPP-CHECK-NEXT: entry:147// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP3:%.*]], i64 0148// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer149// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.bsl1n.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])150// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]151//152svint8_t test_svbsl1n_n_s8(svint8_t op1, svint8_t op2, int8_t op3)153{154 return SVE_ACLE_FUNC(svbsl1n,_n_s8,,)(op1, op2, op3);155}156 157// CHECK-LABEL: @test_svbsl1n_n_s16(158// CHECK-NEXT: entry:159// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP3:%.*]], i64 0160// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer161// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.bsl1n.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])162// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]163//164// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s16u11__SVInt16_tS_s(165// CPP-CHECK-NEXT: entry:166// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP3:%.*]], i64 0167// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer168// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.bsl1n.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])169// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]170//171svint16_t test_svbsl1n_n_s16(svint16_t op1, svint16_t op2, int16_t op3)172{173 return SVE_ACLE_FUNC(svbsl1n,_n_s16,,)(op1, op2, op3);174}175 176// CHECK-LABEL: @test_svbsl1n_n_s32(177// CHECK-NEXT: entry:178// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP3:%.*]], i64 0179// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer180// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.bsl1n.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])181// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]182//183// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s32u11__SVInt32_tS_i(184// CPP-CHECK-NEXT: entry:185// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP3:%.*]], i64 0186// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer187// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.bsl1n.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])188// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]189//190svint32_t test_svbsl1n_n_s32(svint32_t op1, svint32_t op2, int32_t op3)191{192 return SVE_ACLE_FUNC(svbsl1n,_n_s32,,)(op1, op2, op3);193}194 195// CHECK-LABEL: @test_svbsl1n_n_s64(196// CHECK-NEXT: entry:197// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP3:%.*]], i64 0198// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer199// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.bsl1n.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])200// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]201//202// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s64u11__SVInt64_tS_l(203// CPP-CHECK-NEXT: entry:204// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP3:%.*]], i64 0205// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer206// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.bsl1n.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])207// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]208//209svint64_t test_svbsl1n_n_s64(svint64_t op1, svint64_t op2, int64_t op3)210{211 return SVE_ACLE_FUNC(svbsl1n,_n_s64,,)(op1, op2, op3);212}213 214// CHECK-LABEL: @test_svbsl1n_n_u8(215// CHECK-NEXT: entry:216// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP3:%.*]], i64 0217// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer218// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.bsl1n.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])219// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]220//221// CPP-CHECK-LABEL: @_Z17test_svbsl1n_n_u8u11__SVUint8_tS_h(222// CPP-CHECK-NEXT: entry:223// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP3:%.*]], i64 0224// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer225// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.bsl1n.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])226// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]227//228svuint8_t test_svbsl1n_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3)229{230 return SVE_ACLE_FUNC(svbsl1n,_n_u8,,)(op1, op2, op3);231}232 233// CHECK-LABEL: @test_svbsl1n_n_u16(234// CHECK-NEXT: entry:235// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP3:%.*]], i64 0236// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer237// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.bsl1n.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])238// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]239//240// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u16u12__SVUint16_tS_t(241// CPP-CHECK-NEXT: entry:242// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP3:%.*]], i64 0243// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer244// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.bsl1n.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])245// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]246//247svuint16_t test_svbsl1n_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3)248{249 return SVE_ACLE_FUNC(svbsl1n,_n_u16,,)(op1, op2, op3);250}251 252// CHECK-LABEL: @test_svbsl1n_n_u32(253// CHECK-NEXT: entry:254// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP3:%.*]], i64 0255// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer256// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.bsl1n.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])257// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]258//259// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u32u12__SVUint32_tS_j(260// CPP-CHECK-NEXT: entry:261// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP3:%.*]], i64 0262// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer263// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.bsl1n.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])264// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]265//266svuint32_t test_svbsl1n_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3)267{268 return SVE_ACLE_FUNC(svbsl1n,_n_u32,,)(op1, op2, op3);269}270 271// CHECK-LABEL: @test_svbsl1n_n_u64(272// CHECK-NEXT: entry:273// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP3:%.*]], i64 0274// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer275// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.bsl1n.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])276// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]277//278// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u64u12__SVUint64_tS_m(279// CPP-CHECK-NEXT: entry:280// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP3:%.*]], i64 0281// CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer282// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.bsl1n.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])283// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]284//285svuint64_t test_svbsl1n_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3)286{287 return SVE_ACLE_FUNC(svbsl1n,_n_u64,,)(op1, op2, op3);288}289