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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK4// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK6 7// REQUIRES: aarch64-registered-target8 9#include <arm_sve.h>10 11#ifdef SVE_OVERLOADED_FORMS12// A simple used,unused... macro, long enough to represent any SVE builtin.13#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A314#else15#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A416#endif17 18// CHECK-LABEL: @test_svcvtx_f32_f64_z(19// CHECK-NEXT: entry:20// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])21// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])22// CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]23//24// CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_zu10__SVBool_tu13__SVFloat64_t(25// CPP-CHECK-NEXT: entry:26// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])27// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])28// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]29//30svfloat32_t test_svcvtx_f32_f64_z(svbool_t pg, svfloat64_t op)31{32 return SVE_ACLE_FUNC(svcvtx_f32,_f64,_z,)(pg, op);33}34 35// CHECK-LABEL: @test_svcvtx_f32_f64_m(36// CHECK-NEXT: entry:37// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])38// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])39// CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]40//41// CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t(42// CPP-CHECK-NEXT: entry:43// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])44// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])45// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]46//47svfloat32_t test_svcvtx_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op)48{49 return SVE_ACLE_FUNC(svcvtx_f32,_f64,_m,)(inactive, pg, op);50}51 52// CHECK-LABEL: @test_svcvtx_f32_f64_x(53// CHECK-NEXT: entry:54// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])55// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])56// CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]57//58// CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_xu10__SVBool_tu13__SVFloat64_t(59// CPP-CHECK-NEXT: entry:60// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])61// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])62// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]63//64svfloat32_t test_svcvtx_f32_f64_x(svbool_t pg, svfloat64_t op)65{66 return SVE_ACLE_FUNC(svcvtx_f32,_f64,_x,)(pg, op);67}68