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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s3// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK4// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK6 7// REQUIRES: aarch64-registered-target8 9#include <arm_sve.h>10 11#ifdef SVE_OVERLOADED_FORMS12// A simple used,unused... macro, long enough to represent any SVE builtin.13#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A314#else15#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A416#endif17 18// CHECK-LABEL: @test_svmls_lane_s16(19// CHECK-NEXT: entry:20// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.mls.lane.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 0)21// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]22//23// CPP-CHECK-LABEL: @_Z19test_svmls_lane_s16u11__SVInt16_tS_S_(24// CPP-CHECK-NEXT: entry:25// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.mls.lane.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 0)26// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]27//28svint16_t test_svmls_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3)29{30 return SVE_ACLE_FUNC(svmls_lane,_s16,,)(op1, op2, op3, 0);31}32 33// CHECK-LABEL: @test_svmls_lane_s16_1(34// CHECK-NEXT: entry:35// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.mls.lane.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 7)36// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]37//38// CPP-CHECK-LABEL: @_Z21test_svmls_lane_s16_1u11__SVInt16_tS_S_(39// CPP-CHECK-NEXT: entry:40// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.mls.lane.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 7)41// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]42//43svint16_t test_svmls_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3)44{45 return SVE_ACLE_FUNC(svmls_lane,_s16,,)(op1, op2, op3, 7);46}47 48// CHECK-LABEL: @test_svmls_lane_s32(49// CHECK-NEXT: entry:50// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.mls.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]], i32 0)51// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]52//53// CPP-CHECK-LABEL: @_Z19test_svmls_lane_s32u11__SVInt32_tS_S_(54// CPP-CHECK-NEXT: entry:55// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.mls.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]], i32 0)56// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]57//58svint32_t test_svmls_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3)59{60 return SVE_ACLE_FUNC(svmls_lane,_s32,,)(op1, op2, op3, 0);61}62 63// CHECK-LABEL: @test_svmls_lane_s32_1(64// CHECK-NEXT: entry:65// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.mls.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]], i32 3)66// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]67//68// CPP-CHECK-LABEL: @_Z21test_svmls_lane_s32_1u11__SVInt32_tS_S_(69// CPP-CHECK-NEXT: entry:70// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.mls.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]], i32 3)71// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]72//73svint32_t test_svmls_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3)74{75 return SVE_ACLE_FUNC(svmls_lane,_s32,,)(op1, op2, op3, 3);76}77 78// CHECK-LABEL: @test_svmls_lane_s64(79// CHECK-NEXT: entry:80// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.mls.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]], i32 0)81// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]82//83// CPP-CHECK-LABEL: @_Z19test_svmls_lane_s64u11__SVInt64_tS_S_(84// CPP-CHECK-NEXT: entry:85// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.mls.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]], i32 0)86// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]87//88svint64_t test_svmls_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3)89{90 return SVE_ACLE_FUNC(svmls_lane,_s64,,)(op1, op2, op3, 0);91}92 93// CHECK-LABEL: @test_svmls_lane_s64_1(94// CHECK-NEXT: entry:95// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.mls.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]], i32 1)96// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]97//98// CPP-CHECK-LABEL: @_Z21test_svmls_lane_s64_1u11__SVInt64_tS_S_(99// CPP-CHECK-NEXT: entry:100// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.mls.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]], i32 1)101// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]102//103svint64_t test_svmls_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3)104{105 return SVE_ACLE_FUNC(svmls_lane,_s64,,)(op1, op2, op3, 1);106}107 108// CHECK-LABEL: @test_svmls_lane_u16(109// CHECK-NEXT: entry:110// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.mls.lane.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 0)111// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]112//113// CPP-CHECK-LABEL: @_Z19test_svmls_lane_u16u12__SVUint16_tS_S_(114// CPP-CHECK-NEXT: entry:115// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.mls.lane.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 0)116// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]117//118svuint16_t test_svmls_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3)119{120 return SVE_ACLE_FUNC(svmls_lane,_u16,,)(op1, op2, op3, 0);121}122 123// CHECK-LABEL: @test_svmls_lane_u16_1(124// CHECK-NEXT: entry:125// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.mls.lane.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 7)126// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]127//128// CPP-CHECK-LABEL: @_Z21test_svmls_lane_u16_1u12__SVUint16_tS_S_(129// CPP-CHECK-NEXT: entry:130// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.mls.lane.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]], i32 7)131// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]132//133svuint16_t test_svmls_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3)134{135 return SVE_ACLE_FUNC(svmls_lane,_u16,,)(op1, op2, op3, 7);136}137 138// CHECK-LABEL: @test_svmls_lane_u32(139// CHECK-NEXT: entry:140// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.mls.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]], i32 0)141// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]142//143// CPP-CHECK-LABEL: @_Z19test_svmls_lane_u32u12__SVUint32_tS_S_(144// CPP-CHECK-NEXT: entry:145// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.mls.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]], i32 0)146// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]147//148svuint32_t test_svmls_lane_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3)149{150 return SVE_ACLE_FUNC(svmls_lane,_u32,,)(op1, op2, op3, 0);151}152 153// CHECK-LABEL: @test_svmls_lane_u32_1(154// CHECK-NEXT: entry:155// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.mls.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]], i32 3)156// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]157//158// CPP-CHECK-LABEL: @_Z21test_svmls_lane_u32_1u12__SVUint32_tS_S_(159// CPP-CHECK-NEXT: entry:160// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.mls.lane.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]], i32 3)161// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]162//163svuint32_t test_svmls_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3)164{165 return SVE_ACLE_FUNC(svmls_lane,_u32,,)(op1, op2, op3, 3);166}167 168// CHECK-LABEL: @test_svmls_lane_u64(169// CHECK-NEXT: entry:170// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.mls.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]], i32 0)171// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]172//173// CPP-CHECK-LABEL: @_Z19test_svmls_lane_u64u12__SVUint64_tS_S_(174// CPP-CHECK-NEXT: entry:175// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.mls.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]], i32 0)176// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]177//178svuint64_t test_svmls_lane_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3)179{180 return SVE_ACLE_FUNC(svmls_lane,_u64,,)(op1, op2, op3, 0);181}182 183// CHECK-LABEL: @test_svmls_lane_u64_1(184// CHECK-NEXT: entry:185// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.mls.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]], i32 1)186// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]187//188// CPP-CHECK-LABEL: @_Z21test_svmls_lane_u64_1u12__SVUint64_tS_S_(189// CPP-CHECK-NEXT: entry:190// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.mls.lane.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]], i32 1)191// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]192//193svuint64_t test_svmls_lane_u64_1(svuint64_t op1, svuint64_t op2, svuint64_t op3)194{195 return SVE_ACLE_FUNC(svmls_lane,_u64,,)(op1, op2, op3, 1);196}197