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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK4// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK6 7// REQUIRES: aarch64-registered-target8 9#include <arm_sve.h>10 11#ifdef SVE_OVERLOADED_FORMS12// A simple used,unused... macro, long enough to represent any SVE builtin.13#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A314#else15#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A416#endif17 18// CHECK-LABEL: @test_svqshlu_n_s8_z(19// CHECK-NEXT: entry:20// CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer21// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 0)22// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]23//24// CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_zu10__SVBool_tu10__SVInt8_t(25// CPP-CHECK-NEXT: entry:26// CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer27// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 0)28// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]29//30svuint8_t test_svqshlu_n_s8_z(svbool_t pg, svint8_t op1)31{32 return SVE_ACLE_FUNC(svqshlu,_n_s8,_z,)(pg, op1, 0);33}34 35// CHECK-LABEL: @test_svqshlu_n_s8_z_1(36// CHECK-NEXT: entry:37// CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer38// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 7)39// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]40//41// CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_z_1u10__SVBool_tu10__SVInt8_t(42// CPP-CHECK-NEXT: entry:43// CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer44// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 7)45// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]46//47svuint8_t test_svqshlu_n_s8_z_1(svbool_t pg, svint8_t op1)48{49 return SVE_ACLE_FUNC(svqshlu,_n_s8,_z,)(pg, op1, 7);50}51 52// CHECK-LABEL: @test_svqshlu_n_s16_z(53// CHECK-NEXT: entry:54// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])55// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer56// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 0)57// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]58//59// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_zu10__SVBool_tu11__SVInt16_t(60// CPP-CHECK-NEXT: entry:61// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])62// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer63// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 0)64// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]65//66svuint16_t test_svqshlu_n_s16_z(svbool_t pg, svint16_t op1)67{68 return SVE_ACLE_FUNC(svqshlu,_n_s16,_z,)(pg, op1, 0);69}70 71// CHECK-LABEL: @test_svqshlu_n_s16_z_1(72// CHECK-NEXT: entry:73// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])74// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer75// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 15)76// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]77//78// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_z_1u10__SVBool_tu11__SVInt16_t(79// CPP-CHECK-NEXT: entry:80// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])81// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer82// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 15)83// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]84//85svuint16_t test_svqshlu_n_s16_z_1(svbool_t pg, svint16_t op1)86{87 return SVE_ACLE_FUNC(svqshlu,_n_s16,_z,)(pg, op1, 15);88}89 90// CHECK-LABEL: @test_svqshlu_n_s32_z(91// CHECK-NEXT: entry:92// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])93// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer94// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 0)95// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]96//97// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_zu10__SVBool_tu11__SVInt32_t(98// CPP-CHECK-NEXT: entry:99// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])100// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer101// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 0)102// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]103//104svuint32_t test_svqshlu_n_s32_z(svbool_t pg, svint32_t op1)105{106 return SVE_ACLE_FUNC(svqshlu,_n_s32,_z,)(pg, op1, 0);107}108 109// CHECK-LABEL: @test_svqshlu_n_s32_z_1(110// CHECK-NEXT: entry:111// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])112// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer113// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 31)114// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]115//116// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_z_1u10__SVBool_tu11__SVInt32_t(117// CPP-CHECK-NEXT: entry:118// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])119// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer120// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 31)121// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]122//123svuint32_t test_svqshlu_n_s32_z_1(svbool_t pg, svint32_t op1)124{125 return SVE_ACLE_FUNC(svqshlu,_n_s32,_z,)(pg, op1, 31);126}127 128// CHECK-LABEL: @test_svqshlu_n_s64_z(129// CHECK-NEXT: entry:130// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])131// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer132// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 0)133// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]134//135// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_zu10__SVBool_tu11__SVInt64_t(136// CPP-CHECK-NEXT: entry:137// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])138// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer139// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 0)140// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]141//142svuint64_t test_svqshlu_n_s64_z(svbool_t pg, svint64_t op1)143{144 return SVE_ACLE_FUNC(svqshlu,_n_s64,_z,)(pg, op1, 0);145}146 147// CHECK-LABEL: @test_svqshlu_n_s64_z_1(148// CHECK-NEXT: entry:149// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])150// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer151// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 63)152// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]153//154// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_z_1u10__SVBool_tu11__SVInt64_t(155// CPP-CHECK-NEXT: entry:156// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])157// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer158// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 63)159// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]160//161svuint64_t test_svqshlu_n_s64_z_1(svbool_t pg, svint64_t op1)162{163 return SVE_ACLE_FUNC(svqshlu,_n_s64,_z,)(pg, op1, 63);164}165 166// CHECK-LABEL: @test_svqshlu_n_s8_m(167// CHECK-NEXT: entry:168// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 0)169// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]170//171// CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_mu10__SVBool_tu10__SVInt8_t(172// CPP-CHECK-NEXT: entry:173// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 0)174// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]175//176svuint8_t test_svqshlu_n_s8_m(svbool_t pg, svint8_t op1)177{178 return SVE_ACLE_FUNC(svqshlu,_n_s8,_m,)(pg, op1, 0);179}180 181// CHECK-LABEL: @test_svqshlu_n_s8_m_1(182// CHECK-NEXT: entry:183// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 7)184// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]185//186// CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_m_1u10__SVBool_tu10__SVInt8_t(187// CPP-CHECK-NEXT: entry:188// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 7)189// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]190//191svuint8_t test_svqshlu_n_s8_m_1(svbool_t pg, svint8_t op1)192{193 return SVE_ACLE_FUNC(svqshlu,_n_s8,_m,)(pg, op1, 7);194}195 196// CHECK-LABEL: @test_svqshlu_n_s16_m(197// CHECK-NEXT: entry:198// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])199// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 0)200// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]201//202// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_mu10__SVBool_tu11__SVInt16_t(203// CPP-CHECK-NEXT: entry:204// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])205// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 0)206// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]207//208svuint16_t test_svqshlu_n_s16_m(svbool_t pg, svint16_t op1)209{210 return SVE_ACLE_FUNC(svqshlu,_n_s16,_m,)(pg, op1, 0);211}212 213// CHECK-LABEL: @test_svqshlu_n_s16_m_1(214// CHECK-NEXT: entry:215// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])216// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 15)217// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]218//219// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_m_1u10__SVBool_tu11__SVInt16_t(220// CPP-CHECK-NEXT: entry:221// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])222// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 15)223// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]224//225svuint16_t test_svqshlu_n_s16_m_1(svbool_t pg, svint16_t op1)226{227 return SVE_ACLE_FUNC(svqshlu,_n_s16,_m,)(pg, op1, 15);228}229 230// CHECK-LABEL: @test_svqshlu_n_s32_m(231// CHECK-NEXT: entry:232// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])233// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 0)234// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]235//236// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_mu10__SVBool_tu11__SVInt32_t(237// CPP-CHECK-NEXT: entry:238// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])239// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 0)240// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]241//242svuint32_t test_svqshlu_n_s32_m(svbool_t pg, svint32_t op1)243{244 return SVE_ACLE_FUNC(svqshlu,_n_s32,_m,)(pg, op1, 0);245}246 247// CHECK-LABEL: @test_svqshlu_n_s32_m_1(248// CHECK-NEXT: entry:249// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])250// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 31)251// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]252//253// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_m_1u10__SVBool_tu11__SVInt32_t(254// CPP-CHECK-NEXT: entry:255// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])256// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 31)257// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]258//259svuint32_t test_svqshlu_n_s32_m_1(svbool_t pg, svint32_t op1)260{261 return SVE_ACLE_FUNC(svqshlu,_n_s32,_m,)(pg, op1, 31);262}263 264// CHECK-LABEL: @test_svqshlu_n_s64_m(265// CHECK-NEXT: entry:266// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])267// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 0)268// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]269//270// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_mu10__SVBool_tu11__SVInt64_t(271// CPP-CHECK-NEXT: entry:272// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])273// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 0)274// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]275//276svuint64_t test_svqshlu_n_s64_m(svbool_t pg, svint64_t op1)277{278 return SVE_ACLE_FUNC(svqshlu,_n_s64,_m,)(pg, op1, 0);279}280 281// CHECK-LABEL: @test_svqshlu_n_s64_m_1(282// CHECK-NEXT: entry:283// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])284// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 63)285// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]286//287// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_m_1u10__SVBool_tu11__SVInt64_t(288// CPP-CHECK-NEXT: entry:289// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])290// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 63)291// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]292//293svuint64_t test_svqshlu_n_s64_m_1(svbool_t pg, svint64_t op1)294{295 return SVE_ACLE_FUNC(svqshlu,_n_s64,_m,)(pg, op1, 63);296}297 298// CHECK-LABEL: @test_svqshlu_n_s8_x(299// CHECK-NEXT: entry:300// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 0)301// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]302//303// CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_xu10__SVBool_tu10__SVInt8_t(304// CPP-CHECK-NEXT: entry:305// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 0)306// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]307//308svuint8_t test_svqshlu_n_s8_x(svbool_t pg, svint8_t op1)309{310 return SVE_ACLE_FUNC(svqshlu,_n_s8,_x,)(pg, op1, 0);311}312 313// CHECK-LABEL: @test_svqshlu_n_s8_x_1(314// CHECK-NEXT: entry:315// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 7)316// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]317//318// CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_x_1u10__SVBool_tu10__SVInt8_t(319// CPP-CHECK-NEXT: entry:320// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshlu.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 7)321// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]322//323svuint8_t test_svqshlu_n_s8_x_1(svbool_t pg, svint8_t op1)324{325 return SVE_ACLE_FUNC(svqshlu,_n_s8,_x,)(pg, op1, 7);326}327 328// CHECK-LABEL: @test_svqshlu_n_s16_x(329// CHECK-NEXT: entry:330// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])331// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 0)332// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]333//334// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_xu10__SVBool_tu11__SVInt16_t(335// CPP-CHECK-NEXT: entry:336// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])337// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 0)338// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]339//340svuint16_t test_svqshlu_n_s16_x(svbool_t pg, svint16_t op1)341{342 return SVE_ACLE_FUNC(svqshlu,_n_s16,_x,)(pg, op1, 0);343}344 345// CHECK-LABEL: @test_svqshlu_n_s16_x_1(346// CHECK-NEXT: entry:347// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])348// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 15)349// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]350//351// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_x_1u10__SVBool_tu11__SVInt16_t(352// CPP-CHECK-NEXT: entry:353// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])354// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshlu.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 15)355// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]356//357svuint16_t test_svqshlu_n_s16_x_1(svbool_t pg, svint16_t op1)358{359 return SVE_ACLE_FUNC(svqshlu,_n_s16,_x,)(pg, op1, 15);360}361 362// CHECK-LABEL: @test_svqshlu_n_s32_x(363// CHECK-NEXT: entry:364// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])365// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 0)366// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]367//368// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_xu10__SVBool_tu11__SVInt32_t(369// CPP-CHECK-NEXT: entry:370// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])371// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 0)372// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]373//374svuint32_t test_svqshlu_n_s32_x(svbool_t pg, svint32_t op1)375{376 return SVE_ACLE_FUNC(svqshlu,_n_s32,_x,)(pg, op1, 0);377}378 379// CHECK-LABEL: @test_svqshlu_n_s32_x_1(380// CHECK-NEXT: entry:381// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])382// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 31)383// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]384//385// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_x_1u10__SVBool_tu11__SVInt32_t(386// CPP-CHECK-NEXT: entry:387// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])388// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshlu.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 31)389// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]390//391svuint32_t test_svqshlu_n_s32_x_1(svbool_t pg, svint32_t op1)392{393 return SVE_ACLE_FUNC(svqshlu,_n_s32,_x,)(pg, op1, 31);394}395 396// CHECK-LABEL: @test_svqshlu_n_s64_x(397// CHECK-NEXT: entry:398// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])399// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 0)400// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]401//402// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_xu10__SVBool_tu11__SVInt64_t(403// CPP-CHECK-NEXT: entry:404// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])405// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 0)406// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]407//408svuint64_t test_svqshlu_n_s64_x(svbool_t pg, svint64_t op1)409{410 return SVE_ACLE_FUNC(svqshlu,_n_s64,_x,)(pg, op1, 0);411}412 413// CHECK-LABEL: @test_svqshlu_n_s64_x_1(414// CHECK-NEXT: entry:415// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])416// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 63)417// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]418//419// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_x_1u10__SVBool_tu11__SVInt64_t(420// CPP-CHECK-NEXT: entry:421// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])422// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqshlu.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 63)423// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]424//425svuint64_t test_svqshlu_n_s64_x_1(svbool_t pg, svint64_t op1)426{427 return SVE_ACLE_FUNC(svqshlu,_n_s64,_x,)(pg, op1, 63);428}429