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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK4// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK6 7// REQUIRES: aarch64-registered-target8 9#include <arm_sve.h>10 11#ifdef SVE_OVERLOADED_FORMS12// A simple used,unused... macro, long enough to represent any SVE builtin.13#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A314#else15#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A416#endif17 18// CHECK-LABEL: @test_svqshrunb_n_s16(19// CHECK-NEXT: entry:20// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshrunb.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], i32 1)21// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]22//23// CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s16u11__SVInt16_t(24// CPP-CHECK-NEXT: entry:25// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshrunb.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], i32 1)26// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]27//28svuint8_t test_svqshrunb_n_s16(svint16_t op1)29{30 return SVE_ACLE_FUNC(svqshrunb,_n_s16,,)(op1, 1);31}32 33// CHECK-LABEL: @test_svqshrunb_n_s16_1(34// CHECK-NEXT: entry:35// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshrunb.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], i32 8)36// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]37//38// CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s16_1u11__SVInt16_t(39// CPP-CHECK-NEXT: entry:40// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqshrunb.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], i32 8)41// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]42//43svuint8_t test_svqshrunb_n_s16_1(svint16_t op1)44{45 return SVE_ACLE_FUNC(svqshrunb,_n_s16,,)(op1, 8);46}47 48// CHECK-LABEL: @test_svqshrunb_n_s32(49// CHECK-NEXT: entry:50// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshrunb.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], i32 1)51// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]52//53// CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s32u11__SVInt32_t(54// CPP-CHECK-NEXT: entry:55// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshrunb.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], i32 1)56// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]57//58svuint16_t test_svqshrunb_n_s32(svint32_t op1)59{60 return SVE_ACLE_FUNC(svqshrunb,_n_s32,,)(op1, 1);61}62 63// CHECK-LABEL: @test_svqshrunb_n_s32_1(64// CHECK-NEXT: entry:65// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshrunb.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], i32 16)66// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]67//68// CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s32_1u11__SVInt32_t(69// CPP-CHECK-NEXT: entry:70// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqshrunb.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], i32 16)71// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]72//73svuint16_t test_svqshrunb_n_s32_1(svint32_t op1)74{75 return SVE_ACLE_FUNC(svqshrunb,_n_s32,,)(op1, 16);76}77 78// CHECK-LABEL: @test_svqshrunb_n_s64(79// CHECK-NEXT: entry:80// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshrunb.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], i32 1)81// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]82//83// CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s64u11__SVInt64_t(84// CPP-CHECK-NEXT: entry:85// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshrunb.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], i32 1)86// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]87//88svuint32_t test_svqshrunb_n_s64(svint64_t op1)89{90 return SVE_ACLE_FUNC(svqshrunb,_n_s64,,)(op1, 1);91}92 93// CHECK-LABEL: @test_svqshrunb_n_s64_1(94// CHECK-NEXT: entry:95// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshrunb.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], i32 32)96// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]97//98// CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s64_1u11__SVInt64_t(99// CPP-CHECK-NEXT: entry:100// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqshrunb.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], i32 32)101// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]102//103svuint32_t test_svqshrunb_n_s64_1(svint64_t op1)104{105 return SVE_ACLE_FUNC(svqshrunb,_n_s64,,)(op1, 32);106}107