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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK4// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK6 7// REQUIRES: aarch64-registered-target8 9#include <arm_sve.h>10 11#ifdef SVE_OVERLOADED_FORMS12// A simple used,unused... macro, long enough to represent any SVE builtin.13#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A314#else15#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A416#endif17 18// CHECK-LABEL: @test_svrshr_n_s8_z(19// CHECK-NEXT: entry:20// CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer21// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 1)22// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]23//24// CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_zu10__SVBool_tu10__SVInt8_t(25// CPP-CHECK-NEXT: entry:26// CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer27// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 1)28// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]29//30svint8_t test_svrshr_n_s8_z(svbool_t pg, svint8_t op1)31{32 return SVE_ACLE_FUNC(svrshr,_n_s8,_z,)(pg, op1, 1);33}34 35// CHECK-LABEL: @test_svrshr_n_s8_z_1(36// CHECK-NEXT: entry:37// CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer38// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 8)39// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]40//41// CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_z_1u10__SVBool_tu10__SVInt8_t(42// CPP-CHECK-NEXT: entry:43// CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer44// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 8)45// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]46//47svint8_t test_svrshr_n_s8_z_1(svbool_t pg, svint8_t op1)48{49 return SVE_ACLE_FUNC(svrshr,_n_s8,_z,)(pg, op1, 8);50}51 52// CHECK-LABEL: @test_svrshr_n_s16_z(53// CHECK-NEXT: entry:54// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])55// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer56// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 1)57// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]58//59// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_zu10__SVBool_tu11__SVInt16_t(60// CPP-CHECK-NEXT: entry:61// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])62// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer63// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 1)64// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]65//66svint16_t test_svrshr_n_s16_z(svbool_t pg, svint16_t op1)67{68 return SVE_ACLE_FUNC(svrshr,_n_s16,_z,)(pg, op1, 1);69}70 71// CHECK-LABEL: @test_svrshr_n_s16_z_1(72// CHECK-NEXT: entry:73// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])74// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer75// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 16)76// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]77//78// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_z_1u10__SVBool_tu11__SVInt16_t(79// CPP-CHECK-NEXT: entry:80// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])81// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer82// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 16)83// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]84//85svint16_t test_svrshr_n_s16_z_1(svbool_t pg, svint16_t op1)86{87 return SVE_ACLE_FUNC(svrshr,_n_s16,_z,)(pg, op1, 16);88}89 90// CHECK-LABEL: @test_svrshr_n_s32_z(91// CHECK-NEXT: entry:92// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])93// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer94// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 1)95// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]96//97// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_zu10__SVBool_tu11__SVInt32_t(98// CPP-CHECK-NEXT: entry:99// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])100// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer101// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 1)102// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]103//104svint32_t test_svrshr_n_s32_z(svbool_t pg, svint32_t op1)105{106 return SVE_ACLE_FUNC(svrshr,_n_s32,_z,)(pg, op1, 1);107}108 109// CHECK-LABEL: @test_svrshr_n_s32_z_1(110// CHECK-NEXT: entry:111// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])112// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer113// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 32)114// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]115//116// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_z_1u10__SVBool_tu11__SVInt32_t(117// CPP-CHECK-NEXT: entry:118// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])119// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer120// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 32)121// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]122//123svint32_t test_svrshr_n_s32_z_1(svbool_t pg, svint32_t op1)124{125 return SVE_ACLE_FUNC(svrshr,_n_s32,_z,)(pg, op1, 32);126}127 128// CHECK-LABEL: @test_svrshr_n_s64_z(129// CHECK-NEXT: entry:130// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])131// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer132// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 1)133// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]134//135// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_zu10__SVBool_tu11__SVInt64_t(136// CPP-CHECK-NEXT: entry:137// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])138// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer139// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 1)140// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]141//142svint64_t test_svrshr_n_s64_z(svbool_t pg, svint64_t op1)143{144 return SVE_ACLE_FUNC(svrshr,_n_s64,_z,)(pg, op1, 1);145}146 147// CHECK-LABEL: @test_svrshr_n_s64_z_1(148// CHECK-NEXT: entry:149// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])150// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer151// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 64)152// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]153//154// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_z_1u10__SVBool_tu11__SVInt64_t(155// CPP-CHECK-NEXT: entry:156// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])157// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer158// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 64)159// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]160//161svint64_t test_svrshr_n_s64_z_1(svbool_t pg, svint64_t op1)162{163 return SVE_ACLE_FUNC(svrshr,_n_s64,_z,)(pg, op1, 64);164}165 166// CHECK-LABEL: @test_svrshr_n_u8_z(167// CHECK-NEXT: entry:168// CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer169// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 1)170// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]171//172// CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_zu10__SVBool_tu11__SVUint8_t(173// CPP-CHECK-NEXT: entry:174// CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer175// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 1)176// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]177//178svuint8_t test_svrshr_n_u8_z(svbool_t pg, svuint8_t op1)179{180 return SVE_ACLE_FUNC(svrshr,_n_u8,_z,)(pg, op1, 1);181}182 183// CHECK-LABEL: @test_svrshr_n_u8_z_1(184// CHECK-NEXT: entry:185// CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer186// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 8)187// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]188//189// CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_z_1u10__SVBool_tu11__SVUint8_t(190// CPP-CHECK-NEXT: entry:191// CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> zeroinitializer192// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG]], <vscale x 16 x i8> [[TMP0]], i32 8)193// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]]194//195svuint8_t test_svrshr_n_u8_z_1(svbool_t pg, svuint8_t op1)196{197 return SVE_ACLE_FUNC(svrshr,_n_u8,_z,)(pg, op1, 8);198}199 200// CHECK-LABEL: @test_svrshr_n_u16_z(201// CHECK-NEXT: entry:202// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])203// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer204// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 1)205// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]206//207// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_zu10__SVBool_tu12__SVUint16_t(208// CPP-CHECK-NEXT: entry:209// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])210// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer211// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 1)212// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]213//214svuint16_t test_svrshr_n_u16_z(svbool_t pg, svuint16_t op1)215{216 return SVE_ACLE_FUNC(svrshr,_n_u16,_z,)(pg, op1, 1);217}218 219// CHECK-LABEL: @test_svrshr_n_u16_z_1(220// CHECK-NEXT: entry:221// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])222// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer223// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 16)224// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]225//226// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_z_1u10__SVBool_tu12__SVUint16_t(227// CPP-CHECK-NEXT: entry:228// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])229// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> zeroinitializer230// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[TMP1]], i32 16)231// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP2]]232//233svuint16_t test_svrshr_n_u16_z_1(svbool_t pg, svuint16_t op1)234{235 return SVE_ACLE_FUNC(svrshr,_n_u16,_z,)(pg, op1, 16);236}237 238// CHECK-LABEL: @test_svrshr_n_u32_z(239// CHECK-NEXT: entry:240// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])241// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer242// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 1)243// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]244//245// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_zu10__SVBool_tu12__SVUint32_t(246// CPP-CHECK-NEXT: entry:247// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])248// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer249// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 1)250// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]251//252svuint32_t test_svrshr_n_u32_z(svbool_t pg, svuint32_t op1)253{254 return SVE_ACLE_FUNC(svrshr,_n_u32,_z,)(pg, op1, 1);255}256 257// CHECK-LABEL: @test_svrshr_n_u32_z_1(258// CHECK-NEXT: entry:259// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])260// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer261// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 32)262// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]263//264// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_z_1u10__SVBool_tu12__SVUint32_t(265// CPP-CHECK-NEXT: entry:266// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])267// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> zeroinitializer268// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[TMP1]], i32 32)269// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]270//271svuint32_t test_svrshr_n_u32_z_1(svbool_t pg, svuint32_t op1)272{273 return SVE_ACLE_FUNC(svrshr,_n_u32,_z,)(pg, op1, 32);274}275 276// CHECK-LABEL: @test_svrshr_n_u64_z(277// CHECK-NEXT: entry:278// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])279// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer280// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 1)281// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]282//283// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_zu10__SVBool_tu12__SVUint64_t(284// CPP-CHECK-NEXT: entry:285// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])286// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer287// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 1)288// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]289//290svuint64_t test_svrshr_n_u64_z(svbool_t pg, svuint64_t op1)291{292 return SVE_ACLE_FUNC(svrshr,_n_u64,_z,)(pg, op1, 1);293}294 295// CHECK-LABEL: @test_svrshr_n_u64_z_1(296// CHECK-NEXT: entry:297// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])298// CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer299// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 64)300// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]301//302// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_z_1u10__SVBool_tu12__SVUint64_t(303// CPP-CHECK-NEXT: entry:304// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])305// CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> zeroinitializer306// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[TMP1]], i32 64)307// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP2]]308//309svuint64_t test_svrshr_n_u64_z_1(svbool_t pg, svuint64_t op1)310{311 return SVE_ACLE_FUNC(svrshr,_n_u64,_z,)(pg, op1, 64);312}313 314// CHECK-LABEL: @test_svrshr_n_s8_m(315// CHECK-NEXT: entry:316// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 1)317// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]318//319// CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_mu10__SVBool_tu10__SVInt8_t(320// CPP-CHECK-NEXT: entry:321// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 1)322// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]323//324svint8_t test_svrshr_n_s8_m(svbool_t pg, svint8_t op1)325{326 return SVE_ACLE_FUNC(svrshr,_n_s8,_m,)(pg, op1, 1);327}328 329// CHECK-LABEL: @test_svrshr_n_s8_m_1(330// CHECK-NEXT: entry:331// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 8)332// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]333//334// CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_m_1u10__SVBool_tu10__SVInt8_t(335// CPP-CHECK-NEXT: entry:336// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 8)337// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]338//339svint8_t test_svrshr_n_s8_m_1(svbool_t pg, svint8_t op1)340{341 return SVE_ACLE_FUNC(svrshr,_n_s8,_m,)(pg, op1, 8);342}343 344// CHECK-LABEL: @test_svrshr_n_s16_m(345// CHECK-NEXT: entry:346// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])347// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)348// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]349//350// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_mu10__SVBool_tu11__SVInt16_t(351// CPP-CHECK-NEXT: entry:352// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])353// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)354// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]355//356svint16_t test_svrshr_n_s16_m(svbool_t pg, svint16_t op1)357{358 return SVE_ACLE_FUNC(svrshr,_n_s16,_m,)(pg, op1, 1);359}360 361// CHECK-LABEL: @test_svrshr_n_s16_m_1(362// CHECK-NEXT: entry:363// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])364// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 16)365// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]366//367// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_m_1u10__SVBool_tu11__SVInt16_t(368// CPP-CHECK-NEXT: entry:369// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])370// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 16)371// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]372//373svint16_t test_svrshr_n_s16_m_1(svbool_t pg, svint16_t op1)374{375 return SVE_ACLE_FUNC(svrshr,_n_s16,_m,)(pg, op1, 16);376}377 378// CHECK-LABEL: @test_svrshr_n_s32_m(379// CHECK-NEXT: entry:380// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])381// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)382// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]383//384// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_mu10__SVBool_tu11__SVInt32_t(385// CPP-CHECK-NEXT: entry:386// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])387// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)388// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]389//390svint32_t test_svrshr_n_s32_m(svbool_t pg, svint32_t op1)391{392 return SVE_ACLE_FUNC(svrshr,_n_s32,_m,)(pg, op1, 1);393}394 395// CHECK-LABEL: @test_svrshr_n_s32_m_1(396// CHECK-NEXT: entry:397// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])398// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 32)399// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]400//401// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_m_1u10__SVBool_tu11__SVInt32_t(402// CPP-CHECK-NEXT: entry:403// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])404// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 32)405// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]406//407svint32_t test_svrshr_n_s32_m_1(svbool_t pg, svint32_t op1)408{409 return SVE_ACLE_FUNC(svrshr,_n_s32,_m,)(pg, op1, 32);410}411 412// CHECK-LABEL: @test_svrshr_n_s64_m(413// CHECK-NEXT: entry:414// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])415// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)416// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]417//418// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_mu10__SVBool_tu11__SVInt64_t(419// CPP-CHECK-NEXT: entry:420// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])421// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)422// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]423//424svint64_t test_svrshr_n_s64_m(svbool_t pg, svint64_t op1)425{426 return SVE_ACLE_FUNC(svrshr,_n_s64,_m,)(pg, op1, 1);427}428 429// CHECK-LABEL: @test_svrshr_n_s64_m_1(430// CHECK-NEXT: entry:431// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])432// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 64)433// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]434//435// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_m_1u10__SVBool_tu11__SVInt64_t(436// CPP-CHECK-NEXT: entry:437// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])438// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 64)439// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]440//441svint64_t test_svrshr_n_s64_m_1(svbool_t pg, svint64_t op1)442{443 return SVE_ACLE_FUNC(svrshr,_n_s64,_m,)(pg, op1, 64);444}445 446// CHECK-LABEL: @test_svrshr_n_u8_m(447// CHECK-NEXT: entry:448// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 1)449// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]450//451// CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_mu10__SVBool_tu11__SVUint8_t(452// CPP-CHECK-NEXT: entry:453// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 1)454// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]455//456svuint8_t test_svrshr_n_u8_m(svbool_t pg, svuint8_t op1)457{458 return SVE_ACLE_FUNC(svrshr,_n_u8,_m,)(pg, op1, 1);459}460 461// CHECK-LABEL: @test_svrshr_n_u8_m_1(462// CHECK-NEXT: entry:463// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 8)464// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]465//466// CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_m_1u10__SVBool_tu11__SVUint8_t(467// CPP-CHECK-NEXT: entry:468// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 8)469// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]470//471svuint8_t test_svrshr_n_u8_m_1(svbool_t pg, svuint8_t op1)472{473 return SVE_ACLE_FUNC(svrshr,_n_u8,_m,)(pg, op1, 8);474}475 476// CHECK-LABEL: @test_svrshr_n_u16_m(477// CHECK-NEXT: entry:478// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])479// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)480// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]481//482// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_mu10__SVBool_tu12__SVUint16_t(483// CPP-CHECK-NEXT: entry:484// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])485// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)486// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]487//488svuint16_t test_svrshr_n_u16_m(svbool_t pg, svuint16_t op1)489{490 return SVE_ACLE_FUNC(svrshr,_n_u16,_m,)(pg, op1, 1);491}492 493// CHECK-LABEL: @test_svrshr_n_u16_m_1(494// CHECK-NEXT: entry:495// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])496// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 16)497// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]498//499// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_m_1u10__SVBool_tu12__SVUint16_t(500// CPP-CHECK-NEXT: entry:501// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])502// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 16)503// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]504//505svuint16_t test_svrshr_n_u16_m_1(svbool_t pg, svuint16_t op1)506{507 return SVE_ACLE_FUNC(svrshr,_n_u16,_m,)(pg, op1, 16);508}509 510// CHECK-LABEL: @test_svrshr_n_u32_m(511// CHECK-NEXT: entry:512// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])513// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)514// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]515//516// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_mu10__SVBool_tu12__SVUint32_t(517// CPP-CHECK-NEXT: entry:518// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])519// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)520// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]521//522svuint32_t test_svrshr_n_u32_m(svbool_t pg, svuint32_t op1)523{524 return SVE_ACLE_FUNC(svrshr,_n_u32,_m,)(pg, op1, 1);525}526 527// CHECK-LABEL: @test_svrshr_n_u32_m_1(528// CHECK-NEXT: entry:529// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])530// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 32)531// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]532//533// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_m_1u10__SVBool_tu12__SVUint32_t(534// CPP-CHECK-NEXT: entry:535// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])536// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 32)537// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]538//539svuint32_t test_svrshr_n_u32_m_1(svbool_t pg, svuint32_t op1)540{541 return SVE_ACLE_FUNC(svrshr,_n_u32,_m,)(pg, op1, 32);542}543 544// CHECK-LABEL: @test_svrshr_n_u64_m(545// CHECK-NEXT: entry:546// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])547// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)548// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]549//550// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_mu10__SVBool_tu12__SVUint64_t(551// CPP-CHECK-NEXT: entry:552// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])553// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)554// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]555//556svuint64_t test_svrshr_n_u64_m(svbool_t pg, svuint64_t op1)557{558 return SVE_ACLE_FUNC(svrshr,_n_u64,_m,)(pg, op1, 1);559}560 561// CHECK-LABEL: @test_svrshr_n_u64_m_1(562// CHECK-NEXT: entry:563// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])564// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 64)565// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]566//567// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_m_1u10__SVBool_tu12__SVUint64_t(568// CPP-CHECK-NEXT: entry:569// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])570// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 64)571// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]572//573svuint64_t test_svrshr_n_u64_m_1(svbool_t pg, svuint64_t op1)574{575 return SVE_ACLE_FUNC(svrshr,_n_u64,_m,)(pg, op1, 64);576}577 578// CHECK-LABEL: @test_svrshr_n_s8_x(579// CHECK-NEXT: entry:580// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 1)581// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]582//583// CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_xu10__SVBool_tu10__SVInt8_t(584// CPP-CHECK-NEXT: entry:585// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 1)586// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]587//588svint8_t test_svrshr_n_s8_x(svbool_t pg, svint8_t op1)589{590 return SVE_ACLE_FUNC(svrshr,_n_s8,_x,)(pg, op1, 1);591}592 593// CHECK-LABEL: @test_svrshr_n_s8_x_1(594// CHECK-NEXT: entry:595// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 8)596// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]597//598// CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_x_1u10__SVBool_tu10__SVInt8_t(599// CPP-CHECK-NEXT: entry:600// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.srshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 8)601// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]602//603svint8_t test_svrshr_n_s8_x_1(svbool_t pg, svint8_t op1)604{605 return SVE_ACLE_FUNC(svrshr,_n_s8,_x,)(pg, op1, 8);606}607 608// CHECK-LABEL: @test_svrshr_n_s16_x(609// CHECK-NEXT: entry:610// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])611// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)612// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]613//614// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_xu10__SVBool_tu11__SVInt16_t(615// CPP-CHECK-NEXT: entry:616// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])617// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)618// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]619//620svint16_t test_svrshr_n_s16_x(svbool_t pg, svint16_t op1)621{622 return SVE_ACLE_FUNC(svrshr,_n_s16,_x,)(pg, op1, 1);623}624 625// CHECK-LABEL: @test_svrshr_n_s16_x_1(626// CHECK-NEXT: entry:627// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])628// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 16)629// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]630//631// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_x_1u10__SVBool_tu11__SVInt16_t(632// CPP-CHECK-NEXT: entry:633// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])634// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 16)635// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]636//637svint16_t test_svrshr_n_s16_x_1(svbool_t pg, svint16_t op1)638{639 return SVE_ACLE_FUNC(svrshr,_n_s16,_x,)(pg, op1, 16);640}641 642// CHECK-LABEL: @test_svrshr_n_s32_x(643// CHECK-NEXT: entry:644// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])645// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)646// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]647//648// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_xu10__SVBool_tu11__SVInt32_t(649// CPP-CHECK-NEXT: entry:650// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])651// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)652// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]653//654svint32_t test_svrshr_n_s32_x(svbool_t pg, svint32_t op1)655{656 return SVE_ACLE_FUNC(svrshr,_n_s32,_x,)(pg, op1, 1);657}658 659// CHECK-LABEL: @test_svrshr_n_s32_x_1(660// CHECK-NEXT: entry:661// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])662// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 32)663// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]664//665// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_x_1u10__SVBool_tu11__SVInt32_t(666// CPP-CHECK-NEXT: entry:667// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])668// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.srshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 32)669// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]670//671svint32_t test_svrshr_n_s32_x_1(svbool_t pg, svint32_t op1)672{673 return SVE_ACLE_FUNC(svrshr,_n_s32,_x,)(pg, op1, 32);674}675 676// CHECK-LABEL: @test_svrshr_n_s64_x(677// CHECK-NEXT: entry:678// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])679// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)680// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]681//682// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_xu10__SVBool_tu11__SVInt64_t(683// CPP-CHECK-NEXT: entry:684// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])685// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)686// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]687//688svint64_t test_svrshr_n_s64_x(svbool_t pg, svint64_t op1)689{690 return SVE_ACLE_FUNC(svrshr,_n_s64,_x,)(pg, op1, 1);691}692 693// CHECK-LABEL: @test_svrshr_n_s64_x_1(694// CHECK-NEXT: entry:695// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])696// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 64)697// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]698//699// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_x_1u10__SVBool_tu11__SVInt64_t(700// CPP-CHECK-NEXT: entry:701// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])702// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.srshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 64)703// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]704//705svint64_t test_svrshr_n_s64_x_1(svbool_t pg, svint64_t op1)706{707 return SVE_ACLE_FUNC(svrshr,_n_s64,_x,)(pg, op1, 64);708}709 710// CHECK-LABEL: @test_svrshr_n_u8_x(711// CHECK-NEXT: entry:712// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 1)713// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]714//715// CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_xu10__SVBool_tu11__SVUint8_t(716// CPP-CHECK-NEXT: entry:717// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 1)718// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]719//720svuint8_t test_svrshr_n_u8_x(svbool_t pg, svuint8_t op1)721{722 return SVE_ACLE_FUNC(svrshr,_n_u8,_x,)(pg, op1, 1);723}724 725// CHECK-LABEL: @test_svrshr_n_u8_x_1(726// CHECK-NEXT: entry:727// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 8)728// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]729//730// CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_x_1u10__SVBool_tu11__SVUint8_t(731// CPP-CHECK-NEXT: entry:732// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.urshr.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i32 8)733// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]734//735svuint8_t test_svrshr_n_u8_x_1(svbool_t pg, svuint8_t op1)736{737 return SVE_ACLE_FUNC(svrshr,_n_u8,_x,)(pg, op1, 8);738}739 740// CHECK-LABEL: @test_svrshr_n_u16_x(741// CHECK-NEXT: entry:742// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])743// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)744// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]745//746// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_xu10__SVBool_tu12__SVUint16_t(747// CPP-CHECK-NEXT: entry:748// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])749// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)750// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]751//752svuint16_t test_svrshr_n_u16_x(svbool_t pg, svuint16_t op1)753{754 return SVE_ACLE_FUNC(svrshr,_n_u16,_x,)(pg, op1, 1);755}756 757// CHECK-LABEL: @test_svrshr_n_u16_x_1(758// CHECK-NEXT: entry:759// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])760// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 16)761// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]762//763// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_x_1u10__SVBool_tu12__SVUint16_t(764// CPP-CHECK-NEXT: entry:765// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])766// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.urshr.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], i32 16)767// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]768//769svuint16_t test_svrshr_n_u16_x_1(svbool_t pg, svuint16_t op1)770{771 return SVE_ACLE_FUNC(svrshr,_n_u16,_x,)(pg, op1, 16);772}773 774// CHECK-LABEL: @test_svrshr_n_u32_x(775// CHECK-NEXT: entry:776// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])777// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)778// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]779//780// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_xu10__SVBool_tu12__SVUint32_t(781// CPP-CHECK-NEXT: entry:782// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])783// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)784// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]785//786svuint32_t test_svrshr_n_u32_x(svbool_t pg, svuint32_t op1)787{788 return SVE_ACLE_FUNC(svrshr,_n_u32,_x,)(pg, op1, 1);789}790 791// CHECK-LABEL: @test_svrshr_n_u32_x_1(792// CHECK-NEXT: entry:793// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])794// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 32)795// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]796//797// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_x_1u10__SVBool_tu12__SVUint32_t(798// CPP-CHECK-NEXT: entry:799// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])800// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.urshr.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], i32 32)801// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]802//803svuint32_t test_svrshr_n_u32_x_1(svbool_t pg, svuint32_t op1)804{805 return SVE_ACLE_FUNC(svrshr,_n_u32,_x,)(pg, op1, 32);806}807 808// CHECK-LABEL: @test_svrshr_n_u64_x(809// CHECK-NEXT: entry:810// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])811// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)812// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]813//814// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_xu10__SVBool_tu12__SVUint64_t(815// CPP-CHECK-NEXT: entry:816// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])817// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)818// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]819//820svuint64_t test_svrshr_n_u64_x(svbool_t pg, svuint64_t op1)821{822 return SVE_ACLE_FUNC(svrshr,_n_u64,_x,)(pg, op1, 1);823}824 825// CHECK-LABEL: @test_svrshr_n_u64_x_1(826// CHECK-NEXT: entry:827// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])828// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 64)829// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]830//831// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_x_1u10__SVBool_tu12__SVUint64_t(832// CPP-CHECK-NEXT: entry:833// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])834// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.urshr.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], i32 64)835// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]836//837svuint64_t test_svrshr_n_u64_x_1(svbool_t pg, svuint64_t op1)838{839 return SVE_ACLE_FUNC(svrshr,_n_u64,_x,)(pg, op1, 64);840}841