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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \4// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s5// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 \6// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s7// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme -target-feature +sve2p1 \8// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s9// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme -target-feature +sme2p1 \10// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s11// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \12// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s13// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \14// RUN: -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK15// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \16// RUN: -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK17// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s18 19 20#include <arm_sve.h>21 22#ifdef SVE_OVERLOADED_FORMS23// A simple used,unused... macro, long enough to represent any SVE builtin.24#define SVE_ACLE_FUNC(A1, A2_UNUSED) A125#else26#define SVE_ACLE_FUNC(A1, A2) A1##A227#endif28 29#if defined(__ARM_FEATURE_SME) && defined(__ARM_FEATURE_SVE)30#define ATTR __arm_streaming_compatible31#elif defined(__ARM_FEATURE_SME)32#define ATTR __arm_streaming33#else34#define ATTR35#endif36 37// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svdup_laneq_s838// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0:[0-9]+]] {39// CHECK-NEXT: entry:40// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 0)41// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]42//43// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z19test_svdup_laneq_s8u10__SVInt8_t44// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0:[0-9]+]] {45// CPP-CHECK-NEXT: entry:46// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 0)47// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]48//49svint8_t test_svdup_laneq_s8(svint8_t zn) ATTR {50 return SVE_ACLE_FUNC(svdup_laneq, _s8)(zn, 0);51}52 53// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svdup_laneq_u854// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0]] {55// CHECK-NEXT: entry:56// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 15)57// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]58//59// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z19test_svdup_laneq_u8u11__SVUint8_t60// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0]] {61// CPP-CHECK-NEXT: entry:62// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 15)63// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]64//65svuint8_t test_svdup_laneq_u8(svuint8_t zn) ATTR {66 return SVE_ACLE_FUNC(svdup_laneq, _u8)(zn, 15);67}68 69// CHECK-LABEL: define dso_local <vscale x 8 x i16> @test_svdup_laneq_s1670// CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]]) #[[ATTR0]] {71// CHECK-NEXT: entry:72// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.laneq.nxv8i16(<vscale x 8 x i16> [[ZN]], i32 1)73// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]74//75// CPP-CHECK-LABEL: define dso_local <vscale x 8 x i16> @_Z20test_svdup_laneq_s16u11__SVInt16_t76// CPP-CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]]) #[[ATTR0]] {77// CPP-CHECK-NEXT: entry:78// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.laneq.nxv8i16(<vscale x 8 x i16> [[ZN]], i32 1)79// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]80//81svint16_t test_svdup_laneq_s16(svint16_t zn) ATTR {82 return SVE_ACLE_FUNC(svdup_laneq, _s16)(zn, 1);83}84 85// CHECK-LABEL: define dso_local <vscale x 8 x i16> @test_svdup_laneq_u1686// CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]]) #[[ATTR0]] {87// CHECK-NEXT: entry:88// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.laneq.nxv8i16(<vscale x 8 x i16> [[ZN]], i32 7)89// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]90//91// CPP-CHECK-LABEL: define dso_local <vscale x 8 x i16> @_Z20test_svdup_laneq_u16u12__SVUint16_t92// CPP-CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]]) #[[ATTR0]] {93// CPP-CHECK-NEXT: entry:94// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.laneq.nxv8i16(<vscale x 8 x i16> [[ZN]], i32 7)95// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]96//97svuint16_t test_svdup_laneq_u16(svuint16_t zn) ATTR {98 return SVE_ACLE_FUNC(svdup_laneq, _u16)(zn, 7);99}100 101// CHECK-LABEL: define dso_local <vscale x 4 x i32> @test_svdup_laneq_s32102// CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]]) #[[ATTR0]] {103// CHECK-NEXT: entry:104// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.laneq.nxv4i32(<vscale x 4 x i32> [[ZN]], i32 2)105// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]106//107// CPP-CHECK-LABEL: define dso_local <vscale x 4 x i32> @_Z20test_svdup_laneq_s32u11__SVInt32_t108// CPP-CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]]) #[[ATTR0]] {109// CPP-CHECK-NEXT: entry:110// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.laneq.nxv4i32(<vscale x 4 x i32> [[ZN]], i32 2)111// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]112//113svint32_t test_svdup_laneq_s32(svint32_t zn) ATTR {114 return SVE_ACLE_FUNC(svdup_laneq, _s32)(zn, 2);115}116 117// CHECK-LABEL: define dso_local <vscale x 4 x i32> @test_svdup_laneq_u32118// CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]]) #[[ATTR0]] {119// CHECK-NEXT: entry:120// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.laneq.nxv4i32(<vscale x 4 x i32> [[ZN]], i32 3)121// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]122//123// CPP-CHECK-LABEL: define dso_local <vscale x 4 x i32> @_Z20test_svdup_laneq_u32u12__SVUint32_t124// CPP-CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]]) #[[ATTR0]] {125// CPP-CHECK-NEXT: entry:126// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.laneq.nxv4i32(<vscale x 4 x i32> [[ZN]], i32 3)127// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]128//129svuint32_t test_svdup_laneq_u32(svuint32_t zn) ATTR {130 return SVE_ACLE_FUNC(svdup_laneq, _u32)(zn, 3);131}132 133// CHECK-LABEL: define dso_local <vscale x 2 x i64> @test_svdup_laneq_s64134// CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]]) #[[ATTR0]] {135// CHECK-NEXT: entry:136// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.laneq.nxv2i64(<vscale x 2 x i64> [[ZN]], i32 0)137// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]138//139// CPP-CHECK-LABEL: define dso_local <vscale x 2 x i64> @_Z20test_svdup_laneq_s64u11__SVInt64_t140// CPP-CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]]) #[[ATTR0]] {141// CPP-CHECK-NEXT: entry:142// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.laneq.nxv2i64(<vscale x 2 x i64> [[ZN]], i32 0)143// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]144//145svint64_t test_svdup_laneq_s64(svint64_t zn) ATTR {146 return SVE_ACLE_FUNC(svdup_laneq, _s64)(zn, 0);147}148 149// CHECK-LABEL: define dso_local <vscale x 2 x i64> @test_svdup_laneq_u64150// CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]]) #[[ATTR0]] {151// CHECK-NEXT: entry:152// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.laneq.nxv2i64(<vscale x 2 x i64> [[ZN]], i32 1)153// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]154//155// CPP-CHECK-LABEL: define dso_local <vscale x 2 x i64> @_Z20test_svdup_laneq_u64u12__SVUint64_t156// CPP-CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]]) #[[ATTR0]] {157// CPP-CHECK-NEXT: entry:158// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.laneq.nxv2i64(<vscale x 2 x i64> [[ZN]], i32 1)159// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]160//161svuint64_t test_svdup_laneq_u64(svuint64_t zn) ATTR {162 return SVE_ACLE_FUNC(svdup_laneq, _u64)(zn, 1);163}164 165// CHECK-LABEL: define dso_local <vscale x 8 x half> @test_svdup_laneq_f16166// CHECK-SAME: (<vscale x 8 x half> [[ZN:%.*]]) #[[ATTR0]] {167// CHECK-NEXT: entry:168// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.laneq.nxv8f16(<vscale x 8 x half> [[ZN]], i32 4)169// CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]170//171// CPP-CHECK-LABEL: define dso_local <vscale x 8 x half> @_Z20test_svdup_laneq_f16u13__SVFloat16_t172// CPP-CHECK-SAME: (<vscale x 8 x half> [[ZN:%.*]]) #[[ATTR0]] {173// CPP-CHECK-NEXT: entry:174// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.laneq.nxv8f16(<vscale x 8 x half> [[ZN]], i32 4)175// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]176//177svfloat16_t test_svdup_laneq_f16(svfloat16_t zn) ATTR {178 return SVE_ACLE_FUNC(svdup_laneq, _f16)(zn, 4);179}180 181// CHECK-LABEL: define dso_local <vscale x 4 x float> @test_svdup_laneq_f32182// CHECK-SAME: (<vscale x 4 x float> [[ZN:%.*]]) #[[ATTR0]] {183// CHECK-NEXT: entry:184// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.laneq.nxv4f32(<vscale x 4 x float> [[ZN]], i32 1)185// CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]186//187// CPP-CHECK-LABEL: define dso_local <vscale x 4 x float> @_Z20test_svdup_laneq_f32u13__SVFloat32_t188// CPP-CHECK-SAME: (<vscale x 4 x float> [[ZN:%.*]]) #[[ATTR0]] {189// CPP-CHECK-NEXT: entry:190// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.laneq.nxv4f32(<vscale x 4 x float> [[ZN]], i32 1)191// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]192//193svfloat32_t test_svdup_laneq_f32(svfloat32_t zn) ATTR {194 return SVE_ACLE_FUNC(svdup_laneq, _f32)(zn, 1);195}196 197// CHECK-LABEL: define dso_local <vscale x 2 x double> @test_svdup_laneq_f64198// CHECK-SAME: (<vscale x 2 x double> [[ZN:%.*]]) #[[ATTR0]] {199// CHECK-NEXT: entry:200// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.laneq.nxv2f64(<vscale x 2 x double> [[ZN]], i32 1)201// CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]202//203// CPP-CHECK-LABEL: define dso_local <vscale x 2 x double> @_Z20test_svdup_laneq_f64u13__SVFloat64_t204// CPP-CHECK-SAME: (<vscale x 2 x double> [[ZN:%.*]]) #[[ATTR0]] {205// CPP-CHECK-NEXT: entry:206// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.laneq.nxv2f64(<vscale x 2 x double> [[ZN]], i32 1)207// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]208//209svfloat64_t test_svdup_laneq_f64(svfloat64_t zn) ATTR {210 return SVE_ACLE_FUNC(svdup_laneq, _f64)(zn, 1);211}212 213// CHECK-LABEL: define dso_local <vscale x 8 x bfloat> @test_svdup_laneq_bf16214// CHECK-SAME: (<vscale x 8 x bfloat> [[ZN:%.*]]) #[[ATTR0]] {215// CHECK-NEXT: entry:216// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.laneq.nxv8bf16(<vscale x 8 x bfloat> [[ZN]], i32 3)217// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]218//219// CPP-CHECK-LABEL: define dso_local <vscale x 8 x bfloat> @_Z21test_svdup_laneq_bf16u14__SVBfloat16_t220// CPP-CHECK-SAME: (<vscale x 8 x bfloat> [[ZN:%.*]]) #[[ATTR0]] {221// CPP-CHECK-NEXT: entry:222// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.laneq.nxv8bf16(<vscale x 8 x bfloat> [[ZN]], i32 3)223// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]224//225svbfloat16_t test_svdup_laneq_bf16(svbfloat16_t zn) ATTR {226 return SVE_ACLE_FUNC(svdup_laneq, _bf16)(zn, 3);227}228 229// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svdup_laneq_mf8230// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0]] {231// CHECK-NEXT: entry:232// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 1)233// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]234//235// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z20test_svdup_laneq_mf8u13__SVMfloat8_t236// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0]] {237// CPP-CHECK-NEXT: entry:238// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 1)239// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]240//241svmfloat8_t test_svdup_laneq_mf8(svmfloat8_t zn) ATTR {242 return SVE_ACLE_FUNC(svdup_laneq, _mf8)(zn, 1);243}244