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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \4// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s5// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 \6// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s7// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme -target-feature +sve2p1 \8// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s9// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sme -target-feature +sme2p1 \10// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s11// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \12// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s13// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \14// RUN: -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK15// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \16// RUN: -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK17// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s18 19 20#include <arm_sve.h>21 22#ifdef SVE_OVERLOADED_FORMS23// A simple used,unused... macro, long enough to represent any SVE builtin.24#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A325#else26#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A427#endif28 29#if defined(__ARM_FEATURE_SME) && defined(__ARM_FEATURE_SVE)30#define ATTR __arm_streaming_compatible31#elif defined(__ARM_FEATURE_SME)32#define ATTR __arm_streaming33#else34#define ATTR35#endif36 37// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svextq_u838// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0:[0-9]+]] {39// CHECK-NEXT: entry:40// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.extq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]], i32 0)41// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]42//43// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z14test_svextq_u8u11__SVUint8_tS_44// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0:[0-9]+]] {45// CPP-CHECK-NEXT: entry:46// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.extq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]], i32 0)47// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]48//49svuint8_t test_svextq_u8(svuint8_t zn, svuint8_t zm) ATTR {50 return SVE_ACLE_FUNC(svextq, _u8,,)(zn, zm, 0);51}52 53// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svextq_s854// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {55// CHECK-NEXT: entry:56// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.extq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]], i32 4)57// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]58//59// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z14test_svextq_s8u10__SVInt8_tS_60// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {61// CPP-CHECK-NEXT: entry:62// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.extq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]], i32 4)63// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]64//65svint8_t test_svextq_s8(svint8_t zn, svint8_t zm) ATTR {66 return SVE_ACLE_FUNC(svextq, _s8,,)(zn, zm, 4);67}68 69// CHECK-LABEL: define dso_local <vscale x 8 x i16> @test_svextq_u1670// CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]], <vscale x 8 x i16> [[ZM:%.*]]) #[[ATTR0]] {71// CHECK-NEXT: entry:72// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.extq.nxv8i16(<vscale x 8 x i16> [[ZN]], <vscale x 8 x i16> [[ZM]], i32 1)73// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]74//75// CPP-CHECK-LABEL: define dso_local <vscale x 8 x i16> @_Z15test_svextq_u16u12__SVUint16_tS_76// CPP-CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]], <vscale x 8 x i16> [[ZM:%.*]]) #[[ATTR0]] {77// CPP-CHECK-NEXT: entry:78// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.extq.nxv8i16(<vscale x 8 x i16> [[ZN]], <vscale x 8 x i16> [[ZM]], i32 1)79// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]80//81svuint16_t test_svextq_u16(svuint16_t zn, svuint16_t zm) ATTR {82 return SVE_ACLE_FUNC(svextq, _u16,,)(zn, zm, 1);83}84 85// CHECK-LABEL: define dso_local <vscale x 8 x i16> @test_svextq_s1686// CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]], <vscale x 8 x i16> [[ZM:%.*]]) #[[ATTR0]] {87// CHECK-NEXT: entry:88// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.extq.nxv8i16(<vscale x 8 x i16> [[ZN]], <vscale x 8 x i16> [[ZM]], i32 5)89// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]90//91// CPP-CHECK-LABEL: define dso_local <vscale x 8 x i16> @_Z15test_svextq_s16u11__SVInt16_tS_92// CPP-CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]], <vscale x 8 x i16> [[ZM:%.*]]) #[[ATTR0]] {93// CPP-CHECK-NEXT: entry:94// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.extq.nxv8i16(<vscale x 8 x i16> [[ZN]], <vscale x 8 x i16> [[ZM]], i32 5)95// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]96//97svint16_t test_svextq_s16(svint16_t zn, svint16_t zm) ATTR {98 return SVE_ACLE_FUNC(svextq, _s16,,)(zn, zm, 5);99}100 101// CHECK-LABEL: define dso_local <vscale x 4 x i32> @test_svextq_u32102// CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]], <vscale x 4 x i32> [[ZM:%.*]]) #[[ATTR0]] {103// CHECK-NEXT: entry:104// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.extq.nxv4i32(<vscale x 4 x i32> [[ZN]], <vscale x 4 x i32> [[ZM]], i32 2)105// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]106//107// CPP-CHECK-LABEL: define dso_local <vscale x 4 x i32> @_Z15test_svextq_u32u12__SVUint32_tS_108// CPP-CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]], <vscale x 4 x i32> [[ZM:%.*]]) #[[ATTR0]] {109// CPP-CHECK-NEXT: entry:110// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.extq.nxv4i32(<vscale x 4 x i32> [[ZN]], <vscale x 4 x i32> [[ZM]], i32 2)111// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]112//113svuint32_t test_svextq_u32(svuint32_t zn, svuint32_t zm) ATTR {114 return SVE_ACLE_FUNC(svextq, _u32,,)(zn, zm, 2);115}116 117// CHECK-LABEL: define dso_local <vscale x 4 x i32> @test_svextq_s32118// CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]], <vscale x 4 x i32> [[ZM:%.*]]) #[[ATTR0]] {119// CHECK-NEXT: entry:120// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.extq.nxv4i32(<vscale x 4 x i32> [[ZN]], <vscale x 4 x i32> [[ZM]], i32 3)121// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]122//123// CPP-CHECK-LABEL: define dso_local <vscale x 4 x i32> @_Z15test_svextq_s32u11__SVInt32_tS_124// CPP-CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]], <vscale x 4 x i32> [[ZM:%.*]]) #[[ATTR0]] {125// CPP-CHECK-NEXT: entry:126// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.extq.nxv4i32(<vscale x 4 x i32> [[ZN]], <vscale x 4 x i32> [[ZM]], i32 3)127// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]128//129svint32_t test_svextq_s32(svint32_t zn, svint32_t zm) ATTR {130 return SVE_ACLE_FUNC(svextq, _s32,,)(zn, zm, 3);131}132 133// CHECK-LABEL: define dso_local <vscale x 2 x i64> @test_svextq_u64134// CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]], <vscale x 2 x i64> [[ZM:%.*]]) #[[ATTR0]] {135// CHECK-NEXT: entry:136// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.extq.nxv2i64(<vscale x 2 x i64> [[ZN]], <vscale x 2 x i64> [[ZM]], i32 1)137// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]138//139// CPP-CHECK-LABEL: define dso_local <vscale x 2 x i64> @_Z15test_svextq_u64u12__SVUint64_tS_140// CPP-CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]], <vscale x 2 x i64> [[ZM:%.*]]) #[[ATTR0]] {141// CPP-CHECK-NEXT: entry:142// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.extq.nxv2i64(<vscale x 2 x i64> [[ZN]], <vscale x 2 x i64> [[ZM]], i32 1)143// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]144//145svuint64_t test_svextq_u64(svuint64_t zn, svuint64_t zm) ATTR {146 return SVE_ACLE_FUNC(svextq, _u64,,)(zn, zm, 1);147}148 149// CHECK-LABEL: define dso_local <vscale x 2 x i64> @test_svextq_s64150// CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]], <vscale x 2 x i64> [[ZM:%.*]]) #[[ATTR0]] {151// CHECK-NEXT: entry:152// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.extq.nxv2i64(<vscale x 2 x i64> [[ZN]], <vscale x 2 x i64> [[ZM]], i32 0)153// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]154//155// CPP-CHECK-LABEL: define dso_local <vscale x 2 x i64> @_Z15test_svextq_s64u11__SVInt64_tS_156// CPP-CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]], <vscale x 2 x i64> [[ZM:%.*]]) #[[ATTR0]] {157// CPP-CHECK-NEXT: entry:158// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.extq.nxv2i64(<vscale x 2 x i64> [[ZN]], <vscale x 2 x i64> [[ZM]], i32 0)159// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]160//161svint64_t test_svextq_s64(svint64_t zn, svint64_t zm) ATTR {162 return SVE_ACLE_FUNC(svextq, _s64,,)(zn, zm, 0);163}164 165// CHECK-LABEL: define dso_local <vscale x 8 x half> @test_svextq_f16166// CHECK-SAME: (<vscale x 8 x half> [[ZN:%.*]], <vscale x 8 x half> [[ZM:%.*]]) #[[ATTR0]] {167// CHECK-NEXT: entry:168// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.extq.nxv8f16(<vscale x 8 x half> [[ZN]], <vscale x 8 x half> [[ZM]], i32 7)169// CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]170//171// CPP-CHECK-LABEL: define dso_local <vscale x 8 x half> @_Z15test_svextq_f16u13__SVFloat16_tS_172// CPP-CHECK-SAME: (<vscale x 8 x half> [[ZN:%.*]], <vscale x 8 x half> [[ZM:%.*]]) #[[ATTR0]] {173// CPP-CHECK-NEXT: entry:174// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.extq.nxv8f16(<vscale x 8 x half> [[ZN]], <vscale x 8 x half> [[ZM]], i32 7)175// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]176//177svfloat16_t test_svextq_f16(svfloat16_t zn, svfloat16_t zm) ATTR {178 return SVE_ACLE_FUNC(svextq, _f16,,)(zn, zm, 7);179}180 181// CHECK-LABEL: define dso_local <vscale x 4 x float> @test_svextq_f32182// CHECK-SAME: (<vscale x 4 x float> [[ZN:%.*]], <vscale x 4 x float> [[ZM:%.*]]) #[[ATTR0]] {183// CHECK-NEXT: entry:184// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.extq.nxv4f32(<vscale x 4 x float> [[ZN]], <vscale x 4 x float> [[ZM]], i32 2)185// CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]186//187// CPP-CHECK-LABEL: define dso_local <vscale x 4 x float> @_Z15test_svextq_f32u13__SVFloat32_tS_188// CPP-CHECK-SAME: (<vscale x 4 x float> [[ZN:%.*]], <vscale x 4 x float> [[ZM:%.*]]) #[[ATTR0]] {189// CPP-CHECK-NEXT: entry:190// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.extq.nxv4f32(<vscale x 4 x float> [[ZN]], <vscale x 4 x float> [[ZM]], i32 2)191// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]192//193svfloat32_t test_svextq_f32(svfloat32_t zn, svfloat32_t zm) ATTR {194 return SVE_ACLE_FUNC(svextq, _f32,,)(zn, zm, 2);195}196 197// CHECK-LABEL: define dso_local <vscale x 2 x double> @test_svextq_f64198// CHECK-SAME: (<vscale x 2 x double> [[ZN:%.*]], <vscale x 2 x double> [[ZM:%.*]]) #[[ATTR0]] {199// CHECK-NEXT: entry:200// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.extq.nxv2f64(<vscale x 2 x double> [[ZN]], <vscale x 2 x double> [[ZM]], i32 0)201// CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]202//203// CPP-CHECK-LABEL: define dso_local <vscale x 2 x double> @_Z15test_svextq_f64u13__SVFloat64_tS_204// CPP-CHECK-SAME: (<vscale x 2 x double> [[ZN:%.*]], <vscale x 2 x double> [[ZM:%.*]]) #[[ATTR0]] {205// CPP-CHECK-NEXT: entry:206// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.extq.nxv2f64(<vscale x 2 x double> [[ZN]], <vscale x 2 x double> [[ZM]], i32 0)207// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]208//209svfloat64_t test_svextq_f64(svfloat64_t zn, svfloat64_t zm) ATTR {210 return SVE_ACLE_FUNC(svextq, _f64,,)(zn, zm, 0);211}212 213// CHECK-LABEL: define dso_local <vscale x 8 x bfloat> @test_svextq_bf16214// CHECK-SAME: (<vscale x 8 x bfloat> [[ZN:%.*]], <vscale x 8 x bfloat> [[ZM:%.*]]) #[[ATTR0]] {215// CHECK-NEXT: entry:216// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.extq.nxv8bf16(<vscale x 8 x bfloat> [[ZN]], <vscale x 8 x bfloat> [[ZM]], i32 6)217// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]218//219// CPP-CHECK-LABEL: define dso_local <vscale x 8 x bfloat> @_Z16test_svextq_bf16u14__SVBfloat16_tS_220// CPP-CHECK-SAME: (<vscale x 8 x bfloat> [[ZN:%.*]], <vscale x 8 x bfloat> [[ZM:%.*]]) #[[ATTR0]] {221// CPP-CHECK-NEXT: entry:222// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.extq.nxv8bf16(<vscale x 8 x bfloat> [[ZN]], <vscale x 8 x bfloat> [[ZM]], i32 6)223// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]224//225svbfloat16_t test_svextq_bf16(svbfloat16_t zn, svbfloat16_t zm) ATTR {226 return SVE_ACLE_FUNC(svextq, _bf16,,)(zn, zm, 6);227}228 229// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svextq_mf8230// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {231// CHECK-NEXT: entry:232// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.extq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]], i32 6)233// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]234//235// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z15test_svextq_mf8u13__SVMfloat8_tS_236// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {237// CPP-CHECK-NEXT: entry:238// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.extq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]], i32 6)239// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]240//241svmfloat8_t test_svextq_mf8(svmfloat8_t zn, svmfloat8_t zm) ATTR {242 return SVE_ACLE_FUNC(svextq, _mf8,,)(zn, zm, 6);243}244