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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sme -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s6// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sme -target-feature +sme2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK8// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s9// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK10// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s11#include <arm_neon.h>12#include <arm_sve.h>13 14#ifdef SVE_OVERLOADED_FORMS15// A simple used,unused... macro, long enough to represent any SVE builtin.16#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A317#else18#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A419#endif20 21#if defined(__ARM_FEATURE_SME) && defined(__ARM_FEATURE_SVE)22#define ATTR __arm_streaming_compatible23#elif defined(__ARM_FEATURE_SME)24#define ATTR __arm_streaming25#else26#define ATTR27#endif28 29// FADDQV30 31// CHECK-LABEL: @test_svaddqv_f16(32// CHECK-NEXT: entry:33// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])34// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.faddqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])35// CHECK-NEXT: ret <8 x half> [[TMP1]]36//37// CPP-CHECK-LABEL: @_Z16test_svaddqv_f16u10__SVBool_tu13__SVFloat16_t(38// CPP-CHECK-NEXT: entry:39// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])40// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.faddqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])41// CPP-CHECK-NEXT: ret <8 x half> [[TMP1]]42//43float16x8_t test_svaddqv_f16(svbool_t pg, svfloat16_t op) ATTR44{45 return SVE_ACLE_FUNC(svaddqv,,_f16,)(pg, op);46}47 48// CHECK-LABEL: @test_svaddqv_f32(49// CHECK-NEXT: entry:50// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])51// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.faddqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])52// CHECK-NEXT: ret <4 x float> [[TMP1]]53//54// CPP-CHECK-LABEL: @_Z16test_svaddqv_f32u10__SVBool_tu13__SVFloat32_t(55// CPP-CHECK-NEXT: entry:56// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])57// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.faddqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])58// CPP-CHECK-NEXT: ret <4 x float> [[TMP1]]59//60float32x4_t test_svaddqv_f32(svbool_t pg, svfloat32_t op) ATTR61{62 return SVE_ACLE_FUNC(svaddqv,,_f32,)(pg, op);63}64 65// CHECK-LABEL: @test_svaddqv_f64(66// CHECK-NEXT: entry:67// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])68// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.faddqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])69// CHECK-NEXT: ret <2 x double> [[TMP1]]70//71// CPP-CHECK-LABEL: @_Z16test_svaddqv_f64u10__SVBool_tu13__SVFloat64_t(72// CPP-CHECK-NEXT: entry:73// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])74// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.faddqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])75// CPP-CHECK-NEXT: ret <2 x double> [[TMP1]]76//77float64x2_t test_svaddqv_f64(svbool_t pg, svfloat64_t op) ATTR78{79 return SVE_ACLE_FUNC(svaddqv,,_f64,)(pg, op);80}81 82 83// FMAXQV84 85// CHECK-LABEL: @test_svmaxqv_f16(86// CHECK-NEXT: entry:87// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])88// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.fmaxqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])89// CHECK-NEXT: ret <8 x half> [[TMP1]]90//91// CPP-CHECK-LABEL: @_Z16test_svmaxqv_f16u10__SVBool_tu13__SVFloat16_t(92// CPP-CHECK-NEXT: entry:93// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])94// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.fmaxqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])95// CPP-CHECK-NEXT: ret <8 x half> [[TMP1]]96//97float16x8_t test_svmaxqv_f16(svbool_t pg, svfloat16_t op) ATTR98{99 return SVE_ACLE_FUNC(svmaxqv,,_f16,)(pg, op);100}101 102// CHECK-LABEL: @test_svmaxqv_f32(103// CHECK-NEXT: entry:104// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])105// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.fmaxqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])106// CHECK-NEXT: ret <4 x float> [[TMP1]]107//108// CPP-CHECK-LABEL: @_Z16test_svmaxqv_f32u10__SVBool_tu13__SVFloat32_t(109// CPP-CHECK-NEXT: entry:110// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])111// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.fmaxqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])112// CPP-CHECK-NEXT: ret <4 x float> [[TMP1]]113//114float32x4_t test_svmaxqv_f32(svbool_t pg, svfloat32_t op) ATTR115{116 return SVE_ACLE_FUNC(svmaxqv,,_f32,)(pg, op);117}118 119// CHECK-LABEL: @test_svmaxqv_f64(120// CHECK-NEXT: entry:121// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])122// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.fmaxqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])123// CHECK-NEXT: ret <2 x double> [[TMP1]]124//125// CPP-CHECK-LABEL: @_Z16test_svmaxqv_f64u10__SVBool_tu13__SVFloat64_t(126// CPP-CHECK-NEXT: entry:127// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])128// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.fmaxqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])129// CPP-CHECK-NEXT: ret <2 x double> [[TMP1]]130//131float64x2_t test_svmaxqv_f64(svbool_t pg, svfloat64_t op) ATTR132{133 return SVE_ACLE_FUNC(svmaxqv,,_f64,)(pg, op);134}135 136 137// FMINQV138 139// CHECK-LABEL: @test_svminqv_f16(140// CHECK-NEXT: entry:141// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])142// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.fminqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])143// CHECK-NEXT: ret <8 x half> [[TMP1]]144//145// CPP-CHECK-LABEL: @_Z16test_svminqv_f16u10__SVBool_tu13__SVFloat16_t(146// CPP-CHECK-NEXT: entry:147// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])148// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.fminqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])149// CPP-CHECK-NEXT: ret <8 x half> [[TMP1]]150//151float16x8_t test_svminqv_f16(svbool_t pg, svfloat16_t op) ATTR152{153 return SVE_ACLE_FUNC(svminqv,,_f16,)(pg, op);154}155 156// CHECK-LABEL: @test_svminqv_f32(157// CHECK-NEXT: entry:158// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])159// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.fminqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])160// CHECK-NEXT: ret <4 x float> [[TMP1]]161//162// CPP-CHECK-LABEL: @_Z16test_svminqv_f32u10__SVBool_tu13__SVFloat32_t(163// CPP-CHECK-NEXT: entry:164// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])165// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.fminqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])166// CPP-CHECK-NEXT: ret <4 x float> [[TMP1]]167//168float32x4_t test_svminqv_f32(svbool_t pg, svfloat32_t op) ATTR169{170 return SVE_ACLE_FUNC(svminqv,,_f32,)(pg, op);171}172 173// CHECK-LABEL: @test_svminqv_f64(174// CHECK-NEXT: entry:175// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])176// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.fminqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])177// CHECK-NEXT: ret <2 x double> [[TMP1]]178//179// CPP-CHECK-LABEL: @_Z16test_svminqv_f64u10__SVBool_tu13__SVFloat64_t(180// CPP-CHECK-NEXT: entry:181// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])182// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.fminqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])183// CPP-CHECK-NEXT: ret <2 x double> [[TMP1]]184//185float64x2_t test_svminqv_f64(svbool_t pg, svfloat64_t op) ATTR186{187 return SVE_ACLE_FUNC(svminqv,,_f64,)(pg, op);188}189 190 191// FMAXNMQV192 193// CHECK-LABEL: @test_svmaxnmqv_f16(194// CHECK-NEXT: entry:195// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])196// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.fmaxnmqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])197// CHECK-NEXT: ret <8 x half> [[TMP1]]198//199// CPP-CHECK-LABEL: @_Z18test_svmaxnmqv_f16u10__SVBool_tu13__SVFloat16_t(200// CPP-CHECK-NEXT: entry:201// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])202// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.fmaxnmqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])203// CPP-CHECK-NEXT: ret <8 x half> [[TMP1]]204//205float16x8_t test_svmaxnmqv_f16(svbool_t pg, svfloat16_t op) ATTR206{207 return SVE_ACLE_FUNC(svmaxnmqv,,_f16,)(pg, op);208}209 210// CHECK-LABEL: @test_svmaxnmqv_f32(211// CHECK-NEXT: entry:212// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])213// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.fmaxnmqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])214// CHECK-NEXT: ret <4 x float> [[TMP1]]215//216// CPP-CHECK-LABEL: @_Z18test_svmaxnmqv_f32u10__SVBool_tu13__SVFloat32_t(217// CPP-CHECK-NEXT: entry:218// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])219// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.fmaxnmqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])220// CPP-CHECK-NEXT: ret <4 x float> [[TMP1]]221//222float32x4_t test_svmaxnmqv_f32(svbool_t pg, svfloat32_t op) ATTR223{224 return SVE_ACLE_FUNC(svmaxnmqv,,_f32,)(pg, op);225}226 227// CHECK-LABEL: @test_svmaxnmqv_f64(228// CHECK-NEXT: entry:229// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])230// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.fmaxnmqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])231// CHECK-NEXT: ret <2 x double> [[TMP1]]232//233// CPP-CHECK-LABEL: @_Z18test_svmaxnmqv_f64u10__SVBool_tu13__SVFloat64_t(234// CPP-CHECK-NEXT: entry:235// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])236// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.fmaxnmqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])237// CPP-CHECK-NEXT: ret <2 x double> [[TMP1]]238//239float64x2_t test_svmaxnmqv_f64(svbool_t pg, svfloat64_t op) ATTR240{241 return SVE_ACLE_FUNC(svmaxnmqv,,_f64,)(pg, op);242}243 244 245// FMINNMQV246 247// CHECK-LABEL: @test_svminnmqv_f16(248// CHECK-NEXT: entry:249// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])250// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.fminnmqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])251// CHECK-NEXT: ret <8 x half> [[TMP1]]252//253// CPP-CHECK-LABEL: @_Z18test_svminnmqv_f16u10__SVBool_tu13__SVFloat16_t(254// CPP-CHECK-NEXT: entry:255// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])256// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.aarch64.sve.fminnmqv.v8f16.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])257// CPP-CHECK-NEXT: ret <8 x half> [[TMP1]]258//259float16x8_t test_svminnmqv_f16(svbool_t pg, svfloat16_t op) ATTR260{261 return SVE_ACLE_FUNC(svminnmqv,,_f16,)(pg, op);262}263 264// CHECK-LABEL: @test_svminnmqv_f32(265// CHECK-NEXT: entry:266// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])267// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.fminnmqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])268// CHECK-NEXT: ret <4 x float> [[TMP1]]269//270// CPP-CHECK-LABEL: @_Z18test_svminnmqv_f32u10__SVBool_tu13__SVFloat32_t(271// CPP-CHECK-NEXT: entry:272// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])273// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.aarch64.sve.fminnmqv.v4f32.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])274// CPP-CHECK-NEXT: ret <4 x float> [[TMP1]]275//276float32x4_t test_svminnmqv_f32(svbool_t pg, svfloat32_t op) ATTR277{278 return SVE_ACLE_FUNC(svminnmqv,,_f32,)(pg, op);279}280 281// CHECK-LABEL: @test_svminnmqv_f64(282// CHECK-NEXT: entry:283// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])284// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.fminnmqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])285// CHECK-NEXT: ret <2 x double> [[TMP1]]286//287// CPP-CHECK-LABEL: @_Z18test_svminnmqv_f64u10__SVBool_tu13__SVFloat64_t(288// CPP-CHECK-NEXT: entry:289// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])290// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.aarch64.sve.fminnmqv.v2f64.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])291// CPP-CHECK-NEXT: ret <2 x double> [[TMP1]]292//293float64x2_t test_svminnmqv_f64(svbool_t pg, svfloat64_t op) ATTR294{295 return SVE_ACLE_FUNC(svminnmqv,,_f64,)(pg, op);296}297