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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s4// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sme -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s6// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sme -target-feature +sme2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s7// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK8// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s9// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK10// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s11#include <arm_sve.h>12 13#ifdef SVE_OVERLOADED_FORMS14// A simple used,unused... macro, long enough to represent any SVE builtin.15#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A316#else17#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A418#endif19 20#if defined(__ARM_FEATURE_SME) && defined(__ARM_FEATURE_SVE)21#define ATTR __arm_streaming_compatible22#elif defined(__ARM_FEATURE_SME)23#define ATTR __arm_streaming24#else25#define ATTR26#endif27 28// ADDQV29 30// CHECK-LABEL: @test_svaddqv_s8(31// CHECK-NEXT: entry:32// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.addqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])33// CHECK-NEXT: ret <16 x i8> [[TMP0]]34//35// CPP-CHECK-LABEL: @_Z15test_svaddqv_s8u10__SVBool_tu10__SVInt8_t(36// CPP-CHECK-NEXT: entry:37// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.addqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])38// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]39//40int8x16_t test_svaddqv_s8(svbool_t pg, svint8_t op1) ATTR {41 return SVE_ACLE_FUNC(svaddqv,_s8,,)(pg, op1);42}43 44// CHECK-LABEL: @test_svaddqv_s16(45// CHECK-NEXT: entry:46// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])47// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.addqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])48// CHECK-NEXT: ret <8 x i16> [[TMP1]]49//50// CPP-CHECK-LABEL: @_Z16test_svaddqv_s16u10__SVBool_tu11__SVInt16_t(51// CPP-CHECK-NEXT: entry:52// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])53// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.addqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])54// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]55//56int16x8_t test_svaddqv_s16(svbool_t pg, svint16_t op1) ATTR {57 return SVE_ACLE_FUNC(svaddqv,_s16,,)(pg, op1);58}59 60// CHECK-LABEL: @test_svaddqv_s32(61// CHECK-NEXT: entry:62// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])63// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.addqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])64// CHECK-NEXT: ret <4 x i32> [[TMP1]]65//66// CPP-CHECK-LABEL: @_Z16test_svaddqv_s32u10__SVBool_tu11__SVInt32_t(67// CPP-CHECK-NEXT: entry:68// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])69// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.addqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])70// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]71//72int32x4_t test_svaddqv_s32(svbool_t pg, svint32_t op1) ATTR {73 return SVE_ACLE_FUNC(svaddqv,_s32,,)(pg, op1);74}75 76// CHECK-LABEL: @test_svaddqv_s64(77// CHECK-NEXT: entry:78// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])79// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.addqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])80// CHECK-NEXT: ret <2 x i64> [[TMP1]]81//82// CPP-CHECK-LABEL: @_Z16test_svaddqv_s64u10__SVBool_tu11__SVInt64_t(83// CPP-CHECK-NEXT: entry:84// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])85// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.addqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])86// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]87//88int64x2_t test_svaddqv_s64(svbool_t pg, svint64_t op1) ATTR {89 return SVE_ACLE_FUNC(svaddqv,_s64,,)(pg, op1);90}91 92// CHECK-LABEL: @test_svaddqv_u8(93// CHECK-NEXT: entry:94// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.addqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])95// CHECK-NEXT: ret <16 x i8> [[TMP0]]96//97// CPP-CHECK-LABEL: @_Z15test_svaddqv_u8u10__SVBool_tu11__SVUint8_t(98// CPP-CHECK-NEXT: entry:99// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.addqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])100// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]101//102uint8x16_t test_svaddqv_u8(svbool_t pg, svuint8_t op1) ATTR {103 return SVE_ACLE_FUNC(svaddqv,_u8,,)(pg, op1);104}105 106// CHECK-LABEL: @test_svaddqv_u16(107// CHECK-NEXT: entry:108// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])109// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.addqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])110// CHECK-NEXT: ret <8 x i16> [[TMP1]]111//112// CPP-CHECK-LABEL: @_Z16test_svaddqv_u16u10__SVBool_tu12__SVUint16_t(113// CPP-CHECK-NEXT: entry:114// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])115// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.addqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])116// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]117//118uint16x8_t test_svaddqv_u16(svbool_t pg, svuint16_t op1) ATTR {119 return SVE_ACLE_FUNC(svaddqv,_u16,,)(pg, op1);120}121 122// CHECK-LABEL: @test_svaddqv_u32(123// CHECK-NEXT: entry:124// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])125// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.addqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])126// CHECK-NEXT: ret <4 x i32> [[TMP1]]127//128// CPP-CHECK-LABEL: @_Z16test_svaddqv_u32u10__SVBool_tu12__SVUint32_t(129// CPP-CHECK-NEXT: entry:130// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])131// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.addqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])132// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]133//134uint32x4_t test_svaddqv_u32(svbool_t pg, svuint32_t op1) ATTR {135 return SVE_ACLE_FUNC(svaddqv,_u32,,)(pg, op1);136}137 138// CHECK-LABEL: @test_svaddqv_u64(139// CHECK-NEXT: entry:140// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])141// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.addqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])142// CHECK-NEXT: ret <2 x i64> [[TMP1]]143//144// CPP-CHECK-LABEL: @_Z16test_svaddqv_u64u10__SVBool_tu12__SVUint64_t(145// CPP-CHECK-NEXT: entry:146// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])147// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.addqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])148// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]149//150uint64x2_t test_svaddqv_u64(svbool_t pg, svuint64_t op1) ATTR {151 return SVE_ACLE_FUNC(svaddqv,_u64,,)(pg, op1);152}153 154 155// ANDQV156 157// CHECK-LABEL: @test_svandqv_s8(158// CHECK-NEXT: entry:159// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.andqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])160// CHECK-NEXT: ret <16 x i8> [[TMP0]]161//162// CPP-CHECK-LABEL: @_Z15test_svandqv_s8u10__SVBool_tu10__SVInt8_t(163// CPP-CHECK-NEXT: entry:164// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.andqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])165// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]166//167int8x16_t test_svandqv_s8(svbool_t pg, svint8_t op1) ATTR {168 return SVE_ACLE_FUNC(svandqv,_s8,,)(pg, op1);169}170 171// CHECK-LABEL: @test_svandqv_s16(172// CHECK-NEXT: entry:173// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])174// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.andqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])175// CHECK-NEXT: ret <8 x i16> [[TMP1]]176//177// CPP-CHECK-LABEL: @_Z16test_svandqv_s16u10__SVBool_tu11__SVInt16_t(178// CPP-CHECK-NEXT: entry:179// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])180// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.andqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])181// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]182//183int16x8_t test_svandqv_s16(svbool_t pg, svint16_t op1) ATTR {184 return SVE_ACLE_FUNC(svandqv,_s16,,)(pg, op1);185}186 187// CHECK-LABEL: @test_svandqv_s32(188// CHECK-NEXT: entry:189// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])190// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.andqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])191// CHECK-NEXT: ret <4 x i32> [[TMP1]]192//193// CPP-CHECK-LABEL: @_Z16test_svandqv_s32u10__SVBool_tu11__SVInt32_t(194// CPP-CHECK-NEXT: entry:195// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])196// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.andqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])197// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]198//199int32x4_t test_svandqv_s32(svbool_t pg, svint32_t op1) ATTR {200 return SVE_ACLE_FUNC(svandqv,_s32,,)(pg, op1);201}202 203// CHECK-LABEL: @test_svandqv_s64(204// CHECK-NEXT: entry:205// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])206// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.andqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])207// CHECK-NEXT: ret <2 x i64> [[TMP1]]208//209// CPP-CHECK-LABEL: @_Z16test_svandqv_s64u10__SVBool_tu11__SVInt64_t(210// CPP-CHECK-NEXT: entry:211// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])212// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.andqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])213// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]214//215int64x2_t test_svandqv_s64(svbool_t pg, svint64_t op1) ATTR {216 return SVE_ACLE_FUNC(svandqv,_s64,,)(pg, op1);217}218 219// CHECK-LABEL: @test_svandqv_u8(220// CHECK-NEXT: entry:221// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.andqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])222// CHECK-NEXT: ret <16 x i8> [[TMP0]]223//224// CPP-CHECK-LABEL: @_Z15test_svandqv_u8u10__SVBool_tu11__SVUint8_t(225// CPP-CHECK-NEXT: entry:226// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.andqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])227// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]228//229uint8x16_t test_svandqv_u8(svbool_t pg, svuint8_t op1) ATTR {230 return SVE_ACLE_FUNC(svandqv,_u8,,)(pg, op1);231}232 233// CHECK-LABEL: @test_svandqv_u16(234// CHECK-NEXT: entry:235// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])236// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.andqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])237// CHECK-NEXT: ret <8 x i16> [[TMP1]]238//239// CPP-CHECK-LABEL: @_Z16test_svandqv_u16u10__SVBool_tu12__SVUint16_t(240// CPP-CHECK-NEXT: entry:241// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])242// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.andqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])243// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]244//245uint16x8_t test_svandqv_u16(svbool_t pg, svuint16_t op1) ATTR {246 return SVE_ACLE_FUNC(svandqv,_u16,,)(pg, op1);247}248 249// CHECK-LABEL: @test_svandqv_u32(250// CHECK-NEXT: entry:251// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])252// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.andqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])253// CHECK-NEXT: ret <4 x i32> [[TMP1]]254//255// CPP-CHECK-LABEL: @_Z16test_svandqv_u32u10__SVBool_tu12__SVUint32_t(256// CPP-CHECK-NEXT: entry:257// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])258// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.andqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])259// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]260//261uint32x4_t test_svandqv_u32(svbool_t pg, svuint32_t op1) ATTR {262 return SVE_ACLE_FUNC(svandqv,_u32,,)(pg, op1);263}264 265// CHECK-LABEL: @test_svandqv_u64(266// CHECK-NEXT: entry:267// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])268// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.andqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])269// CHECK-NEXT: ret <2 x i64> [[TMP1]]270//271// CPP-CHECK-LABEL: @_Z16test_svandqv_u64u10__SVBool_tu12__SVUint64_t(272// CPP-CHECK-NEXT: entry:273// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])274// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.andqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])275// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]276//277uint64x2_t test_svandqv_u64(svbool_t pg, svuint64_t op1) ATTR {278 return SVE_ACLE_FUNC(svandqv,_u64,,)(pg, op1);279}280 281 282// EORQV283 284// CHECK-LABEL: @test_sveorqv_s8(285// CHECK-NEXT: entry:286// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.eorqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])287// CHECK-NEXT: ret <16 x i8> [[TMP0]]288//289// CPP-CHECK-LABEL: @_Z15test_sveorqv_s8u10__SVBool_tu10__SVInt8_t(290// CPP-CHECK-NEXT: entry:291// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.eorqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])292// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]293//294int8x16_t test_sveorqv_s8(svbool_t pg, svint8_t op1) ATTR {295 return SVE_ACLE_FUNC(sveorqv,_s8,,)(pg, op1);296}297 298// CHECK-LABEL: @test_sveorqv_s16(299// CHECK-NEXT: entry:300// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])301// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.eorqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])302// CHECK-NEXT: ret <8 x i16> [[TMP1]]303//304// CPP-CHECK-LABEL: @_Z16test_sveorqv_s16u10__SVBool_tu11__SVInt16_t(305// CPP-CHECK-NEXT: entry:306// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])307// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.eorqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])308// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]309//310int16x8_t test_sveorqv_s16(svbool_t pg, svint16_t op1) ATTR {311 return SVE_ACLE_FUNC(sveorqv,_s16,,)(pg, op1);312}313 314// CHECK-LABEL: @test_sveorqv_s32(315// CHECK-NEXT: entry:316// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])317// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.eorqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])318// CHECK-NEXT: ret <4 x i32> [[TMP1]]319//320// CPP-CHECK-LABEL: @_Z16test_sveorqv_s32u10__SVBool_tu11__SVInt32_t(321// CPP-CHECK-NEXT: entry:322// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])323// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.eorqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])324// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]325//326int32x4_t test_sveorqv_s32(svbool_t pg, svint32_t op1) ATTR {327 return SVE_ACLE_FUNC(sveorqv,_s32,,)(pg, op1);328}329 330// CHECK-LABEL: @test_sveorqv_s64(331// CHECK-NEXT: entry:332// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])333// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.eorqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])334// CHECK-NEXT: ret <2 x i64> [[TMP1]]335//336// CPP-CHECK-LABEL: @_Z16test_sveorqv_s64u10__SVBool_tu11__SVInt64_t(337// CPP-CHECK-NEXT: entry:338// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])339// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.eorqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])340// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]341//342int64x2_t test_sveorqv_s64(svbool_t pg, svint64_t op1) ATTR {343 return SVE_ACLE_FUNC(sveorqv,_s64,,)(pg, op1);344}345 346// CHECK-LABEL: @test_sveorqv_u8(347// CHECK-NEXT: entry:348// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.eorqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])349// CHECK-NEXT: ret <16 x i8> [[TMP0]]350//351// CPP-CHECK-LABEL: @_Z15test_sveorqv_u8u10__SVBool_tu11__SVUint8_t(352// CPP-CHECK-NEXT: entry:353// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.eorqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])354// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]355//356uint8x16_t test_sveorqv_u8(svbool_t pg, svuint8_t op1) ATTR {357 return SVE_ACLE_FUNC(sveorqv,_u8,,)(pg, op1);358}359 360// CHECK-LABEL: @test_sveorqv_u16(361// CHECK-NEXT: entry:362// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])363// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.eorqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])364// CHECK-NEXT: ret <8 x i16> [[TMP1]]365//366// CPP-CHECK-LABEL: @_Z16test_sveorqv_u16u10__SVBool_tu12__SVUint16_t(367// CPP-CHECK-NEXT: entry:368// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])369// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.eorqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])370// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]371//372uint16x8_t test_sveorqv_u16(svbool_t pg, svuint16_t op1) ATTR {373 return SVE_ACLE_FUNC(sveorqv,_u16,,)(pg, op1);374}375 376// CHECK-LABEL: @test_sveorqv_u32(377// CHECK-NEXT: entry:378// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])379// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.eorqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])380// CHECK-NEXT: ret <4 x i32> [[TMP1]]381//382// CPP-CHECK-LABEL: @_Z16test_sveorqv_u32u10__SVBool_tu12__SVUint32_t(383// CPP-CHECK-NEXT: entry:384// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])385// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.eorqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])386// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]387//388uint32x4_t test_sveorqv_u32(svbool_t pg, svuint32_t op1) ATTR {389 return SVE_ACLE_FUNC(sveorqv,_u32,,)(pg, op1);390}391 392// CHECK-LABEL: @test_sveorqv_u64(393// CHECK-NEXT: entry:394// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])395// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.eorqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])396// CHECK-NEXT: ret <2 x i64> [[TMP1]]397//398// CPP-CHECK-LABEL: @_Z16test_sveorqv_u64u10__SVBool_tu12__SVUint64_t(399// CPP-CHECK-NEXT: entry:400// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])401// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.eorqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])402// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]403//404uint64x2_t test_sveorqv_u64(svbool_t pg, svuint64_t op1) ATTR {405 return SVE_ACLE_FUNC(sveorqv,_u64,,)(pg, op1);406}407 408 409// ORQV410 411// CHECK-LABEL: @test_svorqv_s8(412// CHECK-NEXT: entry:413// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.orqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])414// CHECK-NEXT: ret <16 x i8> [[TMP0]]415//416// CPP-CHECK-LABEL: @_Z14test_svorqv_s8u10__SVBool_tu10__SVInt8_t(417// CPP-CHECK-NEXT: entry:418// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.orqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])419// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]420//421int8x16_t test_svorqv_s8(svbool_t pg, svint8_t op1) ATTR {422 return SVE_ACLE_FUNC(svorqv,_s8,,)(pg, op1);423}424 425// CHECK-LABEL: @test_svorqv_s16(426// CHECK-NEXT: entry:427// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])428// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.orqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])429// CHECK-NEXT: ret <8 x i16> [[TMP1]]430//431// CPP-CHECK-LABEL: @_Z15test_svorqv_s16u10__SVBool_tu11__SVInt16_t(432// CPP-CHECK-NEXT: entry:433// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])434// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.orqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])435// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]436//437int16x8_t test_svorqv_s16(svbool_t pg, svint16_t op1) ATTR {438 return SVE_ACLE_FUNC(svorqv,_s16,,)(pg, op1);439}440 441// CHECK-LABEL: @test_svorqv_s32(442// CHECK-NEXT: entry:443// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])444// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.orqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])445// CHECK-NEXT: ret <4 x i32> [[TMP1]]446//447// CPP-CHECK-LABEL: @_Z15test_svorqv_s32u10__SVBool_tu11__SVInt32_t(448// CPP-CHECK-NEXT: entry:449// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])450// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.orqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])451// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]452//453int32x4_t test_svorqv_s32(svbool_t pg, svint32_t op1) ATTR {454 return SVE_ACLE_FUNC(svorqv,_s32,,)(pg, op1);455}456 457// CHECK-LABEL: @test_svorqv_s64(458// CHECK-NEXT: entry:459// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])460// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.orqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])461// CHECK-NEXT: ret <2 x i64> [[TMP1]]462//463// CPP-CHECK-LABEL: @_Z15test_svorqv_s64u10__SVBool_tu11__SVInt64_t(464// CPP-CHECK-NEXT: entry:465// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])466// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.orqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])467// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]468//469int64x2_t test_svorqv_s64(svbool_t pg, svint64_t op1) ATTR {470 return SVE_ACLE_FUNC(svorqv,_s64,,)(pg, op1);471}472 473// CHECK-LABEL: @test_svorqv_u8(474// CHECK-NEXT: entry:475// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.orqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])476// CHECK-NEXT: ret <16 x i8> [[TMP0]]477//478// CPP-CHECK-LABEL: @_Z14test_svorqv_u8u10__SVBool_tu11__SVUint8_t(479// CPP-CHECK-NEXT: entry:480// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.orqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])481// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]482//483uint8x16_t test_svorqv_u8(svbool_t pg, svuint8_t op1) ATTR {484 return SVE_ACLE_FUNC(svorqv,_u8,,)(pg, op1);485}486 487// CHECK-LABEL: @test_svorqv_u16(488// CHECK-NEXT: entry:489// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])490// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.orqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])491// CHECK-NEXT: ret <8 x i16> [[TMP1]]492//493// CPP-CHECK-LABEL: @_Z15test_svorqv_u16u10__SVBool_tu12__SVUint16_t(494// CPP-CHECK-NEXT: entry:495// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])496// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.orqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])497// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]498//499uint16x8_t test_svorqv_u16(svbool_t pg, svuint16_t op1) ATTR {500 return SVE_ACLE_FUNC(svorqv,_u16,,)(pg, op1);501}502 503// CHECK-LABEL: @test_svorqv_u32(504// CHECK-NEXT: entry:505// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])506// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.orqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])507// CHECK-NEXT: ret <4 x i32> [[TMP1]]508//509// CPP-CHECK-LABEL: @_Z15test_svorqv_u32u10__SVBool_tu12__SVUint32_t(510// CPP-CHECK-NEXT: entry:511// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])512// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.orqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])513// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]514//515uint32x4_t test_svorqv_u32(svbool_t pg, svuint32_t op1) ATTR {516 return SVE_ACLE_FUNC(svorqv,_u32,,)(pg, op1);517}518 519// CHECK-LABEL: @test_svorqv_u64(520// CHECK-NEXT: entry:521// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])522// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.orqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])523// CHECK-NEXT: ret <2 x i64> [[TMP1]]524//525// CPP-CHECK-LABEL: @_Z15test_svorqv_u64u10__SVBool_tu12__SVUint64_t(526// CPP-CHECK-NEXT: entry:527// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])528// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.orqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])529// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]530//531uint64x2_t test_svorqv_u64(svbool_t pg, svuint64_t op1) ATTR {532 return SVE_ACLE_FUNC(svorqv,_u64,,)(pg, op1);533}534 535 536// SMAXQV537 538// CHECK-LABEL: @test_svmaxqv_s8(539// CHECK-NEXT: entry:540// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.smaxqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])541// CHECK-NEXT: ret <16 x i8> [[TMP0]]542//543// CPP-CHECK-LABEL: @_Z15test_svmaxqv_s8u10__SVBool_tu10__SVInt8_t(544// CPP-CHECK-NEXT: entry:545// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.smaxqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])546// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]547//548int8x16_t test_svmaxqv_s8(svbool_t pg, svint8_t op1) ATTR {549 return SVE_ACLE_FUNC(svmaxqv,_s8,,)(pg, op1);550}551 552// CHECK-LABEL: @test_svmaxqv_s16(553// CHECK-NEXT: entry:554// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])555// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.smaxqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])556// CHECK-NEXT: ret <8 x i16> [[TMP1]]557//558// CPP-CHECK-LABEL: @_Z16test_svmaxqv_s16u10__SVBool_tu11__SVInt16_t(559// CPP-CHECK-NEXT: entry:560// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])561// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.smaxqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])562// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]563//564int16x8_t test_svmaxqv_s16(svbool_t pg, svint16_t op1) ATTR {565 return SVE_ACLE_FUNC(svmaxqv,_s16,,)(pg, op1);566}567 568// CHECK-LABEL: @test_svmaxqv_s32(569// CHECK-NEXT: entry:570// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])571// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.smaxqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])572// CHECK-NEXT: ret <4 x i32> [[TMP1]]573//574// CPP-CHECK-LABEL: @_Z16test_svmaxqv_s32u10__SVBool_tu11__SVInt32_t(575// CPP-CHECK-NEXT: entry:576// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])577// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.smaxqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])578// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]579//580int32x4_t test_svmaxqv_s32(svbool_t pg, svint32_t op1) ATTR {581 return SVE_ACLE_FUNC(svmaxqv,_s32,,)(pg, op1);582}583 584// CHECK-LABEL: @test_svmaxqv_s64(585// CHECK-NEXT: entry:586// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])587// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.smaxqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])588// CHECK-NEXT: ret <2 x i64> [[TMP1]]589//590// CPP-CHECK-LABEL: @_Z16test_svmaxqv_s64u10__SVBool_tu11__SVInt64_t(591// CPP-CHECK-NEXT: entry:592// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])593// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.smaxqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])594// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]595//596int64x2_t test_svmaxqv_s64(svbool_t pg, svint64_t op1) ATTR {597 return SVE_ACLE_FUNC(svmaxqv,_s64,,)(pg, op1);598}599 600 601// UMAXQV602 603// CHECK-LABEL: @test_svmaxqv_u8(604// CHECK-NEXT: entry:605// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.umaxqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])606// CHECK-NEXT: ret <16 x i8> [[TMP0]]607//608// CPP-CHECK-LABEL: @_Z15test_svmaxqv_u8u10__SVBool_tu11__SVUint8_t(609// CPP-CHECK-NEXT: entry:610// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.umaxqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])611// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]612//613uint8x16_t test_svmaxqv_u8(svbool_t pg, svuint8_t op1) ATTR {614 return SVE_ACLE_FUNC(svmaxqv,_u8,,)(pg, op1);615}616 617// CHECK-LABEL: @test_svmaxqv_u16(618// CHECK-NEXT: entry:619// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])620// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.umaxqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])621// CHECK-NEXT: ret <8 x i16> [[TMP1]]622//623// CPP-CHECK-LABEL: @_Z16test_svmaxqv_u16u10__SVBool_tu12__SVUint16_t(624// CPP-CHECK-NEXT: entry:625// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])626// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.umaxqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])627// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]628//629uint16x8_t test_svmaxqv_u16(svbool_t pg, svuint16_t op1) ATTR {630 return SVE_ACLE_FUNC(svmaxqv,_u16,,)(pg, op1);631}632 633// CHECK-LABEL: @test_svmaxqv_u32(634// CHECK-NEXT: entry:635// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])636// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.umaxqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])637// CHECK-NEXT: ret <4 x i32> [[TMP1]]638//639// CPP-CHECK-LABEL: @_Z16test_svmaxqv_u32u10__SVBool_tu12__SVUint32_t(640// CPP-CHECK-NEXT: entry:641// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])642// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.umaxqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])643// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]644//645uint32x4_t test_svmaxqv_u32(svbool_t pg, svuint32_t op1) ATTR {646 return SVE_ACLE_FUNC(svmaxqv,_u32,,)(pg, op1);647}648 649// CHECK-LABEL: @test_svmaxqv_u64(650// CHECK-NEXT: entry:651// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])652// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.umaxqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])653// CHECK-NEXT: ret <2 x i64> [[TMP1]]654//655// CPP-CHECK-LABEL: @_Z16test_svmaxqv_u64u10__SVBool_tu12__SVUint64_t(656// CPP-CHECK-NEXT: entry:657// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])658// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.umaxqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])659// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]660//661uint64x2_t test_svmaxqv_u64(svbool_t pg, svuint64_t op1) ATTR {662 return SVE_ACLE_FUNC(svmaxqv,_u64,,)(pg, op1);663}664 665 666// SMINQV667 668// CHECK-LABEL: @test_svminqv_s8(669// CHECK-NEXT: entry:670// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.sminqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])671// CHECK-NEXT: ret <16 x i8> [[TMP0]]672//673// CPP-CHECK-LABEL: @_Z15test_svminqv_s8u10__SVBool_tu10__SVInt8_t(674// CPP-CHECK-NEXT: entry:675// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.sminqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])676// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]677//678int8x16_t test_svminqv_s8(svbool_t pg, svint8_t op1) ATTR {679 return SVE_ACLE_FUNC(svminqv,_s8,,)(pg, op1);680}681 682// CHECK-LABEL: @test_svminqv_s16(683// CHECK-NEXT: entry:684// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])685// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.sminqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])686// CHECK-NEXT: ret <8 x i16> [[TMP1]]687//688// CPP-CHECK-LABEL: @_Z16test_svminqv_s16u10__SVBool_tu11__SVInt16_t(689// CPP-CHECK-NEXT: entry:690// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])691// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.sminqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])692// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]693//694int16x8_t test_svminqv_s16(svbool_t pg, svint16_t op1) ATTR {695 return SVE_ACLE_FUNC(svminqv,_s16,,)(pg, op1);696}697 698// CHECK-LABEL: @test_svminqv_s32(699// CHECK-NEXT: entry:700// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])701// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.sminqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])702// CHECK-NEXT: ret <4 x i32> [[TMP1]]703//704// CPP-CHECK-LABEL: @_Z16test_svminqv_s32u10__SVBool_tu11__SVInt32_t(705// CPP-CHECK-NEXT: entry:706// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])707// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.sminqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])708// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]709//710int32x4_t test_svminqv_s32(svbool_t pg, svint32_t op1) ATTR {711 return SVE_ACLE_FUNC(svminqv,_s32,,)(pg, op1);712}713 714// CHECK-LABEL: @test_svminqv_s64(715// CHECK-NEXT: entry:716// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])717// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.sminqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])718// CHECK-NEXT: ret <2 x i64> [[TMP1]]719//720// CPP-CHECK-LABEL: @_Z16test_svminqv_s64u10__SVBool_tu11__SVInt64_t(721// CPP-CHECK-NEXT: entry:722// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])723// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.sminqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])724// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]725//726int64x2_t test_svminqv_s64(svbool_t pg, svint64_t op1) ATTR {727 return SVE_ACLE_FUNC(svminqv,_s64,,)(pg, op1);728}729 730 731// UMINQV732 733// CHECK-LABEL: @test_svminqv_u8(734// CHECK-NEXT: entry:735// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.uminqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])736// CHECK-NEXT: ret <16 x i8> [[TMP0]]737//738// CPP-CHECK-LABEL: @_Z15test_svminqv_u8u10__SVBool_tu11__SVUint8_t(739// CPP-CHECK-NEXT: entry:740// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.aarch64.sve.uminqv.v16i8.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]])741// CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]]742//743uint8x16_t test_svminqv_u8(svbool_t pg, svuint8_t op1) ATTR {744 return SVE_ACLE_FUNC(svminqv,_u8,,)(pg, op1);745}746 747// CHECK-LABEL: @test_svminqv_u16(748// CHECK-NEXT: entry:749// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])750// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.uminqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])751// CHECK-NEXT: ret <8 x i16> [[TMP1]]752//753// CPP-CHECK-LABEL: @_Z16test_svminqv_u16u10__SVBool_tu12__SVUint16_t(754// CPP-CHECK-NEXT: entry:755// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])756// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.aarch64.sve.uminqv.v8i16.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]])757// CPP-CHECK-NEXT: ret <8 x i16> [[TMP1]]758//759uint16x8_t test_svminqv_u16(svbool_t pg, svuint16_t op1) ATTR {760 return SVE_ACLE_FUNC(svminqv,_u16,,)(pg, op1);761}762 763// CHECK-LABEL: @test_svminqv_u32(764// CHECK-NEXT: entry:765// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])766// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.uminqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])767// CHECK-NEXT: ret <4 x i32> [[TMP1]]768//769// CPP-CHECK-LABEL: @_Z16test_svminqv_u32u10__SVBool_tu12__SVUint32_t(770// CPP-CHECK-NEXT: entry:771// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])772// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.aarch64.sve.uminqv.v4i32.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]])773// CPP-CHECK-NEXT: ret <4 x i32> [[TMP1]]774//775uint32x4_t test_svminqv_u32(svbool_t pg, svuint32_t op1) ATTR {776 return SVE_ACLE_FUNC(svminqv,_u32,,)(pg, op1);777}778 779// CHECK-LABEL: @test_svminqv_u64(780// CHECK-NEXT: entry:781// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])782// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.uminqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])783// CHECK-NEXT: ret <2 x i64> [[TMP1]]784//785// CPP-CHECK-LABEL: @_Z16test_svminqv_u64u10__SVBool_tu12__SVUint64_t(786// CPP-CHECK-NEXT: entry:787// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])788// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.aarch64.sve.uminqv.v2i64.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]])789// CPP-CHECK-NEXT: ret <2 x i64> [[TMP1]]790//791uint64x2_t test_svminqv_u64(svbool_t pg, svuint64_t op1) ATTR {792 return SVE_ACLE_FUNC(svminqv,_u64,,)(pg, op1);793}794