95 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \4// RUN: -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -emit-llvm -o - %s | FileCheck %s5// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \6// RUN: -target-feature +sme -O1 -Werror -emit-llvm -o - %s | FileCheck %s7// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \8// RUN: -target-feature +sve -target-feature +sme -O1 -Werror -emit-llvm -o - %s | FileCheck %s9// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \10// RUN: -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK11// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \12// RUN: -target-feature +sme -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK13// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s14// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s15 16#include <arm_sve.h>17 18#if defined(__ARM_FEATURE_SME) && defined(__ARM_FEATURE_SVE)19#define ATTR __arm_streaming_compatible20#elif defined(__ARM_FEATURE_SME)21#define ATTR __arm_streaming22#else23#define ATTR24#endif25 26// CHECK-LABEL: @test_svpsel_lane_b8(27// CHECK-NEXT: entry:28// CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 1529// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv16i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 16 x i1> [[P2:%.*]], i32 [[ADD]])30// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]31//32// CPP-CHECK-LABEL: @_Z19test_svpsel_lane_b8u10__SVBool_tS_j(33// CPP-CHECK-NEXT: entry:34// CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 1535// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv16i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 16 x i1> [[P2:%.*]], i32 [[ADD]])36// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]37//38svbool_t test_svpsel_lane_b8(svbool_t p1, svbool_t p2, uint32_t idx) ATTR {39 return svpsel_lane_b8(p1, p2, idx + 15);40}41 42// CHECK-LABEL: @test_svpsel_lane_b16(43// CHECK-NEXT: entry:44// CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 745// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[P2:%.*]])46// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv8i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 8 x i1> [[TMP0]], i32 [[ADD]])47// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]48//49// CPP-CHECK-LABEL: @_Z20test_svpsel_lane_b16u10__SVBool_tS_j(50// CPP-CHECK-NEXT: entry:51// CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 752// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[P2:%.*]])53// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv8i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 8 x i1> [[TMP0]], i32 [[ADD]])54// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]55//56svbool_t test_svpsel_lane_b16(svbool_t p1, svbool_t p2, uint32_t idx) ATTR {57 return svpsel_lane_b16(p1, p2, idx + 7);58}59 60// CHECK-LABEL: @test_svpsel_lane_b32(61// CHECK-NEXT: entry:62// CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 363// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[P2:%.*]])64// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv4i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[ADD]])65// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]66//67// CPP-CHECK-LABEL: @_Z20test_svpsel_lane_b32u10__SVBool_tS_j(68// CPP-CHECK-NEXT: entry:69// CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 370// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[P2:%.*]])71// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv4i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[ADD]])72// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]73//74svbool_t test_svpsel_lane_b32(svbool_t p1, svbool_t p2, uint32_t idx) ATTR {75 return svpsel_lane_b32(p1, p2, idx + 3);76}77 78// CHECK-LABEL: @test_svpsel_lane_b64(79// CHECK-NEXT: entry:80// CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 181// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[P2:%.*]])82// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv2i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 2 x i1> [[TMP0]], i32 [[ADD]])83// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]84//85// CPP-CHECK-LABEL: @_Z20test_svpsel_lane_b64u10__SVBool_tS_j(86// CPP-CHECK-NEXT: entry:87// CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 188// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[P2:%.*]])89// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv2i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 2 x i1> [[TMP0]], i32 [[ADD]])90// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]91//92svbool_t test_svpsel_lane_b64(svbool_t p1, svbool_t p2, uint32_t idx) ATTR {93 return svpsel_lane_b64(p1, p2, idx + 1);94}95